Commit Graph

4194 Commits (37ab6ecce2994e11b31c636ee39b76a2545dad8d)

Author SHA1 Message Date
Cruz Monrreal II 35f9ab070c Manually resolved GigaDevice target addition. 2018-12-30 21:53:08 -06:00
Cruz Monrreal II 55fe7129a0 Correct improper merge resolution.
NUMAKER_PFM_NUC472 does not have ANALOGOUT enabled
2018-12-28 14:09:10 -06:00
c_jin 44cd38cdfe Style Format for GD32F30x standard peripheral files 2018-12-27 23:12:03 -06:00
c_jin 1029821f75 Add SPDX identifier 2018-12-27 23:07:22 -06:00
chao_king 8c355426c8 Delete startup_gd32f30x_cl.s 2018-12-27 23:00:38 -06:00
chao_king 27a39f506d Delete startup_gd32f30x_cl.s 2018-12-27 23:00:38 -06:00
chao_king 6b542c22e0 Delete startup_gd32f30x_cl.s 2018-12-27 23:00:38 -06:00
chao_king 0470873724 Delete startup_gd32f30x_cl.s 2018-12-27 23:00:38 -06:00
chao_king e95021647d Delete a button definition 2018-12-27 23:00:37 -06:00
chao_king 08b49159d3 Re add target support for GD32F307VG
1. Mainly change TARGET_Gigadevice --> TARGET_GigaDevice
2. Add license header
2018-12-27 22:44:58 -06:00
chao_king ff758c767a Delete startup_gd32f30x_cl.s 2018-12-27 22:41:37 -06:00
chao_king 9c3bf465c0 Delete startup_gd32f30x_cl.s 2018-12-27 22:41:37 -06:00
chao_king 6c123c469c Delete startup_gd32f30x_cl.s 2018-12-27 22:41:37 -06:00
chao_king fb10a3acc9 Add it to replace startup_gd32f30x_cl.s 2018-12-27 22:41:37 -06:00
chao_king 35407f57a0 Add it to replace startup_gd32f30x_cl.s 2018-12-27 22:41:37 -06:00
chao_king 5fc4ba704c Add it to replace startup_gd32f30x_cl.s 2018-12-27 22:41:37 -06:00
chao_king a7cef57442 Delete startup_gd32f30x_cl.s 2018-12-27 22:41:37 -06:00
chao_king 4fd14ca7d5 Add it to replace startup_gd32f30x_cl.s 2018-12-27 22:41:37 -06:00
chao_king 8b9cfba76d Delete a button definition 2018-12-27 22:41:37 -06:00
chao_king 5a16ea489e Re add target support for GD32F307VG
1. Mainly change TARGET_Gigadevice --> TARGET_GigaDevice
2. Add license header
2018-12-27 22:36:18 -06:00
panyz0725@thundersoft.com 38611bb807 Add MPU to fix CI failed 2018-12-27 22:29:10 -06:00
panyz0725@thundersoft.com 37d0665904 Fix Expecting object 2018-12-27 22:29:10 -06:00
panyz0725@thundersoft.com 236ed80abd Set __ICFEDIT_size_cstack__ =1k 2018-12-27 22:29:10 -06:00
ThunderSoft_mbed_os a55bd7094a Update us_ticker.c 2018-12-27 22:29:10 -06:00
ThunderSoft_mbed_os 9226dd7ef3 Update spi_api.c 2018-12-27 22:29:10 -06:00
ThunderSoft_mbed_os bdd3895472 Update sleep.c 2018-12-27 22:29:10 -06:00
ThunderSoft_mbed_os 540b5cfa39 Update pwmout_api.c 2018-12-27 22:29:10 -06:00
ThunderSoft_mbed_os f00c55fc9e Update port_api.c 2018-12-27 22:29:10 -06:00
ThunderSoft_mbed_os 6b10e8948f Update pinmap.c 2018-12-27 22:29:10 -06:00
ThunderSoft_mbed_os 863dd72ec0 Update objects.h 2018-12-27 22:29:10 -06:00
ThunderSoft_mbed_os dabca5df9e Update i2c_api.c 2018-12-27 22:29:10 -06:00
ThunderSoft_mbed_os b30733c209 Update gpio_object.h 2018-12-27 22:29:10 -06:00
ThunderSoft_mbed_os 1140b041cd Update gpio_api.c 2018-12-27 22:29:10 -06:00
ThunderSoft_mbed_os 18d4526d26 Update device.h 2018-12-27 22:29:10 -06:00
ThunderSoft_mbed_os e175741ea5 Update analogout_api.c 2018-12-27 22:29:10 -06:00
ThunderSoft_mbed_os a92241e1c3 Update analogin_api.c 2018-12-27 22:29:10 -06:00
ThunderSoft_mbed_os e0acd54429 Update PortNames.h 2018-12-27 22:29:10 -06:00
ThunderSoft_mbed_os 3d64103089 Update PinNames.h 2018-12-27 22:29:10 -06:00
ThunderSoft_mbed_os 2d438f72f5 Update PeripheralNames.h 2018-12-27 22:29:10 -06:00
ThunderSoft_mbed_os ef4e0a48c2 Update mbed_rtx.h 2018-12-27 22:29:10 -06:00
ThunderSoft_mbed_os 803458ad8a Update us_ticker.c 2018-12-27 22:29:10 -06:00
panyz0725@thundersoft.com 3502fad243 Add platform TT_M3HQ 2018-12-27 22:29:09 -06:00
cyliangtw 458e79a035 Fix NUC472 hard fault in SMCC tests 2018-12-27 22:26:04 -06:00
Derek Miller 05c2beb3a8 Bug fix for UART issue on LPC54608 - issue #7398 2018-12-27 22:26:04 -06:00
Kevin Bracey 2e3776487e Revert "STM32 RTC : skip rtc_write if possible"
`rtc_write` must start the RTC. `time()` uses `rtc_write(0)` to start
the RTC if it is not already enabled, but this check made that not
work.

There's no point trying to optimise this case in a HAL - if we wanted
`set_time()` to protect against users making pointless adjustments, the
implementation should be there. But even then, you might want different
levels of hysteresis depending on application, so it's probably best
left to applications.

This reverts commit 9da5e48941.
2018-12-27 22:26:04 -06:00
Ashok Rao a332a90586 MTB_ODIN_v2_fixes
1. Removed redundant code comments. Added relevant ones for MTB pins.
2. More SPI_CS pins added for peripherals on the MTB.
3. Disabled LSE_Clock as it is not present on the MTB in targets.json
2018-12-27 22:26:04 -06:00
jeromecoutant e06b7863cc STM32F429/STM32F439 alignment 2018-12-27 22:26:04 -06:00
jeromecoutant d847d57e02 STM32 : Enable TICKLESS for targets with LPTIM 2018-12-27 22:26:04 -06:00
jeromecoutant ae3a666275 STM32: update LPTICKER_DELAY_TICKS for LPTIM targets 2018-12-27 22:26:04 -06:00
mudassar-ublox 2a5e2a7a0d Ublox C030 ADC internal channels added 2018-12-27 22:26:04 -06:00
j3hill 5cff9ce3b0 NRF52840_DK: QSPI check Read/Write WORD alignment, and properly set clock frequency divider
These changes are to enable QSPI functioanlity
for the NRF52840DK.
2018-12-27 22:26:03 -06:00
jeromecoutant 355807cedf STM32 LPTICKER with RTC : optimise sleep duration 2018-12-27 22:26:03 -06:00
jeromecoutant f5577c005e STM32 RTC : skip rtc_write if possible 2018-12-27 22:26:03 -06:00
Leszek Rusinowicz c06492cbe7 Updated default M0 image to not modify UDB configuration when comming out of a deep sleep state. On Mbed this is performed only on M4 core. 2018-12-27 22:26:03 -06:00
Leszek Rusinowicz 977f84be28 Fixing merge issue for merge into master. 2018-12-27 22:26:03 -06:00
ccli8 cfd8823d30 Fix crypto AC management
1. For SHA AC, use atomic flag to manage its ownership.
   (1) Nuvoton SHA AC doesn't support SHA context save & restore, so S/W
       SHA fallback has been supported before. To make non-blocking 'acquire'
       semantics clearer, introduce 'try_acquire' to substitute for 'acquire'.
   (2) No biting CPU due to mechanism above.
   (3) No deadlock due to mechanism above.
2. For AES/DES/ECC AC, change to mutex to manage their ownership.
   (1) Change crypto-misc.c to crypto-misc.cpp to utilize C++ SingletonPtr
       which guarantees thread-safe mutex construct-on-first-use.
   (2) With change to crypto-misc.cpp, add 'extern "C"' modifier to CRYPTO_IRQHandler()
       to avoid name mangling in C++.
   (3) No priority inversion because mutex has osMutexPrioInherit attribute
       bit set.
   (4) No deadlock because these AC are all locked for a short sequence
       of operations rather than the whole lifetime of mbedtls context.
   (5) For double mbedtls_internal_ecp_init() issue, it has been fixed in upper
       mbedtls layer. So no need to change ecc init/free flow.
2018-12-27 22:26:03 -06:00
Russ Butler 2ad952d29b Update MPU ram/rom split for Nuvoton M2351
Move the start of RAM from 0x10000000 to 0x20000000 on the
NUMAKER_PFM_M2351. This allows the target to work correctly.
2018-12-27 22:26:03 -06:00
Kevin Bracey 204a568abb nRF52840: Set mpu-rom-end to 0x1fffffff
So we have at least one test platform exercising the special case of
mpu-rom-end being 0x1fffffff, set that for nRF52840.
2018-12-27 22:26:03 -06:00
Kevin Bracey 342eed5f29 Fix target.mpu-rom-end setting, for ARMv8-M too
targets.json was not specifying the same macro name as the code was
checking for, so setting was ineffective.

Making this work tripped up not-supported checks in ARMv8-M - rather than deal
with making this work, support it instead.

Both ARMv7-M and ARMv8-M slightly reduce code size and runtime impact if
mpu-rom-end is 0x1fffffff, using one fewer region.

This means default setup for ARMv8-M now requires 5 regions, with
mpu-rom-end set to default 0x0fffffff, but this can be put back to 4 by
changing the setting.
2018-12-27 22:26:03 -06:00
ccli8 a4ec28046c Change main thread stack size to default for stack size unification
NANO130 just has 16 KiB SRAM. User application may change it through "rtos.main-thread-stack-size"
configuration option.
2018-12-27 22:26:02 -06:00
ccli8 71d32ecef1 Support boot stack size configuration option 2018-12-27 22:26:02 -06:00
zhanglu@realtek-sg.com 1853db62d6 Realtek-rtl8195am-Network Socket Updates
This PR addresses the issue of #8124.
It updates and enriches the wifi connection error type to adapt the Network Socket test plan requirement.
In the meantime, it increases the heap size that allows the transmission of larger packet size.

Description
1. Increase heap size in lwipstack\mbed_lib.json to fulfill bursty TCP and UDP transmission requirement.
2. Modify and enrich wifi connection error types in TARGET_AMEBA\RTWInterface.cpp to adapt the decision logic of the wifi test cases.
3. Add new static constants in TARGET_AMEBA\RTWInterface.h, including 'SSID_MAX_LENGTH', 'PASSPHRASE_MAX_LENGTH' and 'PASSPHRASE_MIN_LENGTH' to help verifying the validity of ssid and passphrase.

Pull request type
[x] Fix
[ ] Refactor
[ ] Target update
[ ] Functionality change
[ ] Docs update
[ ] Test update
[ ] Breaking change
2018-12-27 22:26:02 -06:00
fluidblue 81c6402262 Removed GCC_CR toolchain for LPC11U68 2018-12-27 22:26:02 -06:00
Fluidblue 3663fe515e Prevent multiple __aeabi_atexit definition linker error (GCC_CR) 2018-12-27 22:26:02 -06:00
Fluidblue 3ca58fdb80 Prevent multiple __aeabi_atexit definition linker error (GCC_ARM) 2018-12-27 22:26:02 -06:00
Mahesh Mahadevan da62237ac4 Rapid-IoT: Add support for the KW41Z side of the platform
Add support for the KW41Z side of the RapidIoT platform. This requires the latest
DAPLink binary to be programmed on the RapidIoT platform, binary can be downloaded
from the below link:
https://armmbed.github.io/DAPLink/

Also, the KW41Z side on RapidIoT does not have a serial port connected to the Debug
terminal. Therefore a SerialPassThrough program should be flashed and running on the
K64F side of RapidIoT platform for the mbed tests to pass.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2018-12-27 22:26:02 -06:00
Laurent Louf 45e7296e05 Add some rounding to determine the pulse value for PWM for the STM target. 2018-12-27 22:26:01 -06:00
jeromecoutant 0c4d7d4dd6 STM32L4 QSPI: correct register address 2018-12-27 22:26:01 -06:00
jeromecoutant ac0fb3cea0 STM32 QSPI: remove QUADSPI_BK2 as dual bank feature is not supported 2018-12-27 22:26:01 -06:00
jeromecoutant 624695992c STM32 QSPIF: add DISCO_L496AG, DISCO_F746NG and DISCO_F769NI 2018-12-27 22:26:01 -06:00
jeromecoutant 5a27a9a699 STM32 QSPI: frequency calculation update 2018-12-27 22:26:01 -06:00
jeromecoutant 2514a71abf Enable QSPI for DISCO F769 and L496 2018-12-27 22:26:01 -06:00
jeromecoutant 41cd8b3d10 STM32L496 : add QSPI definition 2018-12-27 22:26:01 -06:00
jeromecoutant c0ad4621e0 STM32F769 : add QSPI definition 2018-12-27 22:26:00 -06:00
jeromecoutant 356d5756ea NUCLEO_F746ZG : no embedded QSPI 2018-12-27 22:26:00 -06:00
jeromecoutant 018f72d6e4 STM32 : removed unused QSPI pin names 2018-12-27 22:26:00 -06:00
JojoS62 51b0fdf23e fixed wrong __StackTop calculation
StackTop calculation was not adjusted when ram size was increased by using al 3 ram regions.
This caused memory allocation failures althogh enough free heap was reported
2018-12-27 22:26:00 -06:00
test user b6c98a99a9 ublox c030 pinName updated 2018-12-27 22:26:00 -06:00
vervaekejonathan 40712e61ab Extend W7500x target with ADC 6 and 7 2018-12-27 22:26:00 -06:00
Toyomasa Watarai 2ad42c8593 Add network-default-interface-type and remove comment 2018-12-27 22:26:00 -06:00
toyowata 8c856f3a58 Add Mbed OS 5 support 2018-12-27 22:26:00 -06:00
Steve Cartmell dbb97cef80 fix: Merge duplicate 'overrides' keys in targets.json config file 2018-12-27 22:25:59 -06:00
jeromecoutant 23b25465bc STM32L4: correct RNG clock source 2018-12-27 22:25:59 -06:00
jeromecoutant 4083c5e153 Add NUCLEO_L4R5ZI_P 2018-12-27 22:25:59 -06:00
Leszek Rusinowicz 6390fb8db2 Fix for static resource manager. 2018-12-27 22:25:58 -06:00
jeromecoutant c154da4123 STM32 LPTIM update for easy maintenance 2018-12-27 22:25:58 -06:00
jeromecoutant 2a65eacac3 STM32 mbed_sdk_init update for easy maintenance 2018-12-27 22:25:58 -06:00
jeromecoutant eb75ac95c9 STM32 SLEEP update for easy maintenance 2018-12-27 22:25:58 -06:00
jeromecoutant dc47e708b6 STM32 RTC update for easy maintenance 2018-12-27 22:25:58 -06:00
bcostm 6ff271b322 STM32L4 TRNG:Remove trng clock setting for L4 devices
This will be done in the system_clock.c file instead.
2018-12-27 22:25:58 -06:00
Russ Butler 59a59eb450 Fix rare NRF52 serial TX lockup
When using UARTSerial sending data over the uart follows the sequence
below:
<-TX done ISR runs and sets a software interrupt to pending
<-Software interrupt fires:
    -disables TX done interrupt
    -calls UARTSerial TX handler which sends bytes until the uart
     buffer filled (writeable returns false). Sending a byte
     re-enables the TX done interrupt continuing the cycle

Due to this sequence, if the UARTSerial TX handler does not send a byte
then the transmit state machine mentioned above will get stuck with
the TX done interrupt disabled. The events causing this failure:
<-TX done ISR runs and sets a software interrupt to pending
<-Software interrupt fires:
    -disables TX done interrupt
    -calls UARTSerial TX handler:
        -checks writeable which is true and sends a byte
            <- interrupted by a higher priority interrrupt
            <- TX done ISR runs, setting software interrupt to
               pending again
        -checks writeable which is true and sends a second byte
    -Software interrupt finishes
<-Software interrupt fires:
    -disables TX done interrupt
    -calls UARTSerial TX handler:
        -checks writeable which is false and DOES NOT SEND A BYTE
    -Software interrupt finishes, the TX interrupt is still disabled
*-Byte gets sent but TX done ISR does not fire

This patch prevents the TX lockup by removing the code in the
software interrupt which disables the TX done interrupt. Disabling the
TX done interrupt at this point is not necessary so this code is safe
to remove.
2018-12-27 22:25:57 -06:00
Wilfried Chauveau 97c629ca66 fix according to @ashok-rao's review 2018-12-27 22:25:56 -06:00
Wilfried Chauveau 7817bf1902 fix copyrights 2018-12-27 22:25:56 -06:00
Wilfried Chauveau e9f4be3525 Add the port for the ACONNO ACN52832 module on MTB's form factor 2018-12-27 22:25:56 -06:00
ccli8 45052e74eb Fix time to init/deinit stdio_uart
With support for checking H/W UART initialized or not, we can simplify stdio management:
1. When serial_init(&stdio_uart) calls in, just set the 'stdio_uart_inited' flag.
2. When serial_free(&stdio_uart) calls in, just clear the 'stdio_uart_inited' flag.
Except above, we needn't make special handling with 'stdio_uart'.
2018-12-27 22:25:56 -06:00
ccli8 2952a794ee Check configuration option for default UART baudrate setting 2018-12-27 22:25:56 -06:00
ccli8 4e94694b5f Avoid re-configuring UART in serial_init() for the same H/W UART
The same H/W UART may be shared by multiple serial_t objects. This fix tries to avoid
re-configuring the same H/W UART in serial_init() when there are multiple serial_t
objects constructed. To re-configure UART, call serial_baud() and serial_format()
explicitly. This can avoid confusion when e.g. a newly constructed serial_t object
changes baudrate unexpectedly in serial_init().
2018-12-27 22:25:56 -06:00
ccli8 3e43755d32 Remove unused pin_tx/pin_rx fields from serial_s struct 2018-12-27 22:25:56 -06:00
TomoYamanaka 91de358aa4 Renesas : Add the setting of SD as components 2018-12-27 22:25:56 -06:00
Kari Haapalehto 232b6b71b4 TARGET_WICED updated. Connection status issue corrected. If the link layer status changes, the connection status callback is now called correctly.
mbedtls headers from library are removed and the mbed-os one's are used.
2018-12-27 22:25:55 -06:00