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17136 Commits (37aa03611788f05901b47c9669b02daab973fd2c)

Author SHA1 Message Date
Jimmy Brisson 3924c7721c Allow ARMC6 only mbed 5 releases 2018-07-27 13:30:08 -05:00
Deepika 69a67297d3 Support only ARMC6 toolchain 
Support for GCC_ARM/IAR toolchains are TODO.
 2018-07-27 13:30:08 -05:00
Deepika 0c304f0677 Adding missing ENDP for ARM 2018-07-27 13:30:08 -05:00
ccli8 ee0806d0de Remove M2351KIAAEES from iar_definitions.json 
M2351 doesn't support IAR yet.
 2018-07-27 13:30:08 -05:00
ccli8 480a2fe9c5 Fix binary-compatible across compilers in secure functions 
1. Rename m2351_stddriver_sup.h/c to stddriver_secure.h/.c for naming consistency
2. Add hal_secure.h to include hal-exported secure functions
3. Change return/argument type in secure functions:
   (1) Change int to int32_t
   (2) Change PinName to int32_t
   (3) Change time_t to int64_t
4. Update secure lib/bin accordingly
 2018-07-27 13:30:08 -05:00
Jimmy Brisson 256d94bef4 Update compiler check to allow only v6 for OS 5 2018-07-27 13:30:07 -05:00
ccli8 b1955948b7 Support configurable for partitioning flash/SRAM 2018-07-27 13:30:07 -05:00
ccli8 b3c47a1a5d Place default secure binary/library 2018-07-27 13:30:07 -05:00
Jimmy Brisson f22d164ad1 Add `Mxx_NS` core-based labels 2018-07-27 13:30:07 -05:00
ccli8 0f28bcac50 Fix include file name error on case-sensitive system 2018-07-27 13:30:07 -05:00
ccli8 e1a6d9f47f Synchronize lp_ticker code to us_ticker 
This is to make us_ticker/lp_ticker code consistent.
 2018-07-27 13:30:07 -05:00
ccli8 23ba1da5c3 Remove special handling for dummy interrupt in lp_ticker 
It is because dummy interrupt is very rare or pending time caused by it
is very short.
 2018-07-27 13:30:07 -05:00
ccli8 aea8f6161f Remove NUMAKER_PFM_M2351_S/_NS targets 2018-07-27 13:30:07 -05:00
ccli8 5eb07dc84d Allow non-secure main thread to call secure functions 2018-07-27 13:30:07 -05:00
ccli8 974c52b416 Fix Greentea test code with Cortex-M23/M33 
Enlarge stack size of forked thread for Cortex-M23/M33 targets
 2018-07-27 13:30:07 -05:00
ccli8 4bb1f28fed Upgrade chip version to B from A 
There is a reset halt issue with PLL in A version.
To switch back to A version for some reason, define NU_CHIP_MAJOR to 1.
 2018-07-27 13:30:07 -05:00
ccli8 e9a7d88456 Change pinout to meet NuMaker-PFM-M2351 V1.1 2018-07-27 13:30:07 -05:00
ccli8 ae64129c47 Change secure flash/SRAM to 256KB/32KB as default 
This is to compilant with CMSIS pack.
 2018-07-27 13:30:07 -05:00
ccli8 f268b12ba2 Change secure/non-secure stack/heap size 
1. Change RTOS-less main stack/RTOS ISR stack size to 2KiB
2. Change secure/non-secure heap size to 16KiB/32KiB for IAR
 2018-07-27 13:30:07 -05:00
ccli8 9fac970523 Meet new RTC HAL spec (Mbed OS 5.9) 
1. Power down RTC access from CPU domain in rtc_free. After rtc_free, RTC gets
   inaccessible from CPU domain but keeps counting.
2. Fix RTC cannot cross reset cycle.
 2018-07-27 13:30:07 -05:00
ccli8 d5d8c233d0 Meet new lp_ticker HAL spec (Mbed OS 5.9) 
1. Add LPTICKER in device_has option of targets.json file.
2. Disable interrupt in lp_ticker_init
3. Add lp_ticker_free
4. Enable interrupt in lp_ticker_set_interrupt/lp_ticker_fire_interrupt
5. Disable interupt in ISR
 2018-07-27 13:30:07 -05:00
ccli8 543f72d7bd Meet new us_ticker HAL spec (Mbed OS 5.9) 
1. Add USTICKER in device_has option of targets.json file.
2. Disable interrupt in us_ticker_init
3. Add us_ticker_free
4. Enable interrupt in us_ticker_set_interrupt/us_ticker_fire_interrupt
5. Disable interrupt in ISR
 2018-07-27 13:30:07 -05:00
ccli8 18ce2e1b6b Add secure gateway functions SYS_LockReg_S/SYS_UnlockReg_S 2018-07-27 13:30:07 -05:00
ccli8 c91f71b0dc Add SD pinmap 2018-07-27 13:30:07 -05:00
ccli8 754589b6a6 Default MBED_TZ_DEFAULT_ACCESS to 1 to control secure SYS/CLK regions from non-secure threads 
To initialize/uninitialize H/W module, we need to control secure SYS/CLK regions through secure functions.
For a new thread to call these secure functions, we need to allocate secure context for it.
 2018-07-27 13:30:07 -05:00
ccli8 0e6a76f113 Replace __attribute__((cmse_nonsecure_entry)) with compiler agnostic __NONSECURE_ENTRY 2018-07-27 13:30:07 -05:00
ccli8 07b21b42e5 Support TrustZone and bootloader for IAR 2018-07-27 13:30:07 -05:00
ccli8 ad5772a425 Fix part number in IAR export 2018-07-27 13:30:07 -05:00
ccli8 f6642cbfd3 Add consistency check for CRYPTO/CRPT's secure attribute and TRNG/Mbed TLS H/W 2018-07-27 13:30:06 -05:00
ccli8 5839431812 Remove dead code with '#if 0' in SPI 2018-07-27 13:30:06 -05:00
ccli8 d611a3c9b0 Add GPIO debounce configuration in targets.json 2018-07-27 13:30:06 -05:00
ccli8 b1b57d24af Support PWM out 2018-07-27 13:30:06 -05:00
ccli8 6b811afb73 Support analog-in 2018-07-27 13:30:06 -05:00
ccli8 bce2b6460d Support TRNG 
To change TRNG security state, we need to:
1. Change CRPT/CRYPTO bit in NVIC/SCU in partition_M2351.h
2. Add/remove TRNG in device_has list in targets.json to match partition_M2351.h
 2018-07-27 13:30:06 -05:00
ccli8 b86c957c0d Centralize size configuration for secure flash, secure SRAM, NSC, and bootloader 2018-07-27 13:30:06 -05:00
ccli8 3950b12a82 Change NSC location 
NSC location has the following requirements:
1. By IDAU, 0~0x4000 is secure. NSC can only locate in 0x4000~0x10000000.
2. Greentea flash IAP uses last 4 sectors for its test. Avoid this range.
3. Greentea NVSTORE uses last 2 sectors or 4KB x 2 for its test. Avoid this range.
 2018-07-27 13:30:06 -05:00
ccli8 1e7b6eec89 Upgrade partition format 
Following BSP, this upgrade makes partitioning flash/SRAM clear.
flash_api.c relies on flash partition, so it is updated accordingly.
 2018-07-27 13:30:06 -05:00
ccli8 d2f5548269 Fix page size in flash IAP 
In Mbed OS, page size is program unit, which is different than FMC definition.
After fixing page size, we can pass NVSTORE test (mbed-os-features-nvstore-tests-nvstore-functionality).
 2018-07-27 13:30:06 -05:00
ccli8 3ac5e48d40 Support flash IAP 2018-07-27 13:30:06 -05:00
ccli8 68b8db1a1e Add missing delay in lp_ticker 2018-07-27 13:30:06 -05:00
ccli8 c34d8aeab2 Trim HIRC48 to 48M against LXT 2018-07-27 13:30:06 -05:00
ccli8 c7ed684285 Support I2C 2018-07-27 13:30:06 -05:00
ccli8 ffe1e23ba0 Support SPI 2018-07-27 13:30:06 -05:00
ccli8 a8ed3ff5cd Refine UART code 
1. Replace SYS_ResetModule/CLK_SetModuleClock/CLK_EnableModuleClock/CLK_DisableModuleClock with TrustZone-aware versions.
2. Configure all UART to secure
3. Support asynchronous transfer
4. Remove sleep management code, which has been replaced with Sleep Manager.
 2018-07-27 13:30:06 -05:00
ccli8 61a021ca9a Support PDMA 2018-07-27 13:30:06 -05:00
cyliangtw 2cd825d463 Rework us_ticker and lp_ticker 
The rework includes the following:
1. Remove ticker overflow handling because upper layer (mbed_ticker_api.c) has done with it.
   This makes us_ticker/lp_ticker implementation more succinct and avoids potential error.
2. Refine timer register access with low-power clock source
 2018-07-27 13:30:06 -05:00
ccli8 7cf3501935 Remove peripheral sleep management from hal_sleep/hal_deepsleep 
The upper layer has introduced Sleep Manager to handle the task.
 2018-07-27 13:30:06 -05:00
ccli8 a1c8803c7d Rework RTC 
The rework includes the following:
1. Support year range beyond H/W RTC 2000~2099.
2. Refine RTC register access with low-power clock source
 2018-07-27 13:30:06 -05:00
ccli8 3f4da6166d Fix GPIO to be TrustZone-aware 
1. Revise NU_PORT_BASE to be TrustZone-aware
2. Add TrustZone-aware NU_GET_GPIO_PIN_DATA/NU_SET_GPIO_PIN_DATA to replace GPIO_PIN_DATA
3. Revise pin_function to be TrustZone-aware
 2018-07-27 13:30:06 -05:00
ccli8 160c26847a Fix SystemCoreClockUpdate isn't called in non-secure domain 2018-07-27 13:30:06 -05:00