The KSDK2 update restricts static data to the first 64K of RAM.
This breaks some applications which require more than 64K of
static data. This patch moves the static data sections
(bss and data) into the second ram region which is 192K.
Changes taken from similar patches here:
https://github.com/ARMmbed/target-kinetis-k64-gcc/pull/5https://github.com/ARMmbed/target-kinetis-k64-gcc/pull/6
Previous layout
---------------
0x1FFF0000 m_data .interrupts_ram
0x1FFF0400 data, bss
0x1FFFFFFF end of bss
0x20000000 m_data_2 start of heap, end of stack
0x2002ffff end of heap, start of stack
New layout
----------
0x1FFF0000 m_data .interrupts_ram
0x1FFF0400 start of unused ram
0x1FFFFFFF end of unused ram
0x20000000 m_data_2 data, bss
0x200XXXXX end of bss
0x200XXXXX+1 start of heap, end of stack
0x2002ffff end of heap, start of stack
When the function spi_master_write is called a transfer will occur
and set the end of queue flag. This disables further SPI transfers
which causes the next SPI transfer to hang forever.
This patch clears the end of queue flag so SPI does not hang after
the first transfer.
Address passed into the mbed I2C API are expected to be 8 bit and
include the read/write flag. KSDK2 expects a 7 bit address without
this flag. This patch shifts the address passed into the KSDK by 1
so it is in the correct format.
On repeated starts the flag to indicate this is not being set
properly. Because of this the transfer fails. This patch
keeps track of the last transfer to determine if a repeated
start should be sent and sets the KSDK flags appropriately.
Routines using __disable_irq and __enable_irq had the effect of
enabling interrupts if called with interrupts disabled.
Some versions of __disable_irq do not return old status to restore it.
Change to use the critical section helper functions instead.
This includes a generic critical section implementation. This
implementation also allow a user to start a critical section while
interrupts are already disabled.
per @c1728p9
Update the Callback class to handle a NULL thunk by returning 0
rather than trying to call the thunk. This fixes a crash that occurs
on some targets when the TX uart handler is not attached.
Background:
The K64F HAL uart implementation calls the TX interrupt handler
every time a uart interrupt occurs while the TX register is empty.
It does not check to see if the TX interrupt has been enabled.
This means that the TX interrupt can and typically does get
run on RX events. This causes a crash with the newer callback
code which did not (prior to this patch) support a NULL thunk.
- Adopt C++11 style template arguments, requires rename to Callback
- Add constructor for C style callback functions
- Add constructor for Callbacks
- Add static function for passing to C style callbacks
We need to remove *can_api.c* file accordingly to new directory structure.
Without that we can't compile any CAN mBed test.
Change-Id: I3d4f798ad75ec1b4c4a1d7ed877e71b7db6bf60f
This path fixes issue #816.
Current value of TIM_MST->CNT is read in interrupt context only.
This avoids master timer overflow without SlaveCounter update.
Change-Id: I8e2ec02ce7539a4c044c7e3dfe6bedc9fcdf7736
This path fixes issue #816.
Current value of TIM_MST->CNT is read in interrupt context only.
This avoids master timer overflow without SlaveCounter update.
Change-Id: Iaaf7b9eb33aa8d8992e9354ca5e21bf01ec2413d
This path fixes issue #816.
Current value of TIM_MST->CNT is read in interrupt context only.
This avoids master timer overflow without SlaveCounter update.
Change-Id: Ie7a9bfce76990f85caa84264450d053604af33e5
Both STM32F0xx and STM32F1xx are using a 16-bit timer as a internal ticker
but the mBed ticker needs a 32-bit timer implementation, so the upper part
of that 32-bit timer is being calculated in software.
Software bug has been fixed where continous HIGH/LOW voltage levels
could be observerd for 65ms due to 16-bit timer overflow.
Now current value of TIM_MST->CNT is stored in cnt_val and is
updated in interrupt context only. This avoids master timer
overflow without SlaveCounter update.
This fix is only for platforms which already implements a 16-bit timer:
F103RB, F070RB, F030R8
Change-Id: I205c70ce155b373c6593ead93ade9ec38993f7f9
Martin Kojtal
Russ Butler
svastm
adustm
bcostm
Sam Grove
Russ Butler
Kevin Bracey
Anna Bridge
Russ Butler
Jimmy Brisson
Christopher Haster
Bartosz Szczepanski
Rafal Kula