Serial HAL now allocates the LEUART first, and will switch
to using a standard UART only if the parameters require it.
Note that this switch can currently only happen one way, from
LEUART to USART. So once a higher baudrate or invalid frame
bit amount has been used, that instance of Serial object
will be locked to using an USART.
TODO: Parts of the UART (re)initialization code are now spread
between three places. They should be combined into single,
generic function.
Part of condition to detect active TX was not only incorrect
but also not needed in the first place. TX active state is
now always detected only via active TXBL/TXC interrupt.
UARTs are no longer fixed to certain pins on Pearl, so
we need to allocate them as needed, and allow for free
pin selection.
TX and RX pin locations in the main serial struct have been
separated, and pin routing modified accordingly.
serial_api_HAL.h interface keeps track of which UARTS are
currently in use, and provides alloc/free functions. Serial
and SPI components modified to use the new API.
TODO: Magic to support LEUART. This code will also need to
be able to dynamically switch from LEUART to standard USART
if the user later sets params (baud rate or format) that can
not be supported on LEUART.
Issuing a CLEARTX to LEUART command together or after TXEN caused
the DMA transfer to jam or cause repeated interrupts.
Also cleanup duplicated interrupt clears and add correct LEUART
branches when disabling RX/TX.
- Allow emlib to read the HFPER clock when initializing
USART. This corrects the baud rate on the serial line.
- Always use the TXC interrupt to signal when a transmission
is over when using (L)DMA. Removes a race condition
between flipping from TXBL to TXC, and TXC activating.
- With the previous change, serial_tx_active can now poll
the TXBL/TXC interrupts to see if a transmission is active.
previous code would fail in cases that the DMA transfer
had ended, but TX was still active, occasionally leading
to partial transfers when CLEARTX command was issued on
the next transfer.
- Add some sync points (SYNCBUSY poll) when twiddling around
LEUART registers.
Known issue: Using LEUART and DMA transfer on (at least) Leopard
causes the device to enter an infinite DMA interrupt loop.
When the requested timeout was not a integer multiple of the
LF clock tick the timestamp was set too short due to rounding,
sometimes causing the ticker event to be missed.
Read as not returning correct values, because RTCC (or RTC in other
Gecko's) was not initiated. This was a problem in every Gecko.
If RTCC is initiated for lptimer it is done without binding it to
irqhandler (since irq not needed). Also implementation for geckos
using RTC added.
Tested with pearl and happy geckos
Number of interrupt slots reported by different files before this commit:
giant happy leopard pearl wonder zero
spec 39 21 39 34 39 17
nvic 39 21 39 34 40 19
startup.s 39 21 40 34 40 19
gcc link 40 21 41 34 40 19
arm link 40 22 40 - 40 16
reserved 0 0 1 0 0 2
spec - reference manual
nvic.h - cmsis_nvic.h
startup.s - assembler startup files
gcc link - efm32*.ld linker script for GCC
arm link - efm32*.sct linker script for ARM (RVCT)
reserved - number of 'reserved' slots at the end of irq table in startup.s files
Fixed amounts to reflect those in the startup files, including reserved
slots:
Giant
Reduce amount in GCC and ARM linker files to 39
Happy
Fix comment in GCC linker file
Reduce amount in ARM linker file to 21
Leopard
Increase amount to 40 in cmsis_nvic.h
Reduce amount to 40 in GCC linker file (this bug caused by
emlib 4.1.0 port commit 1923e8b4)
Wonder
No changes, but note that ref. manual does not list FPUEH
interrupt that is included in startup files at index 39
Zero
Increase amount to 19 in ARM linker file
LDMA now functional for both RX/TX.
One hack remains - need to check if TXC interrupt check can be
removed from older platforms, or if flagging is necessary.
Any channel can be used. It is possible to have 4 pwm outputs
active at a same time, if PinMap_PWM configuration is done properly.
Future improvement proposal: dynamic channel selection!
Channel selection shifted to right place. Now It seems to work
at least with channel PC11. Weird thing is, that floating pin gives
result 0.4. Should be 0.0.
LDMA support for serial HAL. Adds callback support for emlib LDMA
code so that most of the old serial code can be reused.
Note: Serial shows some signs of life on the bus, but DMA mode
is completely untested.
analogin_api.c changed to make it compile.
Compilation error will be generated if _ADC_SINGLECTRL_POSSEL_MASK ||
_ADC_SINGLECTRL_INPUTSEL_MASK is not defined. This is because NEGATIVE
voltage measurement is not supported by MBED API.
Use RTCC API for lp_ticker on Pearl. Basic adaptation, but more
work is required.
Now frees RTC when ticker is not used (detected through interrupt
disable), so that sleep modes below EM2 do not remain
permanently blocked.
PWM pin mappings. Since the pins can be freely chosen (unlike
in previous HW), there should be no need to use the other channels.
Also corrected frequency for HFXO in ref devices.
The function vsnprintf does not properly handle a size of zero for
the destination buffer, and will write data to it. If the buffer is
set to null this will cause a hardfault. This patch adds a workaround
for this bug by using a buffer of size 1.
realiseEndpoint() was unnecessarily allocating twice the buffer space for each endpoint buffer. This was presumably for the sake of the hardware SIE's double-buffering (EVEN/ODD) system, but that's vestigial - this implementation doesn't use the double-buffering capability at all, leaving the ODDRST bit in the CTL register always set. The double-size allocation is a pure waste of memory.
The IRQ handler calculated the endpoint number wrong when handling IN and OUT tokens. The errant code worked by accident for endpoints 1 and 2 but was incorrect for other addresses. For endpoints 5 and above it resulted in stray pointer read/writes that could crash the device.
Increase the number of entries in the baud rate table from 17 to 18.
This problem was introduced in the patch:
0a6e345400 -
Add support for 56000 baud on nrf51
Add support for the baudrate 56000. This is not documented in the
datasheet, but Nordic has indicated in can be used by setting the
BAUD register to 56000.
Disconnect the TX line before sending a dummy byte, and wait until the
dummy byte is completely sent before continuing. This prevents
the byte from getting sent on init or re-init of the uart.
When initializing the NRF51's serial TX and RTS pins set the
data output register to high before setting the setting them to
output. This prevents these pins from glitching low before
the UART has been turned on.
In Kinetis chips some ADC channels have both A and B channels available.
This commit enables both of them.
Added also some missing ADC channels to PinMap table.
Issue was : stdio printf is ok, serial.printf is failing, in case it is
inialized as a global variable. It works on mbed version 107.
Fix: revert to version 107 for systemxxx.c, mbed_overrides.c +
cmsis_nvic.c.
Modify cmsis_nvic.c to use direct addressing instead of a pointer (this
pointer is not yet initialized when called in systemxx.c)
Call HAL_Init in mbed_overrides.c for every platforms.
Mikko Polojarvi
jhokajar
0xc0170
adustm
ytsuboi
Russ
Mike Fiore
sg-
mjrgh
Russ Butler
jamofer
U-owner-PC\owner
dinau
Jeremy Brodt
bcostm
Paul Staron
neilt6
dbestm
Wojciech Gorniak
ohagendorf
Veli-Matti Puurunen
Aksel Skauge Mellbye
Mika Laurila
unknown
Rafal Fabich