ARMmbed
/
mbed-os
mirror of https://github.com/ARMmbed/mbed-os.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
18,080 Commits
52 Branches
336 Tags
624 MiB
Commit Graph

3569 Commits (2bc140e978a458b470117c7535082df896be3c57)

Author SHA1 Message Date
Mahesh Mahadevan 2bc140e978 MIMXRT1050_EVK: Update SPI HAL driver 
Use a different SDK API to write to the SPI Bus

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-08-27 14:20:49 -05:00
Cruz Monrreal 91354184dc
Merge pull request #7825 from SiliconLabs/siliconlabs-qspi 
Silicon Labs QSPI HAL implementation
 2018-08-27 13:51:38 -05:00
Martin Kojtal a24cecfc94
Merge pull request #7805 from jamesbeyond/fm_test 
Skip Greentea tests for Mbed OS code coverage on Fast Models
 2018-08-27 10:39:43 +02:00
Martin Kojtal ce28c91405
Merge pull request #7534 from bentcooke/mote_L152_en_os5 
enable MOTE_L152 for OS5
 2018-08-27 10:27:36 +02:00
Steven Cooreman 55c6dade3d Apply changes corresponding to #7817 
QSPI standard pin names were changed after the QSPI feature PR.
 2018-08-27 10:10:18 +02:00
Steven e0d033bdd1 Allow unaligned input/output for QSPI 
The code is written such that access to the data input/output happens word-by-word, and that means unaligned access is fine (though with a performance loss) on Cortex-M3/M4 devices.
 2018-08-27 10:03:08 +02:00
Steven 845a5beb30 Initial commit of Silicon Labs QSPI HAL implementation 
* For EFM32GG11, since that is the only Silicon Labs target with QSPI per today
* Verified working using the on-board flash and tests-mbed_hal-qspi
 2018-08-27 10:03:08 +02:00
Cruz Monrreal 2f8e679183
Merge pull request #7592 from orenc17/remove_uvisor 
Remove uVisor from mbed-os
 2018-08-25 19:52:24 -05:00
Cruz Monrreal 7531b31c01
Merge pull request #7751 from mikaleppanen/realtek_emac_interf 
Realtek RTL8195A wifi interface to inherit EMAC interface
 2018-08-24 19:30:39 -05:00
Martin Kojtal 31a6fb49bd
Merge pull request #7817 from maciejbocianski/qspi_pinnames 
standardise QSPI pin names
 2018-08-24 21:12:25 +02:00
Martin Kojtal 2d330533a4
Merge pull request #7652 from andrewleech/nrf5x_config_lfclk 
NRF5x: Fix config of LFCLK source / settings.
 2018-08-24 13:05:24 +02:00
Maciej Bocianski 5195c820e6 standardise QSPI pin names 2018-08-24 12:09:51 +02:00
Martin Kojtal 812c6d5c88
Merge pull request #7783 from maciejbocianski/feature-qspi_merging 
merge QSPI feature branch
 2018-08-24 10:50:18 +02:00
Cruz Monrreal cb8d09a88a
Merge pull request #7843 from codeauroraforum/MXRT_Fix_I2C_Byte_Transfer 
MIMXRT1050: Fix I2C Byte transfer functions
 2018-08-23 10:05:08 -05:00
ben 32647e6888 enable MOTE_L152 for OS5 2018-08-22 11:49:25 -05:00
Oren Cohen 787317b7eb Remove uVisor from mbed-os 2018-08-22 16:36:59 +03:00
Maciej Bocianski 3bf9df7b56 target DISCO_F413ZH: add QSPI flash pin names 2018-08-22 15:02:13 +02:00
adustm 6095ccf1b4 Add reset internal state before call to HAL_QspiInit function 2018-08-22 15:02:11 +02:00
adustm 7dda4e4fc6 Implement qspi_free function 2018-08-22 15:02:10 +02:00
adustm 5c26e15cd3 Fix support of max flash size 2018-08-22 15:02:09 +02:00
jeromecoutant 43258a8ff4 STM32 : add all QSPI pins in available targets 2018-08-22 15:02:08 +02:00
Maciej Bocianski 1534426b7e nrf52x: fix QSPI enable flag 
QSPI feature was mistakenly moved form target nrf52840 to nrf52832
while rebasing. This change fixes it
 2018-08-22 15:02:07 +02:00
Maciej Bocianski 8b36d6b39a NRF5: fix qspi R/W opcodes mapping 2018-08-22 15:02:05 +02:00
Maciej Bocianski c2cc559aa7 NRF5: fix qspi custom command sending 2018-08-22 15:02:05 +02:00
Maciej Bocianski 67798d6eb2 STM: add qspi pin names for DISCO_L475VG_IOT01A 2018-08-22 15:02:04 +02:00
Maciej Bocianski 42935bbdc0 STM qspi: temporary fix for qspi_free return value 2018-08-22 15:02:03 +02:00
Maciej Bocianski 1f4cc95f25 fix qspi command transfer for NORDIC 
Add address unpacking support.
Only used in erase commands
 2018-08-22 15:02:03 +02:00
adustm 2f06423a89 Add support for QSPI on DISCO_L476VG 2018-08-22 15:02:01 +02:00
adustm c00e49fcf2 Enable QSPI for DISCO_F746NG 2018-08-22 15:01:54 +02:00
adustm 293d1bda42 Add MBED_WEAK for pins 2018-08-22 15:00:22 +02:00
adustm 9b4b28fc3f Support maximum flash size : 4Gbytes 2018-08-22 15:00:22 +02:00
adustm 50b8225948 Enable QSPI feature for DISCO_F413ZH platform 2018-08-22 15:00:21 +02:00
adustm c57a47e4b5 Change default FlashSize to 64Mbit = 8Mbytes = 0x800000 2018-08-22 15:00:20 +02:00
adustm 8e08740237 Fix Instruction with no data command 
Adding QSPI_DATA_NONE activates the transfer
of the command inside HAL_QSPI_COMMAND function
 2018-08-22 15:00:19 +02:00
adustm 05899e9c70 Fix Address.Size and AlternateByes.Size by shifting them 
The ST HAL code is waiting for the correctly shifted vlue
(for a direct write into the HW register)
 2018-08-22 15:00:18 +02:00
Martin Kojtal d282c81e86 QSPI: add STM32L4 support 
Disco IoT board support for QSPI. As it does not have dual flash support in QSPI,
we need to fix qspi hal implementation.
 2018-08-22 15:00:17 +02:00
Martin Kojtal ae7bb17eaf QSPI: add flash pins for nrf52480_dk board 2018-08-22 15:00:16 +02:00
Martin Kojtal 0f7fd757a4 QSPI: add flash pins for F469 disco board 2018-08-22 15:00:16 +02:00
Martin Kojtal c778c90184 QSPI STM32: fix default fifo and cycle 
As example for DISCO F469NI defines them
 2018-08-22 15:00:15 +02:00
Martin Kojtal 8783956a77 QSPI STM32: fix prepare comman - alt/address 2018-08-22 15:00:14 +02:00
Martin Kojtal fff20729be QSPI STM32: fix command transfer 
use write/read from STM32 driver
 2018-08-22 15:00:14 +02:00
Martin Kojtal 5038b38622 QSPI STM32: fix pin merging 
hw name as input
 2018-08-22 15:00:13 +02:00
Martin Kojtal 16ca742d87 QSPI STM32: fix disabled format phase 2018-08-22 15:00:12 +02:00
Martin Kojtal 2766672f64 QSPI STM32: add QSPI_x support to pinnames 2018-08-22 15:00:12 +02:00
Martin Kojtal 660d250e0d QSPI STM32: init returns error if failed to init 2018-08-22 15:00:11 +02:00
Martin Kojtal 551f044e77 QSPI STM32: add qspi_command_transfer implementation 2018-08-22 15:00:11 +02:00
Martin Kojtal 6e5b889e52 QSPI STM32: remove polling from write/read 
This will be part of custom instruction transfer, the flow will be:

1. write data
2. wait for transfer to complete (poll status register from the memory device)
 2018-08-22 15:00:10 +02:00
Martin Kojtal 8da072d8af QSPI STM32: set default command values to none 2018-08-22 15:00:10 +02:00
Martin Kojtal 11ae100d80 QSPI STM32: fix return value in frequency 2018-08-22 15:00:09 +02:00
Martin Kojtal 5e75b39b78 QSPI STM32: fix ssel af selection 2018-08-22 15:00:09 +02:00