this first makes pinmap.c a common file
then rework it with several goals:
- avoid gpio / irq / pin management extra dependencies
- improve performances when switching between pin modes
This change is based on LL layer to access to registers level
instead of using HAL higher level API.
The family specific functions are implemented in pin_device.h
of each family. Mostly this is F1 family that is differnt
from other ones.
Instead of using HAL_GPIO_Init / Deinit which makes a lot of registers
being written and re-written, and which creates extra gpio / pin / irq
dependencies, we directly set the IRQ related registers thanks for the
STM32 LL layers which provides APIs to modify registers.
Only one point of attention:
STM_MODE_ANALOG_ADC_CONTROL is a specific mode that is only supported on L4.
So STM_MODE_ANALOG_ADC_CONTROL was moved to index 13 (last entry)
of gpio_mode table so that all the other modes are common and only the last
one is specific.
Let's make the code more common for gpios.
The only difference between STM32 families is that BRR register may
not be available. In case BRR is not available, we use the 16 left bits
of BSRR instead. We could always use BSRR, but BRR saves one left-shift
operation, so let's use it when available.
By default we will consider using BRR, except for platforms that define
GPIO_IP_WITHOUT_BRR.
The IAR build system does not allow two files to have the same name.
This renames the i2c_api.c file for the STM32F1 family to
i2c_api_stm32f1.c to avoid this issue. The common i2c_api.c file shared
among all ST targets is not actually used for STM32F1 targets as it
protected with an #ifdef guard.
- GPIO: mode was not allowed by ST HAL API
- PIN map: assert has highlighted an issue for pullup/pulldown setting
- RTC: year after 2000 was not taken into account
This fix addresses issue #2638 for STM32F1.
The STM32F1 family has a diffeerent register set for pull-up and pull-down
settings.
The same principle to read HW state is applied, as in commit:
[STM32] Fix pull over write to all families
except registers are different.
Also in this patch we make code a bit more linear.
Depending on pin_index, different register and shift index must be used.
Instead of checking this in several place, let's make a check at the
beginning of the function and use local register and shift variables.
the SPI_ASYNCH feature has been already activated for STM32F4.
This patchset makes it supported on all STM32 families by:
- moving spi_s structure at family level instead of board level
- using the F4 spi_api.c reference implementation and making it a common
stm_spi_api.c file which makes maintenance a lot easier.
- the only part that needs to be implemented for each family is the computation
of the clock frequency input to the spi peripheral which is not the same
accross families. So this is what remains in the spi_api.c of each family.
Because of the introduction of the common file, all the above modifications
needs to be done at once.
Supported toolchains initialization steps have been modified to make sure
that mbed_sdk_initi is called _after_ RAM initialization and _before_ C++
objects creation.
since this was done, there is no need to redundant SystemCoreClockUpdates
in the drivers
Various toolchains supported in MBED don't follow the same initialization
steps. This can have impacts on platform behavior.
For STM32, it is needed to call the HAL_Init() _after_ the RAM has been
initialized (sdata from flash / zero initialized data) and _before_ the C++
objects are being created, especially if those objects require support
of tickers for instance.
In GCC, this is easily done because SystemInit is called after the ram
initialisation, so HAL_Init does not need to called from mbed_sdk_init.
this is covered by the changes in mbed_overrides.c files.
This series should solve issue reported here:
STM32 (At least F401) breaks if Tickers are activated in a global object #2115
Laurent MEUNIER
Sam Grove
Michel Jaouen
Martin Kojtal
Adrien Chardon
jeromecoutant
bcostm
Anna Bridge
Sam Lin
Brian Daniels
adustm
Laurent MEUNIER
Christopher Haster