c5c470e22c
Merge pull request #4729 from bulislaw/mutex_tests
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RTOS: Mutex: Rework tests
2017-07-27 09:40:26 -05:00
a1736e6341
Boot: Provide dynamic mutexes for ARM toolchain
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ARM toolchain requires variable number of dynamic mutexes. We use combination of
RTX mutex pool and heap allocation to achieve that.
2017-07-21 10:09:53 +01:00
160940b30e
Merge pull request #4682 from bulislaw/sem_tests
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Test: RTOS: Semaphore: Rework tests
2017-07-17 11:06:48 -05:00
18bb6fdc1f
Merge pull request #4620 from bulislaw/thread_tests
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Extend tests for RTOS Thread class
2017-07-17 11:03:34 -05:00
0935683187
RTOS: Mutex: Improve API docs
2017-07-12 11:02:12 +01:00
2963308349
RTOS: Semaphore: Improve API docs
2017-07-11 15:01:40 +01:00
739a429820
Test: RTOS: Semaphore: Rework tests
2017-07-11 15:01:39 +01:00
4d1ad1d3d5
Fix typo runnig_thread -> running_thread
2017-06-30 17:24:43 -05:00
2ffd264bba
Merge pull request #4601 from pan-/fix_memory_pool_destructor
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rtos: Fix MemoryPool and Queue destructor
2017-06-29 11:07:38 -05:00
0b359263d8
RTOS: Thread: Update thread state docs
2017-06-29 13:01:22 +01:00
4c489e686b
RTOS: Thread: Fix how free stack is calculated
2017-06-29 13:01:21 +01:00
505beb773f
RTOS: Thread: Fix return value for signal_wait
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Signal wait was always returning success even in case of error.
2017-06-29 12:58:44 +01:00
af1832d4c7
RTOS: Thread: Update docs; make singal_clr static as it's affects running thread
2017-06-29 12:58:44 +01:00
8cc21ea505
RTX: Fixed RTXv5 mutex owner list handling.
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The prev-pointer of the running threads mutex list was not set when
multiple mutexes are acquired at a time. This leads to a corrupted list
if the mutexes are not freed in reversed order.
Original commit for CMSIS_5:
commit 729f6ab08540342b7de7612fac103539d5b2f168
Author: Jonatan Antoni <jonatan.antoni@arm.com>
Date: Wed Apr 19 15:38:43 2017 +0200
2017-06-27 14:39:34 +01:00
e690ee04e0
rtos: Add missing Queue destructor.
2017-06-21 11:21:34 +01:00
b49fbf1d91
rtos: Add missing destructor for MemoryPool objects.
2017-06-21 11:14:50 +01:00
3119c4238d
rtos Thread: Remove private copy constructor and assignment operators in favor of the NonCopyable traits.
2017-06-20 16:23:44 +01:00
4d5f805cde
rtos: Tag non value type as NonCopyable.
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The types marked are: Mail, MemoryPool, Mutex, Queue, RtosTimer and Semaphore.
2017-06-20 16:23:44 +01:00
77b6127a71
Merge pull request #4579 from geky/rtos-unbreak-semaphore
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RTOS: Fix semaphore
2017-06-19 15:32:48 -05:00
6b02ceab5d
rtos: Unbreak semaphore, trade assert for saturation with original limit
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Before rtx 5, the max count on semaphores was UINT16_MAX, aftewards it
was decreased to 1024 with an assert on overflow.
This is especially problematic for semaphores used for signaling, since
there is no replacement currently available in C++.
2017-06-16 17:18:40 -05:00
fd7eff202c
RTOS: Allow per target definition of OS_IDLE_THREAD_STACK_SIZE.
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The stack required for the idle thread is highly dependent on the
target because it will call the sleep function which is target
specific.
While 256 bytes of stack is enough for most targets, others like the
NRF52840 might require more.
With this change, target maintainers can specify the idle thread stack
size in their mbed_rtx.h file.
2017-06-16 10:11:12 +01:00
fc18250b1f
Increase background stack size to fix overflow
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Bump the background stack size to 512 bytes to fix stack overflows on
the NRF52 and so it is the same size as it was before the switch to
RTX5.
2017-06-14 17:31:52 -05:00
d3cf5fb999
Merge pull request #4445 from theotherjimmy/fix-exporters
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Fixes for exporter issues
2017-06-09 15:04:01 +01:00
fc6c2b85ff
Upcase assembly file suffix for preprocesssing
2017-06-09 00:03:23 -05:00
567589f138
Resolve Doxygen errors from RTOS. Fixed minor Doxygen bug in FileSystemHandle.h as well
2017-06-08 15:51:04 -05:00
778d6822bf
RTX5: uVisor: Switch threads very carefully
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uVisor doesn't set the PSP of the target thread. The RTOS sets the PSP
of the target thread from the target thread's TCB. However, when
interrupts of higher priority than PendSV happen between the call to
uVisor to switch boxes, and the RTOS setting PSP, the uVisor vIRQ
interrupt handler will attempt to use an invalid PSP (the PSP from
before the box and thread switch). This leads to a crash. Make box and
thread switching atomic by disabling interrupts immediately before the
box switching until immediately after the new PSP is set.
2017-06-04 14:41:59 +01:00
cabc1e0911
Fix Thread class synchronization
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Prevent osTheadTerminate from being called on an already terminated
thread. Also make sure the thread termination process is properly
synchronized.
2017-06-02 23:50:38 -05:00
96bd943ea2
RTX5: Enable priority inheritance and robust mode
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Add the attribute flash to enable priority inheritance and robust mode.
The robust flag allows mutexes held by terminated threads to be
properly released.
2017-06-02 23:50:36 -05:00
e48e599a9d
Fix RTOS function prototypes by adding extern "C"
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Wrap the file mbed_rtos_storage.h in extern "C". This allows the
functions inside rtx_lib.h to have correct definitions when included
in a C++ file.
This is required for the RTX5 error trapping.
2017-06-02 23:50:32 -05:00
39a1b39ce1
Bump number of ARMC mutexes to fix PAL test failure
2017-05-30 18:55:56 +01:00
f03509c6cb
Add up OS_MUTEX_NUM for ARMCC compiler
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CI shield test (SPI test) may need 7 mutexes
2017-05-30 18:55:56 +01:00
80cb65e094
Add more verbose RTOS error messages
2017-05-30 18:55:56 +01:00
a8229b5351
Make sure all RTOS attribute structures are 0-ed before use
2017-05-30 18:55:56 +01:00
0064df1ce6
Add name parameter for C++ mutex wrapper
2017-05-30 18:55:55 +01:00
e66f9ee818
Fix IAR coding style and thread/mutex namingin mbed_boot.c
2017-05-30 18:55:55 +01:00
b01f13d1a0
Make sure all system threads and mutexes have clear names
2017-05-30 18:55:55 +01:00
05548e786d
Rename directories rtx->rtx4 rtx2->rtx5
2017-05-30 18:55:55 +01:00
535ee8ba25
Make stack sizes configurable by the app
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Application can overwrite stack sizes by defining main-stack-size and
thread-stack-size in mbed_app.json
2017-05-30 18:55:55 +01:00
b793a3fb89
Update codebase for CMSIS5/RTX5
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Update all of mbed-os to use RTX5.
2017-05-30 18:55:52 +01:00
7b022f8785
Modify CMSIS 5 so it is suitable for mbed-os
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Make changes to the files taken from RTX5/CMSIS5 so they work
with mbed-os and uvisor.
2017-05-30 18:53:38 +01:00
7ae2e6e9ec
RTX5: uVisor: Use OsEventObserver
2017-05-30 18:53:38 +01:00
24c60f6cc7
RTX5: uVisor: Extend thread control block with context
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OsEventObserver objects expect a context to be maintained per thread on
their behalf. Add this context to the thread control block and extend
the thread creation functions with the ability to supply a context.
2017-05-30 18:53:38 +01:00
756e0cae99
RTX5: uVisor: Add OsEventObserver
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Add the OsEventObserver mechanism. A client interested in receiving
notifications on certain OS events can register to receive notifications
with osRegisterForOsEvents. This is useful for clients like the secure
memory allocator, which observes thread switching events in order to
swap in and out different memory allocator objects.
2017-05-30 18:53:38 +01:00
25021f271a
RTX5: uVisor: Defer to uVisor for SVCall priority
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Only set the SVCall priority if uVisor is not present. If uVisor is
present, keep using whatever priorities it has already set up.
2017-05-30 18:53:37 +01:00
a9a29a4529
Pull in CMSIS 5 files
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Pull in unmodified CMSIS5 files from the repository
https://github.com/ARM-software/CMSIS_5.git from the commit
c1b4232f4a98275dd79ebc99cf9b5da5053def4d.
The files were copied as shown below with source->dest_dir.
CMSIS_5/CMSIS/Core/Include/core_*.h -> mbed-os/cmsis/
CMSIS_5/CMSIS/Core_A/Include/core_*.h -> mbed-os/cmsis/
CMSIS_5/CMSIS/DSP/Include/arm_math.h -> mbed-os/cmsis/
CMSIS_5/CMSIS/Core/Include/tz_context.h -> mbed-os/cmsis/
CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h -> mbed-os/cmsis/TARGET_CORTEX_M/
CMSIS_5/CMSIS/Core/Include/cmsis_arm*.h -> mbed-os/cmsis/TARGET_CORTEX_M/TOOLCHAIN_ARM/
CMSIS_5/CMSIS/Core/Include/cmsis_gcc*.h -> mbed-os/cmsis/TARGET_CORTEX_M/TOOLCHAIN_GCC/
CMSIS_5/CMSIS/Core_A/Include/cmsis_compiler.h -> mbed-os/cmsis/TARGET_CORTEX_A/
CMSIS_5/CMSIS/Core_A/Include/cmsis_arm*.h -> mbed-os/cmsis/TARGET_CORTEX_A/TOOLCHAIN_ARM/
CMSIS_5/CMSIS/RTOS2/RTX/Library/cmsis_os1.c -> mbed-os/rtos/rtx/
CMSIS_5/CMSIS/RTOS2/Include/cmsis_os2.h -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/
CMSIS_5/CMSIS/RTOS2/RTX/Config/* -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/
CMSIS_5/CMSIS/RTOS2/RTX/Include1/* -> mbed-os/rtos/rtx/
CMSIS_5/CMSIS/RTOS2/RTX/Include/* -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/
CMSIS_5/CMSIS/RTOS2/RTX/Source/rtx_* -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/
CMSIS_5/CMSIS/RTOS2/RTX/Source/core_cm.h -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/
CMSIS_5/CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_ARM/
CMSIS_5/CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_GCC/
CMSIS_5/CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_IAR/
CMSIS_5/CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_ARM/
CMSIS_5/CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_GCC/
CMSIS_5/CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_IAR/
CMSIS_5/CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_ARM/
CMSIS_5/CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_GCC/
CMSIS_5/CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_IAR/
CMSIS_5/CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_RTOS_M4_M7/TOOLCHAIN_ARM/
CMSIS_5/CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_RTOS_M4_M7/TOOLCHAIN_GCC/
CMSIS_5/CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_RTOS_M4_M7/TOOLCHAIN_IAR/
2017-05-30 18:53:37 +01:00
fd233778db
Remove RTOS and CMSIS files
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Remove the RTOS and CMSIS files in preperation for CMSIS 5. Note that
the RTOS heap ad stack test is left since this is still applicable to
RTX5. This file can be found here:
rtos\rtx\TARGET_CORTEX_M\TESTS\memory\heap_and_stack\main.cpp
2017-05-30 18:53:37 +01:00
0a3b2561bc
Merge pull request #4316 from c1728p9/remove_cortex_a
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Remove Cortex A boards as Cortex-A it is not supported in CMSIS5/RTX2
2017-05-15 11:55:36 -05:00
1b94d5abd1
Merge pull request #4292 from bulislaw/fix_release_version
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Set mbed minor and patch version to 0 for master
2017-05-15 16:19:41 +01:00
5f29445103
Remove Cortex A support from CMSIS/RTOS
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This change is temporary, Cortex A support will be reenabled when it's
fully supported in CMSIS/RTX 5.
2017-05-15 11:53:59 +01:00
2ddf4b33cb
CMSIS5: Remove ARM7 support and targets
2017-05-12 13:48:43 -05:00
Jimmy Brisson
Bartek Szatkowski
Kevin Gilbert
Vincent Coubard
Christopher Haster
Russ Butler
Martin Kojtal
Jaeden Amero
Bartosz Szatkowski
Yuguo Zou
Russ Butler