This commit adds the UART driver and updates the UART HAL implementation
to use this driver.
It also removes legacy definitions.
Change-Id: Ie8e7a7bb64c763a2d97bc66d949fab3596736bbc
Signed-off-by: Avinash Mehta <avinash.mehta@arm.com>
This commit adds the SPI driver which is now called by the SPI HAL
implementation.
It also removes legacy definitions.
Change-Id: Iadb20dda9dfa571db3de66c3a1ce45d80d8b81b6
Signed-off-by: Tamas Kaman <tamas.kaman@arm.com>
This commit adds the GPIO drivers. The HAL implementations
(gpio_api.c, gpio_irq_api.c, port_api.c) now call these drivers.
Legacy definitions have been removed.
Serial HAL implementation has been changed to compile at this stage.
Change-Id: Ib76a3186358f5029ed350da671132e8aa11194f7
Signed-off-by: Galanakis, Minos <minos.galanakis@arm.com>
The HAL implementation (us_ticker.c and lp_ticker.c) now calls function
in cmsdk_ticker.c file. This file contains the necessary logic to be
able to only use one hardware timer (CMSDK timer) per mbed ticker.
This commit also updates the timer driver and removes legacy definition.
Change-Id: If40413822832117f9b78f38d2cdda7847284b035
Signed-off-by: Galanakis, Minos <minos.galanakis@arm.com>
Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
This patch changes the way data is put in the TX_DATA_PORT register when
sending packet over Ethernet.
When this driver is compiled with release compilation profile
(space optimization compiler options) with Arm compiler version 5,
the line:
SMSC9220->TX_DATA_PORT = *pktptr;
generates the assembly instruction to get the pktptr pointed value:
LDM r2!, {r3}
with pktptr = r2
However, the code does not prevent the pktptr value from being unaligned
(to a 32 bits boundary) in that zone and the LDM instruction causes a
HardFault if this is the case. When the compiler option is not activated
(debug and develop compilation profiles), the compiler generates LDR
instruction instead which does not cause a HardFault.
The ARM v7-M states page B3-601: "Unaligned load-store multiples and
word or halfword exclusive accesses always fault."
To face that problem, we check if the data pointer is aligned or not. If
it is, we apply the same algorithm than before. If not, a local variable
is created and we copy in it, byte per byte, the contents at the
unaligned pointer. However, it will impact performances adding 8
instructions (one LD and one ST for each copied byte).
Change-Id: I11f6e82ce5521960d2ecf499f718f76fec29c0b0
Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
This patch fixes a memory bug. `eth_arch_enetif_init` method call
would attempt to write to un-initialized area of memory.
Change-Id: I9881de71d58fa14db609fe3e24617a210b896471
Signed-off-by: Galanakis, Minos <minos.galanakis@arm.com>
In the 'Testing accuracy of equeue semaphore' test case result is printed out in each loop iteration.
Since debug prints should not exist in the final test version I suggest to print information only in case of failure.
Additionally time needed to print single info is equal to ~25 ms (K64F/GCC_ARM). The while loop is designed to execute until 20000 ms elapses, so this print has also impact on number of times the loop is executed (number of semaphore accuracy checks).
How you write and ersae the flash on the NRF52 changes depending on
whether the SoftDevice is enabled or not.
This change does a runtime check before erasing and writing, and
then chooses the correct function to perform the action.
Avinash Mehta
Tamas Kaman
Galanakis, Minos
Hugues de Valon
Jimmy Brisson
Vincent Coubard
Martin Kojtal
Veijo Pesonen
Cruz Monrreal
Hasnain Virk
Fahim Alavi
Przemyslaw Stekiel
Bilal
Marcus Chang