Commit Graph

10 Commits (20ac1c92661ccd459f235209f65d311c4c7d966d)

Author SHA1 Message Date
Oren Cohen f70e069838 Configure PS with tdbstore 2019-04-10 17:33:37 +03:00
Michael Schwarcz dca3ebe9f6 LPC55S69_S: reduce ITS size to 32KB
- Reduce LPC55S69 secure side ITS from 64KB to 32KB
2019-03-14 15:49:44 +02:00
Martin Kojtal b80c961dae
Merge pull request #10034 from evgenibo/flash_protected_region_config
PSA: PSoc 6 configurable secure memory size
2019-03-14 13:23:58 +01:00
Evgeni Bolotin c0bc56737b modify rpb base address for M0 2019-03-14 11:29:46 +02:00
Michael Schwarcz f6ab217892 Reduce 32KB from LPC55S69_S binary size 2019-03-13 18:21:37 +02:00
Mahesh Mahadevan c607b8ab1a LPC55S69: Update the KVStore config files
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2019-03-08 07:33:47 -06:00
Oleg Kapshii aedec74b9a Added support for PSA target to WIFI_BT board
Added WiFi_Bt CM4 PSA target in mbedos json
Added SPE-NSPE mailbox initialization for CM4 SystemInit
Made similar to FUTURE_SEQUANA configurations
Copied FUTURE_SEQUANA CM0 SPM part for WiFi_Bt smoke test
Added CY8CKIT_062_WIFI_BT_M0 and CY8CKIT_062_WIFI_BT_M0_PSA targets
Sorted files for new CY8CKIT_062_WIFI_BT_M0 and CY8CKIT_062_WIFI_BT_M0_PSA targets
Copied files for CY8CKIT_062_WIFI_BT_M0_PSA from FUTURE_SEQUANA
Copied and updated cm0p start files
Corrected according to FUTURE_SEQUANA
Changes to M0 startup files to have SPM started
Fixed implicit declaration warning
Commented interrupts enabling according to FUTURE_SEQUANA flow
Updated prebuild spm_smore CM0 hex for CM4 target
Turned on greentea environment
Used special memory region for common CM0/CM4 data
Updated prebuild CM0 SPM hex
Placed shared memory region for flash operations into SPM shared memory region
Updated cyprotection code and configuration
Start address of protected regions is set by a defined number from target.json
Added masters pcMask configuration
Added support for PSA target to WIFI_BT board
Enabled resources protection for SPM
Aligned RAM usage according to Cypress FlashBoot and CyBootloader
alligned protection config
Added CYW943012P6EVB_01_M0 target
Enlarged heap size, remobed nv_seed
Added heap reservation in linker script from mbed-os
Removed heap size definition
turned on nv_seed config
Removed nv_seed macros
Enabled protection for PSoC6 CM0
Added PSoC6 CM0 PSA readme
Enabled mbed_hal-spm test
Enabled nv_seed and removed unneeded ipc config define
Added SPDX string to feature_ble cypress target files
Removed unneeded supported_toolchains lines for Cypress targets
Disabled protection settings
Corrected flash initialization for PSoC6 CM0 PSA
Changed PSoC6 IPC6 protection for flash
Enabled special flash initialization and enabled protection settings
Updated and added new prebuild PSoC6 CM0 PSA hex files
Disabled HW TRNG and CRC for PSoC6 CM4 PSA target
Added missing const to allow types to match
Updated PSoC6 WIFI_BT_PSA prebuilt directory
Moved PSoC6 shared section usage area definition to begin of ld
Added initial ARM_STD linker and startup files for PSoC6 CM0
Added initial IAR linker and startup files for PSoC6 CM0
Added defines to disable some SPM protection settings for PSoC64
Moved Flash function variables into separate memory region
Added defines for new Public area definition
Updated PSoC6 CM0_PSA hex-files
2019-03-07 08:40:20 -08:00
Oren Cohen f1d3eb9340 Add FUTURE_SEQUANA_PSA target
* Modify linker scripts to be compatible with bootloader and PSA
* Add memory protection
* Modify original post-build step to allow link with PSA binaries
* Config kvstore for ITS on FUTURE_SEQUANA_PSA
* Enable PSA-Crypto on PSoC6 with NVSeed
2018-12-04 18:38:50 +02:00
Danny Shavit 53728e45b7 Add a new PSA Internal Trusted Storage APIs 2018-11-25 09:57:22 +02:00
David Saada e9c25e23a5 KVStore & derived classes: design docs, implementation & configuration
Implement the following:
KVStore base class
TDBStore class
FileSystemStore class
SecureStore class
Global APIs
Configuration framework
Design documentation
2018-11-24 17:43:35 +02:00