I decided to move these files to the targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51 since us_ticker.h is for sure specific for NRF51_DK and common_rtc.c might be valid also for NRF52, but this needs to be checked while porting NRF52_DK board.
For NR51_DK US_TICKER_OV_LIMIT needs to be increased since if test is run few times in row sometimes fails. This is because NR51_DK is a slow board (16 MHz) with fast and short us ticker counter 1 MHz/16 bits.
Since this change concerns new ticker driver for NRF51_DK it goas on ticker feature branch.
On this branch us ticker is based on 1 MHz higher precision counter (on master is based on 32kHz RTC). As a result of using higher precision counter measurement error increased:
:485::FAIL: Expected 1.060000 Was 1.070478
For delay 1060 ms we measured ~1070 ms so we have about ~1% measurement error which is not bed for this board.
To make it work with 1MHz us ticker increase test tolerance. Define tolerance as follows:
tolerance = 500us + 0.02 * delay.
Since this change concerns new ticker driver for NRF51_DK it goas on ticker feature branch.
On master NRF51_DK Ticker driver uses 32kHz RTC for lp and us ticker. Test uses us ticker to measure lp ticker interrupt scheduling (LowPowerTicker.attach), but since the same hardware is used for both tickers the measurement error is constant. On this branch us ticker uses 1 MHz higher precision clock and the results are different - measurement error grows linearly and shows inaccuracy of the RTC.
Test implements constant delta for measured time equal to 2000 us.
Change delta so it depends on lp ticker tested timeout value:
500us for measurement inaccuracy + 5% tolerance for LowPowerTicker
Provide the following modifications for lp ticker driver:
- According to NRF51_DK reference manual rtc interrupt cannot be controlled by rtc event. In the previous implementation interrupts were enabled permanently and specific interrupt was enabled/disabled by enabling/disabling the specific event. If event is enabled, then event signal is provided to Programmable Peripheral Interconnect (PPI). If interrupt is enabled, then interrupt signal is provided to Nested Vector Interrupt Controller (NVIC). Disable all events permanently. Enable lp ticker overflow interrupt permanently(needed for RTC), disable lp ticker capture/compare interrupt on init (lp_ticker_init) , enable lp ticker interrupt when lp ticker interrupt is set (lp_ticker_set_interrupt), disable lp ticker interrupt on disable request(lp_ticker_disable_interrupt).
- Provide lp ticker data for higher level (freq: 32kHz / len: 24 bits),
- Add the following features to init routine: disable lp ticker interrupt.
- Make ticker driver to operate on ticks instead of us.
- Simplify lp ticker read and set interrupt routines (upper layers handle conversion to us and interrupt scheduling).
According to new ticker standards the following requirements for us ticker are not met on RRF5 boards:
- has a frequency between 250KHz and 8MHz (currently is driven by 32kHz clock)
- ticker increments by 1 each tick (currently is scaled to 1 MHz by incrementing counter by ~31)
Since BLE softdevice uses TIMER0 the proposition is to use high speed TIMER1 for us ticker configured as follows:
- TIMER counter width: 16 bits (max)
- TIMER frequency: 1MHz
This solution also uses Timer's capture/compare register 0 to specify interrupt time and Timer's capture/compare register 1 to read current timer value.
I implemented USTICKER feature.
The mainly changing is here.
- I added a macro to mbed_drv_cfg.h for commonalizing code for GR-PEACH and GR-LYCHEE with different clock frequencies, and referenced it's macro at us_ticker.c.
- ticker_init()
Currently, ticker_init() keep counting, disables the ticker interrupt, and is safe to call repeatedly.
Therefore, in order to satisfy specifications, I removed GIC_EnableIRQ at end of function and added GIC_DisableIRQ at begin of function.
When an interrupt is required, it will be set with ticker_set_interrupt().
If executing the following, the counter has been initialized. So it will not call after executing the first time.
OSTM1TT = 0x01; /* Stop the counter and clears the OSTM1TE bit. */
OSTM1TS = 0x1; /* Start the counter and sets the OSTM0TE bit. */
- ticker_free()
this function stops the counting and powerdown the us_ticker.
To satisfy the mbed specificationm, I implemented free() function.
- ticker_read()
Currently, Mbed spec's frequeny is between 250KHz and 8MHz, but the frequency that is used at my ticker is 33MHz.
Therefore, in order to satisfy specifications, I changed the process to return the timer counter value divided by 32(33MHz / 32).
Since the calcurate function by using 64 bit is no longer necessay, I removed it.
- ticker_set_interrupt()
Same as the above read(),
In order to satisfy specifications, I changed the process to set the value multiplied by 32.
- ticker_fire_interrupt()
In order to satisfy specifications, I implemented fire_interrupt() function.
Also I added GIC_EnableIRQ for allowing the interrupt at end of function.
- ticker_get_info()
To satisfy the mbed specificationm, I implemented ticker_get_info() function. The value of freq includes rounding off.
Update the ticker common test to clean up after each case by restoring
the ticker IRQ handler. This allows tickers to function normally after
each case has completed.
The new HAL allows to share the timer bit width and frequency,
the actual handling of mapping 16 bits counter up to 32 bits or
64 bits is now managed by mbed common layer.
This makes this ticker layer very similar to 32bits one and much
easier than before.
Re-implemented both us_ticker and lp_ticker to match the new API and specifications.
Details:
* On EFM32GG, EFM32WG, EFM32LG, EFM32HG, EFM32ZG: Use the RTC peripheral to back lp_ticker, and a TIMER to back us_ticker.
* On EFM32PG, EFR32MG, EFM32PG12, EFR32MG12: Use the RTCC peripheral to back lp_ticker (dual-purpose, also used to back RTC), and a TIMER to back us_ticker.
mbed RTC specifications now dictate that the RTC needs to retain and keep on counting through reset. On Silicon Labs parts, this means the RTC API can not be backed by the Silicon Labs RTC peripheral, since that doesn't provide retention functionality.
Therefore:
* On EFM32GG, EFM32WG, EFM32LG: mbed RTC API is now backed by BURTC.
* On EFM32PG, EFR32MG, EFM32PG12, EFR32MG12: mbed RTC API is now backed by RTCC.
* On EFM32ZG, EFM32HG: mbed RTC API is sadly no longer supported, since these chips don't have retained memory.
# Conflicts:
# targets/TARGET_Silicon_Labs/TARGET_EFM32/lp_ticker.c
# targets/TARGET_Silicon_Labs/TARGET_EFM32/rtc_api.c
# targets/targets.json
- count_ticks: fix counter overflow handling,
- count_ticks: use reg_cycles variable in while loop,
- increment test: reduce number of cycles for slow cores if measure process needs to be repeated (difference is greater than 1).
On slow targets with fast high frequency tickers like NRF51_DK (16 Mhz CPU/1MHz ticker) time window for test case execution without overflow needs to be increased. Add parameter to `overflow_protect` function to be able to set different time window without overflow for us ticker and lp ticker.
Increment test proves that ticker counter is incremented by one.
This is done indirectly for high frequency counters where it is impossible to read 'value' and 'value + 1' in two successive ticker reads.
This check is done indirectly by counting ticker ticks elapsed during execution of N cycles of empty while loop. Unfortunately on slow boards with fast tickers like NRF51_DK(16 MHz CPU/1MHz hf ticker) it is possible that for the same N cycles measured number of elapsed ticks in two successive calls is greater than 1. This patch provides fix for such case - measure operation is repeated with the same number of cycles.
Since target specific ticker drivers are not ready also features which uses ticker in upper layers may not work correctly and tests for these features.
We need to disable also failing higher level ticker related tests (by adding check if DEVICE_USTICKER symbol is available and raise #error [NOT_SUPPORTED] if not).
Note:
tests-mbed_drivers-rtc is new and uses us ticker to perform a delay.
count_ticks() function counts ticker ticks elapsed during execution of N cycles of empty while loop.
In current version N value (cycles) is given as volatile paramater in order to disable possible compiler optimalisation.
There was a problem with measured time on different compilers and additionally results on ARM compiler were unexpected (the difference beetween measured elapsed ticks for the same number of cycles was to large). This might be caused by the memory access in order to store updated variable in memory. To fix this issue given numer of cycles has been stored into register and register is decremented (no memory access).
With this fix count_ticks(NUM_OF_CYCLES, 1) call returns 2500 +/-1 for us ticker ticks using each compiler (K64F).
On some platforms (e.g. K64F) different counters are used for time measurement and interrupt generation.
Because of that we should relax interrupt test case and give additional time before checking if interrupt handler has been executed.
Przemyslaw Stekiel
Bartek Szatkowski
Marc Emmers
jeromecoutant
TomoYamanaka
Russ Butler
Laurent MEUNIER
Steven Cooreman