As reported during review, this was not understandable as it is.
the get_i2c_obj allows to get a pointer to i2c_s struct from the
handle pointer. This therefore makes a hard-coded assumption
about the struct itself
in case of 2 consecutives calls to HAL_I2C_Master_Sequential_Receive_IT
with the Xfer mode I2C_FIRST_AND_LAST_FRAME, the second trasnfer does
not start at all.
It seems this is because the previous state is maintained as I2C_STATE_MASTER_BUSY_RX
and therefore the START condition will not be generated
With this new implementation, as in slave implementaiton, we use the
interrupts instead of accessing to registers continuously.
This has 2 main advantages:
- this shall improve performances overall and allows for sleep
time in the future
- this also removes some direct registers access from this
layer of code and makes it more generic among families
The timeout values are based on for loops and therefore should depend
on the core frequency and the I2C interface frequency.
This patch introduces this computation and base the timeout on the time
it should take to send a byte over the I2C interface. When sending a
number of bytes, this value can also be used.
In the loops, the timeout should also be decreased before the while
condition so that its value is 0 in case the timeout elapsed and this
can be treated as an error.
With this new implementation, the slave use the Interrupt
to be notified of a request from master, instead of
accessing to registers continuously.
This has 2 main advantages:
- this shall improve performances overall and allows for sleep
time in the future
- this also removes some direct registers access from this
layer of code and makes it more generic among families
With this commit we define I2C irq handlers that can be used by the driver
in sync mode. This also provides a mecanism for enabling and/or disabling
these handlers
Those handlers will be superseded by MBED ones in case of async mode usage.
the SPI_ASYNCH feature has been already activated for STM32F4.
This patchset makes it supported on all STM32 families by:
- moving spi_s structure at family level instead of board level
- using the F4 spi_api.c reference implementation and making it a common
stm_spi_api.c file which makes maintenance a lot easier.
- the only part that needs to be implemented for each family is the computation
of the clock frequency input to the spi peripheral which is not the same
accross families. So this is what remains in the spi_api.c of each family.
Because of the introduction of the common file, all the above modifications
needs to be done at once.
- Remove waiting for 'BTF' flag in 'i2c_stop()':
When 'i2c_stop()' is called from 'i2c_read()' or 'i2c_write()' flag 'BTF'
has already been cleared (indirectly) by the calling functions and therefore
'i2c_stop()' would mistakenly always run into a timeout.
- Delay clock enabling until pins are configured:
Enabling the I2C bus clock before configuring its pins might in rare
cases lead to HW faults on the bus.
- Move initialization of 'handle->Instance' to function 'i2c_reset()':
As 'i2c_reset()' uses '__HAL_I2C_GET_FLAG(handle, I2C_FLAG_BUSY)' field
'handle->Instance' must have been initialized before doing so. Therefore,
this operation has been anticipated by moving it from function
'i2c_frequency()' to function 'i2c_reset()'.
Martin Kojtal
Sam Grove
Laurent MEUNIER
Brian Daniels
javierpedrido
andreas.larsson
Andreas Larsson
Christopher Haster
Mike Fiore
Michel Jaouen
Russ Butler
Russ Butler
adustm
bcostm
Laurent MEUNIER
Wolfgang Betz