Commit Graph

13846 Commits (06308c2017485fc52779b136faf1e75d7e24787c)

Author SHA1 Message Date
adbridge 27109bebd8 Revert "Correct test `socket_sigio`"
This reverts commit b812918f90.
2018-02-12 11:12:54 +00:00
Wolfgang Betz b812918f90 Correct test `socket_sigio`
A call to

    `TCPSocket::recv(void *data, nsapi_size_t size)`

returns, following the mbed documentation, the number of received bytes on
success, and a negative error code on failure.

So in case of success, the return value depends on both the value of parameter
`size` but also on the amount of data already available. This means, that the
value returned can be lower than or equal to the `size` of the `data` buffer
passed as argument to the call.

Therefore, in the cases of `test_tcp_hello_world()` & `find_substring()`
(i.e. test `socket_sigio`), the calls to `TCPSocket::recv()` might return from
one byte up to `sizeof(buffer) - 1` (i.e. 511) bytes for each single call,
while the tests expect to receive the whole response string with a single call.

This commit applies a fix to this situation by implementing a receive loop
which exits once there is no data anymore available to be read from the socket.
2018-02-09 14:39:45 +00:00
adbridge 8d517f7e46 Update Mbed version block for patch release 2018-02-09 14:18:46 +00:00
Ashok Rao 79a2b61150 Added MTB aliases & default SPI 2018-02-09 14:18:46 +00:00
Ashok Rao b07cecbd19 Adding LAIRD_BL600 MTB 2018-02-09 14:18:46 +00:00
ccli8 5d1e58ce16 Fix CThunk error on Cortex-M23
Cortex-M23 doesn't support ARMv8-M Main Extension and so doesn't support:
ldm  r0, {r0, r1, r2, pc}

Fix it by going Cortex-M0/M0+ way:
ldm  r0, {r0, r1, r2, r3}
bx   r3
2018-02-09 14:18:46 +00:00
bcostm 685d4951c1 Move TARGET_DISCO_L072CZ_LRWAN1 folder 2018-02-09 14:18:46 +00:00
Maciej Bocianski 14e48e53ab test-mbed_drivers-ticker: improve two ticker test accuracy
test_case_2x_callbacks test was redesigned to eliminate ticker rescheduling and improve time mesure accuracy.

Constant ticker rescheduling (detach()/attach_us() calls)
was causing the gap between consecutive callback calls was not exact 1ms
but 1ms + time needed to call the callback and attach new one.
New design just uses two tickers to update counter alternatively every 1ms without rescheduling them
2018-02-09 14:18:46 +00:00
Maciej Bocianski 2c617c549c test-mbed_drivers-ticker: fix ticker cross attach
This commit fixes ticker cross-schedule bug in test_case_2x_callbacks subtest

In effect of this bug:
    ticker_callback_1_switch_to_2 was called only once
    ticker2 was never been fired because it was repeatedly detached just before fire and attached again
2018-02-09 14:18:46 +00:00
deepikabhavnani 1c3020784f -march not required if -mcpu is set
GCC_ARM throws warning if both architecture and core are set (though
correct). If CPU option is set correctly, architecture is set by compiler
itself.
2018-02-09 14:18:46 +00:00
Wilfried Chauveau 82d16294cb rename MURATA type ABZ & WISE_1510 to their expected name 2018-02-09 14:18:46 +00:00
TomoYamanaka d942bb6be8 Fix TRNG function
Related to the review of #5857, I fixed the TRNG function for GR-LYCHEE.
- I modified to zeroize "recv_data" before the function return.
- I added the processing that check the return value of I2C.read function. If return value is error, "output" is zeroized before function return.
- In trng_get_bytes_esp32 function, there is a time lag in the period from ESP32 reset to start working, error may occur when "Write" is called. Thus, I added a retry counter due to address this concern. There is not this counter for "Read" since it is called after "Write".
2018-02-09 14:18:46 +00:00
Kimmo Vaisanen caaed4f315 Add WISE-1570 external pin names 2018-02-09 14:18:46 +00:00
Kimmo Vaisanen 3c5af68180 Add MTB_ADV_WISE_1570 target 2018-02-09 14:18:46 +00:00
Przemyslaw Stekiel 9690089280 Add Transaction class unit test. 2018-02-09 14:18:45 +00:00
Jimmy Brisson c6810a68b9 Correct auto-sizing last region in bl 2018-02-09 14:18:45 +00:00
Jimmy Brisson 0dc3132c09 Test for region list sanity (sizes all >= 0) 2018-02-09 14:18:45 +00:00
David Saada 04dd95f280 Add missing flash device feature to the K82F board 2018-02-09 14:18:45 +00:00
Matthias L. Jugel 955a077930 fix #5985 CLion exporter results in cmake build directory, causes compiler to fail in unexpect... 2018-02-09 14:18:45 +00:00
bcostm a5cd64eebb STM32L476/486: change SRAM config for IAR 2018-02-09 14:18:45 +00:00
Jimmy Brisson de983ce1b8 Don't bother padding hex files for managed bl 2018-02-09 14:18:45 +00:00
Jimmy Brisson 1b222ac07f Use OUTPUT_EXT in managed boot loader 2018-02-09 14:18:45 +00:00
Jimmy Brisson 51d424f3cc Use relative path to scatter for include path 2018-02-09 14:18:45 +00:00
Evan Hosseini 4a4891c60b ARM: ARMC6: Update scatter file shebang include directory 2018-02-09 14:18:45 +00:00
Evan Hosseini 76ccfc8f8f ARM: ARMC6: Copy headers along with the updated linker scatter file
* Need to copy headers into the build directory as well when also
  writing an updated linker scatter file to the build directory
2018-02-09 14:18:45 +00:00
Evan Hosseini d8edb99168 ARM: ARMC6: Fix for ARM linker script cpu formatting 2018-02-09 14:18:45 +00:00
Evan Hosseini ecdd776b09 ARM: ARMC6: Specify CPU for ARM scatter file preprocessor
Fixes #5796
2018-02-09 14:18:45 +00:00
Maciej Bocianski bec8d758fe Add FileHandle tests 2018-02-09 14:18:45 +00:00
Oren Cohen e54d069ba2 Update uvisor-tests.txt to disable EFM32 in Jenkins 2018-02-09 14:18:45 +00:00
Cruz Monrreal c65cd6b475 Added LED2 definition for compilation of tests 2018-02-09 14:18:45 +00:00
Christopher Haster 9ce49a8f82 Workaround for insufficient heap on IAR+MTB_xDOT_GT
We currently don't have a mechanism for selecting tests based on the
available ram/heap, so the best solution right now is to disable these
tests specifically for this target.
2018-02-09 14:18:45 +00:00
Ashok Rao 76329a7080 Adding MTB_MTS_XDOT as a new target 2018-02-09 14:18:45 +00:00
gorazd 82b6c51ba8 ff_lpc546xx: move property to parent 2018-02-09 14:18:44 +00:00
gorazd 5bdf231abe lpc546xx and ff_lpc546xx: create parent object MCU_LPC546XX 2018-02-09 14:18:44 +00:00
Kevin Bracey 5784c8aed7 Correct ConditionVariable ISR comments
No ConditionVariable methods are useable from ISR, due to the built-in
mutex and the requirement that the caller of notify holds the mutex.
2018-02-09 14:18:44 +00:00
Kevin Bracey 8f521a4743 Add Thread::wait_until
API is somewhat loose to cope with potential shift in the underlying
RTOS APIs.
2018-02-09 14:18:44 +00:00
Kevin Bracey f740ecea13 Add Semaphore::wait_until
Given the 64-bit timebase, add wait_until to Semaphore.

Naming is based on Thread::wait_until.

pthreads uses "timedwait", but that's not a good fit against our
existing wait() - pthreads only has an absolute-time wait, not relative.
2018-02-09 14:18:44 +00:00
Kevin Bracey 436301dc5e Add Mutex::trylock_until and trylock_for
Given the 64-bit timebase, add trylock_until to Mutex.

Naming is based on a combination of Mutex::trylock, Thread::wait_until,
and C++11 timed_mutex::try_lock_until.

pthreads and C11 use "timedlock", but that's not a good fit against our
existing trylock() and lock(timeout) - they have only absolute-time
waits, not relative.

To increase the similarity to C++11, add trylock_for - same parameters
as lock, but with the bool return value of trylock and trylock_until.

Add an assertion when convering status codes to booleans to check that
there are no non-timeout errors.
2018-02-09 14:18:44 +00:00
Kevin Bracey 029751db20 Add ConditionVariable::wait_until
Given the 64-bit timebase, add wait_until to ConditionVariable.

Move the timeout example to wait_until(), and give wait_for() an
alternative example, as it's no longer the best option for a
timeout.

Tidy up - remove the redundant RESUME_SIGNAL definition.
2018-02-09 14:18:44 +00:00
Kevin Bracey 866b669d6e Add Kernel::get_ms_count
Give C++ access to the RTOS's absolute timebase, reducing the need to
run private Timers and similar. Allows wait_until functionality, and
makes it easier to avoid time drift.

Place it in a new header and namespace in case we want more kernel
functions in future.

Try to cover over the breaking API change potentially upcoming in
CMSIS-RTOS 2.1.1, when it reduces the tick count from 64-bit to 32-bit.
(See https://github.com/ARM-software/CMSIS_5/issues/277)

Explicitly state that ticks are milliseconds in mbed OS, despite CMSIS
RTOS 2 permitting different tick rates.

See also https://github.com/ARMmbed/mbed-os/pull/3648 (wait_until
for condition variables) and
https://github.com/ARMmbed/mbed-os/issues/5378 (EventQueue should
use RTOS tick count).
2018-02-09 14:18:44 +00:00
Mahesh Mahadevan b137307757 NXP: Add support for MIMXRT1050_EVK
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2018-02-09 14:18:44 +00:00
jeromecoutant 4df67ef584 STM32 SPI ASYNC - Add FIFO flush before transfer 2018-02-09 14:18:44 +00:00
jeromecoutant a52d7553c3 STM32F7 SPI - add missing HAL files
ST_INTERNAL_REF 43358
2018-02-09 14:18:44 +00:00
bcostm d6e5fac49f STM32F7: move cache initialization 2018-02-09 14:18:44 +00:00
bcostm 11f629f4de Check cache before enabling it
The mbed_sdk_init can be called either during cold boot or during
application boot after bootloader has been executed.
In case the bootloader has already enabled the cache,
is is needed to not enable it again.
2018-02-09 14:18:44 +00:00
bcostm 846bd72068 NUCLEO_F767ZI: Add bootloader support 2018-02-09 14:18:44 +00:00
bcostm a79569977f BL NUCLEO_F746ZG: change scb->vector assignment 2018-02-09 14:18:43 +00:00
bcostm e8eb8bc8f6 BL NUCLEO_F746ZG: enable bootloader 2018-02-09 14:18:43 +00:00
bcostm 43c6f5b5b2 BL STM32746xG: Update scatter/link files 2018-02-09 14:18:43 +00:00
Brendan McDonnell 85d08b157a make _sbrk() WEAK so the user can override it, e.g. to make malloc() always use external memory 2018-02-09 14:18:43 +00:00