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Add WISE-1570 external pin names

pull/6056/head
Kimmo Vaisanen 2018-02-05 14:44:52 +02:00 committed by adbridge
parent 3c5af68180
commit caaed4f315
1 changed files with 77 additions and 0 deletions
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77
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_MTB_ADV_WISE_1570/PinNames.h
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@ -185,6 +185,83 @@ typedef enum {
STDIO_UART_RX = UART3_RX,
#endif
// Module external pins
P_1 = NC,
P_2 = NC,
P_3 = NC,
P_4 = NC,
P_5 = NC,
P_6 = NC,
P_7 = NC,
P_8 = NC,
P_9 = NC,
P_10 = NC,
P_11 = NC,
P_12 = NC,
P_13 = NC,
P_14 = NC,
P_15 = NC,
P_16 = CB_RESET_OUT,
P_17 = NC,
P_18 = NC,
P_19 = NC,
P_20 = CB_PWR_ON,
P_21 = NC,
P_22 = UART3_TX,
P_23 = NC,
P_24 = NC,
P_25 = NC,
P_26 = NC,
P_27 = NC,
P_28 = NC,
P_29 = NC,
P_30 = NC,
P_31 = NC,
P_32 = UART3_RX,
P_33 = NC,
P_34 = UART3_RTS,
P_35 = I2C1_SDA,
P_36 = UART3_CTS,
P_37 = I2C1_SCL,
P_38 = GPIO0,
P_39 = NC,
P_40 = GPIO1,
P_41 = PWM0_OUT,
P_42 = GPIO2,
P_43 = PWM1_OUT,
P_44 = GPIO3,
P_45 = NC,
P_46 = GPIO4,
P_47 = ADC00,
P_48 = GPIO5,
P_49 = ADC01,
P_50 = NC,
P_51 = NC,
P_52 = NC,
P_53 = ADC02,
P_54 = NC,
P_55 = NC,
P_56 = W_DISABLE,
P_57 = NC,
P_58 = I2C0_SDA,
P_59 = NC,
P_60 = I2C0_SCL,
P_61 = NC,
P_62 = SPI_MOSI,
P_63 = NC,
P_64 = SPI_MISO,
P_65 = NC,
P_66 = SPI_SCK,
P_67 = BACKUP,
P_68 = SPI_CS0,
P_69 = NC,
P_70 = NC,
P_71 = RESET_IN,
P_72 = NC,
P_73 = WAKE,
P_74 = NC,
P_75 = NC,
} PinName;
#ifdef __cplusplus