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20 Commits (mbed-os-5.9)

Author SHA1 Message Date
bcostm d3e35ab118 stm32 ticker: typo corrections 2018-07-15 22:53:45 -05:00
bcostm ccb538562f stm32 ticker: change license 2018-07-15 22:53:45 -05:00
bcostm 9a480e3260 stm32 ticker: rename hal_tick.h in us_ticker_data.h 2018-07-15 22:53:45 -05:00
bcostm 92fe07f02f stm32 ticker: rename macro and update ST HAL Tick functions 
- rename TIM_MST_16BIT in TIM_MST_BIT_WIDTH in order to use it directly in ticker info structure
- change HAL_InitTick() and HAL_GetTick()
 2018-07-15 22:53:45 -05:00
bcostm 8b7e62bf65 Remove HAL_TICK_DELAY (no more used) 2018-06-15 13:30:56 +01:00
adustm 02b2b01a83 Change STM32L475/76/86 GCC_ARM linker files to have HEAP in SRAM1 and stack in SRAM2 (after the interrupt vector) 2018-02-22 17:36:27 +01:00
jeromecoutant 7979f4d255 SMT32L4 : add missing ST HAL LPUART functions 
To enable/disable UART Clock in Stop Mode
 2018-01-26 16:24:54 +01:00
Cruz Monrreal f1cf77fa44
Merge pull request #5844 from adustm/DiscoIot_L475_iarlink 
ST-DISCO_L475VG_IOT01A: Improve SRAM use for IAR toolchain
 2018-01-23 16:23:08 -06:00
adustm 5104f2d1cc Improve SRAM use for IAR toolchain 
Use the entire SRAM2 with NVIC buffer + stack
  Increase HEAP size to 0x10000 in SRAM1
  Increase the available SRAM1 by 0x2000
 2018-01-12 15:49:27 +01:00
bcostm 84577f9634 L4 ST CUBE V1.11.0 
Update to STM32CubeL4 V1.11.0

Conflicts solved:
	targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/stm32l433xx.h
	targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/stm32l4xx.h
	targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/stm32l496xx.h
	targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/stm32l4xx.h
	targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_conf.h
	targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_def.h
	targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_i2c.c
	targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_spi.h
 2018-01-12 11:11:31 +01:00
bcostm 9f86a32baf Add freeze timer on debug for all STM32 devices 
This is a continuation of the work done on the STM32F401xE devices only.
 2017-09-18 13:31:46 +02:00
Jimmy Brisson 15a9a0382b Enable Compiling with ARMC6 across all targets 
remove duplicate sys.cpp
 2017-09-11 13:20:32 -05:00
jeromecoutant b654af2d80 STM32L4 : json clock source configuration 
- default value is the same as before patch
- system_stm32l4xx.c file is copied to family level with all other ST cube files
- specific clock configuration is now in a new file: system_clock.c (target level)
- nvic_addr.h file is now in TARGET_STM level
 2017-07-19 16:39:26 +02:00
bcostm 03930b88f6 DISCO_L475VG_IOT01A: Add missing nvic_addr.h file 2017-06-26 20:14:08 +02:00
bcostm bd6d7382a3 DISCO_L475VG_IOT01A: Update toolchain files for cmsis5 2017-06-26 19:02:52 +02:00
bcostm 8ede14dac1 DISCO_L475VG_IOT01A: Add include of LL timer file 2017-06-12 17:12:57 +02:00
bcostm 66cbc8b452 DISCO_L475VG_IOT01A: Update device files after CubeL4 update 2017-06-12 17:03:12 +02:00
bcostm af2078f38d DISCO_L475VG_IOT01A: Update cmsis_nvic files 2017-06-12 17:03:12 +02:00
bcostm 2ed207efd4 DISCO_L475VG_IOT01A: change comment for 8-byte aligned adress for IAR .icf file 2017-06-12 17:03:12 +02:00
bcostm a8ab839e2c DISCO_L475VG_IOT: Re-organize folder 
- Move TARGET_DISCO_L475VG_IOT01A/ in TARGET_STM32L475xG/
- Add STM32L475xG extra label in targets.json
 2017-06-12 17:03:12 +02:00