1. Rearrange SDRAM and SRAM layout. Move timing critical code to SRAM,
and the rest to SDRAM.
2. Add bootloader that's capable of FOTA over mbed cloud.
Signed-off-by: Tony Wu <tonywu@realtek.com>
Wipe out all blank lines in json:
find tools/test -name 'test_data.json' | xargs sed -i -e '/^$/d'
Move all start braces back a space:
find tools/test -name 'test_data.json' | xargs sed -i -e "s/^ {/{/"
Make calls to cmsis-os to get thread state, stack size, and max stack
usage rather than accessing internal RTX data directly. Wrap RTX5
specific code in OS_BACKEND_RTX5.
Also refactor the code to use mbed types rather than RTX types:
os_timer_t -> mbed_rtos_storage_timer_t
os_event_flags_t -> mbed_rtos_storage_event_flags_t
osRtxMutex_t -> mbed_rtos_storage_thread_t
Since mbed-os 5.4.3, something increased foot print of mbed-os and the applications that were barely fitting in started to spill.
IAR toolchain for LPC176x target family is set to use 2 RAM regions (32K each). RAM region
2 is being used for ETH/USB and 1 is being used for vector table, stack/heap/static data.
In this commit we have decreased heap size allocation from 8K to 7K so that the is more room for stack and static data.
Commit f602c936 incorrectly started defining LWIP_DEBUG as either 0 or
1.
lwipopts.h locally was changed to use #if, but all existing users
continued to use #ifdef. Therefore defining it to 0 was accidentally
enabling it for quite a few users.
This would have pulled in some unwanted lwIP code, and affected some
drivers, eg k64f_emac.c allocating an extra 2K of stack.
Correct lwipopts.h to either define it as 1 or leave it undefined, and
change the #if tests back to #ifdef, so all are consistent.
Enabling SPI causes the clock to be output by default.
Most devices will not care about extra clock cycles, especially as long
as chip select is not active, nevertheless this may cause side issues
with other devices especially during init phase.
This was actually the case with a 3 wire device (LPS22HB sensor).
In case MISO is not passed at SPI init, then we consider a 3 wires SPI
configuration is requested, which corresponds to SPI_DIRECTION_1LINE
configuration parameter in STM32 HAL layer.
We're then handling this specific case of SPI_DIRECTION_1LINE,
in spi_master_write or spi_master_block_write, we call to HAL API
If NVIC_NUM_VECTORS is larger than the space allocated by the vector
table in ram (__ram_vector_table_size__) then the call to mbed_cpy_nvic
during boot will corrupt valid data, which can lead to a crash. This
patch fixes the declared number of vectors on the KL27Z, KL43Z and
KL82Z to fix this crash.