i2c_byte_write implementation was broken.
Data sending was inside addressing block
Changed from:
i2c_byte_write
{
if (start) {
if (read_address)
start read;
esle
start write;
write byte;
}
}
to:
i2c_byte_write
{
if (start) {
// if first call after start
// address for reading or writing
if (read_address)
start read;
esle
start write;
} else {
// send data byte
write byte;
}
}
This is to meet platform name 'NU_PFM_M2351' registered in mbed-os-tools. This tool
uses the platform name as a key to search platform related properties in targets.json.
For example, the property 'forced_reset_timeout' is critical for Greentea test.
ARM Compiler 6.13 testing revealed linker errors pointing out
conflicting use of `__user_setup_stackheap` and
`__user_initial_stackheap` in some targets. Remove the unwanted
`__user_initial_stackheap` from the targets - the setup is
centralised in the common platform code.
Looking into this, a number of other issues were highlighted
* Almost all targets had `__initial_sp` hardcoded in assembler,
rather than getting it from the scatter file. This was behind
issue #11313. Fix this generally.
* A few targets' `__initial_sp` values did not match the scatter
file layout, in some cases meaning they were overlapping heap
space. They now all use the area reserved in the scatter file.
If any problems are seen, then there is an error in the
scatter file.
* A number of targets were reserving unneeded space for heap and
stack in their startup assembler, on top of the space reserved in
the scatter file, so wasting a few K. A couple were using that
space for the stack, rather than the space in the scatter file.
To clarify expected behaviour:
* Each scatter file contains empty regions `ARM_LIB_HEAP` and
`ARM_LIB_STACK` to reserve space. `ARM_LIB_STACK` is sized
by the macro `MBED_BOOT_STACK_SIZE`, which is set by the tools.
`ARM_LIB_HEAP` is generally the space left over after static
RAM and stack.
* The address of the end of `ARM_LIB_STACK` is written into the
vector table and on reset the CPU sets MSP to that address.
* The common platform code in Mbed OS provides `__user_setup_stackheap`
for the ARM library. The ARM library calls this during startup, and
it calls `__mbed_user_setup_stackheap`.
* The default weak definition of `__mbed_user_setup_stackheap` does not
modify SP, so we remain on the boot stack, and the heap is set to
the region described by `ARM_LIB_HEAP`. If `ARM_LIB_HEAP` doesn't
exist, then the heap is the space from the end of the used data in
`RW_IRAM1` to the start of `ARM_LIB_STACK`.
* Targets can override `__mbed_user_setup_stackheap` if they want.
Currently only Renesas (ARMv7-A class) devices do.
* If microlib is in use, then it doesn't call `__user_setup_stackheap`.
Instead it just finds and uses `ARM_LIB_STACK` and `ARM_LIB_HEAP`
itself.
The port configuration api was not correctly setting the port-pins'
direction. Changed the port driver to call the gpio driver for
configuration (read and write still are optimized for port-level
operations) so that the behavior is consistent.
- Use a switch statement rather than shifting and masking to compute
the AlternateBytes value.
- Rename rounded_size to alt_bytes to clarify its purpose.
- Fixed miscalculation in SPI frequency setup (divider value).
- Added possibility to set up SCK line as NC (usable when SPI peripheral
is used to handle non-SPI protocols.
- Fixed handlingh of 16-bit (and other >8 bit) transfers.
(cherry picked from commit 7d391f257b4ff6cdd7b43eeaa4894f8ce6d2cf8e)
The TC flag is used in function serial_is_tx_ongoing to check if there is
an ongoing serial transmission. So this Flag must not be cleared at the
end of the transmission, otherwise, serial_is_tx_ongoing will notify that
TX is ongoing.
The impact is that it may prevent deep sleep to be entered.
Also there is no need to clear this flag at the end of the transaction
because it will be cleared automatically by HW when a new transmission
starts.
Add 2 targets for DISCO_H747I dualcore:
* DISCO_H747I -> for CM7 core
* DISCO_H747I_CM4 -> for CM4 core
Current restrictions:
* TICKLESS deactivated
* DeepSleep not supported (DeepSleep wrapped to sleep)
Warning: use of the same IP (example I2C1) by both core at the same time is not prevented,
but is strongly not recommended.
Some Hardware Semaphore are use for common IP, to manage concurrent access by both cores: Flash, GPIO, RCC.
Warning: Drag and drop of binary to DISCO_H747I will flash CM7.
In order to flash CM4, one can use STM32 CubeProgrammer tool.
The cyhal_spi_send api was changed to read and discard a byte on every
send operation (at the protocol level all SPI transfers are bidirectional).
This means that to achieve a truly bidirectional transfer, the
cyhal_spi_transfer API must be called (as opposed to a write followed
by a read).
Earlier changes introduced a change to default Arm C6, which does not compile the micro library which is based on Mbed 2. This change fixes the compiler version for NRF51_MICROBIT devices.
The QSPI spec allows alt to be any size that is a multiple of the
number of data lines. For example, Micron's N25Q128A uses only a
single alt cycle for all read modes (1, 2, or 4 bits depending on
how many data lines are in use).
Reasons to remove TRNG support:
1. M252 just has 32KiB SRAM and cannot afford mbedtls application.
2. Implementing TRNG HAL with PRNG H/W has security concern.
Without free-up of peripheral pins, peripheral pins of the same peripheral may
share by multiple ports after port iteration, and this peripheral may fail with
pin interference.
In Nuvoton, only new-design chips support GPIO input pull-high/pull-low modes.
Targets not supporting this feature are listed below:
- NUMAKER_PFM_NANO130
- NUMAKER_PFM_NUC472
- NUMAKER_PFM_M453
Fix logic error on replying NACK at the end of transfer.
This is also to fix FPGA CI test mbed_hal_fpga_ci_test_shield-i2c/
i2c - test single byte read i2c API.
Better IP initialization sequence:
1. Configure IP pins
2. Select IP clock source and then enable it
3. Reset the IP (SYS_ResetModule)
NOTE1: IP reset takes effect regardless of IP clock. So it doesn't matter if
IP clock enable is before IP reset.
NOTE2: Non-configured pins may disturb IP's state, so IP pinout first and then
IP reset.
NOTE3: IP reset at the end of IP initialization sequence can cover unexpected
situation.
On Nuvoton targets, lp_ticker_set_interrupt(...) needs around 3 lp-ticker
ticks to take effect. It may miss when current tick and match tick are very
close (see hal/LowPowerTickerWrapper.cpp). Enlarge LPTICKER_DELAY_TICKS to
4 from 3 to address this boundary case.
Without this override, mpu hal will require 5 mpu regions which exceed 4 mpu
regions supported by M252 (see hal/mpu/mbed_mpu_v8m.c). In this scenario,
we will hit assert error but we actually meet stack overrun first due to just
0x400 bytes for emitting error message. The issue doesn’t occur on other
targets such as M487 because it has 8 mpu regions.
Remove some (Cypress-proprietary) BSP interfaces and hardware initialization
from the BSPs which is better implemented by a library or application firmware.
Move some remaining functionality from common to the individual targets.
Don't malloc during wifi initialization, as that could cause double allocation in some cases.
The thread stack will be allocated by cy_rtos_thread_start if necessary.
Keep vector table and crash data ram in 0x20000000 for
tests-mbed_platform-crash_reporting test.
Move the rest in RAM (0x24000000). This is needed for ethernet and allows
user to use more RAM (512k).
Signed-off-by: Vincent Veron <vincent.veron@st.com>
Fixed HAL API implementation for InterruptIn:
- Interrupt was not enabled by default after configuration as it should be.
- Interrupt-to-object linking was not handled properly.
Jammu Kekkonen
Ryan Morse
Maciej Bocianski
Chun-Chieh Li
Kevin Bracey
jeromecoutant
Veijo Pesonen
Giampaolo Mancini
Alexandre Bourdiol
Martin Kojtal
Shuopeng Deng
Kyle Kearney
Roman Okhrimenko
Leszek Rusinowicz
toyowata
Laurent Meunier
d-kato
Chris Trowbridge
Janne Kiiskila
Graham Hammond
adbridge
Matthew Macovsky
Ben Cooke
Qinghao Shi
Marc Emmers
Vincent Veron
Volodymyr Medvid