In IRQ Handler, to disable some interrupt type of DMA error.
It could avoid unexpected repeated interrupt.The masked bit of
DMA_IE could be recovered in next EMAC IRQ event.
Signed-off-by: cyliang tw <cyliang@nuvoton.com>
- add board specific EMAC setup to connectivity/drivers/emac/TARGET_STM/TARGET_STM32H7
- stm32h7_eth_init.c was derived from the NUCLEO-H743ZI2 code whilst comparing to the output of STM32CubeIDE
- complete board specific code in targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H723xG
- PeripheralPins.c and PinNames.h were created by targets/TARGET_STM/tools/STM32_gen_PeripheralPins.py
- ST ZIO connector pins in PinNames.h have been adapted from NUCLEO-H743ZI2
- CONSOLE_TX and CONSOLE_RX have been interchanged in PinNames.h to match the actual board layout
- startup_stm32h723xx.S was derived from startup_stm32h743xx.S
- stm32h723xg.ld was completely rewritten to match the actual MCU including:
- split heap support
- SRAM2 and SRAM4 support
- crash dump support
- proper use of DTCM as stack
- system_clock.c has been changed to support the maximal main clock speed of 550 MHz
- fix handling of HS in FS mode for the target board in targets/TARGET_STM/USBPhy_STM32.cpp
- add board definition to targets/targets.json and correct linker setup for the chip
Signed-off-by: Daniel Starke <daniel-email@gmx.net>
1. Crypto RSA H/W supports 1024/2048/3072/4096 key bits. Fall back to software implementation for other key bits.
2. For decrypt, if MBEDTLS_RSA_NO_CRT isn't defined, go CRT, or normal.
3. For decrypt, when blinding (f_rng != NULL), enable SCAP mode.
4. Recover from Crypto RSA H/W failure:
(1) Enable timed-out wait to escape from RSA H/W trap
(2) On RSA H/W timeout, stop this RSA H/W operation
(3) Fall back to S/W implementation on failure
NOTE: RSA 4096 key bits can fail with default mbedtls configuration MBEDTLS_MPI_MAX_SIZE.
Enlarge MBEDTLS_MPI_MAX_SIZE to 1024 or larger if this feature is required.
NOTE: Fixed in BSP RSA driver, for non-CRT+SCAP mode, temporary buffer for MADDR6 requires to be key length plus 128 bits.
NOTE: Fixed in BSP RSA driver, DMA buffer must be 4-word aligned, or RSA H/W will trap.
1. Prepare crypto common code
2. Support list
- SHA
- ECC
NOTE: AES/RSA are to support in other works
NOTE: Compared to M487, M467's SHA supports context save & restore (DMA Cascade mode) and so no software fallback is needed.
NOTE: M467's ECC, following M487, goes partial-module replacement and it can just improve primitives e.g. point addition/doubling by 2X,
and cannot improve high level point multiplication because MbedTLS doesn’t open it.
To improve performance best, full-module replacement is needed.
NOTE: Continuing above, add support for Montgomery curve
The functions smsc9220_receive_by_chunks and smsc9220_send_by_chunks are
supposed to implement receiving and sending packets by chunks. However,
the functions SMSC9220_EMAC::low_level_input and SMSC9220_EMAC::link_out,
which call them respectively, already require or assemble the full packet.
Also, smsc9220_receive_by_chunks doesn't implement the "chunks" part.
This commit renames the functions to smsc9220_receive_packet and
smsc9220_send_packet. The functions now do their operations by word
instead of by bytes. The functions SMSC9220_EMAC::low_level_input and
SMSC9220_EMAC::link_out already handle allocation, continuity and word
alignment of the packet buffer.
The function SMSC9220_EMAC::low_level_input should create a heap for the
packet equal to the size of the message (most of which are couple hundred
bytes). The current code uses maximum frame size (1522 bytes) for each
packet. This will cause the heap to quickly fill up. In fact, the default
memory size (lwip.mem-size) used for this heap is 1600 bytes. This means
that once you have one other packet allocated (extremely common), the
heap allocation will always fails.
Also, it is recommend to increase the default lwip.mem-size because that
amount is very small especially if you send or receive a few large packets
in the network. This is NOT done in current commit.
The commit will address the test failure of connectivity-netsocket-tests-tests-network-interface.
In the test, serial channel will break with the sequence: ESP8266Interface::connect() > disconnect() > connect()
In the first connect, both board's and ESP8266's serial flow control default to disabled, and then enabled.
In the second connect, board's serial flow control keeps enabled but ESP8266's resets to disabled, causing inconsistency between two ends.
The approach: Explicitly disable board's serial flow control on re-power or reset in (re-)connect
A bug was detected when the uint8_t SUBGRF_GetFskBandwidthRegValue( uint32_t bandwidth )
is called and the bandwith argument has a value of 0.
Comparing the code to the STMCubeWL 1.1 we can see that an if statement is missing to
address the condition where bandwith is equal to 0.
Added the if statement to the radio driver to account for this edge case.
Lukas Karel
Martin Kojtal
Charles
Chun-Chieh Li
Mingjie Shen
cyliang tw
akiroz
Martin Kojtal
Daniel Starke
Jerome Coutant
Rami Elkhatib
LukaB
ATmobica
Arto Kinnunen
bakatrouble
Ricardo Ardissone