Commit Graph

81 Commits (feature-sdio)

Author SHA1 Message Date
jeromecoutant c6fdd4efb6 STM32H7 FLASH API issue with M4 core 2019-11-05 10:25:43 +01:00
jeromecoutant c7ca6f731c STM32H7 linker script files alignment 2019-10-31 14:59:18 +01:00
jeromecoutant 21ff11c3d3 STM32H7 alignment within family
- license header update
- STMOD+ connector pin addition
- update pin comment for Ethernet connector issue (DISCO_H747I)
- align files for each target
2019-10-31 14:38:37 +01:00
jeromecoutant 0c740e7095 STM32H7: update PeripheralPin generation script and pin files accordingly 2019-10-31 14:11:00 +01:00
jeromecoutant d7d0d0b8cb STM32H7 FLASH and DEVICE_KEY
- Enable FLASHIAP for all H7 boards
- Use "TDB_INTERNAL" for all H7 boards
- Define specific internal_base_address only for DISCO_H747I_CM7
  (default address is the end of FLASH which is correct for other H7 boards)
- Correct GetSectorBase function with Dual Bank information
2019-10-31 13:04:49 +01:00
Janne Kiiskila a48500183e Fix for the H747 flash driver / cache cleaning
This copies the approach of the STM32F7 flash driver submitted via
PR https://github.com/ARMmbed/mbed-os/pull/10248

With this change the board finally passes all of the device key
tests 10/10 times correctly.
2019-10-30 15:25:20 +02:00
Martin Kojtal df79609cc5
Merge pull request #11675 from jeromecoutant/PR_USB_STEP1
STM32 USB update step 1
2019-10-28 14:06:15 +01:00
Kevin Bracey fb6aa3ef4f Clean up ARM toolchain heap+stack setup in targets
ARM Compiler 6.13 testing revealed linker errors pointing out
conflicting use of `__user_setup_stackheap` and
`__user_initial_stackheap` in some targets. Remove the unwanted
`__user_initial_stackheap` from the targets - the setup is
centralised in the common platform code.

Looking into this, a number of other issues were highlighted

* Almost all targets had `__initial_sp` hardcoded in assembler,
  rather than getting it from the scatter file. This was behind
  issue #11313. Fix this generally.
* A few targets' `__initial_sp` values did not match the scatter
  file layout, in some cases meaning they were overlapping heap
  space. They now all use the area reserved in the scatter file.
  If any problems are seen, then there is an error in the
  scatter file.
* A number of targets were reserving unneeded space for heap and
  stack in their startup assembler, on top of the space reserved in
  the scatter file, so wasting a few K. A couple were using that
  space for the stack, rather than the space in the scatter file.

To clarify expected behaviour:

* Each scatter file contains empty regions `ARM_LIB_HEAP` and
  `ARM_LIB_STACK` to reserve space. `ARM_LIB_STACK` is sized
  by the macro `MBED_BOOT_STACK_SIZE`, which is set by the tools.
  `ARM_LIB_HEAP` is generally the space left over after static
  RAM and stack.
* The address of the end of `ARM_LIB_STACK` is written into the
  vector table and on reset the CPU sets MSP to that address.
* The common platform code in Mbed OS provides `__user_setup_stackheap`
  for the ARM library. The ARM library calls this during startup, and
  it calls `__mbed_user_setup_stackheap`.
* The default weak definition of `__mbed_user_setup_stackheap` does not
  modify SP, so we remain on the boot stack, and the heap is set to
  the region described by `ARM_LIB_HEAP`. If `ARM_LIB_HEAP` doesn't
  exist, then the heap is the space from the end of the used data in
  `RW_IRAM1` to the start of `ARM_LIB_STACK`.
* Targets can override `__mbed_user_setup_stackheap` if they want.
  Currently only Renesas (ARMv7-A class) devices do.
* If microlib is in use, then it doesn't call `__user_setup_stackheap`.
  Instead it just finds and uses `ARM_LIB_STACK` and `ARM_LIB_HEAP`
  itself.
2019-10-23 14:53:49 +03:00
jeromecoutant 01e798fd6a STM32 clock configuration depending on USB 2019-10-21 17:11:59 +02:00
jeromecoutant 40739d3b8f STM32H7 USB pins addition 2019-10-21 17:11:50 +02:00
Martin Kojtal dba8e77b8c
Merge pull request #11688 from LMESTM/Clearing_UART_TC_Flag_prevents_deepsleep
Clearing UART TC Flag prevents deep sleep, so do not clear it
2019-10-17 14:17:15 +02:00
Laurent Meunier e862438fad Clearing UART TC Flag prevents deep sleep, so do not clear it
The TC flag is used in function serial_is_tx_ongoing to check if there is
an ongoing serial transmission. So this Flag must not be cleared at the
end of the transmission, otherwise, serial_is_tx_ongoing will notify that
TX is ongoing.

The impact is that it may prevent deep sleep to be entered.

Also there is no need to clear this flag at the end of the transaction
because it will be cleared automatically by HW when a new transmission
starts.
2019-10-15 15:59:51 +02:00
Alexandre Bourdiol 6397a1d555 Mbed patch of STM32cube for bootloader: use NVIC_FLASH_VECTOR_ADDRESS 2019-10-14 18:03:47 +02:00
Alexandre Bourdiol 02cdac5fe3 Update HAL/LL EXTI to have default API applied on current core and nott CPU1 2019-10-14 18:03:28 +02:00
Alexandre Bourdiol 48aba33204 SystemCoreClock should correspond to current core clock and not D1 clock. 2019-10-14 18:03:06 +02:00
Alexandre Bourdiol adcf0e2fa5 DISCO_H747I Dualcore support
Add 2 targets for DISCO_H747I dualcore:
* DISCO_H747I      -> for CM7 core
* DISCO_H747I_CM4  -> for CM4 core

Current restrictions:
* TICKLESS deactivated
* DeepSleep not supported (DeepSleep wrapped to sleep)

Warning: use of the same IP (example I2C1) by both core at the same time is not prevented,
but is strongly not recommended.
Some Hardware Semaphore are use for common IP, to manage concurrent access by both cores: Flash, GPIO, RCC.

Warning: Drag and drop of binary to DISCO_H747I will flash CM7.
         In order to flash CM4, one can use STM32 CubeProgrammer tool.
2019-10-14 18:02:57 +02:00
jeromecoutant fff88617b7 STM32H7 ST CUBE V1.5.0 update 2019-09-27 11:39:06 +02:00
Martin Kojtal fff888b118
Merge pull request #11562 from VVESTM/vve_h7_memmap
STM32H7: memory relocation
2019-09-26 14:01:23 +02:00
jeromecoutant 5cfee65881 STM32H7: LSI clock selection when LSE is not available 2019-09-19 13:07:54 +02:00
Vincent Veron 82e89add61 STM32H7 : use RAM instead of DTCMRAM (GCC_ARM toolchain) 2019-09-18 10:57:21 +02:00
Vincent Veron ac30a70092 STM32H7 : use RAM instead of DTCMRAM (ARM toolchain) 2019-09-18 10:57:20 +02:00
Vincent Veron d241eef5d4 STM32H7 : use RAM instead of DTCMRAM (IAR toolchain)
Keep vector table and crash data ram in 0x20000000 for
tests-mbed_platform-crash_reporting test.
Move the rest in RAM (0x24000000). This is needed for ethernet and allows
user to use more RAM (512k).

Signed-off-by: Vincent Veron <vincent.veron@st.com>
2019-09-18 10:57:19 +02:00
Martin Kojtal c897e041c8
Merge pull request #11384 from jeromecoutant/PR_H747_CM7
ST DISCO-H747I introduction
2019-09-10 19:43:57 +02:00
jeromecoutant db7efabfd5 STM license file update
Some code have been copied from ST Cube deliveries.
ST copyright is then needed.
2019-09-10 14:24:48 +02:00
jeromecoutant 535dbe87af STM32H747 license update 2019-09-10 11:46:52 +02:00
jeromecoutant c28d5f17e5 DISCO_H747I single core M7 introduction 2019-09-10 11:46:50 +02:00
jeromecoutant 73a00e953d STM32H747xI introduction 2019-09-10 11:46:47 +02:00
jeromecoutant 117ddbadee STM32H743 files move 2019-09-10 11:46:35 +02:00
jeromecoutant be78084a8b NUCLEO_H743ZI and NUCLEO_H743ZI2: clock configuration cleanup 2019-08-29 10:52:24 +02:00
jeromecoutant 3e4592703d Create NUCLEO_H743ZI2 own target at 480 MHz 2019-08-23 10:33:08 +02:00
Vincent Veron 76fb4d22cc STM32H7 : update linker script files to use right location for lwip_ram_heap
Signed-off-by: Vincent Veron <vincent.veron@st.com>
2019-08-21 11:41:30 +02:00
Vincent Veron 9f2e9aa576 Add EMAC support for NUCLEO_H743ZI
This port is based on :
    * CurryGuy ethernet branch :
        https://github.com/CurryGuy/mbed-os/tree/feature-stm32h7-emac
    * STM32 Cube example :
        Applications/LwIP/LwIP_HTTP_Server_Netconn_RTOS example

Signed-off-by: Vincent Veron <vincent.veron@st.com>
2019-08-21 11:40:48 +02:00
Martin Kojtal de84004be1
Merge pull request #11189 from LMESTM/pwmout_cpp_guard
__cplusplus guard fixed pwmout_device.h for STM32 families
2019-08-13 11:19:24 +02:00
Laurent Meunier 319223ac16 __cplusplus guard fixed pwmout_device.h for STM32 families
This bug prevented using this header in cpp code directly.
2019-08-09 09:51:39 +02:00
Yuan Cao 6ed21ee1c0 Fixed serial_device IRQ infinite loop bug due to uint8_t overflowing 2019-07-13 00:05:25 -04:00
jeromecoutant aa31b1268a STM32H7 watchdog patch 2019-07-05 14:44:43 +02:00
jeromecoutant da9b919268 STM32H7: Increase watchdog timeout value 2019-07-05 14:44:41 +02:00
jeromecoutant 3384cea281 STM32H7 : add LSI 2019-07-05 14:44:39 +02:00
Martin Kojtal be2c2bed30
Merge pull request #10884 from jeromecoutant/PR_H743ZI2
NUCLEO_H743ZI2 new target support
2019-07-01 09:27:31 +01:00
Martin Kojtal 61c4d05ce9
Merge pull request #10824 from ABOSTM/PRSTM32_PWMWRTIE_GLITCH_10734
STM32: pwmout_write: configure channel only when not already enabled
2019-06-28 14:24:14 +01:00
Martin Kojtal 924af9481e
Merge pull request #10841 from VVESTM/vve_10827_spi_count
TARGET_STM: Add DEVICE_SPI_COUNT to use SPIs without interference
2019-06-26 09:09:38 +01:00
Martin Kojtal b0073bb70d
Merge pull request #10774 from fkjagodzinski/fix-uart_irq
Fix serial IRQ handling
2019-06-25 15:49:41 +01:00
jeromecoutant d2ea0f9432 NUCLEO_H743ZI2 new target support 2019-06-24 11:00:58 +02:00
Alexandre Bourdiol a339084684 STM32: pwmout_write: configure channel only when not already enabled
Fix PWM glitch on write(), TARGET_STM/pwmout_api.c, #10734
2019-06-20 17:49:16 +02:00
Vincent Veron 31eb49b918 TARGET_STM: Add DEVICE_SPI_COUNT to use SPIs without interference
Extend to all STM targets the work done on PR10752.

Signed-off-by: Vincent Veron <vincent.veron@st.com>
2019-06-14 14:15:56 +02:00
Martin Kojtal 09ea361c7e
Merge pull request #10790 from jeromecoutant/PR_H7_LPUART
STM32H7 enable LPUART
2019-06-11 09:06:22 +01:00
Martin Kojtal 94d2a42fd5
Merge pull request #10793 from jeromecoutant/PR_STM32WARNING
STM32: remove compilation warnings
2019-06-11 07:36:47 +01:00
jeromecoutant ddcc63276a STM32H7 warning compilation
[-Wparentheses-equality]
2019-06-07 18:11:04 +02:00
jeromecoutant a90e68e788 STM32H7 UART: enable LPUART 2019-06-07 18:05:06 +02:00
Filip Jagodzinski fa0cc68657 STM32H7: Fix serial IRQ handling
Check that the RX or TX interrupt is enabled before calling
a registered handler with RxIrq or TxIrq arg.
2019-06-07 15:30:03 +02:00