4 Commits (feature-nrf52-low-power-ble)

Author	SHA1	Message	Date
jeromecoutant	c8313901fb	TARGET_STM32F1 astyle	2018-06-27 14:31:04 +02:00
Laurent MEUNIER	d4fa585ac4	STM32: F1 GPIO: Enable AFIO clock ... It is required to enable AFIO clock before using __HAL_AFIO_REMAP_xy macros, which was missing here. Without clocks enable, the remap actually doesn't occur. This would possibly cause some PIOs (part of PB_3, PB_4, PA_13, PA_14, PA_15) to not behave as expected. In most cases AFIO clock was enabled in stm_pin_SetAFPin function, so that this bug was not visible. But there were few cases left were stm_pin_DisconnectDebug would be called first. A typical case was with GCC_ARM in case a DigitalInOut variable is declared as global.	2017-08-21 13:32:33 +02:00
Laurent MEUNIER	273ac81680	stm32: use default in switch case ... As commented during PR review, better use default case.	2017-02-16 19:34:01 +01:00
Laurent MEUNIER	21bc5af3c2	STM32: common pinmap using LL layer to access registers ... this first makes pinmap.c a common file then rework it with several goals: - avoid gpio / irq / pin management extra dependencies - improve performances when switching between pin modes This change is based on LL layer to access to registers level instead of using HAL higher level API. The family specific functions are implemented in pin_device.h of each family. Mostly this is F1 family that is differnt from other ones.	2017-02-16 18:57:18 +01:00