Commit Graph

2304 Commits (feature-cpuid)

Author SHA1 Message Date
Michael Kaplan 741d229617 DeviceUid: changed uid vendor string in STM targets to a much smaller form 2018-01-16 15:12:23 +01:00
Michael Kaplan 0a907cd387 CpuUid: renamed all references in code to device uid 2018-01-16 15:11:31 +01:00
Michael Kaplan 3432e6fc8c CpuUid: renamed files to device uid naming scheme 2018-01-16 15:08:10 +01:00
Michael Kaplan 66ec6731bc CpuUid: fixed build error in target NRF51822 2018-01-16 15:08:10 +01:00
Michael Kaplan 4679598d7d CpuUid: build error for FAMILY_STM32 derived targets
some targets derived from FAMILY_STM32 define a "macros" part in their target definition instead of "macros_add", so the macro definition in FAMILY_STM32 gets overwritten.
Changed to "macros_add" for these devices.
2018-01-16 15:07:07 +01:00
Michael Kaplan f7ed4b9f90 CpuUid: complete refactoring to meet review requirements
Hopefully all review items were addressed.
2018-01-16 15:06:07 +01:00
Michael Kaplan eb9910c509 Added CPU UID ability to STM32, EFM32 and NRF5x targets 2018-01-16 15:05:12 +01:00
Michael Kaplan a306d24657 Added CPU UID target implementation for NRF5x devices 2018-01-16 15:01:17 +01:00
Michael Kaplan 5a5420cf20 Added CPU UID target implementation for EFM32 devices 2018-01-16 15:01:17 +01:00
Michael Kaplan 8a12f7184d Added CPU UID target implementation for STM32 devices 2018-01-16 15:01:17 +01:00
Martin Kojtal 670077624d
Merge pull request #5749 from jeromecoutant/PR_LPT_LPTIM
STM32 LOWPOWERTIMER : introduce LPTIM feature
2018-01-15 15:25:54 +00:00
Martin Kojtal 2c6403e67f
Merge pull request #5787 from bcostm/dev_flash_f2
STM32: Add support of Flash API for STM32F2 devices
2018-01-15 15:24:13 +00:00
Martin Kojtal 2d83463f9c
Merge pull request #5813 from TomoYamanaka/master
Revise the structure in RZ_A1 related directory
2018-01-15 15:23:52 +00:00
Martin Kojtal debca1f87c
Merge pull request #5824 from jeromecoutant/DEV_DISCO_F407
DISCO_F407VG : alignment with other STM32
2018-01-15 15:22:52 +00:00
TomoYamanaka 3fddcc18da Add "RZ_A1XX" label for commonizing in targets.json
I added the "RZ_A1XX" label for commonizing the setting in targets.json, and inherited in both RZ_A1H and VK_RZ_A1H.
2018-01-12 17:35:53 +09:00
TomoYamanaka b92f75ad3c Modify the lack of copyright to header files
I modified the lack of copyright in the below header files that I added for commonizing the RZ_A1 related files.
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/mbed_drv_cfg.h
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_VK_RZ_A1H/mbed_drv_cfg.h
2018-01-12 14:18:54 +09:00
Cruz Monrreal b32828bc37
Merge pull request #5739 from pan-/nordic-new-client
BLE: Nordic pal client implementation
2018-01-11 10:26:47 -06:00
Cruz Monrreal 2c5fedc0b2
Merge pull request #5792 from jeromecoutant/PULL_REQUEST_CUBE_UPDATE_F0_V1.9.0
STM32F0 : ST CUBE version update to V1.9.0
2018-01-11 10:24:28 -06:00
Vincent Coubard 31053273c2 Nordic BLE: Fix stack event size
Read By group type response can return 4 descriptor discovered when the remote server have 4 descriptors with a 16 bit UUID. The handle, UUID pair get stored in a ble_gattc_desc_t that is 20 bytes long.

This PR increase buffer size to handle this use case.
2018-01-10 17:04:35 +00:00
jeromecoutant 0eede79e2b DISCO_F407VG : alignment with other STM32
- clock source is now a user choice
- IAR tool chain is available
2018-01-10 15:01:29 +01:00
jeromecoutant a816e93e9a STM32 LOWPOWERTIMER : introduce LPTIM feature
STM32L0, L4, F7 and few F4 chip are supporting LPTIM feature.
We propose to allow user to use LPTIM for MBED LowPowerTimer API instead of using RTC wakeup timers.

By default, all targets that are supporting this feature have been configured.
2018-01-09 14:10:14 +01:00
TomoYamanaka 1b303ab5d6 Change the values of RZ_A1 related "extra_labels" in targets.json
As a result of revision of folder structure, I changed the values of "extra_labels" of RZ_A1-related in targets.json.
2018-01-09 18:25:12 +09:00
TomoYamanaka 8b7e2abdb7 Commonalize the files in "targets/TARGET_RENESAS/TARGET_RZ_A1XX" directory
I made be available in common whatever the board related to RZ_A1 in the below files.
- Since there are the table code of Pinmap differs for each board, I moved the code to "PeripheralPins" file for each board, and changed to include PeripheralPins.h.
  analogin_api.c, can_api.c, gpio_irq_api.c, i2c_api.c, pinmap.c, port_api.c, pwmout_api.c, serial_api.c, spi_api.c and us_ticker.c

- Since there are some board-specific processes, I enclosed the processes with "#ifdef" and rearranged the functions to make be easier to enclose.
  can_api.c, ethernet_api.c and serial_api.c

- Since there are the driver configuration values differs for each board, I added "mbed_drv_cfg.h" file for each board and defined macros for the values, and changed to refer to the macros.
  can_api.c, gpio_api.c, pwmout_api.c and rtc_api.c
2018-01-09 18:20:50 +09:00
TomoYamanaka 6f851a820c Revise the folder structure in "targets/TARGET_RENESAS" directory
In "targets/TARGET_RENESAS" folders, same as Cortex-M targets, I changed the folder structure to combine files that can be shared as RZ/A1 related.
 And I renamed the folder name to "TARGET_RZ_A1XX" in order to make commonality explicit.
- "targets/TARGET_RENESAS" folder
  <before>
  \targets\TARGET_RENESAS\TARGET_RZ_A1H
  \targets\TARGET_RENESAS\TARGET_VK_RZ_A1H
  <after>
  \targets\TARGET_RENESAS\TARGET_RZ_A1XX
2018-01-09 17:39:22 +09:00
Jimmy Brisson a5f1426a44
Merge pull request #5794 from prashantrar/realtek-pr-online-compile
Commit to fix the Online compiler issue for ARM mbed-os on REALTEK_RT…
2018-01-08 10:38:43 -06:00
Jimmy Brisson 24b0387500
Merge pull request #5747 from jeromecoutant/PR_RTC_SLEEP
STM32 : Fix issue to exit deepsleep when RTC has not been initialized
2018-01-08 10:37:06 -06:00
Jimmy Brisson cef1cc26d8
Merge pull request #5651 from gorazdko/ff_lpc546xx-add-ethernet
ff_lpc546xx: add enet, change led1 and led3 pins
2018-01-08 10:35:56 -06:00
Jimmy Brisson 737f75a68f
Merge pull request #5608 from productize/nucleo-f413zh
NUCLEO_F413ZH: Add support for the NUCLEO-F413ZH board
2018-01-08 10:35:27 -06:00
Prashant Ravi 62667a4732 Fixing changes as requested 2018-01-08 10:49:46 +08:00
Prashant Ravi f71de8a0d7 Commit to fix the Online compiler issue for ARM mbed-os on REALTEK_RTL8195AM 2018-01-06 00:00:50 +08:00
jeromecoutant 9f4bec2f2e STM32F0 : ST CUBE version update to V1.9.0
- Previous ST Cube version: V1.7.0
- CMSIS part update from 2.3.1 to 2.3.3
- HAL part update from 1.5.0 to 1.7.0
2018-01-05 14:46:33 +01:00
ccli8 67386b9ebd [NUC472/M487] Fix DMA input/output buffers are overlapped in AES alter. 2018-01-05 09:18:26 +08:00
ccli8 d96bcda606 [NUC472/M487] Fix indefinite loop in SHA alter. 2018-01-05 09:18:25 +08:00
ccli8 a00f8d0e8b [NUC472/M487] Guard from reordering DMA wait and post-wait for crypto modules 2018-01-05 09:18:25 +08:00
ccli8 3a8c1aa687 [NUC472/M487] Use interrupt signal rather than polling to check operation completion in DES alter.
This is to be consistent with PRNG/AES.
2018-01-05 09:18:24 +08:00
ccli8 0c1098483f [NUC472/M487] Refine flow control code between crypto start and crypto ISR 2018-01-05 09:18:24 +08:00
ccli8 e1fbf0f6a7 [NUC472/M487] Add comment for crypto_zeroize 2018-01-05 09:18:24 +08:00
ccli8 9edda18b0f [NUC472] Update BSP crypto driver 2018-01-05 09:18:23 +08:00
ccli8 a0a8a955a9 [NUC472/M487] Strengthen crypto DMA buffer check
1. Catch incompatible buffer range, where buffer base = 0xffffff00 and buffer size = 0x100.
2. Add buffer size alignment check.
2018-01-05 09:18:21 +08:00
ccli8 b0228d020d [NUC472/M487] Fix compile error as mbedtls is not included
Currently, trng_api.c is located in targets/ and AES/DES/SHA alter. are located in mbedtls/.
They have shared crypto code.
If they could locate at same location e.g. mbedtls/, the shared crypto code placement would be more reasonable.
2018-01-05 09:18:20 +08:00
ccli8 6464649c41 [NUC472/M487] Coordinate crypto interrupt handler among AES/PRNG 2018-01-05 09:18:20 +08:00
ccli8 d66074fecc [NUC472/M487] Coordinate crypto init among AES/DES/SHA/PRNG
Add counter to track crypto init among crypto sub-modules. It includes:
1. Enable crypto clock
2. Enable crypto interrupt

As counter gets zero, crypto clock is disabled to save power.
2018-01-05 09:18:18 +08:00
Jimmy Brisson af9e07357a
Merge pull request #5740 from ashok-rao/master
Adding MTB ublox ODIN W2 as a new target.
2018-01-04 10:05:02 -06:00
Jimmy Brisson 7bdbdbe1eb
Merge pull request #5703 from dave-wu/cog-adc-fix
AD: Fix ADC driver
2018-01-04 10:02:32 -06:00
Jimmy Brisson 324e53b770
Merge pull request #5697 from bcostm/dev_flash_f3
STM32: Add support of Flash API for STM32F3 devices
2018-01-04 10:00:41 -06:00
Jimmy Brisson e9c76bb85e
Merge pull request #5606 from nvlsianpu/bugfix/nrf52840_tickless
Enable tickless on nRF52840
2018-01-04 09:53:48 -06:00
Jimmy Brisson b2495c7a8d
Merge pull request #5595 from nvlsianpu/bugfix/nordic_critical_section
fix nordic critical section
2018-01-04 09:52:32 -06:00
Jimmy Brisson 62a7ecddd3
Merge pull request #5570 from jeromecoutant/PR_STDIO
STM32 UART init update
2018-01-04 09:50:18 -06:00
Jimmy Brisson 432e5bf436
Merge pull request #5253 from amq/patch-3
Add missing device_name for targets with bootloader
2018-01-04 09:47:41 -06:00
bcostm 058f011254 STM32F1: Remove flash functions doc 2018-01-04 15:43:54 +00:00