Commit Graph

39 Commits (feature-chip)

Author SHA1 Message Date
Martin Kojtal fc16d2bae7 STM: fix ARMClang sct files, using proper -E command
This is required for ARMClang, otherwise there is an error with unknown command.
2020-11-25 13:35:36 +00:00
Martin Kojtal a1fc9cdad5
Merge pull request #13915 from 0xc0170/cmake-stm32
CMake: add all TARGET_STM targets
2020-11-24 14:09:28 +00:00
Martin Kojtal 519ac980ab CMake: add STM32L4 targets 2020-11-17 16:22:16 +00:00
jeromecoutant 3697167b73 STM32: add OSPI capability
PeripheralPins.c and PinNames.h files
generated by STM32_gen_PeripheralPins.py v1.17
2020-11-10 18:37:51 +01:00
jeromecoutant 3c6ba98823 STM32L4: STM32Cube_FW_L4_V1.16.0
source: https://github.com/STMicroelectronics/STM32CubeL4
2020-10-20 08:51:37 +02:00
jeromecoutant 81f919b6c2 STM32L4 : license header alignment 2020-10-20 08:51:36 +02:00
jeromecoutant 95f8b2dfd4 STM32L4 : common file factorisation 2020-10-20 08:51:36 +02:00
jeromecoutant dcc066db59 STM32L4 : alignment with STM32Cube_FW_L4_V1.14.0 2020-10-20 08:51:35 +02:00
jeromecoutant 3b14c478c1 STM32L4 : directory retructuration
- Alignment with other STM32 families
2020-10-20 08:51:35 +02:00
Harrison Mutai 4fad1112e5 Add SPDX license identifier to Arm files
Add license identifier to files which Arm owns the copyright to,
and contain either BSD-3 or Apache-2.0 licenses. This is to address
license errors raised by scancode analysis.
2020-10-15 10:47:27 +01:00
Jaeden Amero 612b148fd4 stack: armc: Workaround config passing bug
Workaround a bug where the boot stack size configuration option is not
passed on to armlink, the Arm Compiler's linker. Prefer
MBED_CONF_TARGET_BOOT_STACK_SIZE if present, as this is what the
configuration system should provide. Fall back to MBED_BOOT_STACK_SIZE
if MBED_CONF_TARGET_BOOT_STACK_SIZE is not defined, as in the case of
buggy tools. If both MBED_CONF_TARGET_BOOT_STACK_SIZE and
MBED_BOOT_STACK_SIZE are not defined, then we fall back to a hard-coded
value provided by the linkerscript. See
https://github.com/ARMmbed/mbed-os/issues/13474 for more information.
2020-09-10 10:08:38 +01:00
Jaeden Amero 39e69d328d Use boot stack size from config system
To allow overriding of the boot stack size from the Mbed configuration
system, consistently use MBED_CONF_TARGET_BOOT_STACK_SIZE rather than
MBED_BOOT_STACK_SIZE.

Fixes #10319
2020-09-10 10:08:38 +01:00
jeromecoutant 0a447ac798 STM32L4 baremetal support 2020-06-08 12:05:54 +02:00
jeromecoutant c96eb2cd0e STM32 rename TOOLCHAIN_ARM_STD into TOOLCHAIN_ARM 2020-05-15 10:41:28 +02:00
jeromecoutant 303752ad84 STM32 remove all TOOLCHAIN_ARM_MICRO 2020-05-15 09:37:40 +02:00
Laurent Meunier 3fd071404e FIX: LPUART clock source selection should be left to serial driver
The clock source selection of LPUART depends on System clocks but also on
the serial baudrate. There is a specific computation done in serial driver
targets/target_STM/serial_api.c

At first start-up the LPUART1 clock selected in SetSysClock was anyway
overridden by the serial driver, so this was of no effect. But in case
of deep sleep SetSysClock is called again, while the driver isn't, so
SetSyClock was corrupting the serial clock configuration.

So let's remove these few lines of code which are causing trouble.
2020-02-11 17:14:45 +01:00
Martin Kojtal df79609cc5
Merge pull request #11675 from jeromecoutant/PR_USB_STEP1
STM32 USB update step 1
2019-10-28 14:06:15 +01:00
Kevin Bracey fb6aa3ef4f Clean up ARM toolchain heap+stack setup in targets
ARM Compiler 6.13 testing revealed linker errors pointing out
conflicting use of `__user_setup_stackheap` and
`__user_initial_stackheap` in some targets. Remove the unwanted
`__user_initial_stackheap` from the targets - the setup is
centralised in the common platform code.

Looking into this, a number of other issues were highlighted

* Almost all targets had `__initial_sp` hardcoded in assembler,
  rather than getting it from the scatter file. This was behind
  issue #11313. Fix this generally.
* A few targets' `__initial_sp` values did not match the scatter
  file layout, in some cases meaning they were overlapping heap
  space. They now all use the area reserved in the scatter file.
  If any problems are seen, then there is an error in the
  scatter file.
* A number of targets were reserving unneeded space for heap and
  stack in their startup assembler, on top of the space reserved in
  the scatter file, so wasting a few K. A couple were using that
  space for the stack, rather than the space in the scatter file.

To clarify expected behaviour:

* Each scatter file contains empty regions `ARM_LIB_HEAP` and
  `ARM_LIB_STACK` to reserve space. `ARM_LIB_STACK` is sized
  by the macro `MBED_BOOT_STACK_SIZE`, which is set by the tools.
  `ARM_LIB_HEAP` is generally the space left over after static
  RAM and stack.
* The address of the end of `ARM_LIB_STACK` is written into the
  vector table and on reset the CPU sets MSP to that address.
* The common platform code in Mbed OS provides `__user_setup_stackheap`
  for the ARM library. The ARM library calls this during startup, and
  it calls `__mbed_user_setup_stackheap`.
* The default weak definition of `__mbed_user_setup_stackheap` does not
  modify SP, so we remain on the boot stack, and the heap is set to
  the region described by `ARM_LIB_HEAP`. If `ARM_LIB_HEAP` doesn't
  exist, then the heap is the space from the end of the used data in
  `RW_IRAM1` to the start of `ARM_LIB_STACK`.
* Targets can override `__mbed_user_setup_stackheap` if they want.
  Currently only Renesas (ARMv7-A class) devices do.
* If microlib is in use, then it doesn't call `__user_setup_stackheap`.
  Instead it just finds and uses `ARM_LIB_STACK` and `ARM_LIB_HEAP`
  itself.
2019-10-23 14:53:49 +03:00
jeromecoutant 01e798fd6a STM32 clock configuration depending on USB 2019-10-21 17:11:59 +02:00
jeromecoutant 03dd8d3e22 STM32L4 USB pins addition 2019-10-21 17:11:55 +02:00
jeromecoutant bb1388be8e NUCLEO_L4R5ZI: add QSPI_x definition 2019-08-29 14:17:33 +02:00
jeromecoutant f13072490c NUCLEO_L4R5ZI : add OSPI pins for QSPI 2019-08-29 12:11:28 +02:00
jeromecoutant bdd0689228 NUCLEO_L4R5ZI: increase system clock from 80MHz to 120MHz 2019-08-22 13:21:28 +02:00
jeromecoutant 96a773a0e6 STM32L4: update drivers version to CUBE V1.14.0 2019-07-19 13:15:07 +02:00
Vincent Veron 31eb49b918 TARGET_STM: Add DEVICE_SPI_COUNT to use SPIs without interference
Extend to all STM targets the work done on PR10752.

Signed-off-by: Vincent Veron <vincent.veron@st.com>
2019-06-14 14:15:56 +02:00
jeromecoutant d919498745 STM32: common cmsis.h and device.h 2019-05-27 16:27:41 +02:00
deepikabhavnani 0dc5561991 Guard RAM start and size defines 2019-02-28 19:54:38 -06:00
deepikabhavnani b598dc1f46 Target_STM: Add ARM_LIB_STACK and ARM_LIB_HEAP section
Instead of user defined symbols in assembly files or C files,
use linker scripts to add heap and stack - this is inconsistent
with ARM std linker scripts
2019-02-28 19:54:28 -06:00
Deepika e522c4691e Target_STM:_sbrk updated to use limits from linker files no need to set defines
_sbrk uses the exports from linker file __end and __HeapLimit to allocate memory
in heap. Linker scripts were updated accordingly to set the limits.
2019-02-19 15:49:49 -06:00
Martin Kojtal fd6ceda960
Merge pull request #9323 from jeromecoutant/PR_AST
STM32: astyle check
2019-01-11 14:06:05 +00:00
jeromecoutant b1a284a876 STM32: astyle check 2019-01-10 10:22:21 +01:00
Przemyslaw Stekiel 58f6bf7292 [STM] Support boot stack size configuration option 2019-01-08 15:32:06 +01:00
bcostm 66ab546200 NUCLEO_L4R5ZI: fix 8-bytes data alignment 2018-10-26 10:58:00 +02:00
bcostm 909ce3590a NUCLEO_L4R5ZI: set IAR linker stack size to 1KB 2018-09-27 12:03:08 +02:00
bcostm 5b4ff94bff NUCLEO_L4R5ZI: change _ALTx pins 2018-09-27 12:03:07 +02:00
bcostm ee5aff7e18 NUCLEO_L4R5ZI: remove PWM_5 pins as already used by us_ticker 2018-09-27 12:03:07 +02:00
bcostm a644ddd2e7 NUCLEO_L4R5ZI: enable bootloader 2018-09-27 12:03:07 +02:00
bcostm 3a722358b1 NUCLEO_L4R5ZI: add missing timer freeze macro 2018-09-27 12:03:07 +02:00
bcostm ef33ff5524 NUCLEO_L4R5ZI: add all board files 2018-09-27 12:03:07 +02:00