It is required by Mbed HAL API to generate TxIrq interrupt when TXD register is empty (also after enabling TxIrq interrupt):
f73a62afbf/hal/serial_api.h (L144-L147)
The driver uses DMA to perform uart transfer and TxIrq is generated after the transfer is finished.
While enabling TxIrq we will check if TXD reg is empty and manually trigger the interrupt.
* The following v14.2 files are removed from nrfx/legacy:
nrf_drv_clock.h
nrf_drv_common.h
nrf_drv_gpiote.h
nrf_drv_spi.h
nrf_drv_twi.h
nrf_drv_uarth.h
* Remove unneeded references to "nrfx_glue.h" and "nrf_drv_common.h"
* Remove the definition of PACKED from app_util_platform.h (already defined
in mbed_toolchain.h)
- top level files ported from TARGET_NORDIC/TARGET_NRF5x/
Also addressed:
- fixed linking issue for gcc
- added support for nRF52-DK builds, but reverted to using nRF52840 sdk_config.h (must be updated)
- introduced "RTC" to targets.json (might need to be removed eventually)
Reimplement atomic code in inline assembly. This can improve
optimisation, and avoids potential architectural problems with using
LDREX/STREX intrinsics.
API further extended:
* Bitwise operations (fetch_and/fetch_or/fetch_xor)
* fetch_add and fetch_sub (like incr/decr, but returning old value -
aligning with C++11)
* compare_exchange_weak
* Explicit memory order specification
* Basic freestanding template overloads for C++
This gives our existing C implementation essentially all the functionality
needed by C++11.
An actual Atomic<T> template based upon these C functions could follow.
Use new atomics (exchange, load, store and bool types) to simplify
and improve the atomics in the nRF52 serial HAL.
* Ensure mutexes are released last and atomically when done
done inside a critical section.
* Compare-and-swap is not required for the spinlock - exchange is
sufficient. (Not clear a spinlock is needed anyway, but left in).
* Remove unneeded volatile, and make mutexes bool.
When using UARTSerial sending data over the uart follows the sequence
below:
<-TX done ISR runs and sets a software interrupt to pending
<-Software interrupt fires:
-disables TX done interrupt
-calls UARTSerial TX handler which sends bytes until the uart
buffer filled (writeable returns false). Sending a byte
re-enables the TX done interrupt continuing the cycle
Due to this sequence, if the UARTSerial TX handler does not send a byte
then the transmit state machine mentioned above will get stuck with
the TX done interrupt disabled. The events causing this failure:
<-TX done ISR runs and sets a software interrupt to pending
<-Software interrupt fires:
-disables TX done interrupt
-calls UARTSerial TX handler:
-checks writeable which is true and sends a byte
<- interrupted by a higher priority interrrupt
<- TX done ISR runs, setting software interrupt to
pending again
-checks writeable which is true and sends a second byte
-Software interrupt finishes
<-Software interrupt fires:
-disables TX done interrupt
-calls UARTSerial TX handler:
-checks writeable which is false and DOES NOT SEND A BYTE
-Software interrupt finishes, the TX interrupt is still disabled
*-Byte gets sent but TX done ISR does not fire
This patch prevents the TX lockup by removing the code in the
software interrupt which disables the TX done interrupt. Disabling the
TX done interrupt at this point is not necessary so this code is safe
to remove.
When initializing serial disable all interrupts as some of these may
have been enabled by a bootloader. This ensures that the NRF52
serial driver remains compatible with any bootloader version.
Make the following enhancement:
-Support serial port use without flow control
-Prevent dropped bytes by updating flow control handling
-Remove dead code
Serial port use without flow control:
In the prior implementation there was a window of time between
reloading DMA buffers after a timeout where bytes could be dropped.
This is because the uart needed to be turned off in order to flush the
bytes in the DMA buffer.
This change configures the DMA buffer to only receive one byte at a
time so there is no need to disable the uart to flush it. After each
byte is received the DMA transfer will be over so the transfer will
never be partially complete and need flushing. Since the uart is
always on it is safe to use it even without flow control.
Prevent dropped bytes by updating flow control handling:
To prevent dropped bytes due to high latency the flow control handling
of the RTS line was configured to be asserted automatically by
hardware after each byte. Once the CPU has read the byte and setup
the next receive buffer the RTS line is deasserted to the transfer can
continue. This ensure that when flow control is enabled data won't be
lost due to interrupt latency.
Remove dead code:
With the above changes there is a lot of dead code, such as the timer
handling code. This patch removes the code that is no longer used.
Busy-wait before sending a charecter instead of after. If
serial_writeable has been called first, the busy-wait loop will
be skipped.
Added initialization code to ensure NRF_UARTE_EVENT_TXDRDY is
armed correctly.
In nordic_nrf5_uart_event_handler if the events NRF_UARTE_EVENT_ENDRX
and NRF_UARTE_EVENT_RXSTARTED become pending after the check for
NRF_UARTE_EVENT_ENDRX but before the check for
NRF_UARTE_EVENT_RXSTARTED the RX DMA buffers will be setup incorrectly
by nordic_nrf5_uart_event_handler_rxstarted because active_bank hasn't
been updated. This cause dropped and incorrect data.
This patch fixes that problem by adding a second check for
NRF_UARTE_EVENT_ENDRX after checking for NRF_UARTE_EVENT_RXSTARTED
and skipping processing if NRF_UARTE_EVENT_ENDRX is set. The
subsequent interrupt will process both in the correct order. This
ensures that these events cannot be handled out of order and thus fixes
the corruption.
Due to buggy flow control logic in the UARTE, the stop signal
is not being set as it is supposed to when the the module is
not ready to receive data.
This commit signals the sender to halt transmitting when a DMA
buffer is full and only continue again when the atomic FIFO
buffer has been emptied. This allows platforms with hardware
flow control to minimize all buffers and rely on flow control
instead.
There are scenarios where putc is called within a critical section, e.g
to log ASSERTs in early initialization code. The interrupts being
disabled here prevents the handlers for the UARTE from executing.
This breaks the tx_in_progress flag based approach. The tx_in_progress
never gets reset. Poll on the TXDRDY instead.
It can be recreated with a simple program as shown here:
*************** Current Behavior ****************
++ MbedOS Error Info ++
Error Status: 0x80FF0100 Code: 256 Module: 255
Error Message: F
************** With Fix *************************
++ MbedOS Error Info ++
Error Status: 0x80FF0100 Code: 256 Module: 255
Error Message: Fatal Run-time error
Location: 0x2C0A9
Error Value: 0x0
Current Thread: Id: 0x20005520 Entry: 0x30EBF StackSize: 0x1000 StackMem: 0x20004520 SP: 0x20005490
For more info, visit: https://armmbed.github.io/mbedos-error/?error=0x80FF0100
-- MbedOS Error Info --
nrf failure at .\main.cpp:22
***************************************************
* Elevate RTC2 interrupt priority to same level as UARTE to prevent
race condition on shared variables.
* Remove unused TXDRDY event code.
* Fix typo in macro.
The unified NRF51 target and feature BLE directories have been
reorganized to follow the naming and directory structure of the
NRF52 implementation.
This reorganization does not include TARGET_MCU_NRF51822 and
derived targets.
Mark Lamb
Hugues Kamba
Przemyslaw Stekiel
George Beckstein
Rob Vlaar
desmond.chen
RFulchiero
Naveen Kaje
Kevin Bracey
Cruz Monrreal
Russ Butler
Russ Butler
Marcus Chang