Update STM32CubeF4 HAL driver to V2.3.2

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32_hal_legacy.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32_hal_legacy.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   This file contains aliases definition for the STM32Cube HAL constants 
   *          macros and functions maintained for legacy purpose.
   ******************************************************************************
@@ -30,7 +30,7 @@
   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- UART * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
@@ -51,8 +51,8 @@
 /** @defgroup HAL_AES_Aliased_Defines HAL CRYP Aliased Defines maintained for legacy purpose
   * @{
   */
-#define AES_FLAG_RDERR                 CRYP_FLAG_RDERR
+#define AES_FLAG_RDERR                  CRYP_FLAG_RDERR
-#define AES_FLAG_WRERR                 CRYP_FLAG_WRERR
+#define AES_FLAG_WRERR                  CRYP_FLAG_WRERR
 #define AES_CLEARFLAG_CCF               CRYP_CLEARFLAG_CCF
 #define AES_CLEARFLAG_RDERR             CRYP_CLEARFLAG_RDERR
 #define AES_CLEARFLAG_WRERR             CRYP_CLEARFLAG_WRERR
@@ -154,6 +154,34 @@
   * @}
   */
 
+/** @defgroup HAL_DMA_Aliased_Defines HAL DMA Aliased Defines maintained for legacy purpose
+  * @{
+  */
+#define HAL_REMAPDMA_ADC_DMA_CH2                DMA_REMAP_ADC_DMA_CH2       
+#define HAL_REMAPDMA_USART1_TX_DMA_CH4          DMA_REMAP_USART1_TX_DMA_CH4 
+#define HAL_REMAPDMA_USART1_RX_DMA_CH5          DMA_REMAP_USART1_RX_DMA_CH5   
+#define HAL_REMAPDMA_TIM16_DMA_CH4              DMA_REMAP_TIM16_DMA_CH4       
+#define HAL_REMAPDMA_TIM17_DMA_CH2              DMA_REMAP_TIM17_DMA_CH2       
+#define HAL_REMAPDMA_USART3_DMA_CH32            DMA_REMAP_USART3_DMA_CH32
+#define HAL_REMAPDMA_TIM16_DMA_CH6              DMA_REMAP_TIM16_DMA_CH6
+#define HAL_REMAPDMA_TIM17_DMA_CH7              DMA_REMAP_TIM17_DMA_CH7      
+#define HAL_REMAPDMA_SPI2_DMA_CH67              DMA_REMAP_SPI2_DMA_CH67  
+#define HAL_REMAPDMA_USART2_DMA_CH67            DMA_REMAP_USART2_DMA_CH67 
+#define HAL_REMAPDMA_USART3_DMA_CH32            DMA_REMAP_USART3_DMA_CH32  
+#define HAL_REMAPDMA_I2C1_DMA_CH76              DMA_REMAP_I2C1_DMA_CH76   
+#define HAL_REMAPDMA_TIM1_DMA_CH6               DMA_REMAP_TIM1_DMA_CH6     
+#define HAL_REMAPDMA_TIM2_DMA_CH7               DMA_REMAP_TIM2_DMA_CH7      
+#define HAL_REMAPDMA_TIM3_DMA_CH6               DMA_REMAP_TIM3_DMA_CH6    
+  
+#define IS_HAL_REMAPDMA                          IS_DMA_REMAP  
+#define __HAL_REMAPDMA_CHANNEL_ENABLE            __HAL_DMA_REMAP_CHANNEL_ENABLE
+#define __HAL_REMAPDMA_CHANNEL_DISABLE           __HAL_DMA_REMAP_CHANNEL_DISABLE
+  
+  
+  
+/**
+  * @}
+  */
 
 /** @defgroup HAL_FLASH_Aliased_Defines HAL FLASH Aliased Defines maintained for legacy purpose
   * @{
@@ -201,7 +229,6 @@
 #define IWDG_STDBY_ACTIVE             OB_IWDG_STDBY_RUN
 #define IWDG_STOP_FREEZE              OB_IWDG_STOP_FREEZE
 #define IWDG_STOP_ACTIVE              OB_IWDG_STOP_RUN
-#define IS_NBSECTORS                  IS_FLASH_NBSECTORS
 #define FLASH_ERROR_NONE              HAL_FLASH_ERROR_NONE
 #define FLASH_ERROR_RD                HAL_FLASH_ERROR_RD
 #define FLASH_ERROR_PG                HAL_FLASH_ERROR_PROG
@@ -221,6 +248,8 @@
 #define FLASH_ERROR_NOTZERO           HAL_FLASH_ERROR_NOTZERO
 #define FLASH_ERROR_OPERATION         HAL_FLASH_ERROR_OPERATION
 #define FLASH_ERROR_ERS               HAL_FLASH_ERROR_ERS
+#define OB_WDG_SW                     OB_IWDG_SW
+#define OB_WDG_HW                     OB_IWDG_HW
 
 /**
   * @}
@@ -243,6 +272,24 @@
   */
   
 
+/** @defgroup LL_FMC_Aliased_Defines LL FMC Aliased Defines maintained for compatibility purpose
+  * @{
+  */
+#if defined(STM32L4) || defined(STM32F7)
+#define FMC_NAND_PCC_WAIT_FEATURE_DISABLE       FMC_NAND_WAIT_FEATURE_DISABLE
+#define FMC_NAND_PCC_WAIT_FEATURE_ENABLE        FMC_NAND_WAIT_FEATURE_ENABLE
+#define FMC_NAND_PCC_MEM_BUS_WIDTH_8            FMC_NAND_MEM_BUS_WIDTH_8
+#define FMC_NAND_PCC_MEM_BUS_WIDTH_16           FMC_NAND_MEM_BUS_WIDTH_16
+#else
+#define FMC_NAND_WAIT_FEATURE_DISABLE           FMC_NAND_PCC_WAIT_FEATURE_DISABLE
+#define FMC_NAND_WAIT_FEATURE_ENABLE            FMC_NAND_PCC_WAIT_FEATURE_ENABLE
+#define FMC_NAND_MEM_BUS_WIDTH_8                FMC_NAND_PCC_MEM_BUS_WIDTH_8
+#define FMC_NAND_MEM_BUS_WIDTH_16               FMC_NAND_PCC_MEM_BUS_WIDTH_16
+#endif
+/**
+  * @}
+  */
+
 /** @defgroup LL_FSMC_Aliased_Defines LL FSMC Aliased Defines maintained for legacy purpose
   * @{
   */
@@ -258,10 +305,45 @@
   */
 #define GET_GPIO_SOURCE                           GPIO_GET_INDEX
 #define GET_GPIO_INDEX                            GPIO_GET_INDEX
+
+#if defined(STM32F4)
+#define GPIO_AF12_SDMMC                           GPIO_AF12_SDIO
+#define GPIO_AF12_SDMMC1                          GPIO_AF12_SDIO
+#endif
+
+#if defined(STM32F7)
+#define GPIO_AF12_SDIO                            GPIO_AF12_SDMMC1
+#define GPIO_AF12_SDMMC                           GPIO_AF12_SDMMC1
+#endif
+
+#if defined(STM32L4)
+#define GPIO_AF12_SDIO                            GPIO_AF12_SDMMC1
+#define GPIO_AF12_SDMMC                           GPIO_AF12_SDMMC1
+#endif
+
+#define GPIO_AF0_LPTIM                            GPIO_AF0_LPTIM1
+#define GPIO_AF1_LPTIM                            GPIO_AF1_LPTIM1
+#define GPIO_AF2_LPTIM                            GPIO_AF2_LPTIM1
+
 /**
   * @}
   */
 
+/** @defgroup HAL_HRTIM_Aliased_Macros HAL HRTIM Aliased Macros maintained for legacy purpose
+  * @{
+  */
+#define HRTIM_TIMDELAYEDPROTECTION_DISABLED           HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DISABLED
+#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_EEV68  HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_EEV6
+#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_EEV68  HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_EEV6
+#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV68  HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV6
+#define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV68     HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV6
+#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_DEEV7
+#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_DEEV7
+#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV79  HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV7
+#define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV79     HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV7
+/**
+  * @}
+  */
 
 /** @defgroup HAL_I2C_Aliased_Defines HAL I2C Aliased Defines maintained for legacy purpose
   * @{
@@ -311,6 +393,18 @@
 #define LPTIM_CLOCKPOLARITY_RISINGEDGE          LPTIM_CLOCKPOLARITY_RISING
 #define LPTIM_CLOCKPOLARITY_FALLINGEDGE         LPTIM_CLOCKPOLARITY_FALLING
 #define LPTIM_CLOCKPOLARITY_BOTHEDGES           LPTIM_CLOCKPOLARITY_RISING_FALLING
+
+#define LPTIM_TRIGSAMPLETIME_DIRECTTRANSISTION  LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION
+#define LPTIM_TRIGSAMPLETIME_2TRANSISTIONS      LPTIM_TRIGSAMPLETIME_2TRANSITIONS
+#define LPTIM_TRIGSAMPLETIME_4TRANSISTIONS      LPTIM_TRIGSAMPLETIME_4TRANSITIONS
+#define LPTIM_TRIGSAMPLETIME_8TRANSISTIONS      LPTIM_TRIGSAMPLETIME_8TRANSITIONS        
+
+/* The following 3 definition have also been present in a temporary version of lptim.h */
+/* They need to be renamed also to the right name, just in case */
+#define LPTIM_TRIGSAMPLETIME_2TRANSITION        LPTIM_TRIGSAMPLETIME_2TRANSITIONS
+#define LPTIM_TRIGSAMPLETIME_4TRANSITION        LPTIM_TRIGSAMPLETIME_4TRANSITIONS
+#define LPTIM_TRIGSAMPLETIME_8TRANSITION        LPTIM_TRIGSAMPLETIME_8TRANSITIONS
+
 /**
   * @}
   */
@@ -428,14 +522,27 @@
 #define RTC_TAMPERMASK_FLAG_DISABLED    RTC_TAMPERMASK_FLAG_DISABLE
 #define RTC_TAMPERMASK_FLAG_ENABLED     RTC_TAMPERMASK_FLAG_ENABLE
 
-#define RTC_MASKTAMPERFLAG_DISABLED    RTC_TAMPERMASK_FLAG_DISABLE 
+#define RTC_MASKTAMPERFLAG_DISABLED     RTC_TAMPERMASK_FLAG_DISABLE 
 #define RTC_MASKTAMPERFLAG_ENABLED      RTC_TAMPERMASK_FLAG_ENABLE 
-#define RTC_TAMPERERASEBACKUP_ENABLED  RTC_TAMPER_ERASE_BACKUP_ENABLE
+#define RTC_TAMPERERASEBACKUP_ENABLED   RTC_TAMPER_ERASE_BACKUP_ENABLE
-#define RTC_TAMPERERASEBACKUP_DISABLED   RTC_TAMPER_ERASE_BACKUP_DISABLE 
+#define RTC_TAMPERERASEBACKUP_DISABLED  RTC_TAMPER_ERASE_BACKUP_DISABLE 
-#define RTC_MASKTAMPERFLAG_DISABLED   RTC_TAMPERMASK_FLAG_DISABLE 
+#define RTC_MASKTAMPERFLAG_DISABLED     RTC_TAMPERMASK_FLAG_DISABLE 
 #define RTC_MASKTAMPERFLAG_ENABLED      RTC_TAMPERMASK_FLAG_ENABLE
-#define RTC_TAMPER1_2_INTERRUPT          RTC_ALL_TAMPER_INTERRUPT 
+#define RTC_TAMPER1_2_INTERRUPT         RTC_ALL_TAMPER_INTERRUPT 
-#define RTC_TAMPER1_2_3_INTERRUPT     RTC_ALL_TAMPER_INTERRUPT 
+#define RTC_TAMPER1_2_3_INTERRUPT       RTC_ALL_TAMPER_INTERRUPT 
+
+#define RTC_TIMESTAMPPIN_PC13  RTC_TIMESTAMPPIN_DEFAULT
+#define RTC_TIMESTAMPPIN_PA0 RTC_TIMESTAMPPIN_POS1 
+#define RTC_TIMESTAMPPIN_PI8 RTC_TIMESTAMPPIN_POS1
+#define RTC_TIMESTAMPPIN_PC1   RTC_TIMESTAMPPIN_POS2
+
+#define RTC_OUTPUT_REMAP_PC13  RTC_OUTPUT_REMAP_NONE
+#define RTC_OUTPUT_REMAP_PB14  RTC_OUTPUT_REMAP_POS1
+#define RTC_OUTPUT_REMAP_PB2   RTC_OUTPUT_REMAP_POS1
+
+#define RTC_TAMPERPIN_PC13 RTC_TAMPERPIN_DEFAULT 
+#define RTC_TAMPERPIN_PA0  RTC_TAMPERPIN_POS1 
+#define RTC_TAMPERPIN_PI8  RTC_TAMPERPIN_POS1
 
 /**
   * @}
@@ -474,6 +581,8 @@
 #define SMBUS_NOSTRETCH_ENABLED         SMBUS_NOSTRETCH_ENABLE
 #define SMBUS_ANALOGFILTER_ENABLED      SMBUS_ANALOGFILTER_ENABLE
 #define SMBUS_ANALOGFILTER_DISABLED     SMBUS_ANALOGFILTER_DISABLE
+#define SMBUS_PEC_DISABLED              SMBUS_PEC_DISABLE
+#define SMBUS_PEC_ENABLED               SMBUS_PEC_ENABLE
 #define HAL_SMBUS_STATE_SLAVE_LISTEN    HAL_SMBUS_STATE_LISTEN
 /**
   * @}
@@ -800,8 +909,7 @@
 #define BRE_BitNumber                                 BRE_BIT_NUMBER
 
 #define PWR_MODE_EVT                                  PWR_PVD_MODE_NORMAL
-   
+ 
-#define IS_PWR_REGULATOR_VOLTAGE                     IS_PWR_VOLTAGE_SCALING_RANGE
  /**
   * @}
   */  
@@ -842,6 +950,14 @@
 /**
   * @}
   */
+  
+/** @defgroup HAL_LTDC_Aliased_Functions HAL LTDC Aliased Functions maintained for legacy purpose
+  * @{
+  */ 
+#define HAL_LTDC_LineEvenCallback HAL_LTDC_LineEventCallback
+/**
+  * @}
+  */  
    
   
    /** @defgroup HAL_PPP_Aliased_Functions HAL PPP Aliased Functions maintained for legacy purpose
@@ -1100,6 +1216,8 @@
 #define IS_TYPEPROGRAM      IS_FLASH_TYPEPROGRAM
 #define IS_TYPEPROGRAMFLASH IS_FLASH_TYPEPROGRAM
 #define IS_TYPEERASE        IS_FLASH_TYPEERASE
+#define IS_NBSECTORS        IS_FLASH_NBSECTORS
+#define IS_OB_WDG_SOURCE    IS_OB_IWDG_SOURCE
 
 /**
   * @}
@@ -1888,10 +2006,14 @@
 #define __OTGHSULPI_CLK_SLEEP_DISABLE  __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE
 #define __HAL_RCC_OTGHS_CLK_SLEEP_ENABLE  __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE
 #define __HAL_RCC_OTGHS_CLK_SLEEP_DISABLE  __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE
+#define __HAL_RCC_OTGHS_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_ENABLED
+#define __HAL_RCC_OTGHS_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_DISABLED
 #define __HAL_RCC_OTGHS_FORCE_RESET          __HAL_RCC_USB_OTG_HS_FORCE_RESET
 #define __HAL_RCC_OTGHS_RELEASE_RESET          __HAL_RCC_USB_OTG_HS_RELEASE_RESET  
 #define __HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE  __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE
-#define __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE  __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE    
+#define __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE  __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE 
+#define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_ENABLED
+#define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_DISABLED   
 #define __CRYP_FORCE_RESET          __HAL_RCC_CRYP_FORCE_RESET  
 #define __SRAM3_CLK_SLEEP_ENABLE  __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE  
 #define __CAN2_CLK_SLEEP_ENABLE          __HAL_RCC_CAN2_CLK_SLEEP_ENABLE
@@ -1921,6 +2043,41 @@
 #define __HAL_RCC_OTGFS_FORCE_RESET    __HAL_RCC_USB_OTG_FS_FORCE_RESET
 #define __HAL_RCC_OTGFS_RELEASE_RESET  __HAL_RCC_USB_OTG_FS_RELEASE_RESET
 
+#if defined(STM32F4)
+#define __HAL_RCC_SDMMC1_CLK_ENABLE        __HAL_RCC_SDIO_CLK_ENABLE
+#define __HAL_RCC_SDMMC1_FORCE_RESET       __HAL_RCC_SDIO_FORCE_RESET
+#define __HAL_RCC_SDMMC1_RELEASE_RESET     __HAL_RCC_SDIO_RELEASE_RESET
+#define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE  __HAL_RCC_SDIO_CLK_SLEEP_ENABLE
+#define __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE
+#define __HAL_RCC_SDMMC1_CLK_ENABLE        __HAL_RCC_SDIO_CLK_ENABLE
+#define __HAL_RCC_SDMMC1_CLK_DISABLE       __HAL_RCC_SDIO_CLK_DISABLE
+#define Sdmmc1ClockSelection               SdioClockSelection
+#define RCC_PERIPHCLK_SDMMC1               RCC_PERIPHCLK_SDIO
+#define RCC_SDMMC1CLKSOURCE_CLK48          RCC_SDIOCLKSOURCE_CK48
+#define RCC_SDMMC1CLKSOURCE_SYSCLK         RCC_SDIOCLKSOURCE_SYSCLK
+#define __HAL_RCC_SDMMC1_CONFIG            __HAL_RCC_SDIO_CONFIG
+#define __HAL_RCC_GET_SDMMC1_SOURCE        __HAL_RCC_GET_SDIO_SOURCE
+#endif
+
+#if defined(STM32F7) || defined(STM32L4)
+#define __HAL_RCC_SDIO_CLK_ENABLE          __HAL_RCC_SDMMC1_CLK_ENABLE
+#define __HAL_RCC_SDIO_FORCE_RESET         __HAL_RCC_SDMMC1_FORCE_RESET
+#define __HAL_RCC_SDIO_RELEASE_RESET       __HAL_RCC_SDMMC1_RELEASE_RESET
+#define __HAL_RCC_SDIO_CLK_SLEEP_ENABLE    __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE
+#define __HAL_RCC_SDIO_CLK_SLEEP_DISABLE   __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE
+#define __HAL_RCC_SDIO_CLK_ENABLE          __HAL_RCC_SDMMC1_CLK_ENABLE
+#define __HAL_RCC_SDIO_CLK_DISABLE         __HAL_RCC_SDMMC1_CLK_DISABLE
+#define SdioClockSelection                 Sdmmc1ClockSelection
+#define RCC_PERIPHCLK_SDIO                 RCC_PERIPHCLK_SDMMC1
+#define __HAL_RCC_SDIO_CONFIG              __HAL_RCC_SDMMC1_CONFIG
+#define __HAL_RCC_GET_SDIO_SOURCE          __HAL_RCC_GET_SDMMC1_SOURCE	
+#endif
+
+#if defined(STM32F7)
+#define RCC_SDIOCLKSOURCE_CK48             RCC_SDMMC1CLKSOURCE_CLK48
+#define RCC_SDIOCLKSOURCE_SYSCLK           RCC_SDMMC1CLKSOURCE_SYSCLK
+#endif
+
 #define __HAL_RCC_I2SCLK            __HAL_RCC_I2S_CONFIG
 #define __HAL_RCC_I2SCLK_CONFIG     __HAL_RCC_I2S_CONFIG
 
@@ -1989,6 +2146,7 @@
 #define __HAL_RTC_CLEAR_FLAG                      __HAL_RTC_EXTI_CLEAR_FLAG
 #define __HAL_RTC_DISABLE_IT                      __HAL_RTC_EXTI_DISABLE_IT
 #define __HAL_RTC_ENABLE_IT                       __HAL_RTC_EXTI_ENABLE_IT
+
 #if defined (STM32F1)
 #define __HAL_RTC_EXTI_CLEAR_FLAG(RTC_EXTI_LINE_ALARM_EVENT)  __HAL_RTC_ALARM_EXTI_CLEAR_FLAG()
 
@@ -2045,7 +2203,58 @@
 
 #define SD_OCR_CID_CSD_OVERWRIETE   SD_OCR_CID_CSD_OVERWRITE
 #define SD_CMD_SD_APP_STAUS         SD_CMD_SD_APP_STATUS
-  
+
+#if defined(STM32F4)
+#define  SD_SDMMC_DISABLED          SD_SDIO_DISABLED
+#define  SD_SDMMC_FUNCTION_BUSY     SD_SDIO_FUNCTION_BUSY     
+#define  SD_SDMMC_FUNCTION_FAILED   SD_SDIO_FUNCTION_FAILED   
+#define  SD_SDMMC_UNKNOWN_FUNCTION  SD_SDIO_UNKNOWN_FUNCTION  
+#define  SD_CMD_SDMMC_SEN_OP_COND   SD_CMD_SDIO_SEN_OP_COND   
+#define  SD_CMD_SDMMC_RW_DIRECT     SD_CMD_SDIO_RW_DIRECT     
+#define  SD_CMD_SDMMC_RW_EXTENDED   SD_CMD_SDIO_RW_EXTENDED   
+#define  __HAL_SD_SDMMC_ENABLE      __HAL_SD_SDIO_ENABLE      
+#define  __HAL_SD_SDMMC_DISABLE     __HAL_SD_SDIO_DISABLE     
+#define  __HAL_SD_SDMMC_DMA_ENABLE  __HAL_SD_SDIO_DMA_ENABLE  
+#define  __HAL_SD_SDMMC_DMA_DISABLE __HAL_SD_SDIO_DMA_DISABL  
+#define  __HAL_SD_SDMMC_ENABLE_IT   __HAL_SD_SDIO_ENABLE_IT   
+#define  __HAL_SD_SDMMC_DISABLE_IT  __HAL_SD_SDIO_DISABLE_IT  
+#define  __HAL_SD_SDMMC_GET_FLAG    __HAL_SD_SDIO_GET_FLAG    
+#define  __HAL_SD_SDMMC_CLEAR_FLAG  __HAL_SD_SDIO_CLEAR_FLAG  
+#define  __HAL_SD_SDMMC_GET_IT      __HAL_SD_SDIO_GET_IT      
+#define  __HAL_SD_SDMMC_CLEAR_IT    __HAL_SD_SDIO_CLEAR_IT    
+#define  SDMMC_STATIC_FLAGS         SDIO_STATIC_FLAGS	       
+#define  SDMMC_CMD0TIMEOUT          SDIO_CMD0TIMEOUT	       
+#define  SD_SDMMC_SEND_IF_COND      SD_SDIO_SEND_IF_COND
+/* alias CMSIS */
+#define  SDMMC1_IRQn                SDIO_IRQn
+#define  SDMMC1_IRQHandler          SDIO_IRQHandler
+#endif
+
+#if defined(STM32F7) || defined(STM32L4)
+#define  SD_SDIO_DISABLED           SD_SDMMC_DISABLED
+#define  SD_SDIO_FUNCTION_BUSY      SD_SDMMC_FUNCTION_BUSY    
+#define  SD_SDIO_FUNCTION_FAILED    SD_SDMMC_FUNCTION_FAILED  
+#define  SD_SDIO_UNKNOWN_FUNCTION   SD_SDMMC_UNKNOWN_FUNCTION
+#define  SD_CMD_SDIO_SEN_OP_COND    SD_CMD_SDMMC_SEN_OP_COND
+#define  SD_CMD_SDIO_RW_DIRECT      SD_CMD_SDMMC_RW_DIRECT
+#define  SD_CMD_SDIO_RW_EXTENDED    SD_CMD_SDMMC_RW_EXTENDED
+#define  __HAL_SD_SDIO_ENABLE       __HAL_SD_SDMMC_ENABLE
+#define  __HAL_SD_SDIO_DISABLE      __HAL_SD_SDMMC_DISABLE
+#define  __HAL_SD_SDIO_DMA_ENABLE   __HAL_SD_SDMMC_DMA_ENABLE
+#define  __HAL_SD_SDIO_DMA_DISABL   __HAL_SD_SDMMC_DMA_DISABLE
+#define  __HAL_SD_SDIO_ENABLE_IT    __HAL_SD_SDMMC_ENABLE_IT
+#define  __HAL_SD_SDIO_DISABLE_IT   __HAL_SD_SDMMC_DISABLE_IT
+#define  __HAL_SD_SDIO_GET_FLAG     __HAL_SD_SDMMC_GET_FLAG
+#define  __HAL_SD_SDIO_CLEAR_FLAG   __HAL_SD_SDMMC_CLEAR_FLAG
+#define  __HAL_SD_SDIO_GET_IT       __HAL_SD_SDMMC_GET_IT
+#define  __HAL_SD_SDIO_CLEAR_IT     __HAL_SD_SDMMC_CLEAR_IT
+#define  SDIO_STATIC_FLAGS	        SDMMC_STATIC_FLAGS
+#define  SDIO_CMD0TIMEOUT	          SDMMC_CMD0TIMEOUT
+#define  SD_SDIO_SEND_IF_COND	      SD_SDMMC_SEND_IF_COND
+/* alias CMSIS for compatibilities */
+#define  SDIO_IRQn                  SDMMC1_IRQn
+#define  SDIO_IRQHandler            SDMMC1_IRQHandler
+#endif
 /**
   * @}
   */
@@ -2064,13 +2273,7 @@
 #define __HAL_SMARTCARD_GETCLOCKSOURCE  SMARTCARD_GETCLOCKSOURCE
 #define __SMARTCARD_GETCLOCKSOURCE      SMARTCARD_GETCLOCKSOURCE
 
-#define IS_SMARTCARD_ONEBIT_SAMPLING    IS_SMARTCARD_ONE_BIT_SAMPLE
+#define IS_SMARTCARD_ONEBIT_SAMPLING    IS_SMARTCARD_ONE_BIT_SAMPLE                  
-
-#define SMARTCARD_WORDLENGTH_8B         ((uint32_t)0x00000000)
-#define SMARTCARD_STOPBITS_1            ((uint32_t)0x00000000)
-#define SMARTCARD_STOPBITS_2            ((uint32_t)USART_CR2_STOP_1)
-#define SMARTCARD_PARITY_NONE           ((uint32_t)0x00000000)
-                  
 
 /**
   * @}

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   HAL module driver.
   *          This is the common part of the HAL initialization
   *
@@ -68,17 +68,17 @@
   * @{
   */
 /**
-  * @brief STM32F4xx HAL Driver version number V1.3.0
+  * @brief STM32F4xx HAL Driver version number V1.3.2
   */
 #define __STM32F4xx_HAL_VERSION_MAIN   (0x01) /*!< [31:24] main version */
 #define __STM32F4xx_HAL_VERSION_SUB1   (0x03) /*!< [23:16] sub1 version */
-#define __STM32F4xx_HAL_VERSION_SUB2   (0x00) /*!< [15:8]  sub2 version */
+#define __STM32F4xx_HAL_VERSION_SUB2   (0x02) /*!< [15:8]  sub2 version */
 #define __STM32F4xx_HAL_VERSION_RC     (0x00) /*!< [7:0]  release candidate */ 
 #define __STM32F4xx_HAL_VERSION         ((__STM32F4xx_HAL_VERSION_MAIN << 24)\
                                         |(__STM32F4xx_HAL_VERSION_SUB1 << 16)\
                                         |(__STM32F4xx_HAL_VERSION_SUB2 << 8 )\
                                         |(__STM32F4xx_HAL_VERSION_RC))
-                                        
+
 #define IDCODE_DEVID_MASK    ((uint32_t)0x00000FFF)
 
 /* ------------ RCC registers bit address in the alias region ----------- */
@@ -87,7 +87,7 @@
 /* Alias word address of UFB_MODE bit */ 
 #define MEMRMP_OFFSET             SYSCFG_OFFSET 
 #define UFB_MODE_BIT_NUMBER       POSITION_VAL(SYSCFG_MEMRMP_UFB_MODE)
-#define UFB_MODE_BB               (uint32_t)(PERIPH_BB_BASE + (MEMRMP_OFFSET * 32) + (UFB_MODE_BIT_NUMBER * 4)) 
+#define UFB_MODE_BB               (uint32_t)(PERIPH_BB_BASE + (MEMRMP_OFFSET * 32) + (UFB_MODE_BIT_NUMBER * 4))
 
 /* ---  CMPCR Register ---*/ 
 /* Alias word address of CMP_PD bit */ 

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   This file contains all the functions prototypes for the HAL 
   *          module driver.
   ******************************************************************************

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_adc.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_adc.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   This file provides firmware functions to manage the following 
   *          functionalities of the Analog to Digital Convertor (ADC) peripheral:
   *           + Initialization and de-initialization functions
@@ -258,7 +258,7 @@ static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma);
 HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
 {
   /* Check ADC handle */
-  if(hadc == HAL_NULL)
+  if(hadc == NULL)
   {
      return HAL_ERROR;
   }
@@ -317,7 +317,7 @@ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
 HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
 {
   /* Check ADC handle */
-  if(hadc == HAL_NULL)
+  if(hadc == NULL)
   {
      return HAL_ERROR;
   } 

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_adc.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_adc.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of ADC HAL extension module.
   ******************************************************************************
   * @attention
@@ -97,7 +97,11 @@ typedef struct
                                        This parameter can be set to ENABLE or DISABLE */ 
   uint32_t EOCSelection;          /*!< Specifies whether the EOC flag is set 
                                        at the end of single channel conversion or at the end of all conversions.
-                                       This parameter can be a value of @ref ADC_EOCSelection */
+                                       This parameter can be a value of @ref ADC_EOCSelection
+                                       Note: Impact on overrun when not using DMA: When EOCSelection is set to ADC_EOC_SINGLE_CONV,
+                                       overrun detection is automatically enabled, in this case each conversion data must be read.
+                                       To perform ADC conversions without having to read all conversion data, this parameter must
+                                       be set to ADC_EOC_SEQ_CONV */
   uint32_t ContinuousConvMode;    /*!< Specifies whether the conversion is performed in Continuous or Single mode.
                                        This parameter can be set to ENABLE or DISABLE. */
   uint32_t DMAContinuousRequests; /*!< Specifies whether the DMA requests is performed in Continuous or in Single mode.

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_adc_ex.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_adc_ex.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   This file provides firmware functions to manage the following 
   *          functionalities of the ADC extension peripheral:
   *           + Extended features functions
@@ -626,7 +626,6 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_I
   assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
   assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
   assert_param(IS_ADC_EXT_INJEC_TRIG(sConfigInjected->ExternalTrigInjecConv));
-  assert_param(IS_ADC_EXT_INJEC_TRIG_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
   assert_param(IS_ADC_INJECTED_LENGTH(sConfigInjected->InjectedNbrOfConversion));
   assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
   assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
@@ -636,6 +635,11 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_I
   assert_param(IS_ADC_RANGE(tmp, sConfigInjected->InjectedOffset));
 #endif /* USE_FULL_ASSERT  */
 
+  if(sConfigInjected->ExternalTrigInjecConvEdge != ADC_INJECTED_SOFTWARE_START)
+  {
+    assert_param(IS_ADC_EXT_INJEC_TRIG_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
+  }
+  
   /* Process locked */
   __HAL_LOCK(hadc);
   
@@ -669,13 +673,27 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_I
   /* Set the SQx bits for the selected rank */
   hadc->Instance->JSQR |= ADC_JSQR(sConfigInjected->InjectedChannel, sConfigInjected->InjectedRank,sConfigInjected->InjectedNbrOfConversion);
 
-  /* Select external trigger to start conversion */
+  /* Enable external trigger if trigger selection is different of software  */
-  hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL);
+  /* start.                                                                 */
-  hadc->Instance->CR2 |=  sConfigInjected->ExternalTrigInjecConv;
+  /* Note: This configuration keeps the hardware feature of parameter       */
-  
+  /*       ExternalTrigConvEdge "trigger edge none" equivalent to           */
-  /* Select external trigger polarity */
+  /*       software start.                                                  */ 
-  hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN);
+  if(sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
-  hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConvEdge;
+  {  
+    /* Select external trigger to start conversion */
+    hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL);
+    hadc->Instance->CR2 |=  sConfigInjected->ExternalTrigInjecConv;
+    
+    /* Select external trigger polarity */
+    hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN);
+    hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConvEdge;
+  }
+  else
+  {
+    /* Reset the external trigger */
+    hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL);
+    hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN);  
+  }
   
   if (sConfigInjected->AutoInjectedConv != DISABLE)
   {

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_adc_ex.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_adc_ex.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of ADC HAL module.
   ******************************************************************************
   * @attention
@@ -168,6 +168,7 @@ typedef struct
 #define ADC_EXTERNALTRIGINJECCONV_T8_CC3           ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
 #define ADC_EXTERNALTRIGINJECCONV_T8_CC4           ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
 #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15         ((uint32_t)ADC_CR2_JEXTSEL)
+#define ADC_INJECTED_SOFTWARE_START                ((uint32_t)ADC_CR2_JEXTSEL + 1)
 /**
   * @}
   */ 
@@ -306,7 +307,8 @@ HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_
                                         ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2)  || \
                                         ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC3)  || \
                                         ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4)  || \
-                                        ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15))
+                                        ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15)|| \
+                                        ((INJTRIG) == ADC_INJECTED_SOFTWARE_START))
 #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= ((uint32_t)1)) && ((LENGTH) <= ((uint32_t)4)))
 #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= ((uint32_t)1)) && ((RANK) <= ((uint32_t)4)))
 

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_can.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_can.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   This file provides firmware functions to manage the following 
   *          functionalities of the Controller Area Network (CAN) peripheral:
   *           + Initialization and de-initialization functions 
@@ -171,7 +171,7 @@ HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan)
   uint32_t tickstart = 0;
   
   /* Check CAN handle */
-  if(hcan == HAL_NULL)
+  if(hcan == NULL)
   {
      return HAL_ERROR;
   }
@@ -460,7 +460,7 @@ HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTy
 HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan)
 {
   /* Check CAN handle */
-  if(hcan == HAL_NULL)
+  if(hcan == NULL)
   {
      return HAL_ERROR;
   }

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_can.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_can.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of CAN HAL module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cec.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_cec.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   CEC HAL module driver.
   * 
   *          This file provides firmware functions to manage the following 

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cec.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_cec.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of CEC HAL module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cortex.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_cortex.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   CORTEX HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the CORTEX:

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cortex.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_cortex.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of CORTEX HAL module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_crc.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_crc.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   CRC HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Cyclic Redundancy Check (CRC) peripheral:
@@ -112,7 +112,7 @@
 HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc)
 {
   /* Check the CRC handle allocation */
-  if(hcrc == HAL_NULL)
+  if(hcrc == NULL)
   {
     return HAL_ERROR;
   }
@@ -147,7 +147,7 @@ HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc)
 HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc)
 {
   /* Check the CRC handle allocation */
-  if(hcrc == HAL_NULL)
+  if(hcrc == NULL)
   {
     return HAL_ERROR;
   }

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_crc.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_crc.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of CRC HAL module.
   ******************************************************************************
   * @attention
@@ -121,7 +121,7 @@ typedef struct
   * @param __VALUE__: 8-bit value to be stored in the ID register
   * @retval None
   */
-#define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (MODIFY_REG((__HANDLE__)->Instance->IDR, CRC_IDR_IDR, (__VALUE__))
+#define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, (__VALUE__)))
 
 /**
   * @brief Returns the 8-bit data stored in the Independent Data(ID) register.

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cryp.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_cryp.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   CRYP HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Cryptography (CRYP) peripheral:
@@ -610,7 +610,7 @@ static void CRYP_SetTDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction)
 HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp)
 { 
   /* Check the CRYP handle allocation */
-  if(hcryp == HAL_NULL)
+  if(hcryp == NULL)
   {
     return HAL_ERROR;
   }
@@ -656,7 +656,7 @@ HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp)
 HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp)
 {
   /* Check the CRYP handle allocation */
-  if(hcryp == HAL_NULL)
+  if(hcryp == NULL)
   {
     return HAL_ERROR;
   }
@@ -3701,59 +3701,59 @@ void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp)
   switch(CRYP->CR & CRYP_CR_ALGOMODE_DIRECTION)
   {
   case CRYP_CR_ALGOMODE_TDES_ECB_ENCRYPT:
-    HAL_CRYP_TDESECB_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
+    HAL_CRYP_TDESECB_Encrypt_IT(hcryp, NULL, 0, NULL);
     break;
     
   case CRYP_CR_ALGOMODE_TDES_ECB_DECRYPT:
-    HAL_CRYP_TDESECB_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
+    HAL_CRYP_TDESECB_Decrypt_IT(hcryp, NULL, 0, NULL);
     break;
     
   case CRYP_CR_ALGOMODE_TDES_CBC_ENCRYPT:
-    HAL_CRYP_TDESCBC_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
+    HAL_CRYP_TDESCBC_Encrypt_IT(hcryp, NULL, 0, NULL);
     break;
     
   case CRYP_CR_ALGOMODE_TDES_CBC_DECRYPT:
-    HAL_CRYP_TDESCBC_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
+    HAL_CRYP_TDESCBC_Decrypt_IT(hcryp, NULL, 0, NULL);
     break;
     
   case CRYP_CR_ALGOMODE_DES_ECB_ENCRYPT:
-    HAL_CRYP_DESECB_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
+    HAL_CRYP_DESECB_Encrypt_IT(hcryp, NULL, 0, NULL);
     break;
     
   case CRYP_CR_ALGOMODE_DES_ECB_DECRYPT:
-    HAL_CRYP_DESECB_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
+    HAL_CRYP_DESECB_Decrypt_IT(hcryp, NULL, 0, NULL);
     break;
     
   case CRYP_CR_ALGOMODE_DES_CBC_ENCRYPT:
-    HAL_CRYP_DESCBC_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
+    HAL_CRYP_DESCBC_Encrypt_IT(hcryp, NULL, 0, NULL);
     break;
     
   case CRYP_CR_ALGOMODE_DES_CBC_DECRYPT:
-    HAL_CRYP_DESCBC_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
+    HAL_CRYP_DESCBC_Decrypt_IT(hcryp, NULL, 0, NULL);
     break;
     
   case CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT:
-    HAL_CRYP_AESECB_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
+    HAL_CRYP_AESECB_Encrypt_IT(hcryp, NULL, 0, NULL);
     break;
     
   case CRYP_CR_ALGOMODE_AES_ECB_DECRYPT:
-    HAL_CRYP_AESECB_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
+    HAL_CRYP_AESECB_Decrypt_IT(hcryp, NULL, 0, NULL);
     break;
     
   case CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT:
-    HAL_CRYP_AESCBC_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
+    HAL_CRYP_AESCBC_Encrypt_IT(hcryp, NULL, 0, NULL);
     break;
     
   case CRYP_CR_ALGOMODE_AES_CBC_DECRYPT:
-    HAL_CRYP_AESCBC_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
+    HAL_CRYP_AESCBC_Decrypt_IT(hcryp, NULL, 0, NULL);
     break;
     
   case CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT:
-    HAL_CRYP_AESCTR_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
+    HAL_CRYP_AESCTR_Encrypt_IT(hcryp, NULL, 0, NULL);       
     break;
     
   case CRYP_CR_ALGOMODE_AES_CTR_DECRYPT:
-    HAL_CRYP_AESCTR_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
+    HAL_CRYP_AESCTR_Decrypt_IT(hcryp, NULL, 0, NULL);        
     break;
     
   default:

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cryp.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_cryp.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of CRYP HAL module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cryp_ex.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_cryp_ex.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Extended CRYP HAL module driver
   *          This file provides firmware functions to manage the following 
   *          functionalities of CRYP extension peripheral:
@@ -3002,19 +3002,19 @@ void HAL_CRYPEx_GCMCCM_IRQHandler(CRYP_HandleTypeDef *hcryp)
   switch(CRYP->CR & CRYP_CR_ALGOMODE_DIRECTION)
   {    
   case CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT:
-    HAL_CRYPEx_AESGCM_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
+    HAL_CRYPEx_AESGCM_Encrypt_IT(hcryp, NULL, 0, NULL);
     break;
     
   case CRYP_CR_ALGOMODE_AES_GCM_DECRYPT:
-    HAL_CRYPEx_AESGCM_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
+    HAL_CRYPEx_AESGCM_Decrypt_IT(hcryp, NULL, 0, NULL);
     break;
     
   case CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT:
-    HAL_CRYPEx_AESCCM_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
+    HAL_CRYPEx_AESCCM_Encrypt_IT(hcryp, NULL, 0, NULL);
     break;
     
   case CRYP_CR_ALGOMODE_AES_CCM_DECRYPT:
-    HAL_CRYPEx_AESCCM_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
+    HAL_CRYPEx_AESCCM_Decrypt_IT(hcryp, NULL, 0, NULL);
     break;
     
   default:

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cryp_ex.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_cryp_ex.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of CRYP HAL Extension module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dac.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_dac.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   DAC HAL module driver.
   *         This file provides firmware functions to manage the following 
   *         functionalities of the Digital to Analog Converter (DAC) peripheral:
@@ -231,7 +231,7 @@ static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac)
 { 
   /* Check DAC handle */
-  if(hdac == HAL_NULL)
+  if(hdac == NULL)
   {
      return HAL_ERROR;
   }
@@ -268,7 +268,7 @@ HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac)
 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac)
 {
   /* Check DAC handle */
-  if(hdac == HAL_NULL)
+  if(hdac == NULL)
   {
      return HAL_ERROR;
   }
@@ -355,6 +355,8 @@ __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac)
   */
 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
 {
+  uint32_t tmp1 = 0, tmp2 = 0;
+  
   /* Check the parameters */
   assert_param(IS_DAC_CHANNEL(Channel));
   
@@ -367,6 +369,29 @@ HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
   /* Enable the Peripheral */
   __HAL_DAC_ENABLE(hdac, Channel);
   
+  if(Channel == DAC_CHANNEL_1)
+  {
+    tmp1 = hdac->Instance->CR & DAC_CR_TEN1;
+    tmp2 = hdac->Instance->CR & DAC_CR_TSEL1;
+    /* Check if software trigger enabled */
+    if((tmp1 ==  DAC_CR_TEN1) && (tmp2 ==  DAC_CR_TSEL1))
+    {
+      /* Enable the selected DAC software conversion */
+      hdac->Instance->SWTRIGR |= (uint32_t)DAC_SWTRIGR_SWTRIG1;
+    }
+  }
+  else
+  {
+    tmp1 = hdac->Instance->CR & DAC_CR_TEN2;
+    tmp2 = hdac->Instance->CR & DAC_CR_TSEL2;    
+    /* Check if software trigger enabled */
+    if((tmp1 == DAC_CR_TEN2) && (tmp2 == DAC_CR_TSEL2))
+    {
+      /* Enable the selected DAC software conversion*/
+      hdac->Instance->SWTRIGR |= (uint32_t)DAC_SWTRIGR_SWTRIG2;
+    }
+  }
+  
   /* Change DAC state */
   hdac->State = HAL_DAC_STATE_READY;
   

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dac.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_dac.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of DAC HAL module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dac_ex.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_dac_ex.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   DAC HAL module driver.
   *         This file provides firmware functions to manage the following 
   *         functionalities of DAC extension peripheral:

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dac_ex.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_dac.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of DAC HAL Extension module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dcmi.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_dcmi.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   DCMI HAL module driver
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Digital Camera Interface (DCMI) peripheral:

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dcmi.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_dcmi.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of DCMI HAL module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dcmi_ex.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_dcmi_ex.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   DCMI Extension HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of DCMI extension peripheral:

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dcmi_ex.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_dcmi_ex.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of DCMI Extension HAL module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_def.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_def.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   This file contains HAL common defines, enumeration, macros and 
   *          structures definitions. 
   ******************************************************************************
@@ -72,9 +72,6 @@ typedef enum
 } HAL_LockTypeDef;
 
 /* Exported macro ------------------------------------------------------------*/
-//#ifndef NULL
-  #define HAL_NULL      (void *) 0
-//#endif
 #define HAL_MAX_DELAY      0xFFFFFFFF
 
 #define HAL_IS_BIT_SET(REG, BIT)         (((REG) & (BIT)) != RESET)

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_dma.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   DMA HAL module driver.
   *    
   *          This file provides firmware functions to manage the following 
@@ -182,7 +182,7 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
   uint32_t tmp = 0;
   
   /* Check the DMA peripheral state */
-  if(hdma == HAL_NULL)
+  if(hdma == NULL)
   {
     return HAL_ERROR;
   }
@@ -272,7 +272,7 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
 HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
 {
   /* Check the DMA peripheral state */
-  if(hdma == HAL_NULL)
+  if(hdma == NULL)
   {
     return HAL_ERROR;
   }
@@ -657,7 +657,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
       /* Process Unlocked */
       __HAL_UNLOCK(hdma); 
 
-      if(hdma->XferErrorCallback != HAL_NULL)
+      if(hdma->XferErrorCallback != NULL)
       {
         /* Transfer error callback */
         hdma->XferErrorCallback(hdma);
@@ -684,7 +684,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
       /* Process Unlocked */
       __HAL_UNLOCK(hdma);
 
-      if(hdma->XferErrorCallback != HAL_NULL)
+      if(hdma->XferErrorCallback != NULL)
       {
         /* Transfer error callback */
         hdma->XferErrorCallback(hdma);
@@ -711,7 +711,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
       /* Process Unlocked */
       __HAL_UNLOCK(hdma);
 
-      if(hdma->XferErrorCallback != HAL_NULL)
+      if(hdma->XferErrorCallback != NULL)
       {
         /* Transfer error callback */
         hdma->XferErrorCallback(hdma);
@@ -757,7 +757,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
         hdma->State = HAL_DMA_STATE_READY_HALF_MEM0;
       }
 
-      if(hdma->XferHalfCpltCallback != HAL_NULL)
+      if(hdma->XferHalfCpltCallback != NULL)
       {
         /* Half transfer callback */
         hdma->XferHalfCpltCallback(hdma);
@@ -777,7 +777,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
         /* Current memory buffer used is Memory 1 */
         if((hdma->Instance->CR & DMA_SxCR_CT) == 0)
         {
-          if(hdma->XferM1CpltCallback != HAL_NULL)
+          if(hdma->XferM1CpltCallback != NULL)
           {
             /* Transfer complete Callback for memory1 */
             hdma->XferM1CpltCallback(hdma);
@@ -786,7 +786,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
         /* Current memory buffer used is Memory 0 */
         else if((hdma->Instance->CR & DMA_SxCR_CT) != 0) 
         {
-          if(hdma->XferCpltCallback != HAL_NULL)
+          if(hdma->XferCpltCallback != NULL)
           {
             /* Transfer complete Callback for memory0 */
             hdma->XferCpltCallback(hdma);
@@ -813,7 +813,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
         /* Process Unlocked */
         __HAL_UNLOCK(hdma);      
 
-        if(hdma->XferCpltCallback != HAL_NULL)
+        if(hdma->XferCpltCallback != NULL)
         {
           /* Transfer complete callback */
           hdma->XferCpltCallback(hdma);

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_dma.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of DMA HAL module.
   ******************************************************************************
   * @attention
@@ -580,7 +580,7 @@ typedef struct __DMA_HandleTypeDef
 ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__)) : ((__HANDLE__)->Instance->FCR &= ~(__INTERRUPT__)))
 
 /**
-  * @brief  Check whether the specified DMA Stream interrupt has occurred or not.
+  * @brief  Check whether the specified DMA Stream interrupt is enabled or disabled.
   * @param  __HANDLE__: DMA handle
   * @param  __INTERRUPT__: specifies the DMA interrupt source to check.
   *         This parameter can be one of the following values:

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma2d.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_dma2d.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   DMA2D HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the DMA2D peripheral:
@@ -185,7 +185,7 @@ HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d)
   uint32_t tmp = 0;
 
   /* Check the DMA2D peripheral state */
-  if(hdma2d == HAL_NULL)
+  if(hdma2d == NULL)
   {
      return HAL_ERROR;
   }
@@ -266,7 +266,7 @@ HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d)
 HAL_StatusTypeDef HAL_DMA2D_DeInit(DMA2D_HandleTypeDef *hdma2d)
 {
   /* Check the DMA2D peripheral state */
-  if(hdma2d == HAL_NULL)
+  if(hdma2d == NULL)
   {
      return HAL_ERROR;
   }
@@ -737,7 +737,7 @@ void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d)
       /* Process Unlocked */
       __HAL_UNLOCK(hdma2d);       
       
-      if(hdma2d->XferErrorCallback != HAL_NULL)
+      if(hdma2d->XferErrorCallback != NULL)
       {
         /* Transfer error Callback */
         hdma2d->XferErrorCallback(hdma2d);
@@ -764,7 +764,7 @@ void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d)
       /* Process Unlocked */
       __HAL_UNLOCK(hdma2d);       
       
-      if(hdma2d->XferErrorCallback != HAL_NULL)
+      if(hdma2d->XferErrorCallback != NULL)
       {
         /* Transfer error Callback */
         hdma2d->XferErrorCallback(hdma2d);
@@ -791,7 +791,7 @@ void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d)
       /* Process Unlocked */
       __HAL_UNLOCK(hdma2d);       
       
-      if(hdma2d->XferCpltCallback != HAL_NULL)
+      if(hdma2d->XferCpltCallback != NULL)
       {
         /* Transfer complete Callback */
         hdma2d->XferCpltCallback(hdma2d);
@@ -895,7 +895,7 @@ HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t La
     if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
     {
       /* Prepare the value to be wrote to the BGCOLR register */
-      tmp |= ((pLayerCfg->InputAlpha) & 0x00FFFFFF);
+      tmp = ((pLayerCfg->InputAlpha) & 0x00FFFFFF);
     
       /* Write to DMA2D BGCOLR register */
       hdma2d->Instance->BGCOLR = tmp;
@@ -941,7 +941,7 @@ HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t La
     if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
     {
       /* Prepare the value to be wrote to the FGCOLR register */
-      tmp |= ((pLayerCfg->InputAlpha) & 0x00FFFFFF);
+      tmp = ((pLayerCfg->InputAlpha) & 0x00FFFFFF);
     
       /* Write to DMA2D FGCOLR register */
       hdma2d->Instance->FGCOLR = tmp;

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma2d.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_dma2d.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of DMA2D HAL module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma_ex.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_dma_ex.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   DMA Extension HAL module driver
   *         This file provides firmware functions to manage the following 
   *         functionalities of the DMA Extension peripheral:

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma_ex.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_dma_ex.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of DMA HAL extension module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_eth.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_eth.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   ETH HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Ethernet (ETH) peripheral:
@@ -182,7 +182,7 @@ HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
   uint32_t err = ETH_SUCCESS;
   
   /* Check the ETH peripheral state */
-  if(heth == HAL_NULL)
+  if(heth == NULL)
   {
     return HAL_ERROR;
   }
@@ -809,7 +809,7 @@ HAL_StatusTypeDef HAL_ETH_GetReceivedFrame(ETH_HandleTypeDef *heth)
     else if((heth->RxDesc->Status & ETH_DMARXDESC_FS) != (uint32_t)RESET)
     {
       (heth->RxFrameInfos).FSRxDesc = heth->RxDesc;
-      (heth->RxFrameInfos).LSRxDesc = HAL_NULL;
+      (heth->RxFrameInfos).LSRxDesc = NULL;
       (heth->RxFrameInfos).SegCount = 1;
       /* Point to next descriptor */
       heth->RxDesc = (ETH_DMADescTypeDef*) (heth->RxDesc->Buffer2NextDescAddr);
@@ -1285,7 +1285,7 @@ HAL_StatusTypeDef HAL_ETH_ConfigMAC(ETH_HandleTypeDef *heth, ETH_MACInitTypeDef
   assert_param(IS_ETH_SPEED(heth->Init.Speed));
   assert_param(IS_ETH_DUPLEX_MODE(heth->Init.DuplexMode)); 
   
-  if (macconf != HAL_NULL)
+  if (macconf != NULL)
   {
     /* Check the parameters */
     assert_param(IS_ETH_WATCHDOG(macconf->Watchdog));

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_eth.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_eth.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of ETH HAL module.
   ******************************************************************************
   * @attention
@@ -65,14 +65,8 @@
                              ((SPEED) == ETH_SPEED_100M))
 #define IS_ETH_DUPLEX_MODE(MODE)  (((MODE) == ETH_MODE_FULLDUPLEX) || \
                                   ((MODE) == ETH_MODE_HALFDUPLEX))
-#define IS_ETH_DUPLEX_MODE(MODE)  (((MODE) == ETH_MODE_FULLDUPLEX) || \
-                                  ((MODE) == ETH_MODE_HALFDUPLEX))
 #define IS_ETH_RX_MODE(MODE)    (((MODE) == ETH_RXPOLLING_MODE) || \
                                  ((MODE) == ETH_RXINTERRUPT_MODE)) 
-#define IS_ETH_RX_MODE(MODE)    (((MODE) == ETH_RXPOLLING_MODE) || \
-                                 ((MODE) == ETH_RXINTERRUPT_MODE))
-#define IS_ETH_RX_MODE(MODE)    (((MODE) == ETH_RXPOLLING_MODE) || \
-                                 ((MODE) == ETH_RXINTERRUPT_MODE))
 #define IS_ETH_CHECKSUM_MODE(MODE)    (((MODE) == ETH_CHECKSUM_BY_HARDWARE) || \
                                       ((MODE) == ETH_CHECKSUM_BY_SOFTWARE))
 #define IS_ETH_MEDIA_INTERFACE(MODE)         (((MODE) == ETH_MEDIA_INTERFACE_MII) || \
@@ -1258,10 +1252,10 @@ typedef struct
 #define ETH_MAC_RXFIFO_BELOW_THRESHOLD   ((uint32_t)0x00000100)  /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */
 #define ETH_MAC_RXFIFO_ABOVE_THRESHOLD   ((uint32_t)0x00000200)  /* Rx FIFO fill level: fill-level above flow-control activate threshold */
 #define ETH_MAC_RXFIFO_FULL              ((uint32_t)0x00000300)  /* Rx FIFO fill level: full */
-#define ETH_MAC_READCONTROLLER_IDLE            ((uint32_t)0x00000060)  /* Rx FIFO read controller IDLE state */
+#define ETH_MAC_READCONTROLLER_IDLE               ((uint32_t)0x00000000)  /* Rx FIFO read controller IDLE state */
-#define ETH_MAC_READCONTROLLER_READING_DATA    ((uint32_t)0x00000060)  /* Rx FIFO read controller Reading frame data */
+#define ETH_MAC_READCONTROLLER_READING_DATA       ((uint32_t)0x00000020)  /* Rx FIFO read controller Reading frame data */
-#define ETH_MAC_READCONTROLLER_READING_STATUS  ((uint32_t)0x00000060)  /* Rx FIFO read controller Reading frame status (or time-stamp) */
+#define ETH_MAC_READCONTROLLER_READING_STATUS     ((uint32_t)0x00000040)  /* Rx FIFO read controller Reading frame status (or time-stamp) */
-#define ETH_MAC_READCONTROLLER_ FLUSHING       ((uint32_t)0x00000060)  /* Rx FIFO read controller Flushing the frame data and status */
+#define ETH_MAC_READCONTROLLER_FLUSHING           ((uint32_t)0x00000060)  /* Rx FIFO read controller Flushing the frame data and status */
 #define ETH_MAC_RXFIFO_WRITE_ACTIVE     ((uint32_t)0x00000010)  /* Rx FIFO write controller active */
 #define ETH_MAC_SMALL_FIFO_NOTACTIVE    ((uint32_t)0x00000000)  /* MAC small FIFO read / write controllers not active */
 #define ETH_MAC_SMALL_FIFO_READ_ACTIVE  ((uint32_t)0x00000002)  /* MAC small FIFO read controller active */
@@ -2096,7 +2090,7 @@ typedef struct
   * @brief  Disables the rising edge trigger to the ETH External interrupt line.
   * @retval None
   */
-#define __HAL_ETH_WAKEUP_EXTI_DISABLE_RISING_EDGE_TRIGGER()  EXTI->RTSR &= ~(ETH_EXTI_LINE_WAKEUP)                                                          
+#define __HAL_ETH_WAKEUP_EXTI_DISABLE_RISING_EDGE_TRIGGER()  EXTI->RTSR &= ~(ETH_EXTI_LINE_WAKEUP)
 
 /**
   * @brief  Enables falling edge trigger to the ETH External interrupt line.

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_flash.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   FLASH HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the internal FLASH memory:

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_flash.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of FLASH HAL module.
   ******************************************************************************
   * @attention
@@ -193,6 +193,13 @@ typedef struct
   */ 
 #define __HAL_FLASH_SET_LATENCY(__LATENCY__) (*(__IO uint8_t *)ACR_BYTE0_ADDRESS = (uint8_t)(__LATENCY__))
 
+/**
+  * @brief  Get the FLASH Latency.
+  * @retval FLASH Latency
+  *          The value of this parameter depend on device used within the same series
+  */ 
+#define __HAL_FLASH_GET_LATENCY()     (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY))
+
 /**
   * @brief  Enable the FLASH prefetch buffer.
   * @retval none

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash_ex.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_flash_ex.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Extended FLASH HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the FLASH extension peripheral:
@@ -125,7 +125,7 @@ static HAL_StatusTypeDef  FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_
 static HAL_StatusTypeDef  FLASH_OB_BOR_LevelConfig(uint8_t Level);
 static uint8_t            FLASH_OB_GetUser(void);
 static uint16_t           FLASH_OB_GetWRP(void);
-static FlagStatus         FLASH_OB_GetRDP(void);
+static uint8_t            FLASH_OB_GetRDP(void);
 static uint8_t            FLASH_OB_GetBOR(void);
 
 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
@@ -361,16 +361,16 @@ void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
   pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_BOR;
 
   /*Get WRP*/
-  pOBInit->WRPSector = FLASH_OB_GetWRP();
+  pOBInit->WRPSector = (uint32_t)FLASH_OB_GetWRP();
-
+  
   /*Get RDP Level*/
-  pOBInit->RDPLevel = FLASH_OB_GetRDP();
+  pOBInit->RDPLevel = (uint32_t)FLASH_OB_GetRDP();
-
+  
   /*Get USER*/
-  pOBInit->USERConfig = FLASH_OB_GetUser();
+  pOBInit->USERConfig = (uint8_t)FLASH_OB_GetUser();
 
   /*Get BOR Level*/
-  pOBInit->BORLevel = FLASH_OB_GetBOR();
+  pOBInit->BORLevel = (uint32_t)FLASH_OB_GetBOR();
 }
 
 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
@@ -1212,7 +1212,6 @@ static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t
   }
   
   return status; 
-
 }
 
 /**
@@ -1234,8 +1233,7 @@ static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level)
   *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV);
   *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= Level;
   
-  return HAL_OK;
+  return HAL_OK;  
-  
 }
 
 /**
@@ -1261,17 +1259,27 @@ static uint16_t FLASH_OB_GetWRP(void)
 
 /**
   * @brief  Returns the FLASH Read Protection level.
-  * @retval FlagStatus FLASH Readout Protection Status:
+  * @retval FLASH ReadOut Protection Status:
-  *           - SET, when OB_RDP_Level_1 or OB_RDP_Level_2 is set
+  *         This parameter can be one of the following values:
-  *           - RESET, when OB_RDP_Level_0 is set
+  *            @arg OB_RDP_LEVEL_0: No protection
+  *            @arg OB_RDP_LEVEL_1: Read protection of the memory
+  *            @arg OB_RDP_LEVEL_2: Full chip protection
   */
-static FlagStatus FLASH_OB_GetRDP(void)
+static uint8_t FLASH_OB_GetRDP(void)
 {
-  FlagStatus readstatus = RESET;
+  uint8_t readstatus = OB_RDP_LEVEL_0;
 
-  if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) != (uint8_t)OB_RDP_LEVEL_0))
+  if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2))
   {
-    readstatus = SET;
+    readstatus = OB_RDP_LEVEL_2;
+  }
+  else if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_1))
+  {
+    readstatus = OB_RDP_LEVEL_1;
+  }
+  else 
+  {
+    readstatus = OB_RDP_LEVEL_0;
   }
   
   return readstatus;

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash_ex.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_flash_ex.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of FLASH HAL Extension module.
   ******************************************************************************
   * @attention
@@ -197,8 +197,8 @@ typedef struct
   */
 #define OB_RDP_LEVEL_0   ((uint8_t)0xAA)
 #define OB_RDP_LEVEL_1   ((uint8_t)0x55)
-/*#define OB_RDP_LEVEL_2   ((uint8_t)0xCC)*/ /*!< Warning: When enabling read protection level 2 
+#define OB_RDP_LEVEL_2   ((uint8_t)0xCC) /*!< Warning: When enabling read protection level 2 
-                                                  it s no more possible to go back to level 1 or 0 */
+                                              it s no more possible to go back to level 1 or 0 */
 /**
   * @}
   */ 
@@ -685,9 +685,9 @@ uint16_t          HAL_FLASHEx_OB_GetBank2WRP(void);
 
 #define IS_OPTIONBYTE(VALUE)(((VALUE) <= (OPTIONBYTE_WRP|OPTIONBYTE_RDP|OPTIONBYTE_USER|OPTIONBYTE_BOR)))
 
-#define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0)   ||\
+#define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\
-                                ((LEVEL) == OB_RDP_LEVEL_1))/*||\
+                                ((LEVEL) == OB_RDP_LEVEL_1) ||\
-                                ((LEVEL) == OB_RDP_LEVEL_2))*/
+                                ((LEVEL) == OB_RDP_LEVEL_2))
 
 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
 

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash_ramfunc.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_flash_ramfunc.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   FLASH RAMFUNC module driver.
   *          This file provides a FLASH firmware functions which should be 
   *          executed from internal SRAM

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash_ramfunc.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_flash_ramfunc.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of FLASH RAMFUNC driver.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_fmpi2c.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_fmpi2c.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   FMPI2C HAL module driver.
   *    
   *          This file provides firmware functions to manage the following 

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_fmpi2c.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_fmpi2c.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of FMPI2C HAL module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_fmpi2c_ex.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_fmpi2c_ex.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Extended FMPI2C HAL module driver.
   *    
   *          This file provides firmware functions to manage the following 

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_fmpi2c_ex.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_fmpi2c_ex.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of FMPI2C HAL Extension module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_gpio.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_gpio.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   GPIO HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the General Purpose Input/Output (GPIO) peripheral:
@@ -350,7 +350,7 @@ void HAL_GPIO_DeInit(GPIO_TypeDef  *GPIOx, uint32_t GPIO_Pin)
       /*------------------------- EXTI Mode Configuration --------------------*/
       tmp = SYSCFG->EXTICR[position >> 2];
       tmp &= (((uint32_t)0x0F) << (4 * (position & 0x03)));
-      if(tmp == ((uint32_t)(GET_GPIO_SOURCE(GPIOx)) << (4 * (position & 0x03))))
+      if(tmp == ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03))))
       {
         /* Configure the External Interrupt or event for the current IO */
         tmp = ((uint32_t)0x0F) << (4 * (position & 0x03));

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_gpio.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_gpio.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of GPIO HAL module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_gpio_ex.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_gpio_ex.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of GPIO HAL Extension module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hash.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_hash.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   HASH HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the HASH peripheral:
@@ -176,7 +176,7 @@ static void HASH_DMAXferCplt(DMA_HandleTypeDef *hdma)
         buffersize = hhash->Init.KeySize;
       }
       /* Configure the number of valid bits in last word of the message */
-      HASH->STR |= 8 * (buffersize % 4);
+      MODIFY_REG(HASH->STR, HASH_STR_NBLW, 8 * (buffersize % 4));
       
       /* Set the HASH DMA transfer complete */
       hhash->hdmain->XferCpltCallback = HASH_DMAXferCplt;
@@ -345,7 +345,7 @@ static void HASH_GetDigest(uint8_t *pMsgDigest, uint8_t Size)
 HAL_StatusTypeDef HAL_HASH_Init(HASH_HandleTypeDef *hhash)
 {
   /* Check the hash handle allocation */
-  if(hhash == HAL_NULL)
+  if(hhash == NULL)
   {
     return HAL_ERROR;
   }
@@ -392,7 +392,7 @@ HAL_StatusTypeDef HAL_HASH_Init(HASH_HandleTypeDef *hhash)
 HAL_StatusTypeDef HAL_HASH_DeInit(HASH_HandleTypeDef *hhash)
 { 
   /* Check the HASH handle allocation */
-  if(hhash == HAL_NULL)
+  if(hhash == NULL)
   {
     return HAL_ERROR;
   }
@@ -714,10 +714,15 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuf
   * @param  pInBuffer: Pointer to the input buffer (buffer to be hashed).
   * @param  Size: Length of the input buffer in bytes.
   *          If the Size is not multiple of 64 bytes, the padding is managed by hardware.
+  * @note  Input buffer size in bytes must be a multiple of 4 otherwise the digest computation is corrupted.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_HASH_SHA1_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
 {
+  
+  /* Check the parameters */
+  assert_param(IS_HASH_SHA1_BUFFER_SIZE(Size));
+  
   /* Process Locked */
   __HAL_LOCK(hhash);
   
@@ -792,14 +797,6 @@ HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInB
   /* Process Locked */
   __HAL_LOCK(hhash);
   
-  if(hhash->HashITCounter == 0)
-  {
-    hhash->HashITCounter = 1;
-  }
-  else
-  {
-    hhash->HashITCounter = 0;
-  }
   if(hhash->State == HAL_HASH_STATE_READY)
   {
     /* Change the HASH state */
@@ -818,6 +815,8 @@ HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInB
          the message digest of a new message */
       HASH->CR |= HASH_CR_INIT;
     }
+    /* Reset interrupt counter */
+    hhash->HashITCounter = 0;
     
     /* Set the phase */
     hhash->Phase = HAL_HASH_PHASE_PROCESS;
@@ -851,11 +850,17 @@ HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInB
       hhash->State = HAL_HASH_STATE_READY;
       /* Call digest computation complete callback */
       HAL_HASH_DgstCpltCallback(hhash);
+      
+      /* Process Unlocked */
+      __HAL_UNLOCK(hhash);
+      
+      /* Return function status */
+      return HAL_OK;
     }
   }
   if(__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS))
   {
-    if(hhash->HashInCount > 64)
+    if(hhash->HashInCount >= 68)
     {
       inputaddr = (uint32_t)hhash->pHashInBuffPtr;
       /* Write the Input block in the Data IN register */
@@ -876,8 +881,11 @@ HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInB
         }
         else
         {
-          hhash->HashInCount -= 64;
+          hhash->HashInCount = 0;
+          hhash->pHashInBuffPtr+= hhash->HashInCount;
         }
+        /* Set Interrupt counter */
+        hhash->HashITCounter = 1;
       }
       else
       {
@@ -901,7 +909,10 @@ HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInB
       {
         inputcounter = (inputcounter+4-inputcounter%4);
       }
-      
+      else if ((inputcounter < 4) && (inputcounter != 0))
+      {
+        inputcounter = 4;
+      }
       /* Write the Input block in the Data IN register */
       for(buffercounter = 0; buffercounter < inputcounter/4; buffercounter++)
       {
@@ -912,11 +923,12 @@ HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInB
       __HAL_HASH_START_DIGEST();
       /* Reset buffer counter */
       hhash->HashInCount = 0;
+      
+      /* Call Input data transfer complete callback */
+      HAL_HASH_InCpltCallback(hhash);
     }
-    /* Call Input data transfer complete callback */
-    HAL_HASH_InCpltCallback(hhash);
   }
-  
+
   /* Process Unlocked */
   __HAL_UNLOCK(hhash);
   
@@ -945,14 +957,6 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn
   /* Process Locked */
   __HAL_LOCK(hhash);
   
-  if(hhash->HashITCounter == 0)
-  {
-    hhash->HashITCounter = 1;
-  }
-  else
-  {
-    hhash->HashITCounter = 0;
-  }
   if(hhash->State == HAL_HASH_STATE_READY)
   {
     /* Change the HASH state */
@@ -972,6 +976,9 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn
       HASH->CR |= HASH_CR_INIT;
     }
     
+    /* Reset interrupt counter */
+    hhash->HashITCounter = 0;
+    
     /* Set the phase */
     hhash->Phase = HAL_HASH_PHASE_PROCESS;
     
@@ -1005,11 +1012,17 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn
       hhash->State = HAL_HASH_STATE_READY;
       /* Call digest computation complete callback */
       HAL_HASH_DgstCpltCallback(hhash);
+      
+      /* Process Unlocked */
+      __HAL_UNLOCK(hhash);
+      
+      /* Return function status */
+      return HAL_OK;
     }
   }
   if(__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS))
   {
-    if(hhash->HashInCount > 64)
+    if(hhash->HashInCount >= 68)
     {
       inputaddr = (uint32_t)hhash->pHashInBuffPtr;
       /* Write the Input block in the Data IN register */
@@ -1021,7 +1034,6 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn
       if(hhash->HashITCounter == 0)
       {
         HASH->DIN = *(uint32_t*)inputaddr;
-      
         if(hhash->HashInCount >= 68)
         {
           /* Decrement buffer counter */
@@ -1030,8 +1042,11 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn
         }
         else
         {
-          hhash->HashInCount -= 64;
+          hhash->HashInCount = 0;
+          hhash->pHashInBuffPtr+= hhash->HashInCount;
         }
+        /* Set Interrupt counter */
+        hhash->HashITCounter = 1;
       }
       else
       {
@@ -1055,7 +1070,10 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn
       {
         inputcounter = (inputcounter+4-inputcounter%4);
       }
-      
+      else if ((inputcounter < 4) && (inputcounter != 0))
+      {
+        inputcounter = 4;
+      }
       /* Write the Input block in the Data IN register */
       for(buffercounter = 0; buffercounter < inputcounter/4; buffercounter++)
       {
@@ -1066,9 +1084,10 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn
       __HAL_HASH_START_DIGEST();
       /* Reset buffer counter */
       hhash->HashInCount = 0;
+
+      /* Call Input data transfer complete callback */
+      HAL_HASH_InCpltCallback(hhash);
     }
-    /* Call Input data transfer complete callback */
-    HAL_HASH_InCpltCallback(hhash);
   }
   
   /* Process Unlocked */
@@ -1089,11 +1108,11 @@ void HAL_HASH_IRQHandler(HASH_HandleTypeDef *hhash)
   switch(HASH->CR & HASH_CR_ALGO)
   {
     case HASH_ALGOSELECTION_MD5:
-       HAL_HASH_MD5_Start_IT(hhash, HAL_NULL, 0, HAL_NULL);
+       HAL_HASH_MD5_Start_IT(hhash, NULL, 0, NULL);
     break;
     
     case HASH_ALGOSELECTION_SHA1:
-      HAL_HASH_SHA1_Start_IT(hhash, HAL_NULL, 0, HAL_NULL);
+      HAL_HASH_SHA1_Start_IT(hhash, NULL, 0, NULL);
     break;
     
     default:

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hash.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_hash.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of HASH HAL module.
   ******************************************************************************
   * @attention
@@ -210,8 +210,8 @@ typedef struct
 /** @defgroup HASH_Exported_Constants_Group6 HASH Interrupts definition 
   * @{
   */
-#define HASH_IT_DINI               HASH_IMR_DINIM  /*!< A new block can be entered into the input buffer (DIN) */
+#define HASH_IT_DINI               HASH_IMR_DINIE  /*!< A new block can be entered into the input buffer (DIN) */
-#define HASH_IT_DCI                HASH_IMR_DCIM   /*!< Digest calculation complete                            */
+#define HASH_IT_DCI                HASH_IMR_DCIE   /*!< Digest calculation complete                            */
 /**
   * @}
   */
@@ -241,8 +241,8 @@ typedef struct
   *            @arg HASH_FLAG_DINNE: DIN not empty : The input buffer contains at least one word of data
   * @retval The new state of __FLAG__ (TRUE or FALSE).
   */
-#define __HAL_HASH_GET_FLAG(__FLAG__) ((HASH->SR & (__FLAG__)) == (__FLAG__))
+#define __HAL_HASH_GET_FLAG(__FLAG__) (((__FLAG__) > 8U) ? ((HASH->CR & (__FLAG__)) == (__FLAG__)) :\
-
+                                                           ((HASH->SR & (__FLAG__)) == (__FLAG__)))
 /**
   * @brief  Enable the multiple DMA mode. 
   *         This feature is available only in STM32F429x and STM32F439x devices.
@@ -267,7 +267,7 @@ typedef struct
   * @param  SIZE: size in byte of last data written in Data register.
   * @retval None
 */
-#define __HAL_HASH_SET_NBVALIDBITS(SIZE) do{HASH->STR &= ~(HASH_STR_NBW);\
+#define __HAL_HASH_SET_NBVALIDBITS(SIZE) do{HASH->STR &= ~(HASH_STR_NBLW);\
                                             HASH->STR |= 8 * ((SIZE) % 4);\
                                            }while(0)
 
@@ -416,6 +416,8 @@ void HAL_HASH_ErrorCallback(HASH_HandleTypeDef *hhash);
 #define IS_HASH_HMAC_KEYTYPE(__KEYTYPE__) (((__KEYTYPE__) == HASH_HMAC_KEYTYPE_SHORTKEY) || \
                                            ((__KEYTYPE__) == HASH_HMAC_KEYTYPE_LONGKEY))
 
+#define IS_HASH_SHA1_BUFFER_SIZE(__SIZE__) ((((__SIZE__)%4) != 0)? 0U: 1U)
+
 /**
   * @}
   */ 

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hash_ex.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_hash_ex.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   HASH HAL Extension module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of HASH peripheral:
@@ -265,7 +265,7 @@ static void HASHEx_DMAXferCplt(DMA_HandleTypeDef *hdma)
         buffersize = hhash->Init.KeySize;
       }
       /* Configure the number of valid bits in last word of the message */
-      HASH->STR |= 8 * (buffersize % 4);
+      MODIFY_REG(HASH->STR, HASH_STR_NBLW, 8 * (buffersize % 4));
       
       /* Set the HASH DMA transfer complete */
       hhash->hdmain->XferCpltCallback = HASHEx_DMAXferCplt;
@@ -926,14 +926,6 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t
   /* Process Locked */
   __HAL_LOCK(hhash);
   
-  if(hhash->HashITCounter == 0)
-  {
-    hhash->HashITCounter = 1;
-  }
-  else
-  {
-    hhash->HashITCounter = 0;
-  }
   if(hhash->State == HAL_HASH_STATE_READY)
   {
     /* Change the HASH state */
@@ -953,6 +945,9 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t
       HASH->CR |= HASH_CR_INIT;
     }
     
+    /* Reset interrupt counter */
+    hhash->HashITCounter = 0;
+    
     /* Set the phase */
     hhash->Phase = HAL_HASH_PHASE_PROCESS;
     
@@ -977,11 +972,17 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t
       hhash->State = HAL_HASH_STATE_READY;
       /* Call digest computation complete callback */
       HAL_HASH_DgstCpltCallback(hhash);
+      
+      /* Process Unlocked */
+      __HAL_UNLOCK(hhash);
+      
+      /* Return function status */
+      return HAL_OK;
     }
   }
   if(__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS))
   {
-    if(hhash->HashInCount > 64)
+    if(hhash->HashInCount >= 68)
     {
       inputaddr = (uint32_t)hhash->pHashInBuffPtr;
       /* Write the Input block in the Data IN register */
@@ -993,6 +994,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t
       if(hhash->HashITCounter == 0)
       {
         HASH->DIN = *(uint32_t*)inputaddr;
+
         if(hhash->HashInCount >= 68)
         {
           /* Decrement buffer counter */
@@ -1001,8 +1003,11 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t
         }
         else
         {
-          hhash->HashInCount -= 64;
+          hhash->HashInCount = 0;
+          hhash->pHashInBuffPtr+= hhash->HashInCount;
         }
+        /* Set Interrupt counter */
+        hhash->HashITCounter = 1;
       }
       else
       {
@@ -1026,7 +1031,10 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t
       {
         inputcounter = (inputcounter+4-inputcounter%4);
       }
-      
+      else if ((inputcounter < 4) && (inputcounter != 0))
+      {
+        inputcounter = 4;
+      }
       /* Write the Input block in the Data IN register */
       for(buffercounter = 0; buffercounter < inputcounter/4; buffercounter++)
       {
@@ -1037,9 +1045,10 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t
       __HAL_HASH_START_DIGEST();
       /* Reset buffer counter */
       hhash->HashInCount = 0;
+
+     /* Call Input data transfer complete callback */
+     HAL_HASH_InCpltCallback(hhash);
     }
-    /* Call Input data transfer complete callback */
-    HAL_HASH_InCpltCallback(hhash);
   }
   
   /* Process Unlocked */
@@ -1070,14 +1079,6 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t
   /* Process Locked */
   __HAL_LOCK(hhash);
   
-  if(hhash->HashITCounter == 0)
-  {
-    hhash->HashITCounter = 1;
-  }
-  else
-  {
-    hhash->HashITCounter = 0;
-  }
   if(hhash->State == HAL_HASH_STATE_READY)
   {
     /* Change the HASH state */
@@ -1097,6 +1098,9 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t
       HASH->CR |= HASH_CR_INIT;
     }
     
+    /* Reset interrupt counter */
+    hhash->HashITCounter = 0;
+    
     /* Set the phase */
     hhash->Phase = HAL_HASH_PHASE_PROCESS;
     
@@ -1121,11 +1125,17 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t
       hhash->State = HAL_HASH_STATE_READY;
       /* Call digest computation complete callback */
       HAL_HASH_DgstCpltCallback(hhash);
+      
+      /* Process Unlocked */
+      __HAL_UNLOCK(hhash);
+      
+      /* Return function status */
+      return HAL_OK;
     }
   }
   if(__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS))
   {
-    if(hhash->HashInCount > 64)
+    if(hhash->HashInCount >= 68)
     {
       inputaddr = (uint32_t)hhash->pHashInBuffPtr;
       /* Write the Input block in the Data IN register */
@@ -1137,7 +1147,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t
       if(hhash->HashITCounter == 0)
       {
         HASH->DIN = *(uint32_t*)inputaddr;
-        
+
         if(hhash->HashInCount >= 68)
         {
           /* Decrement buffer counter */
@@ -1146,8 +1156,11 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t
         }
         else
         {
-          hhash->HashInCount -= 64;
+          hhash->HashInCount = 0;
+          hhash->pHashInBuffPtr+= hhash->HashInCount;
         }
+        /* Set Interrupt counter */
+        hhash->HashITCounter = 1;
       }
       else
       {
@@ -1171,7 +1184,10 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t
       {
         inputcounter = (inputcounter+4-inputcounter%4);
       }
-      
+      else if ((inputcounter < 4) && (inputcounter != 0))
+      {
+        inputcounter = 4;
+      }
       /* Write the Input block in the Data IN register */
       for(buffercounter = 0; buffercounter < inputcounter/4; buffercounter++)
       {
@@ -1182,9 +1198,10 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t
       __HAL_HASH_START_DIGEST();
       /* Reset buffer counter */
       hhash->HashInCount = 0;
+
+     /* Call Input data transfer complete callback */
+     HAL_HASH_InCpltCallback(hhash);
     }
-    /* Call Input data transfer complete callback */
-    HAL_HASH_InCpltCallback(hhash);
   }
   
   /* Process Unlocked */
@@ -1206,11 +1223,11 @@ void HAL_HASHEx_IRQHandler(HASH_HandleTypeDef *hhash)
   {
     
     case HASH_ALGOSELECTION_SHA224:
-       HAL_HASHEx_SHA224_Start_IT(hhash, HAL_NULL, 0, HAL_NULL);
+       HAL_HASHEx_SHA224_Start_IT(hhash, NULL, 0, NULL);
     break;
     
     case HASH_ALGOSELECTION_SHA256:
-      HAL_HASHEx_SHA256_Start_IT(hhash, HAL_NULL, 0, HAL_NULL);
+      HAL_HASHEx_SHA256_Start_IT(hhash, NULL, 0, NULL);
     break;
     
     default:

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hash_ex.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_hash_ex.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of HASH HAL Extension module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hcd.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_hcd.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   HCD HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the USB Peripheral Controller:
@@ -26,8 +26,9 @@
 
     (#)Initialize the HCD low level resources through the HAL_HCD_MspInit() API:
         (##) Enable the HCD/USB Low Level interface clock using the following macros
-             (+++) __OTGFS-OTG_CLK_ENABLE() or __OTGHS-OTG_CLK_ENABLE()
+             (+++) __HAL_RCC_USB_OTG_FS_CLK_ENABLE();
-             (+++) __OTGHSULPI_CLK_ENABLE() For High Speed Mode
+             (+++) __HAL_RCC_USB_OTG_HS_CLK_ENABLE(); (For High Speed Mode)
+             (+++) __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE(); (For High Speed Mode)
            
         (##) Initialize the related GPIO clocks
         (##) Configure HCD pin-out
@@ -77,7 +78,8 @@
   * @{
   */
 
-/** @addtogroup HCD 
+/** @defgroup HCD HCD 
+  * @brief HCD HAL module driver
   * @{
   */
 
@@ -87,8 +89,8 @@
 /* Private define ------------------------------------------------------------*/
 /* Private macro -------------------------------------------------------------*/
 /* Private variables ---------------------------------------------------------*/
-/* Private function ----------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
-/** @addtogroup HCD_Private_Functions
+/** @defgroup HCD_Private_Functions HCD Private Functions
   * @{
   */
 static void HCD_HC_IN_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum);
@@ -100,12 +102,12 @@ static void HCD_Port_IRQHandler(HCD_HandleTypeDef *hhcd);
   */
 
 /* Exported functions --------------------------------------------------------*/
-/** @addtogroup HCD_Exported_Functions
+/** @defgroup HCD_Exported_Functions HCD Exported Functions
   * @{
   */
 
-/** @addtogroup HCD_Exported_Functions_Group1
+/** @defgroup HCD_Exported_Functions_Group1 Initialization and de-initialization functions 
- *  @brief   Initialization and de-initialization functions 
+ *  @brief    Initialization and Configuration functions 
  *
 @verbatim     
  ===============================================================================
@@ -118,14 +120,14 @@ static void HCD_Port_IRQHandler(HCD_HandleTypeDef *hhcd);
   */
 
 /**
-  * @brief  Initialize the host driver
+  * @brief  Initialize the host driver.
   * @param  hhcd: HCD handle
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd)
 { 
   /* Check the HCD handle allocation */
-  if(hhcd == HAL_NULL)
+  if(hhcd == NULL)
   {
     return HAL_ERROR;
   }
@@ -156,7 +158,7 @@ HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd)
 }
 
 /**
-  * @brief  Initialize a host channel
+  * @brief  Initialize a host channel.
   * @param  hhcd: HCD handle
   * @param  ch_num: Channel number.
   *         This parameter can be a value from 1 to 15
@@ -212,7 +214,7 @@ HAL_StatusTypeDef HAL_HCD_HC_Init(HCD_HandleTypeDef *hhcd,
 }
 
 /**
-  * @brief  Halt a host channel
+  * @brief  Halt a host channel.
   * @param  hhcd: HCD handle
   * @param  ch_num: Channel number.
   *         This parameter can be a value from 1 to 15
@@ -230,14 +232,14 @@ HAL_StatusTypeDef HAL_HCD_HC_Halt(HCD_HandleTypeDef *hhcd, uint8_t ch_num)
 }
 
 /**
-  * @brief  DeInitialize the host driver
+  * @brief  DeInitialize the host driver.
   * @param  hhcd: HCD handle
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_HCD_DeInit(HCD_HandleTypeDef *hhcd)
 {
   /* Check the HCD handle allocation */
-  if(hhcd == HAL_NULL)
+  if(hhcd == NULL)
   {
     return HAL_ERROR;
   }
@@ -255,7 +257,7 @@ HAL_StatusTypeDef HAL_HCD_DeInit(HCD_HandleTypeDef *hhcd)
 }
 
 /**
-  * @brief  Initializes the HCD MSP.
+  * @brief  Initialize the HCD MSP.
   * @param  hhcd: HCD handle
   * @retval None
   */
@@ -267,7 +269,7 @@ __weak void  HAL_HCD_MspInit(HCD_HandleTypeDef *hhcd)
 }
 
 /**
-  * @brief  DeInitializes HCD MSP.
+  * @brief  DeInitialize the HCD MSP.
   * @param  hhcd: HCD handle
   * @retval None
   */
@@ -282,14 +284,14 @@ __weak void  HAL_HCD_MspDeInit(HCD_HandleTypeDef *hhcd)
   * @}
   */
 
-/** @addtogroup HCD_Exported_Functions_Group2
+/** @defgroup HCD_Exported_Functions_Group2 Input and Output operation functions
   *  @brief   HCD IO operation functions
   *
 @verbatim
  ===============================================================================
                       ##### IO operation functions #####
  ===============================================================================
-    This subsection provides a set of functions allowing to manage the USB Host Data 
+ [..] This subsection provides a set of functions allowing to manage the USB Host Data 
     Transfer
        
 @endverbatim
@@ -297,7 +299,7 @@ __weak void  HAL_HCD_MspDeInit(HCD_HandleTypeDef *hhcd)
   */
   
 /**                                
-  * @brief  Submit a new URB for processing 
+  * @brief  Submit a new URB for processing. 
   * @param  hhcd: HCD handle
   * @param  ch_num: Channel number.
   *         This parameter can be a value from 1 to 15
@@ -440,7 +442,7 @@ HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd,
 }
 
 /**
-  * @brief  This function handles HCD interrupt request.
+  * @brief  Handle HCD interrupt request.
   * @param  hhcd: HCD handle
   * @retval None
   */
@@ -555,7 +557,7 @@ __weak void HAL_HCD_SOF_Callback(HCD_HandleTypeDef *hhcd)
 }
 
 /**
-  * @brief Connexion Event callback.
+  * @brief Connection Event callback.
   * @param  hhcd: HCD handle
   * @retval None
   */
@@ -567,7 +569,7 @@ __weak void HAL_HCD_Connect_Callback(HCD_HandleTypeDef *hhcd)
 }
 
 /**
-  * @brief  Disconnexion Event callback.
+  * @brief  Disconnection Event callback.
   * @param  hhcd: HCD handle
   * @retval None
   */
@@ -604,8 +606,8 @@ __weak void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd, uint8_t
   * @}
   */
 
-/** @addtogroup HCD_Exported_Functions_Group3
+/** @defgroup HCD_Exported_Functions_Group3 Peripheral Control functions 
- *  @brief   Peripheral State functions 
+ *  @brief   Management functions 
  *
 @verbatim 
  ===============================================================================
@@ -620,7 +622,7 @@ __weak void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd, uint8_t
   */
 
 /**
-  * @brief  Start the host driver
+  * @brief  Start the host driver.
   * @param  hhcd: HCD handle
   * @retval HAL status
   */
@@ -634,7 +636,7 @@ HAL_StatusTypeDef HAL_HCD_Start(HCD_HandleTypeDef *hhcd)
 }
 
 /**
-  * @brief  Stop the host driver
+  * @brief  Stop the host driver.
   * @param  hhcd: HCD handle
   * @retval HAL status
   */
@@ -648,7 +650,7 @@ HAL_StatusTypeDef HAL_HCD_Stop(HCD_HandleTypeDef *hhcd)
 }
 
 /**
-  * @brief  Reset the host port
+  * @brief  Reset the host port.
   * @param  hhcd: HCD handle
   * @retval HAL status
   */
@@ -661,7 +663,7 @@ HAL_StatusTypeDef HAL_HCD_ResetPort(HCD_HandleTypeDef *hhcd)
   * @}
   */
 
-/** @addtogroup HCD_Exported_Functions_Group4
+/** @defgroup HCD_Exported_Functions_Group4 Peripheral State functions 
  *  @brief   Peripheral State functions 
  *
 @verbatim 
@@ -677,7 +679,7 @@ HAL_StatusTypeDef HAL_HCD_ResetPort(HCD_HandleTypeDef *hhcd)
   */
 
 /**
-  * @brief  Return the HCD state
+  * @brief  Return the HCD handle state.
   * @param  hhcd: HCD handle
   * @retval HAL state
   */
@@ -687,7 +689,7 @@ HCD_StateTypeDef HAL_HCD_GetState(HCD_HandleTypeDef *hhcd)
 }
 
 /**
-  * @brief  Return  URB state for a channel
+  * @brief  Return  URB state for a channel.
   * @param  hhcd: HCD handle
   * @param  chnum: Channel number.
   *         This parameter can be a value from 1 to 15
@@ -698,7 +700,7 @@ HCD_StateTypeDef HAL_HCD_GetState(HCD_HandleTypeDef *hhcd)
   *            URB_NOTREADY/
   *            URB_NYET/ 
   *            URB_ERROR/  
-  *            URB_STALL/      
+  *            URB_STALL      
   */
 HCD_URBStateTypeDef HAL_HCD_HC_GetURBState(HCD_HandleTypeDef *hhcd, uint8_t chnum)
 {
@@ -707,7 +709,7 @@ HCD_URBStateTypeDef HAL_HCD_HC_GetURBState(HCD_HandleTypeDef *hhcd, uint8_t chnu
 
 
 /**
-  * @brief  Return the last host transfer size
+  * @brief  Return the last host transfer size.
   * @param  hhcd: HCD handle
   * @param  chnum: Channel number.
   *         This parameter can be a value from 1 to 15
@@ -719,12 +721,12 @@ uint32_t HAL_HCD_HC_GetXferCount(HCD_HandleTypeDef *hhcd, uint8_t chnum)
 }
   
 /**
-  * @brief  Return the Host Channel state
+  * @brief  Return the Host Channel state.
   * @param  hhcd: HCD handle
   * @param  chnum: Channel number.
   *         This parameter can be a value from 1 to 15
   * @retval Host channel state
-  *          This parameter can be one of the these values:
+  *          This parameter can be one of these values:
   *            HC_IDLE/
   *            HC_XFRC/
   *            HC_HALTED/
@@ -733,7 +735,7 @@ uint32_t HAL_HCD_HC_GetXferCount(HCD_HandleTypeDef *hhcd, uint8_t chnum)
   *            HC_STALL/ 
   *            HC_XACTERR/  
   *            HC_BBLERR/  
-  *            HC_DATATGLERR/    
+  *            HC_DATATGLERR    
   */
 HCD_HCStateTypeDef  HAL_HCD_HC_GetState(HCD_HandleTypeDef *hhcd, uint8_t chnum)
 {
@@ -741,7 +743,7 @@ HCD_HCStateTypeDef  HAL_HCD_HC_GetState(HCD_HandleTypeDef *hhcd, uint8_t chnum)
 }
 
 /**
-  * @brief  Return the current Host frame number
+  * @brief  Return the current Host frame number.
   * @param  hhcd: HCD handle
   * @retval Current Host frame number
   */
@@ -751,7 +753,7 @@ uint32_t HAL_HCD_GetCurrentFrame(HCD_HandleTypeDef *hhcd)
 }
 
 /**
-  * @brief  Return the Host enumeration speed
+  * @brief  Return the Host enumeration speed.
   * @param  hhcd: HCD handle
   * @retval Enumeration speed
   */
@@ -759,6 +761,7 @@ uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd)
 {
   return (USB_GetHostSpeed(hhcd->Instance));
 }
+
 /**
   * @}
   */
@@ -771,7 +774,7 @@ uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd)
   * @{
   */
 /**
-  * @brief  This function handles Host Channel IN interrupt requests.
+  * @brief  Handle Host Channel IN interrupt requests.
   * @param  hhcd: HCD handle
   * @param  chnum: Channel number.
   *         This parameter can be a value from 1 to 15
@@ -780,6 +783,7 @@ uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd)
 static void HCD_HC_IN_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum)
 {
   USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
+  uint32_t tmpreg = 0;
   
   if ((USBx_HC(chnum)->HCINT) &  USB_OTG_HCINT_AHBERR)
   {
@@ -874,8 +878,10 @@ static void HCD_HC_IN_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum)
       }
       
       /* re-activate the channel  */
-      USBx_HC(chnum)->HCCHAR &= ~USB_OTG_HCCHAR_CHDIS;         
+      tmpreg = USBx_HC(chnum)->HCCHAR;
-      USBx_HC(chnum)->HCCHAR |= USB_OTG_HCCHAR_CHENA;      
+      tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
+      tmpreg |= USB_OTG_HCCHAR_CHENA;
+      USBx_HC(chnum)->HCCHAR = tmpreg;
     }
     __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_CHH);
     HAL_HCD_HC_NotifyURBChange_Callback(hhcd, chnum, hhcd->hc[chnum].urb_state);
@@ -899,10 +905,11 @@ static void HCD_HC_IN_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum)
     else if  ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL)||
               (hhcd->hc[chnum].ep_type == EP_TYPE_BULK))
     {
-      /* re-activate the channel  */
+      /* re-activate the channel */
-      USBx_HC(chnum)->HCCHAR &= ~USB_OTG_HCCHAR_CHDIS;         
+      tmpreg = USBx_HC(chnum)->HCCHAR;
-      USBx_HC(chnum)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
+      tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
-      
+      tmpreg |= USB_OTG_HCCHAR_CHENA;
+      USBx_HC(chnum)->HCCHAR = tmpreg;
     }
     hhcd->hc[chnum].state = HC_NAK;
     __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NAK);
@@ -910,7 +917,7 @@ static void HCD_HC_IN_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum)
 }
 
 /**
-  * @brief  This function handles Host Channel OUT interrupt requests.
+  * @brief  Handle Host Channel OUT interrupt requests.
   * @param  hhcd: HCD handle
   * @param  chnum: Channel number.
   *         This parameter can be a value from 1 to 15
@@ -919,6 +926,7 @@ static void HCD_HC_IN_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum)
 static void HCD_HC_OUT_IRQHandler  (HCD_HandleTypeDef *hhcd, uint8_t chnum)
 {
   USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
+  uint32_t tmpreg = 0;
   
   if ((USBx_HC(chnum)->HCINT) &  USB_OTG_HCINT_AHBERR)
   {
@@ -1042,8 +1050,10 @@ static void HCD_HC_OUT_IRQHandler  (HCD_HandleTypeDef *hhcd, uint8_t chnum)
       }
       
       /* re-activate the channel  */
-      USBx_HC(chnum)->HCCHAR &= ~USB_OTG_HCCHAR_CHDIS;         
+      tmpreg = USBx_HC(chnum)->HCCHAR;
-      USBx_HC(chnum)->HCCHAR |= USB_OTG_HCCHAR_CHENA;      
+      tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
+      tmpreg |= USB_OTG_HCCHAR_CHENA;
+      USBx_HC(chnum)->HCCHAR = tmpreg;
     }
     
     __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_CHH);
@@ -1052,7 +1062,7 @@ static void HCD_HC_OUT_IRQHandler  (HCD_HandleTypeDef *hhcd, uint8_t chnum)
 } 
 
 /**
-  * @brief  This function handles Rx Queue Level interrupt requests.
+  * @brief  Handle Rx Queue Level interrupt requests.
   * @param  hhcd: HCD handle
   * @retval None
   */
@@ -1063,6 +1073,7 @@ static void HCD_RXQLVL_IRQHandler(HCD_HandleTypeDef *hhcd)
   uint32_t pktsts;
   uint32_t pktcnt; 
   uint32_t temp = 0;
+  uint32_t tmpreg = 0;
   
   temp = hhcd->Instance->GRXSTSP;
   channelnum = temp &  USB_OTG_GRXSTSP_EPNUM;  
@@ -1085,8 +1096,10 @@ static void HCD_RXQLVL_IRQHandler(HCD_HandleTypeDef *hhcd)
       if((USBx_HC(channelnum)->HCTSIZ & USB_OTG_HCTSIZ_PKTCNT) > 0)
       {
         /* re-activate the channel when more packets are expected */
-        USBx_HC(channelnum)->HCCHAR &= ~USB_OTG_HCCHAR_CHDIS; 
+        tmpreg = USBx_HC(channelnum)->HCCHAR;
-        USBx_HC(channelnum)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
+        tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
+        tmpreg |= USB_OTG_HCCHAR_CHENA;
+        USBx_HC(channelnum)->HCCHAR = tmpreg;
         hhcd->hc[channelnum].toggle_in ^= 1;
       }
     }
@@ -1102,7 +1115,7 @@ static void HCD_RXQLVL_IRQHandler(HCD_HandleTypeDef *hhcd)
 }
 
 /**
-  * @brief  This function handles Host Port interrupt requests.
+  * @brief  Handle Host Port interrupt requests.
   * @param  hhcd: HCD handle
   * @retval None
   */
@@ -1182,6 +1195,10 @@ static void HCD_Port_IRQHandler  (HCD_HandleTypeDef *hhcd)
   USBx_HPRT0 = hprt0_dup;
 }
 
+/**
+  * @}
+  */
+
 /**
   * @}
   */

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hcd.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_hcd.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of HCD HAL module.
   ******************************************************************************
   * @attention
@@ -50,8 +50,7 @@
   * @{
   */
 
-/** @defgroup HCD HCD
+/** @addtogroup HCD
-  * @brief HCD HAL module driver
   * @{
   */
 
@@ -105,6 +104,7 @@ typedef struct
 /** @defgroup HCD_Exported_Constants HCD Exported Constants
   * @{
   */
+
 /** @defgroup HCD_Speed HCD Speed
   * @{
   */
@@ -150,11 +150,12 @@ typedef struct
   */
 
 /* Exported functions --------------------------------------------------------*/
-/** @defgroup HCD_Exported_Functions HCD Exported Functions
+/** @addtogroup HCD_Exported_Functions HCD Exported Functions
   * @{
   */
 
-/** @defgroup HCD_Exported_Functions_Group1 Initialization and de-initialization functions
+/* Initialization/de-initialization functions  ********************************/
+/** @addtogroup HCD_Exported_Functions_Group1 Initialization and de-initialization functions
   * @{
   */
 HAL_StatusTypeDef   HAL_HCD_Init(HCD_HandleTypeDef *hhcd);
@@ -168,13 +169,15 @@ HAL_StatusTypeDef   HAL_HCD_HC_Init(HCD_HandleTypeDef *hhcd,
                                     uint16_t mps);
 
 HAL_StatusTypeDef   HAL_HCD_HC_Halt(HCD_HandleTypeDef *hhcd, uint8_t ch_num);
+
 void                HAL_HCD_MspInit(HCD_HandleTypeDef *hhcd);
 void                HAL_HCD_MspDeInit(HCD_HandleTypeDef *hhcd);
 /**
   * @}
   */
 
-/** @defgroup HCD_Exported_Functions_Group2 IO operation functions
+/* I/O operation functions  ***************************************************/
+/** @addtogroup HCD_Exported_Functions_Group2 IO operation functions
   * @{
   */
 HAL_StatusTypeDef   HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd,
@@ -198,7 +201,8 @@ void                HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd,
   * @}
   */
 
-/** @defgroup HCD_Exported_Functions_Group3 Peripheral Control functions
+/* Peripheral Control functions  **********************************************/
+/** @addtogroup HCD_Exported_Functions_Group3 Peripheral Control functions
   * @{
   */
 HAL_StatusTypeDef   HAL_HCD_ResetPort(HCD_HandleTypeDef *hhcd);
@@ -208,7 +212,8 @@ HAL_StatusTypeDef   HAL_HCD_Stop(HCD_HandleTypeDef *hhcd);
   * @}
   */
 
-/** @defgroup HCD_Exported_Functions_Group4 Peripheral State functions
+/* Peripheral State functions  ************************************************/
+/** @addtogroup HCD_Exported_Functions_Group4 Peripheral State functions
   * @{
   */
 HCD_StateTypeDef    HAL_HCD_GetState(HCD_HandleTypeDef *hhcd);
@@ -247,24 +252,6 @@ uint32_t            HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd);
   * @}
   */
 
-/* Private functions prototypes ----------------------------------------------*/
-/** @defgroup HCD_Private_Functions_Prototypes HCD Private Functions Prototypes
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/* Private functions ---------------------------------------------------------*/
-/** @defgroup HCD_Private_Functions HCD Private Functions
-  * @{
-  */
-
-/**
-  * @}
-  */
-
 /**
   * @}
   */

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2c.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_i2c.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   I2C HAL module driver.
   *          This file provides firmware functions to manage the following
   *          functionalities of the Inter Integrated Circuit (I2C) peripheral:
@@ -201,6 +201,7 @@
   */    
 #define I2C_TIMEOUT_FLAG          ((uint32_t)35)     /* 35 ms */
 #define I2C_TIMEOUT_ADDR_SLAVE    ((uint32_t)10000)  /* 10 s  */
+#define I2C_TIMEOUT_BUSY_FLAG     ((uint32_t)10000)  /* 10 s  */
 /**
   * @}
   */
@@ -291,7 +292,7 @@ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
   uint32_t pclk1 = 0;
 
   /* Check the I2C handle allocation */
-  if(hi2c == HAL_NULL)
+  if(hi2c == NULL)
   {
     return HAL_ERROR;
   }
@@ -368,7 +369,7 @@ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
 HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
 {
   /* Check the I2C handle allocation */
-  if(hi2c == HAL_NULL)
+  if(hi2c == NULL)
   {
     return HAL_ERROR;
   }
@@ -497,18 +498,22 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevA
 {
   if(hi2c->State == HAL_I2C_STATE_READY)
   {
-    if((pData == HAL_NULL) || (Size == 0))
+    if((pData == NULL) || (Size == 0))
     {
       return  HAL_ERROR;
     }
 
-    if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
+    /* Wait until BUSY flag is reset */
+    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
     {
       return HAL_BUSY;
     }
 
     /* Process Locked */
     __HAL_LOCK(hi2c);
+    
+    /* Disable Pos */
+    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
 
     hi2c->State = HAL_I2C_STATE_BUSY_TX;
     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
@@ -562,12 +567,6 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevA
     /* Generate Stop */
     hi2c->Instance->CR1 |= I2C_CR1_STOP;
 
-    /* Wait until BUSY flag is reset */
-    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-
     hi2c->State = HAL_I2C_STATE_READY;
 
     /* Process Unlocked */
@@ -595,18 +594,22 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAd
 {
   if(hi2c->State == HAL_I2C_STATE_READY)
   {
-    if((pData == HAL_NULL) || (Size == 0))
+    if((pData == NULL) || (Size == 0))
     {
       return  HAL_ERROR;
     }
 
-    if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
+    /* Wait until BUSY flag is reset */
+    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
     {
       return HAL_BUSY;
     }
-
+    
     /* Process Locked */
     __HAL_LOCK(hi2c);
+    
+    /* Disable Pos */
+    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
 
     hi2c->State = HAL_I2C_STATE_BUSY_RX;
     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
@@ -751,15 +754,6 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAd
       }
     }
 
-    /* Disable Pos */
-    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
-    /* Wait until BUSY flag is reset */
-    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-
     hi2c->State = HAL_I2C_STATE_READY;
 
     /* Process Unlocked */
@@ -786,18 +780,22 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData
 {
   if(hi2c->State == HAL_I2C_STATE_READY)
   {
-    if((pData == HAL_NULL) || (Size == 0))
+    if((pData == NULL) || (Size == 0))
     {
       return  HAL_ERROR;
     }
 
-    if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
+    /* Wait until BUSY flag is reset */
+    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
     {
       return HAL_BUSY;
     }
 
     /* Process Locked */
     __HAL_LOCK(hi2c);
+    
+    /* Disable Pos */
+    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
 
     hi2c->State = HAL_I2C_STATE_BUSY_TX;
     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
@@ -859,12 +857,6 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData
     /* Disable Address Acknowledge */
     hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
 
-    /* Wait until BUSY flag is reset */
-    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-
     hi2c->State = HAL_I2C_STATE_READY;
 
     /* Process Unlocked */
@@ -891,18 +883,22 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData,
 {
   if(hi2c->State == HAL_I2C_STATE_READY)
   {
-    if((pData == HAL_NULL) || (Size == 0))
+    if((pData == NULL) || (Size == 0))
     {
       return  HAL_ERROR;
     }
 
-    if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
+    /* Wait until BUSY flag is reset */
+    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
     {
       return HAL_BUSY;
     }
 
     /* Process Locked */
     __HAL_LOCK(hi2c);
+    
+    /* Disable Pos */
+    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
 
     hi2c->State = HAL_I2C_STATE_BUSY_RX;
     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
@@ -951,12 +947,6 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData,
     /* Disable Address Acknowledge */
     hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
 
-    /* Wait until BUSY flag is reset */
-    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-
     hi2c->State = HAL_I2C_STATE_READY;
 
     /* Process Unlocked */
@@ -983,18 +973,22 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t D
 {
   if(hi2c->State == HAL_I2C_STATE_READY)
   {
-    if((pData == HAL_NULL) || (Size == 0))
+    if((pData == NULL) || (Size == 0))
     {
       return  HAL_ERROR;
     }
 
-    if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
+    /* Wait until BUSY flag is reset */
+    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
     {
       return HAL_BUSY;
     }
 
     /* Process Locked */
     __HAL_LOCK(hi2c);
+    
+    /* Disable Pos */
+    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
 
     hi2c->State = HAL_I2C_STATE_BUSY_TX;
     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
@@ -1054,18 +1048,22 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t De
 {
   if(hi2c->State == HAL_I2C_STATE_READY)
   {
-    if((pData == HAL_NULL) || (Size == 0))
+    if((pData == NULL) || (Size == 0))
     {
       return  HAL_ERROR;
     }
 
-    if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
+    /* Wait until BUSY flag is reset */
+    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
     {
       return HAL_BUSY;
     }
 
     /* Process Locked */
     __HAL_LOCK(hi2c);
+    
+    /* Disable Pos */
+    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
 
     hi2c->State = HAL_I2C_STATE_BUSY_RX;
     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
@@ -1152,18 +1150,22 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pD
 {
   if(hi2c->State == HAL_I2C_STATE_READY)
   {
-    if((pData == HAL_NULL) || (Size == 0))
+    if((pData == NULL) || (Size == 0))
     {
       return  HAL_ERROR;
     }
 
-    if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
+    /* Wait until BUSY flag is reset */
+    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
     {
       return HAL_BUSY;
     }
 
     /* Process Locked */
     __HAL_LOCK(hi2c);
+    
+    /* Disable Pos */
+    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
 
     hi2c->State = HAL_I2C_STATE_BUSY_TX;
     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
@@ -1205,18 +1207,22 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pDa
 {
   if(hi2c->State == HAL_I2C_STATE_READY)
   {
-    if((pData == HAL_NULL) || (Size == 0))
+    if((pData == NULL) || (Size == 0))
     {
       return  HAL_ERROR;
     }
 
-    if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
+    /* Wait until BUSY flag is reset */
+    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
     {
       return HAL_BUSY;
     }
 
     /* Process Locked */
     __HAL_LOCK(hi2c);
+    
+    /* Disable Pos */
+    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
 
     hi2c->State = HAL_I2C_STATE_BUSY_RX;
     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
@@ -1259,18 +1265,22 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t
 {
   if(hi2c->State == HAL_I2C_STATE_READY)
   {
-    if((pData == HAL_NULL) || (Size == 0))
+    if((pData == NULL) || (Size == 0))
     {
       return  HAL_ERROR;
     }
 
-    if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
+    /* Wait until BUSY flag is reset */
+    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
     {
       return HAL_BUSY;
     }
 
     /* Process Locked */
     __HAL_LOCK(hi2c);
+    
+    /* Disable Pos */
+    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
 
     hi2c->State = HAL_I2C_STATE_BUSY_TX;
     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
@@ -1335,18 +1345,22 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t D
 {
   if(hi2c->State == HAL_I2C_STATE_READY)
   {
-    if((pData == HAL_NULL) || (Size == 0))
+    if((pData == NULL) || (Size == 0))
     {
       return  HAL_ERROR;
     }
 
-    if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
+    /* Wait until BUSY flag is reset */
+    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
     {
       return HAL_BUSY;
     }
 
     /* Process Locked */
     __HAL_LOCK(hi2c);
+    
+    /* Disable Pos */
+    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
 
     hi2c->State = HAL_I2C_STATE_BUSY_RX;
     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
@@ -1421,18 +1435,22 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *p
 {
   if(hi2c->State == HAL_I2C_STATE_READY)
   {
-    if((pData == HAL_NULL) || (Size == 0))
+    if((pData == NULL) || (Size == 0))
     {
       return  HAL_ERROR;
     }
 
-    if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
+    /* Wait until BUSY flag is reset */
+    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
     {
       return HAL_BUSY;
     }
 
     /* Process Locked */
     __HAL_LOCK(hi2c);
+    
+    /* Disable Pos */
+    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
 
     hi2c->State = HAL_I2C_STATE_BUSY_TX;
     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
@@ -1506,18 +1524,22 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pD
 {
   if(hi2c->State == HAL_I2C_STATE_READY)
   {
-    if((pData == HAL_NULL) || (Size == 0))
+    if((pData == NULL) || (Size == 0))
     {
       return  HAL_ERROR;
     }
 
-    if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
+    /* Wait until BUSY flag is reset */
+    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
     {
       return HAL_BUSY;
     }
 
     /* Process Locked */
     __HAL_LOCK(hi2c);
+    
+    /* Disable Pos */
+    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
 
     hi2c->State = HAL_I2C_STATE_BUSY_RX;
     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
@@ -1579,18 +1601,22 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress
 
   if(hi2c->State == HAL_I2C_STATE_READY)
   {
-    if((pData == HAL_NULL) || (Size == 0))
+    if((pData == NULL) || (Size == 0))
     {
       return  HAL_ERROR;
     }
 
-    if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
+    /* Wait until BUSY flag is reset */
+    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
     {
       return HAL_BUSY;
     }
 
     /* Process Locked */
     __HAL_LOCK(hi2c);
+    
+    /* Disable Pos */
+    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
 
     hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
@@ -1641,12 +1667,6 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress
     /* Generate Stop */
     hi2c->Instance->CR1 |= I2C_CR1_STOP;
 
-    /* Wait until BUSY flag is reset */
-    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-
     hi2c->State = HAL_I2C_STATE_READY;
 
     /* Process Unlocked */
@@ -1679,18 +1699,22 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress,
 
   if(hi2c->State == HAL_I2C_STATE_READY)
   {
-    if((pData == HAL_NULL) || (Size == 0))
+    if((pData == NULL) || (Size == 0))
     {
       return  HAL_ERROR;
     }
 
-    if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
+    /* Wait until BUSY flag is reset */
+    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
     {
       return HAL_BUSY;
     }
 
     /* Process Locked */
     __HAL_LOCK(hi2c);
+    
+    /* Disable Pos */
+    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
 
     hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
@@ -1832,15 +1856,6 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress,
       }
     }
 
-    /* Disable Pos */
-    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
-    /* Wait until BUSY flag is reset */
-    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-
     hi2c->State = HAL_I2C_STATE_READY;
 
     /* Process Unlocked */
@@ -1871,18 +1886,22 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddr
 
   if(hi2c->State == HAL_I2C_STATE_READY)
   {
-    if((pData == HAL_NULL) || (Size == 0))
+    if((pData == NULL) || (Size == 0))
     {
       return  HAL_ERROR;
     }
 
-    if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
+    /* Wait until BUSY flag is reset */
+    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
     {
       return HAL_BUSY;
     }
 
     /* Process Locked */
     __HAL_LOCK(hi2c);
+    
+    /* Disable Pos */
+    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
 
     hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
@@ -1944,18 +1963,22 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddre
 
   if(hi2c->State == HAL_I2C_STATE_READY)
   {
-    if((pData == HAL_NULL) || (Size == 0))
+    if((pData == NULL) || (Size == 0))
     {
       return  HAL_ERROR;
     }
 
-    if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
+    /* Wait until BUSY flag is reset */
+    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
     {
       return HAL_BUSY;
     }
 
     /* Process Locked */
     __HAL_LOCK(hi2c);
+    
+    /* Disable Pos */
+    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
 
     hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
@@ -2047,18 +2070,22 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAdd
 
   if(hi2c->State == HAL_I2C_STATE_READY)
   {
-    if((pData == HAL_NULL) || (Size == 0))
+    if((pData == NULL) || (Size == 0))
     {
       return  HAL_ERROR;
     }
 
-    if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
+    /* Wait until BUSY flag is reset */
+    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
     {
       return HAL_BUSY;
     }
 
     /* Process Locked */
     __HAL_LOCK(hi2c);
+    
+    /* Disable Pos */
+    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
 
     hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
@@ -2125,18 +2152,22 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddr
 
   if(hi2c->State == HAL_I2C_STATE_READY)
   {
-    if((pData == HAL_NULL) || (Size == 0))
+    if((pData == NULL) || (Size == 0))
     {
       return  HAL_ERROR;
     }
 
-    if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
+    /* Wait until BUSY flag is reset */
+    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
     {
       return HAL_BUSY;
     }
 
     /* Process Locked */
     __HAL_LOCK(hi2c);
+    
+    /* Disable Pos */
+    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
 
     hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
@@ -2215,13 +2246,17 @@ HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAdd
 
   if(hi2c->State == HAL_I2C_STATE_READY)
   {
-    if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
+    /* Wait until BUSY flag is reset */
+    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
     {
       return HAL_BUSY;
     }
 
     /* Process Locked */
     __HAL_LOCK(hi2c);
+    
+    /* Disable Pos */
+    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
 
     hi2c->State = HAL_I2C_STATE_BUSY;
     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
@@ -2270,7 +2305,7 @@ HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAdd
         __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
 
         /* Wait until BUSY flag is reset */
-        if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
+        if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
         {
           return HAL_TIMEOUT;
         }
@@ -2291,10 +2326,11 @@ HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAdd
         __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
 
         /* Wait until BUSY flag is reset */
-        if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
+        if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
         {
           return HAL_TIMEOUT;
         }
+
       }
     }while(I2C_Trials++ < Trials);
 
@@ -2667,12 +2703,6 @@ static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
     /* Generate Stop */
     hi2c->Instance->CR1 |= I2C_CR1_STOP;
 
-    /* Wait until BUSY flag is reset */
-    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-
     if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX)
     {
       hi2c->State = HAL_I2C_STATE_READY;
@@ -2720,15 +2750,6 @@ static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
     (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
     hi2c->XferCount--;
 
-    /* Wait until BUSY flag is reset */
-    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-
-    /* Disable Pos */
-    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-    
     if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)
     {
       hi2c->State = HAL_I2C_STATE_READY;
@@ -2778,15 +2799,6 @@ static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
     /* Disable EVT and ERR interrupt */
     __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
 
-    /* Wait until BUSY flag is reset */
-    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-
-    /* Disable Pos */
-    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-    
     if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)
     {
       hi2c->State = HAL_I2C_STATE_READY;
@@ -2908,12 +2920,6 @@ static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
   /* Disable Acknowledge */
   hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
 
-  /* Wait until BUSY flag is reset */
-  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
-  {
-    return HAL_TIMEOUT;
-  }
-
   hi2c->State = HAL_I2C_STATE_READY;
 
   HAL_I2C_SlaveRxCpltCallback(hi2c);
@@ -2937,12 +2943,6 @@ static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
   /* Disable Acknowledge */
   hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
 
-  /* Wait until BUSY flag is reset */
-  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
-  {
-    return HAL_TIMEOUT;
-  }
-
   hi2c->State = HAL_I2C_STATE_READY;
 
   HAL_I2C_SlaveTxCpltCallback(hi2c);
@@ -3303,12 +3303,6 @@ static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma)
 
   hi2c->XferCount = 0;
 
-  /* Wait until BUSY flag is reset */
-  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
-  {
-    hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-  }
-
   hi2c->State = HAL_I2C_STATE_READY;
 
   /* Check if Errors has been detected during transfer */
@@ -3348,12 +3342,6 @@ static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma)
 
   hi2c->XferCount = 0;
 
-  /* Wait until BUSY flag is reset */
-  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
-  {
-    hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-  }
-
   hi2c->State = HAL_I2C_STATE_READY;
 
   /* Check if Errors has been detected during transfer */
@@ -3376,26 +3364,20 @@ static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma)
 {
   I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
 
+  /* Disable Acknowledge */
+  hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
+  
   /* Generate Stop */
   hi2c->Instance->CR1 |= I2C_CR1_STOP;
 
   /* Disable Last DMA */
   hi2c->Instance->CR2 &= ~I2C_CR2_LAST;
 
-  /* Disable Acknowledge */
-  hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
-
   /* Disable DMA Request */
   hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
 
   hi2c->XferCount = 0;
 
-  /* Wait until BUSY flag is reset */
-  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
-  {
-    hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-  }
-
   hi2c->State = HAL_I2C_STATE_READY;
 
   /* Check if Errors has been detected during transfer */
@@ -3435,12 +3417,6 @@ static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma)
 
   hi2c->XferCount = 0;
 
-  /* Wait until BUSY flag is reset */
-  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
-  {
-    hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-  }
-
   hi2c->State = HAL_I2C_STATE_READY;
 
   /* Check if Errors has been detected during transfer */
@@ -3477,12 +3453,6 @@ static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma)
 
   hi2c->XferCount = 0;
 
-  /* Wait until BUSY flag is reset */
-  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
-  {
-    hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-  }
-
   hi2c->State = HAL_I2C_STATE_READY;
 
   /* Check if Errors has been detected during transfer */
@@ -3505,26 +3475,20 @@ static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma)
 {
   I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
 
+  /* Disable Acknowledge */
+  hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
+  
   /* Generate Stop */
   hi2c->Instance->CR1 |= I2C_CR1_STOP;
 
   /* Disable Last DMA */
   hi2c->Instance->CR2 &= ~I2C_CR2_LAST;
 
-  /* Disable Acknowledge */
-  hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
-
   /* Disable DMA Request */
   hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
 
   hi2c->XferCount = 0;
 
-  /* Wait until BUSY flag is reset */
-  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
-  {
-    hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-  }
-
   hi2c->State = HAL_I2C_STATE_READY;
 
   /* Check if Errors has been detected during transfer */

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2c.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_i2c.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of I2C HAL module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2c_ex.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_i2c_ex.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   I2C Extension HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of I2C extension peripheral:

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2c_ex.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_i2c_ex.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of I2C HAL Extension module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2s.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_i2s.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   I2S HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Integrated Interchip Sound (I2S) peripheral:
@@ -209,7 +209,7 @@ __weak HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
   uint32_t tmp = 0, i2sclk = 0;
   
   /* Check the I2S handle allocation */
-  if(hi2s == HAL_NULL)
+  if(hi2s == NULL)
   {
     return HAL_ERROR;
   }
@@ -330,7 +330,7 @@ __weak HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
 HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
 {
   /* Check the I2S handle allocation */
-  if(hi2s == HAL_NULL)
+  if(hi2s == NULL)
   {
     return HAL_ERROR;
   }
@@ -438,7 +438,7 @@ HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
 {
   uint32_t tmp1 = 0, tmp2 = 0;  
-  if((pData == HAL_NULL ) || (Size == 0)) 
+  if((pData == NULL ) || (Size == 0)) 
   {
     return  HAL_ERROR;
   }
@@ -480,13 +480,16 @@ HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uin
       {
         return HAL_TIMEOUT;
       }
-    } 
-    /* Wait until Busy flag is reset */
-    if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_BSY, SET, Timeout) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
     }
-
+    /* Check if Slave mode is selected */
+    if(((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_TX) || ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_RX))
+    {
+      /* Wait until Busy flag is reset */
+      if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_BSY, SET, Timeout) != HAL_OK)
+      {
+        return HAL_TIMEOUT;
+      }
+    }
     hi2s->State = HAL_I2S_STATE_READY; 
     
     /* Process Unlocked */
@@ -520,7 +523,7 @@ HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uin
 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
 {
   uint32_t tmp1 = 0, tmp2 = 0;   
-  if((pData == HAL_NULL ) || (Size == 0)) 
+  if((pData == NULL ) || (Size == 0)) 
   {
     return  HAL_ERROR;
   }
@@ -605,7 +608,7 @@ HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData,
   uint32_t tmp1 = 0, tmp2 = 0;     
   if(hi2s->State == HAL_I2S_STATE_READY)
   {
-    if((pData == HAL_NULL) || (Size == 0)) 
+    if((pData == NULL) || (Size == 0)) 
     {
       return  HAL_ERROR;
     }
@@ -673,7 +676,7 @@ HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, u
   uint32_t tmp1 = 0, tmp2 = 0;     
   if(hi2s->State == HAL_I2S_STATE_READY)
   {
-    if((pData == HAL_NULL) || (Size == 0)) 
+    if((pData == NULL) || (Size == 0)) 
     {
       return  HAL_ERROR;
     }
@@ -739,7 +742,7 @@ HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData,
   uint32_t *tmp;
   uint32_t tmp1 = 0, tmp2 = 0;     
   
-  if((pData == HAL_NULL) || (Size == 0)) 
+  if((pData == NULL) || (Size == 0)) 
   {
     return  HAL_ERROR;
   }
@@ -824,7 +827,7 @@ HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData,
   uint32_t *tmp;
   uint32_t tmp1 = 0, tmp2 = 0;  
   
-  if((pData == HAL_NULL) || (Size == 0))
+  if((pData == NULL) || (Size == 0))
   {
     return  HAL_ERROR;
   }
@@ -1002,12 +1005,12 @@ __weak HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s)
   hi2s->Instance->CR2 &= ~SPI_CR2_RXDMAEN;
 
   /* Abort the I2S DMA Stream tx */
-  if(hi2s->hdmatx != HAL_NULL)
+  if(hi2s->hdmatx != NULL)
   {
     HAL_DMA_Abort(hi2s->hdmatx);
   }
   /* Abort the I2S DMA Stream rx */
-  if(hi2s->hdmarx != HAL_NULL)
+  if(hi2s->hdmarx != NULL)
   {
     HAL_DMA_Abort(hi2s->hdmarx);
   }

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2s.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_i2s.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of I2S HAL module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2s_ex.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_i2s_ex.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   I2S HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of I2S extension peripheral:
@@ -188,7 +188,7 @@ HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
   uint32_t tmp = 0, i2sclk = 0;
   
   /* Check the I2S handle allocation */
-  if(hi2s == HAL_NULL)
+  if(hi2s == NULL)
   {
     return HAL_ERROR;
   }
@@ -351,7 +351,7 @@ HAL_StatusTypeDef HAL_I2SEx_TransmitReceive(I2S_HandleTypeDef *hi2s, uint16_t *p
   uint32_t tickstart = 0;
   uint32_t tmp1 = 0, tmp2 = 0;
  
-  if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0)) 
+  if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) 
   {
     return  HAL_ERROR;
   }
@@ -525,7 +525,7 @@ HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_IT(I2S_HandleTypeDef *hi2s, uint16_t
   
   if(hi2s->State == HAL_I2S_STATE_READY)
   {
-    if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0)) 
+    if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) 
     {
       return  HAL_ERROR;
     }
@@ -649,7 +649,7 @@ HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_DMA(I2S_HandleTypeDef *hi2s, uint16_
   uint32_t *tmp;
   uint32_t tmp1 = 0, tmp2 = 0;
     
-  if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0)) 
+  if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) 
   {
     return  HAL_ERROR;
   }
@@ -902,12 +902,12 @@ HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s)
   }
   
   /* Abort the I2S DMA Stream tx */
-  if(hi2s->hdmatx != HAL_NULL)
+  if(hi2s->hdmatx != NULL)
   {
     HAL_DMA_Abort(hi2s->hdmatx);
   }
   /* Abort the I2S DMA Stream rx */
-  if(hi2s->hdmarx != HAL_NULL)
+  if(hi2s->hdmarx != NULL)
   {
     HAL_DMA_Abort(hi2s->hdmarx);
   }

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2s_ex.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_i2s_ex.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of I2S HAL module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_irda.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_irda.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   IRDA HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the IrDA SIR ENDEC block (IrDA):
@@ -213,7 +213,7 @@ static HAL_StatusTypeDef IRDA_WaitOnFlagUntilTimeout(IRDA_HandleTypeDef *hirda,
 HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda)
 {
   /* Check the IRDA handle allocation */
-  if(hirda == HAL_NULL)
+  if(hirda == NULL)
   {
     return HAL_ERROR;
   }
@@ -273,7 +273,7 @@ HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda)
 HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda)
 {
   /* Check the IRDA handle allocation */
-  if(hirda == HAL_NULL)
+  if(hirda == NULL)
   {
     return HAL_ERROR;
   }
@@ -396,7 +396,7 @@ HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, u
   tmp1 = hirda->State; 
   if((tmp1 == HAL_IRDA_STATE_READY) || (tmp1 == HAL_IRDA_STATE_BUSY_RX))
   {
-    if((pData == HAL_NULL) || (Size == 0)) 
+    if((pData == NULL) || (Size == 0)) 
     {
       return  HAL_ERROR;
     }
@@ -488,7 +488,7 @@ HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, ui
   tmp1 = hirda->State; 
   if((tmp1 == HAL_IRDA_STATE_READY) || (tmp1 == HAL_IRDA_STATE_BUSY_TX))
   {
-    if((pData == HAL_NULL) || (Size == 0)) 
+    if((pData == NULL) || (Size == 0)) 
     {
       return  HAL_ERROR;
     }
@@ -580,7 +580,7 @@ HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData
   tmp1 = hirda->State;   
   if((tmp1 == HAL_IRDA_STATE_READY) || (tmp1 == HAL_IRDA_STATE_BUSY_RX))
   {
-    if((pData == HAL_NULL) || (Size == 0)) 
+    if((pData == NULL) || (Size == 0)) 
     {
       return HAL_ERROR;
     }
@@ -632,7 +632,7 @@ HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData,
   tmp1 = hirda->State;   
   if((tmp1 == HAL_IRDA_STATE_READY) || (tmp1 == HAL_IRDA_STATE_BUSY_TX))
   {
-    if((pData == HAL_NULL) || (Size == 0)) 
+    if((pData == NULL) || (Size == 0)) 
     {
       return HAL_ERROR;
     }
@@ -689,7 +689,7 @@ HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pDat
   tmp1 = hirda->State;   
   if((tmp1 == HAL_IRDA_STATE_READY) || (tmp1 == HAL_IRDA_STATE_BUSY_RX))
   {
-    if((pData == HAL_NULL) || (Size == 0)) 
+    if((pData == NULL) || (Size == 0)) 
     {
       return HAL_ERROR;
     }
@@ -759,7 +759,7 @@ HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData
   tmp1 = hirda->State; 
   if((tmp1 == HAL_IRDA_STATE_READY) || (tmp1 == HAL_IRDA_STATE_BUSY_TX))
   {
-    if((pData == HAL_NULL) || (Size == 0)) 
+    if((pData == NULL) || (Size == 0)) 
     {
       return HAL_ERROR;
     }
@@ -912,12 +912,12 @@ HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda)
   hirda->Instance->CR3 &= ~USART_CR3_DMAR;
   
   /* Abort the UART DMA tx Stream */
-  if(hirda->hdmatx != HAL_NULL)
+  if(hirda->hdmatx != NULL)
   {
     HAL_DMA_Abort(hirda->hdmatx);
   }
   /* Abort the UART DMA rx Stream */
-  if(hirda->hdmarx != HAL_NULL)
+  if(hirda->hdmarx != NULL)
   {
     HAL_DMA_Abort(hirda->hdmarx);
   }

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_irda.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_irda.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of IRDA HAL module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_iwdg.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_iwdg.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   IWDG HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Independent Watchdog (IWDG) peripheral:
@@ -168,7 +168,7 @@
 HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
 {
   /* Check the IWDG handle allocation */
-  if(hiwdg == HAL_NULL)
+  if(hiwdg == NULL)
   {
     return HAL_ERROR;
   }

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_iwdg.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_iwdg.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of IWDG HAL module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_ltdc.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_ltdc.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   LTDC HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the LTDC peripheral:
@@ -150,7 +150,7 @@ HAL_StatusTypeDef HAL_LTDC_Init(LTDC_HandleTypeDef *hltdc)
   uint32_t tmp = 0, tmp1 = 0;
 
   /* Check the LTDC peripheral state */
-  if(hltdc == HAL_NULL)
+  if(hltdc == NULL)
   {
     return HAL_ERROR;
   }

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_ltdc.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_ltdc.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of LTDC HAL module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_msp_template.c

@@ -1,119 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f4xx_hal_msp_template.c
-  * @author  MCD Application Team
-  * @version V1.3.0
-  * @date    09-March-2015
-  * @brief   This file contains the HAL System and Peripheral (PPP) MSP initialization
-  *          and de-initialization functions.
-  *          It should be copied to the application folder and renamed into 'stm32f4xx_hal_msp.c'.           
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup HAL_MSP HAL MSP
-  * @brief HAL MSP module.
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-
-/** @defgroup HAL_MSP_Private_Functions HAL MSP Private Functions
-  * @{
-  */
-
-/**
-  * @brief  Initializes the Global MSP.
-  * @note   This function is called from HAL_Init() function to perform system
-  *         level initialization (GPIOs, clock, DMA, interrupt).
-  * @retval None
-  */
-void HAL_MspInit(void)
-{
-
-}
-
-/**
-  * @brief  DeInitializes the Global MSP.
-  * @note   This functiona is called from HAL_DeInit() function to perform system
-  *         level de-initialization (GPIOs, clock, DMA, interrupt).
-  * @retval None
-  */
-void HAL_MspDeInit(void)
-{
-
-}
-
-/**
-  * @brief  Initializes the PPP MSP.
-  * @note   This functiona is called from HAL_PPP_Init() function to perform 
-  *         peripheral(PPP) system level initialization (GPIOs, clock, DMA, interrupt)
-  * @retval None
-  */
-void HAL_PPP_MspInit(void)
-{
-
-}
-
-/**
-  * @brief  DeInitializes the PPP MSP.
-  * @note   This functiona is called from HAL_PPP_DeInit() function to perform 
-  *         peripheral(PPP) system level de-initialization (GPIOs, clock, DMA, interrupt)
-  * @retval None
-  */
-void HAL_PPP_MspDeInit(void)
-{
-
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_nand.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_nand.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   NAND HAL module driver.
   *          This file provides a generic firmware to drive NAND memories mounted 
   *          as external device.
@@ -152,7 +152,7 @@
 HAL_StatusTypeDef  HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing)
 {
   /* Check the NAND handle state */
-  if(hnand == HAL_NULL)
+  if(hnand == NULL)
   {
      return HAL_ERROR;
   }

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_nand.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_nand.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of NAND HAL module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_nor.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_nor.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   NOR HAL module driver.
   *          This file provides a generic firmware to drive NOR memories mounted 
   *          as external device.
@@ -170,7 +170,7 @@
 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming)
 {
   /* Check the NOR handle parameter */
-  if(hnor == HAL_NULL)
+  if(hnor == NULL)
   {
      return HAL_ERROR;
   }
@@ -433,7 +433,7 @@ HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint
   /* Send read data command */
   NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST); 
   NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);  
- __NOR_WRITE((uint32_t)pAddress, NOR_CMD_DATA_READ_RESET);
+  NOR_WRITE((uint32_t)pAddress, NOR_CMD_DATA_READ_RESET);
 
   /* Read the data */
  *pData = *(__IO uint32_t *)(uint32_t)pAddress;

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_nor.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_nor.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of NOR HAL module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pccard.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_pccard.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   PCCARD HAL module driver.
   *          This file provides a generic firmware to drive PCCARD memories mounted 
   *          as external device.
@@ -143,7 +143,7 @@
 HAL_StatusTypeDef HAL_PCCARD_Init(PCCARD_HandleTypeDef *hpccard, FMC_NAND_PCC_TimingTypeDef *ComSpaceTiming, FMC_NAND_PCC_TimingTypeDef *AttSpaceTiming, FMC_NAND_PCC_TimingTypeDef *IOSpaceTiming)
 {
   /* Check the PCCARD controller state */
-  if(hpccard == HAL_NULL)
+  if(hpccard == NULL)
   {
      return HAL_ERROR;
   }

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pccard.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_pccard.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of PCCARD HAL module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pcd.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_pcd.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   PCD HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the USB Peripheral Controller:
@@ -24,12 +24,12 @@
         
      (#) Fill parameters of Init structure in HCD handle
   
-     (#) Call HAL_PCD_Init() API to initialize the HCD peripheral (Core, Device core, ...) 
+     (#) Call HAL_PCD_Init() API to initialize the PCD peripheral (Core, Device core, ...) 
 
      (#) Initialize the PCD low level resources through the HAL_PCD_MspInit() API:
          (##) Enable the PCD/USB Low Level interface clock using 
-              (+++) __OTGFS-OTG_CLK_ENABLE()/__OTGHS-OTG_CLK_ENABLE();
+              (+++) __HAL_RCC_USB_OTG_FS_CLK_ENABLE();
-              (+++) __OTGHSULPI_CLK_ENABLE(); (For High Speed Mode)
+              (+++) __HAL_RCC_USB_OTG_HS_CLK_ENABLE(); (For High Speed Mode)
            
          (##) Initialize the related GPIO clocks
          (##) Configure PCD pin-out
@@ -38,7 +38,7 @@
      (#)Associate the Upper USB device stack to the HAL PCD Driver:
          (##) hpcd.pData = pdev;
 
-     (#)Enable HCD transmission and reception:
+     (#)Enable PCD transmission and reception:
          (##) HAL_PCD_Start();
 
   @endverbatim
@@ -128,7 +128,7 @@ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t
 
 /**
   * @brief  Initializes the PCD according to the specified
-  *         parameters in the PCD_InitTypeDef and create the associated handle.
+  *         parameters in the PCD_InitTypeDef and initialize the associated handle.
   * @param  hpcd: PCD handle
   * @retval HAL status
   */
@@ -137,7 +137,7 @@ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
   uint32_t i = 0;
   
   /* Check the PCD handle allocation */
-  if(hpcd == HAL_NULL)
+  if(hpcd == NULL)
   {
     return HAL_ERROR;
   }
@@ -205,14 +205,14 @@ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
 }
 
 /**
-  * @brief  DeInitializes the PCD peripheral 
+  * @brief  DeInitializes the PCD peripheral. 
   * @param  hpcd: PCD handle
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd)
 {
   /* Check the PCD handle allocation */
-  if(hpcd == HAL_NULL)
+  if(hpcd == NULL)
   {
     return HAL_ERROR;
   }
@@ -258,7 +258,7 @@ __weak void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd)
   * @}
   */
 
-/** @defgroup PCD_Exported_Functions_Group2 IO operation functions 
+/** @defgroup PCD_Exported_Functions_Group2 Input and Output operation functions 
  *  @brief   Data transfers functions 
  *
 @verbatim 
@@ -303,7 +303,7 @@ HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd)
 }
 
 /**
-  * @brief  This function handles PCD interrupt request.
+  * @brief  Handles PCD interrupt request.
   * @param  hpcd: PCD handle
   * @retval HAL status
   */
@@ -460,13 +460,13 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
       {
         HAL_PCD_ResumeCallback(hpcd);
       }
+      
       __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_WKUINT);
     }
     
     /* Handle Suspend Interrupt */
     if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_USBSUSP))
     {
-
       if((USBx_DEVICE->DSTS & USB_OTG_DSTS_SUSPSTS) == USB_OTG_DSTS_SUSPSTS)
       {
         
@@ -537,13 +537,13 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
       {
         hpcd->Init.speed            = USB_OTG_SPEED_HIGH;
         hpcd->Init.ep0_mps          = USB_OTG_HS_MAX_PACKET_SIZE ;    
-        hpcd->Instance->GUSBCFG |= (USB_OTG_GUSBCFG_TRDT_0 | USB_OTG_GUSBCFG_TRDT_3);
+        hpcd->Instance->GUSBCFG |= (uint32_t)((USBD_HS_TRDT_VALUE << 10) & USB_OTG_GUSBCFG_TRDT);
       }
       else
       {
         hpcd->Init.speed            = USB_OTG_SPEED_FULL;
         hpcd->Init.ep0_mps          = USB_OTG_FS_MAX_PACKET_SIZE ;  
-        hpcd->Instance->GUSBCFG |= (USB_OTG_GUSBCFG_TRDT_0 | USB_OTG_GUSBCFG_TRDT_2);
+        hpcd->Instance->GUSBCFG |= (uint32_t)((USBD_FS_TRDT_VALUE << 10) & USB_OTG_GUSBCFG_TRDT);
       }
       
       HAL_PCD_ResetCallback(hpcd);
@@ -555,7 +555,9 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
     if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL))
     {
       USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);
+      
       temp = USBx->GRXSTSP;
+      
       ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM];
       
       if(((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17) ==  STS_DATA_UPDT)
@@ -618,7 +620,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
 }
 
 /**
-  * @brief  Data OUT stage callbacks
+  * @brief  Data OUT stage callback.
   * @param  hpcd: PCD handle
   * @param  epnum: endpoint number  
   * @retval None
@@ -631,7 +633,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
 }
 
 /**
-  * @brief  Data IN stage callbacks
+  * @brief  Data IN stage callback.
   * @param  hpcd: PCD handle
   * @param  epnum: endpoint number
   * @retval None
@@ -643,7 +645,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
    */ 
 }
 /**
-  * @brief  Setup stage callback
+  * @brief  Setup stage callback.
   * @param  hpcd: PCD handle
   * @retval None
   */
@@ -655,7 +657,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
 }
 
 /**
-  * @brief  USB Start Of Frame callbacks
+  * @brief  USB Start Of Frame callback.
   * @param  hpcd: PCD handle
   * @retval None
   */
@@ -667,7 +669,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
 }
 
 /**
-  * @brief  USB Reset callbacks
+  * @brief  USB Reset callback.
   * @param  hpcd: PCD handle
   * @retval None
   */
@@ -678,9 +680,8 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
    */ 
 }
 
-
 /**
-  * @brief  Suspend event callbacks
+  * @brief  Suspend event callback.
   * @param  hpcd: PCD handle
   * @retval None
   */
@@ -692,7 +693,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
 }
 
 /**
-  * @brief  Resume event callbacks
+  * @brief  Resume event callback.
   * @param  hpcd: PCD handle
   * @retval None
   */
@@ -704,7 +705,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
 }
 
 /**
-  * @brief  Incomplete ISO OUT callbacks
+  * @brief  Incomplete ISO OUT callback.
   * @param  hpcd: PCD handle
   * @param  epnum: endpoint number
   * @retval None
@@ -717,7 +718,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
 }
 
 /**
-  * @brief  Incomplete ISO IN callbacks
+  * @brief  Incomplete ISO IN callback.
   * @param  hpcd: PCD handle
   * @param  epnum: endpoint number  
   * @retval None
@@ -730,7 +731,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
 }
 
 /**
-  * @brief  Connection event callbacks
+  * @brief  Connection event callback.
   * @param  hpcd: PCD handle
   * @retval None
   */
@@ -742,7 +743,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
 }
 
 /**
-  * @brief  Disconnection event callbacks
+  * @brief  Disconnection event callback.
   * @param  hpcd: PCD handle
   * @retval None
   */
@@ -773,7 +774,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
   */
 
 /**
-  * @brief  Connect the USB device
+  * @brief  Connect the USB device.
   * @param  hpcd: PCD handle
   * @retval HAL status
   */
@@ -786,7 +787,7 @@ HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd)
 }
 
 /**
-  * @brief  Disconnect the USB device
+  * @brief  Disconnect the USB device.
   * @param  hpcd: PCD handle
   * @retval HAL status
   */
@@ -799,7 +800,7 @@ HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd)
 }
 
 /**
-  * @brief  Set the USB Device address 
+  * @brief  Set the USB Device address. 
   * @param  hpcd: PCD handle
   * @param  address: new device address
   * @retval HAL status
@@ -812,7 +813,7 @@ HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
   return HAL_OK;
 }
 /**
-  * @brief  Open and configure an endpoint
+  * @brief  Open and configure an endpoint.
   * @param  hpcd: PCD handle
   * @param  ep_addr: endpoint address
   * @param  ep_mps: endpoint max packet size
@@ -856,7 +857,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint
 
 
 /**
-  * @brief  Deactivate an endpoint
+  * @brief  Deactivate an endpoint.
   * @param  hpcd: PCD handle
   * @param  ep_addr: endpoint address
   * @retval HAL status
@@ -885,7 +886,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
 
 
 /**
-  * @brief  Receive an amount of data  
+  * @brief  Receive an amount of data.  
   * @param  hpcd: PCD handle
   * @param  ep_addr: endpoint address
   * @param  pBuf: pointer to the reception buffer   
@@ -926,7 +927,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, u
 }
 
 /**
-  * @brief  Get Received Data Size
+  * @brief  Get Received Data Size.
   * @param  hpcd: PCD handle
   * @param  ep_addr: endpoint address
   * @retval Data Size
@@ -936,7 +937,7 @@ uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
   return hpcd->OUT_ep[ep_addr & 0x7F].xfer_count;
 }
 /**
-  * @brief  Send an amount of data  
+  * @brief  Send an amount of data.  
   * @param  hpcd: PCD handle
   * @param  ep_addr: endpoint address
   * @param  pBuf: pointer to the transmission buffer   
@@ -978,7 +979,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
 }
 
 /**
-  * @brief  Set a STALL condition over an endpoint
+  * @brief  Set a STALL condition over an endpoint.
   * @param  hpcd: PCD handle
   * @param  ep_addr: endpoint address
   * @retval HAL status
@@ -1013,7 +1014,7 @@ HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
 }
 
 /**
-  * @brief  Clear a STALL condition over in an endpoint
+  * @brief  Clear a STALL condition over in an endpoint.
   * @param  hpcd: PCD handle
   * @param  ep_addr: endpoint address
   * @retval HAL status
@@ -1043,7 +1044,7 @@ HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
 }
 
 /**
-  * @brief  Flush an endpoint
+  * @brief  Flush an endpoint.
   * @param  hpcd: PCD handle
   * @param  ep_addr: endpoint address
   * @retval HAL status
@@ -1067,7 +1068,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
 }
 
 /**
-  * @brief  HAL_PCD_ActivateRemoteWakeup : Active remote wake-up signalling
+  * @brief  Activate remote wakeup signalling.
   * @param  hpcd: PCD handle
   * @retval HAL status
   */
@@ -1077,14 +1078,14 @@ HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd)
     
   if((USBx_DEVICE->DSTS & USB_OTG_DSTS_SUSPSTS) == USB_OTG_DSTS_SUSPSTS)
   {
-    /* Activate Remote wake-up signaling */
+    /* Activate Remote wakeup signaling */
     USBx_DEVICE->DCTL |= USB_OTG_DCTL_RWUSIG;
   }
   return HAL_OK;  
 }
 
 /**
-  * @brief  HAL_PCD_DeActivateRemoteWakeup : de-active remote wake-up signalling
+  * @brief  De-activate remote wakeup signalling.
   * @param  hpcd: PCD handle
   * @retval HAL status
   */
@@ -1092,7 +1093,7 @@ HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd)
 {
   USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;  
   
-  /* De-activate Remote wake-up signaling */
+  /* De-activate Remote wakeup signaling */
   USBx_DEVICE->DCTL &= ~(USB_OTG_DCTL_RWUSIG);
   return HAL_OK;  
 }
@@ -1116,7 +1117,7 @@ HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd)
   */
 
 /**
-  * @brief  Return the PCD state
+  * @brief  Return the PCD handle state.
   * @param  hpcd: PCD handle
   * @retval HAL state
   */
@@ -1138,8 +1139,7 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd)
   */
 
 /**
-  * @brief  DCD_WriteEmptyTxFifo
+  * @brief  Check FIFO for the next packet to be loaded.
-  *         check FIFO for the next packet to be loaded
   * @param  hpcd: PCD handle
   * @param  epnum : endpoint number   
   * @retval HAL status

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pcd.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_pcd.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of PCD HAL module.
   ******************************************************************************
   * @attention
@@ -138,6 +138,19 @@ typedef struct
   * @}
   */
 
+/** @defgroup PCD_Turnaround_Timeout Turnaround Timeout Value
+  * @{
+  */
+#ifndef USBD_HS_TRDT_VALUE
+ #define USBD_HS_TRDT_VALUE           9
+#endif /* USBD_HS_TRDT_VALUE */
+#ifndef USBD_FS_TRDT_VALUE
+ #define USBD_FS_TRDT_VALUE           5
+#endif /* USBD_FS_TRDT_VALUE */
+/**
+  * @}
+  */
+
 /**
   * @}
   */
@@ -209,6 +222,9 @@ typedef struct
                                                                    EXTI->FTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE 
                                                          
 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT()  (EXTI->SWIER |= USB_OTG_FS_WAKEUP_EXTI_LINE) 
+/**
+  * @}
+  */
 
 /* Exported functions --------------------------------------------------------*/
 /** @addtogroup PCD_Exported_Functions PCD Exported Functions
@@ -284,8 +300,12 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
 
 /**
   * @}
-  */ 
+  */
-
+ 
+/* Private macros ------------------------------------------------------------*/
+/** @defgroup PCD_Private_Macros PCD Private Macros
+ * @{
+ */
 /** @defgroup PCD_Instance_definition PCD Instance definition
   * @{
   */
@@ -299,10 +319,9 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
 /**
   * @}
   */ 
-
 /**
   * @}
-  */ 
+  */
 
 /**
   * @}

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pcd_ex.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_pcd_ex.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   PCD HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the USB Peripheral Controller:
@@ -59,7 +59,7 @@
 /* Private functions ---------------------------------------------------------*/
 /* Exported functions --------------------------------------------------------*/
 
-/** @defgroup PCDEx_Exported_Functions PCDEx Exported Functions
+/** @defgroup PCDEx_Exported_Functions PCD Extended Exported Functions
   * @{
   */
 
@@ -103,7 +103,7 @@ HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uin
   
   if(fifo == 0)
   {
-    hpcd->Instance->DIEPTXF0_HNPTXFSIZ = (size << 16) | Tx_Offset;
+    hpcd->Instance->DIEPTXF0_HNPTXFSIZ = (uint32_t)(((uint32_t)size << 16) | Tx_Offset);
   }
   else
   {
@@ -114,8 +114,7 @@ HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uin
     }
     
     /* Multiply Tx_Size by 2 to get higher performance */
-    hpcd->Instance->DIEPTXF[fifo - 1] = (size << 16) | Tx_Offset;
+    hpcd->Instance->DIEPTXF[fifo - 1] = (uint32_t)(((uint32_t)size << 16) | Tx_Offset);    
-    
   }
   
   return HAL_OK;
@@ -136,7 +135,7 @@ HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size)
 
 #if defined(STM32F446xx)
 /**
-  * @brief  HAL_PCDEx_ActivateLPM : active LPM Feature
+  * @brief  Activate LPM feature
   * @param  hpcd: PCD handle
   * @retval HAL status
   */
@@ -153,7 +152,7 @@ HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd)
 }
 
 /**
-  * @brief  HAL_PCDEx_DeActivateLPM : de-active LPM feature
+  * @brief  Deactivate LPM feature.
   * @param  hpcd: PCD handle
   * @retval HAL status
   */
@@ -169,7 +168,7 @@ HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd)
 }
 
 /**
-  * @brief  HAL_PCDEx_LPM_Callback : Send LPM message to user layer
+  * @brief  Send LPM message to user layer callback.
   * @param  hpcd: PCD handle
   * @param  msg: LPM message
   * @retval HAL status

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pcd_ex.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_pcd_ex.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of PCD HAL module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pwr.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_pwr.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   PWR HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Power Controller (PWR) peripheral:

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pwr.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_pwr.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of PWR HAL module.
   ******************************************************************************
   * @attention
@@ -169,7 +169,7 @@ typedef struct
   * @{
   */
 
-#if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F17xx)   
+#if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
 /** @brief  macros configure the main internal regulator output voltage.
   * @param  __REGULATOR__: specifies the regulator output voltage to achieve
   *         a tradeoff between performance and power consumption when the device does

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pwr_ex.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_pwr_ex.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Extended PWR HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of PWR extension peripheral:           

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pwr_ex.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_pwr_ex.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of PWR HAL Extension module.
   ******************************************************************************
   * @attention
@@ -85,7 +85,7 @@
 /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale
   * @{
   */
-#if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F17xx)   
+#if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)   
 #define PWR_REGULATOR_VOLTAGE_SCALE1         PWR_CR_VOS             /* Scale 1 mode(default value at reset): the maximum value of fHCLK = 168 MHz. */
 #define PWR_REGULATOR_VOLTAGE_SCALE2         ((uint32_t)0x00000000) /* Scale 2 mode: the maximum value of fHCLK = 144 MHz. */
 #else
@@ -256,7 +256,7 @@ HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t
                                                 ((REGULATOR) == PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON))
 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx */
 
-#if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F17xx)   
+#if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
 #define IS_PWR_VOLTAGE_SCALING_RANGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
                                                ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2))
 #else

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_qspi.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_qspi.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   QSPI HAL module driver.
   *
   *          This file provides firmware functions to manage the following 

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_qspi.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_qspi.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of QSPI HAL module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_rcc.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   RCC HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Reset and Clock Control (RCC) peripheral:

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_rcc.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of RCC HAL module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc_ex.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_rcc_ex.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Extension RCC HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities RCC extension peripheral:
@@ -191,7 +191,7 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClk
    
   /*------------------------------------ RTC configuration --------------------------------------*/
   if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
-  {
+  {    
     /* Enable Power Clock*/
     __HAL_RCC_PWR_CLK_ENABLE();
     
@@ -208,10 +208,9 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClk
         return HAL_TIMEOUT;
       }      
     }
-    
     /* Reset the Backup domain only if the RTC Clock source selction is modified */ 
     if((RCC->BDCR & RCC_BDCR_RTCSEL) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))
-    {
+    {      
       /* Store the content of BDCR register before the reset of Backup Domain */
       tmpreg1 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
       /* RTC Clock selection can be changed only if the Backup Domain is reset */
@@ -219,24 +218,24 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClk
       __HAL_RCC_BACKUPRESET_RELEASE();
       /* Restore the Content of BDCR register */
       RCC->BDCR = tmpreg1;
-    }
+
-    
+      /* Wait for LSERDY if LSE was enabled */
-    /* If LSE is selected as RTC clock source, wait for LSE reactivation */
+      if(HAL_IS_BIT_SET(tmpreg1, RCC_BDCR_LSERDY))
-    if(PeriphClkInit->RTCClockSelection == RCC_RTCCLKSOURCE_LSE)
-    {
-      /* Get tick */
-      tickstart = HAL_GetTick();
-      
-      /* Wait till LSE is ready */  
-      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
       {
-        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
+        /* Get tick */
+        tickstart = HAL_GetTick();
+        
+        /* Wait till LSE is ready */  
+        while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
         {
-          return HAL_TIMEOUT;
+          if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
-        }      
+          {
-      }  
+            return HAL_TIMEOUT;
+          }
+        }
+      }
+      __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
     }
-    __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 
   }
   
   /*------------------------------------ TIM configuration --------------------------------------*/
@@ -388,11 +387,10 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClk
       /* Check for Parameters */
       assert_param(IS_RCC_PLLI2SP_VALUE(PeriphClkInit->PLLI2S.PLLI2SP));
       assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
-      assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
+      assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
 
       /* Configure the PLLI2S division factors */
       /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) × (PLLI2SN/PLLI2SM) */
-      /* SPDIFRXCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */
       __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR);
     }    
    
@@ -857,7 +855,7 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClk
    
   /*---------------------------- RTC configuration ---------------------------*/
   if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
-  {
+  {    
     /* Enable Power Clock*/
     __HAL_RCC_PWR_CLK_ENABLE();
     
@@ -874,10 +872,9 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClk
         return HAL_TIMEOUT;
       }      
     }
-    
     /* Reset the Backup domain only if the RTC Clock source selection is modified */ 
     if((RCC->BDCR & RCC_BDCR_RTCSEL) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))
-    {
+    {     
       /* Store the content of BDCR register before the reset of Backup Domain */
       tmpreg1 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
       /* RTC Clock selection can be changed only if the Backup Domain is reset */
@@ -885,24 +882,23 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClk
       __HAL_RCC_BACKUPRESET_RELEASE();
       /* Restore the Content of BDCR register */
       RCC->BDCR = tmpreg1;
-    }
+      /* Wait for LSERDY if LSE was enabled */
-    
+      if(HAL_IS_BIT_SET(tmpreg1, RCC_BDCR_LSERDY))
-    /* If LSE is selected as RTC clock source, wait for LSE reactivation */
-    if(PeriphClkInit->RTCClockSelection == RCC_RTCCLKSOURCE_LSE)
-    {
-      /* Get tick */
-      tickstart = HAL_GetTick();
-      
-      /* Wait till LSE is ready */  
-      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
       {
-        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
+        /* Get tick */
+        tickstart = HAL_GetTick();
+        
+        /* Wait till LSE is ready */
+        while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
         {
-          return HAL_TIMEOUT;
+          if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
-        }      
+          {
-      }  
+            return HAL_TIMEOUT;
+          }
+        }
+      }
+      __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
     }
-    __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 
   }
   
   /*---------------------------- TIM configuration ---------------------------*/
@@ -1029,16 +1025,16 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClk
   
   /*---------------------------- RTC configuration ---------------------------*/
   if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
-  {
+  {        
     /* Enable Power Clock*/
     __HAL_RCC_PWR_CLK_ENABLE();
     
     /* Enable write access to Backup domain */
     PWR->CR |= PWR_CR_DBP;
-
+    
     /* Get tick */
     tickstart = HAL_GetTick();
-
+    
     while((PWR->CR & PWR_CR_DBP) == RESET)
     {
       if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE)
@@ -1046,10 +1042,9 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClk
         return HAL_TIMEOUT;
       }      
     }
-        
     /* Reset the Backup domain only if the RTC Clock source selection is modified */ 
     if((RCC->BDCR & RCC_BDCR_RTCSEL) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))
-    {
+    {      
       /* Store the content of BDCR register before the reset of Backup Domain */
       tmpreg1 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
       /* RTC Clock selection can be changed only if the Backup Domain is reset */
@@ -1057,24 +1052,23 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClk
       __HAL_RCC_BACKUPRESET_RELEASE();
       /* Restore the Content of BDCR register */
       RCC->BDCR = tmpreg1;
-    }
+      /* Wait for LSERDY if LSE was enabled */
-      
+      if(HAL_IS_BIT_SET(tmpreg1, RCC_BDCR_LSERDY))
-    /* If LSE is selected as RTC clock source, wait for LSE reactivation */
-    if(PeriphClkInit->RTCClockSelection == RCC_RTCCLKSOURCE_LSE)
-    {
-      /* Get tick */
-      tickstart = HAL_GetTick();
-
-      /* Wait till LSE is ready */  
-      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
       {
-        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
+        /* Get tick */
+        tickstart = HAL_GetTick();
+        
+        /* Wait till LSE is ready */  
+        while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
         {
-          return HAL_TIMEOUT;
+          if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
+          {
+            return HAL_TIMEOUT;
+          }
         }
-      }  
+      }
+      __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 
     }
-    __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 
   }
   
   return HAL_OK;

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc_ex.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_rcc_ex.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of RCC HAL Extension module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rng.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_rng.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   RNG HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Random Number Generator (RNG) peripheral:
@@ -120,7 +120,7 @@
 HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng)
 { 
   /* Check the RNG handle allocation */
-  if(hrng == HAL_NULL)
+  if(hrng == NULL)
   {
     return HAL_ERROR;
   }
@@ -159,7 +159,7 @@ HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng)
 HAL_StatusTypeDef HAL_RNG_DeInit(RNG_HandleTypeDef *hrng)
 { 
   /* Check the RNG handle allocation */
-  if(hrng == HAL_NULL)
+  if(hrng == NULL)
   {
     return HAL_ERROR;
   }

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rng.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_rng.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of RNG HAL module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rtc.c

@@ -2,15 +2,15 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_rtc.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   RTC HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Real Time Clock (RTC) peripheral:
   *           + Initialization and de-initialization functions
   *           + RTC Time and Date functions
   *           + RTC Alarm functions
-  *           + Peripheral Control functions   
+  *           + Peripheral Control functions
   *           + Peripheral State functions
   *         
   @verbatim
@@ -203,7 +203,7 @@
 HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc)
 {
   /* Check the RTC peripheral state */
-  if(hrtc == HAL_NULL)
+  if(hrtc == NULL)
   {
      return HAL_ERROR;
   }
@@ -547,9 +547,13 @@ HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTim
   *          This parameter can be one of the following values:
   *            @arg RTC_FORMAT_BIN: Binary data format 
   *            @arg RTC_FORMAT_BCD: BCD data format
+  * @note  You can use SubSeconds and SecondFraction (sTime structure fields returned) to convert SubSeconds
+  *        value in second fraction ratio with time unit following generic formula:
+  *        Second fraction ratio * time_unit= [(SecondFraction-SubSeconds)/(SecondFraction+1)] * time_unit
+  *        This conversion can be performed only if no shift operation is pending (ie. SHFP=0) when PREDIV_S >= SS
   * @note You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the values 
-  * in the higher-order calendar shadow registers to ensure consistency between the time and date values.
+  *        in the higher-order calendar shadow registers to ensure consistency between the time and date values.
-  * Reading RTC current time locks the values in calendar shadow registers until Current date is read.
+  *        Reading RTC current time locks the values in calendar shadow registers until current date is read.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format)
@@ -559,9 +563,12 @@ HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTim
   /* Check the parameters */
   assert_param(IS_RTC_FORMAT(Format));
   
-  /* Get subseconds values from the correspondent registers*/
+  /* Get subseconds structure field from the corresponding register */
   sTime->SubSeconds = (uint32_t)(hrtc->Instance->SSR);
 
+  /* Get SecondFraction structure field from the corresponding register field */
+  sTime->SecondFraction = (uint32_t)(hrtc->Instance->PRER & RTC_PRER_PREDIV_S);
+  
   /* Get the TR register */
   tmpreg = (uint32_t)(hrtc->Instance->TR & RTC_TR_RESERVED_MASK); 
   

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rtc.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_rtc.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of RTC HAL module.
   ******************************************************************************
   * @attention
@@ -111,11 +111,18 @@ typedef struct
   uint8_t Seconds;          /*!< Specifies the RTC Time Seconds.
                                  This parameter must be a number between Min_Data = 0 and Max_Data = 59 */
   
-  uint32_t SubSeconds;      /*!< Specifies the RTC Time SubSeconds.
-                                 This parameter must be a number between Min_Data = 0 and Max_Data = 59 */
-
   uint8_t TimeFormat;       /*!< Specifies the RTC AM/PM Time.
-                                 This parameter can be a value of @ref RTC_AM_PM_Definitions */ 
+                                 This parameter can be a value of @ref RTC_AM_PM_Definitions */
+                                 
+  uint32_t SubSeconds;     /*!< Specifies the RTC_SSR RTC Sub Second register content.
+                                 This parameter corresponds to a time unit range between [0-1] Second
+                                 with [1 Sec / SecondFraction +1] granularity */
+ 
+  uint32_t SecondFraction;  /*!< Specifies the range or granularity of Sub Second register content
+                                 corresponding to Synchronous pre-scaler factor value (PREDIV_S)
+                                 This parameter corresponds to a time unit range between [0-1] Second
+                                 with [1 Sec / SecondFraction +1] granularity.
+                                 This field will be used only by HAL_RTC_GetTime function */ 
   
   uint32_t DayLightSaving;  /*!< Specifies DayLight Save Operation.
                                  This parameter can be a value of @ref RTC_DayLightSaving_Definitions */
@@ -503,7 +510,7 @@ typedef struct
   *            @arg RTC_IT_ALRB: Alarm B interrupt  
   * @retval None
   */
-#define __HAL_RTC_ALARM_GET_IT(__HANDLE__, __INTERRUPT__)           ((((((__HANDLE__)->Instance->ISR)& ((__INTERRUPT__)>> 4)) & 0x0000FFFF) != RESET)? SET : RESET)
+#define __HAL_RTC_ALARM_GET_IT(__HANDLE__, __INTERRUPT__)           (((((__HANDLE__)->Instance->ISR)& ((__INTERRUPT__)>> 4)) != RESET)? SET : RESET)
 
 /**
   * @brief  Get the selected RTC Alarm's flag status.
@@ -527,7 +534,7 @@ typedef struct
   *             @arg RTC_FLAG_ALRBF 
   * @retval None
   */
-#define __HAL_RTC_ALARM_CLEAR_FLAG(__HANDLE__, __FLAG__)                  ((__HANDLE__)->Instance->ISR) = (~(((__FLAG__) | RTC_ISR_INIT)& 0x0000FFFF)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
+#define __HAL_RTC_ALARM_CLEAR_FLAG(__HANDLE__, __FLAG__)                  ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
   
   
 /**

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rtc_ex.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_rtc_ex.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   RTC HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Real Time Clock (RTC) Extension peripheral:
@@ -149,8 +149,9 @@
   *                                         falling edge of the related pin.
   * @param  RTC_TimeStampPin: specifies the RTC TimeStamp Pin.
   *          This parameter can be one of the following values:
-  *             @arg RTC_TIMESTAMPPIN_PC13: PC13 is selected as RTC TimeStamp Pin.
+  *             @arg RTC_TIMESTAMPPIN_DEFAULT: PC13 is selected as RTC TimeStamp Pin.
-  *             @arg RTC_TIMESTAMPPIN_PI8: PI8 is selected as RTC TimeStamp Pin. (not applicable in the case of STM32F446xx devices) 
+  *             @arg RTC_TIMESTAMPPIN_POS1: PI8/PA0 is selected as RTC TimeStamp Pin.
+  *             (PI8 for all STM32 devices except for STM32F446xx devices the PA0 is used) 
   *             @arg RTC_TIMESTAMPPIN_PA0: PA0 is selected as RTC TimeStamp Pin only for STM32F446xx devices  
   * @retval HAL status
   */

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rtc_ex.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_rtc_ex.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of RTC HAL Extension module.
   ******************************************************************************
   * @attention
@@ -68,7 +68,7 @@ typedef struct
                                              This parameter can be a value of @ref  RTCEx_Tamper_Pins_Definitions */
   
   uint32_t PinSelection;                /*!< Specifies the Tamper Pin.
-                                             This parameter can be a value of @ref  RTCEx_Tamper_Pins_Selection */                                        
+                                             This parameter can be a value of @ref  RTCEx_Tamper_Pins_Selection */
                                              
   uint32_t Trigger;                     /*!< Specifies the Tamper Trigger.
                                              This parameter can be a value of @ref  RTCEx_Tamper_Trigger_Definitions */
@@ -145,12 +145,9 @@ typedef struct
 /** @defgroup RTCEx_Tamper_Pins_Selection RTC tamper Pins Selection
   * @{
   */ 
-#define RTC_TAMPERPIN_PC13                 ((uint32_t)0x00000000)
+#define RTC_TAMPERPIN_DEFAULT               ((uint32_t)0x00000000)
-#if defined (STM32F446xx)
+#define RTC_TAMPERPIN_POS1                  ((uint32_t)0x00010000)
- #define RTC_TAMPERPIN_PA0                  ((uint32_t)0x00010000)
+
-#else
- #define RTC_TAMPERPIN_PI8                  ((uint32_t)0x00010000)
-#endif /* STM32F446xx */
 /**
   * @}
   */ 
@@ -158,12 +155,9 @@ typedef struct
 /** @defgroup RTCEx_TimeStamp_Pin_Selection RTC TimeStamp Pins Selection
   * @{
   */ 
-#define RTC_TIMESTAMPPIN_PC13              ((uint32_t)0x00000000)
+#define RTC_TIMESTAMPPIN_DEFAULT            ((uint32_t)0x00000000)
-#if defined (STM32F446xx)
+#define RTC_TIMESTAMPPIN_POS1               ((uint32_t)0x00020000)
- #define RTC_TIMESTAMPPIN_PA0               ((uint32_t)0x00020000)
+
-#else
- #define RTC_TIMESTAMPPIN_PI8               ((uint32_t)0x00020000)
-#endif /* STM32F446xx */
 /**
   * @}
   */ 
@@ -403,7 +397,7 @@ typedef struct
   *            @arg RTC_FLAG_WUTF   
   * @retval None
   */
-#define __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(__HANDLE__, __FLAG__)            ((__HANDLE__)->Instance->ISR) = (~(((__FLAG__) | RTC_ISR_INIT)& 0x0000FFFF)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)) 
+#define __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(__HANDLE__, __FLAG__)            ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))  
 
 /**
   * @brief  Enable interrupt on the RTC Wake-up Timer associated Exti line.
@@ -566,7 +560,7 @@ typedef struct
   *             @arg RTC_FLAG_TSF  
   * @retval None
   */
-#define __HAL_RTC_TIMESTAMP_CLEAR_FLAG(__HANDLE__, __FLAG__)          ((__HANDLE__)->Instance->ISR) = (~(((__FLAG__) | RTC_ISR_INIT)& 0x0000FFFF)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
+#define __HAL_RTC_TIMESTAMP_CLEAR_FLAG(__HANDLE__, __FLAG__)          ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
 
 /**
   * @}
@@ -646,7 +640,7 @@ typedef struct
   *             @arg RTC_FLAG_TAMP2F 
   * @retval None
   */
-#define __HAL_RTC_TAMPER_CLEAR_FLAG(__HANDLE__, __FLAG__)         ((__HANDLE__)->Instance->ISR) = (~(((__FLAG__) | RTC_ISR_INIT)& 0x0000FFFF)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
+#define __HAL_RTC_TAMPER_CLEAR_FLAG(__HANDLE__, __FLAG__)         ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
 /**
   * @}
   */
@@ -721,7 +715,7 @@ typedef struct
   * @brief Check whether the RTC Tamper and Timestamp associated Exti line interrupt flag is set or not.
   * @retval Line Status.
   */
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG()         (EXTI->PR & RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
+#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG()         (EXTI->PR & RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
 
 /**
   * @brief Clear the RTC Tamper and Timestamp associated Exti line flag.
@@ -923,23 +917,14 @@ HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t
                                            ((BKP) == RTC_BKP_DR19))
 #define IS_TIMESTAMP_EDGE(EDGE) (((EDGE) == RTC_TIMESTAMPEDGE_RISING) || \
                                  ((EDGE) == RTC_TIMESTAMPEDGE_FALLING))
-#define IS_RTC_TAMPER(TAMPER) ((((TAMPER) & (uint32_t)0xFFFFFFF6) == 0x00) && ((TAMPER) != (uint32_t)RESET))
+#define IS_RTC_TAMPER(TAMPER) ((((TAMPER) & ((uint32_t)!(RTC_TAFCR_TAMP1E | RTC_TAFCR_TAMP2E))) == 0x00) && ((TAMPER) != (uint32_t)RESET))
 
-#if defined (STM32F446xx)
+#define IS_RTC_TAMPER_PIN(PIN) (((PIN) == RTC_TAMPERPIN_DEFAULT) || \
-#define IS_RTC_TAMPER_PIN(PIN) (((PIN) == RTC_TAMPERPIN_PC13) || \
+                                ((PIN) == RTC_TAMPERPIN_POS1))
-                                ((PIN) == RTC_TAMPERPIN_PA0))
+
-#else
+#define IS_RTC_TIMESTAMP_PIN(PIN) (((PIN) == RTC_TIMESTAMPPIN_DEFAULT) || \
-#define IS_RTC_TAMPER_PIN(PIN) (((PIN) == RTC_TAMPERPIN_PC13) || \
+                                   ((PIN) == RTC_TIMESTAMPPIN_POS1))
-                                ((PIN) == RTC_TAMPERPIN_PI8))
-#endif /* STM32F446xx */  
 
-#if defined (STM32F446xx)
-#define IS_RTC_TIMESTAMP_PIN(PIN) (((PIN) == RTC_TIMESTAMPPIN_PC13) || \
-                                   ((PIN) == RTC_TIMESTAMPPIN_PA0))
-#else
-#define IS_RTC_TIMESTAMP_PIN(PIN) (((PIN) == RTC_TIMESTAMPPIN_PC13) || \
-                                   ((PIN) == RTC_TIMESTAMPPIN_PI8))
-#endif /* STM32F446xx */  
 #define IS_RTC_TAMPER_TRIGGER(TRIGGER) (((TRIGGER) == RTC_TAMPERTRIGGER_RISINGEDGE) || \
                                         ((TRIGGER) == RTC_TAMPERTRIGGER_FALLINGEDGE) || \
                                         ((TRIGGER) == RTC_TAMPERTRIGGER_LOWLEVEL) || \

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sai.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_sai.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   SAI HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Serial Audio Interface (SAI) peripheral:
@@ -320,7 +320,7 @@ HAL_StatusTypeDef HAL_SAI_Init(SAI_HandleTypeDef *hsai)
   uint32_t freq = 0;
   
   /* Check the SAI handle allocation */
-  if(hsai == HAL_NULL)
+  if(hsai == NULL)
   {
     return HAL_ERROR;
   }
@@ -448,7 +448,7 @@ HAL_StatusTypeDef HAL_SAI_Init(SAI_HandleTypeDef *hsai)
 HAL_StatusTypeDef HAL_SAI_DeInit(SAI_HandleTypeDef *hsai)
 {
   /* Check the SAI handle allocation */
-  if(hsai == HAL_NULL)
+  if(hsai == NULL)
   {
     return HAL_ERROR;
   }
@@ -568,7 +568,7 @@ HAL_StatusTypeDef HAL_SAI_Transmit(SAI_HandleTypeDef *hsai, uint8_t* pData, uint
 {
   uint32_t tickstart = 0;
   
-  if((pData == HAL_NULL ) || (Size == 0)) 
+  if((pData == NULL ) || (Size == 0)) 
   {
     return  HAL_ERROR;
   }
@@ -664,7 +664,7 @@ HAL_StatusTypeDef HAL_SAI_Receive(SAI_HandleTypeDef *hsai, uint8_t *pData, uint1
 {
   uint32_t tickstart = 0;
   
-  if((pData == HAL_NULL ) || (Size == 0)) 
+  if((pData == NULL ) || (Size == 0)) 
   {
     return  HAL_ERROR;
   }
@@ -758,7 +758,7 @@ HAL_StatusTypeDef HAL_SAI_Transmit_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, u
 {  
   if(hsai->State == HAL_SAI_STATE_READY)
   {
-    if((pData == HAL_NULL) || (Size == 0)) 
+    if((pData == NULL) || (Size == 0)) 
     {
       return  HAL_ERROR;
     }
@@ -821,7 +821,7 @@ HAL_StatusTypeDef HAL_SAI_Receive_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, ui
   
   if(hsai->State == HAL_SAI_STATE_READY)
   {
-    if((pData == HAL_NULL) || (Size == 0)) 
+    if((pData == NULL) || (Size == 0)) 
     {
       return  HAL_ERROR;
     }
@@ -930,12 +930,12 @@ HAL_StatusTypeDef HAL_SAI_DMAStop(SAI_HandleTypeDef *hsai)
   hsai->Instance->CR1 &= ~SAI_xCR1_DMAEN;
   
   /* Abort the SAI DMA Tx Stream */
-  if(hsai->hdmatx != HAL_NULL)
+  if(hsai->hdmatx != NULL)
   {
     HAL_DMA_Abort(hsai->hdmatx);
   }
   /* Abort the SAI DMA Rx Stream */
-  if(hsai->hdmarx != HAL_NULL)
+  if(hsai->hdmarx != NULL)
   {  
     HAL_DMA_Abort(hsai->hdmarx);
   }
@@ -963,12 +963,12 @@ HAL_StatusTypeDef HAL_SAI_Abort(SAI_HandleTypeDef *hsai)
   hsai->Instance->CR1 &= ~SAI_xCR1_DMAEN;
   
   /* Abort the SAI DMA Tx Stream */
-  if(hsai->hdmatx != HAL_NULL)
+  if(hsai->hdmatx != NULL)
   {
     HAL_DMA_Abort(hsai->hdmatx);
   }
   /* Abort the SAI DMA Rx Stream */
-  if(hsai->hdmarx != HAL_NULL)
+  if(hsai->hdmarx != NULL)
   {  
     HAL_DMA_Abort(hsai->hdmarx);
   }
@@ -1003,7 +1003,7 @@ HAL_StatusTypeDef HAL_SAI_Transmit_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData,
 {
   uint32_t *tmp;
   
-  if((pData == HAL_NULL) || (Size == 0)) 
+  if((pData == NULL) || (Size == 0)) 
   {
     return  HAL_ERROR;
   }
@@ -1068,7 +1068,7 @@ HAL_StatusTypeDef HAL_SAI_Receive_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, u
 {
   uint32_t *tmp;
   
-  if((pData == HAL_NULL) || (Size == 0))
+  if((pData == NULL) || (Size == 0))
   {
     return  HAL_ERROR;
   } 

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sai.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_sai.h
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   Header file of SAI HAL module.
   ******************************************************************************
   * @attention

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sai_ex.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_sai_ex.c
   * @author  MCD Application Team
-  * @version V1.3.0
+  * @version V1.3.2
-  * @date    09-March-2015
+  * @date    26-June-2015
   * @brief   SAI Extension HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of SAI extension peripheral: