diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/Release_Notes_stm32f4xx_hal.html b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/Release_Notes_stm32f4xx_hal.html index 7908a2f4f0..42e71c45bf 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/Release_Notes_stm32f4xx_hal.html +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/Release_Notes_stm32f4xx_hal.html @@ -11,6 +11,8 @@ + + - + +
@@ -910,7 +913,7 @@ ul

Release Notes for STM32F4xx HAL Drivers

Copyright - 2014 STMicroelectronics

+ 2015 STMicroelectronics

@@ -919,9 +922,363 @@ ul
-

Update History

+

Update History

V1.3.2 / 26-June-2015

+ +

Main Changes

+ + + + -

V1.1.0 / 19-June-2014

+ +
  • General updates to fix known defects and enhancements implementation
  • One changes done on the HAL may require an update on the application code based on HAL V1.3.1
    • HASH IT process: update to call the HAL_HASH_InCpltCallback() at the end of the complete buffer instead of every each 512 bits
  • HAL RCC update
    • HAL_RCCEx_PeriphCLKConfig() updates:
      • Update +the LSE check condition after backup domain reset: update to +check LSE ready flag when LSE oscillator is already enabled +instead of check on LSE oscillator only when LSE is used as RTC clock +source
      • Use the right macro to check the PLLI2SQ parameters
  • HAL RTC update
    • __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG() macro: fix implementation issue
    • __HAL_RTC_ALARM_GET_IT(), +__HAL_RTC_ALARM_CLEAR_FLAG(), __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(), +__HAL_RTC_TIMESTAMP_CLEAR_FLAG() and __HAL_RTC_TAMPER_CLEAR_FLAG() +macros implementation changed: remove unused cast
    • IS_RTC_TAMPER() macro: update to use literal instead of hardcoded value 
    • Add new parameter SecondFraction in RTC_TimeTypeDef structure
    • HAL_RTC_GetTime() API update to support the new parameter SecondFraction
  • HAL ADC update
    • Add +new literal: ADC_INJECTED_SOFTWARE_START to be used as possible value +for the ExternalTrigInjecConvEdge parameter in the ADC_InitTypeDef +structure to select the ADC software trigger mode.
  • HAL FLASH update
    • FLASH_OB_GetRDP() API update to return uint8_t instead of FlagStatus
    •  __HAL_FLASH_GET_LATENCY() new macro add to get the flash latency
  • HAL SPI update
    • Fix the wrong definition of HAL_SPI_ERROR_FLAG literal
  • HAL I2S update
    • HAL_I2S_Transmit() API update to check on busy flag only for I2S slave mode
  • HAL CRC update
    • __HAL_CRC_SET_IDR() macro implementation change to use WRITE_REG() instead of MODIFY_REG()
  • HAL DMA2D update
    • HAL_DMA2D_ConfigLayer() API update to use "=" instead of "|=" to erase BGCOLR and FGCOLR registers before setting the new configuration
  • HAL HASH update
    • HAL_HASH_MODE_Start_IT() (MODE stands for MD5, SHA1, SHA224 and SHA36) updates:
      • Fix processing fail for small input buffers
      • Update +to unlock the process and call return HAL_OK at the end of HASH +processing to avoid incorrectly repeating software
      • Update to properly manage the HashITCounter
      • Update to call the HAL_HASH_InCpltCallback() at the end of the complete buffer instead of every each 512 bits
    • __HAL_HASH_GET_FLAG() update to  check the right register when the DINNE flag  is selected
    • HAL_HASH_SHA1_Accumulate() updates:
      • Add a call to the new IS_HASH_SHA1_BUFFER_SIZE() macro to check the size parameter. 
      • Add the following note in API description
 * @note  Input buffer size in bytes must be a multiple of 4 otherwise the digest computation is corrupted.
  • HAL RTC update
    • Update to define hardware independent literals names:
      • Rename RTC_TAMPERPIN_PC13 by  RTC_TAMPERPIN_DEFAULT
      • Rename RTC_TAMPERPIN_PA0 by RTC_TAMPERPIN_POS1
      • Rename RTC_TAMPERPIN_PI8 by RTC_TAMPERPIN_POS1
      • Rename RTC_TIMESTAMPPIN_PC13 by RTC_TIMESTAMPPIN_DEFAULT
      • Rename RTC_TIMESTAMPPIN_PA0 by RTC_TIMESTAMPPIN_POS1
      • Rename RTC_TIMESTAMPPIN_PI8 by RTC_TIMESTAMPPIN_POS1
  • HAL ETH update
    • Remove duplicated IS_ETH_DUPLEX_MODE() and IS_ETH_RX_MODE() macros
    • Remove illegal space ETH_MAC_READCONTROLLER_FLUSHING macro
    • Update ETH_MAC_READCONTROLLER_XXX defined values (XXX can be IDLE, READING_DATA and READING_STATUS)
  • HAL PCD update
    • HAL_PCD_IRQHandler API: fix the bad Configuration of Turnaround Time
  • HAL HCD update
    • Update to use local variable in USB Host channel re-activation
  • LL FMC update
    • FMC_SDRAM_SendCommand() API: remove the following line: return HAL_ERROR;
  • LL USB update
    • USB_FlushTxFifo API: update to flush all Tx FIFO
    • Update to use local variable in USB Host channel re-activation

V1.3.1 / 25-Mars-2015

+ +

Main Changes

+ + + + + + +
  • HAL PWR update
    • Fix compilation issue with STM32F417xx product: update STM32F17xx by STM32F417xx
  • HAL SPI update
    • Remove unused variable to avoid warning with TrueSTUDIO 
  • HAL I2C update
    • I2C Polling/IT/DMA processes: move the wait loop on busy flag at the top of the processes, to ensure that software not perform any write access to I2C_CR1 register before hardware clearing STOP bit and to avoid also the waiting loop on BUSY flag under I2C/DMA ISR.
    • Update busy flag Timeout value
    • I2C Master Receive Processes update to disable ACK before generate the STOP 
  • HAL DAC update
    • Fix +V1.3.0 regression issue with DAC software trigger configuration

V1.3.0 / 09-Mars-2015

+ +

Main Changes

+ + + + + + +
  • Add support of STM32F446xx devices
  • General updates to fix known defects and enhancements implementation
  • Add new HAL drivers for CEC, QSPI, FMPI2C and SPDIFRX peripherals
  • Two changes done on the HAL requires an update on the application code based on HAL V1.2.0
    • Overall SAI driver rework to have exhaustive support of the peripheral features: details are provided in HAL SAI update section below --> Compatibility with previous version is impacted
    • CRYP driver updated to support multi instance,so user must ensure that the new parameter Instance is initalized in his application(CRYPHandle.Instance = CRYP) 
  • HAL Generic update
    • stm32f4xx_hal_def.h
      • Remove NULL definition and add include for stdio.h
    • stm32_hal_legacy.h
      • Update method to manage deference in alias implementation between all STM32 families
    • stm32f4xx_hal_ppp.c
      • HAL_PPP_Init(): update to force the HAL_PPP_STATE_RESET before calling the HAL_PPP_MspInit()
  • HAL RCC update
    • Add new function HAL_RCCEx_GetPeriphCLKFreq()
    • Move RCC_PLLInitTypeDef structure to extension file and add the new PLLR field specific to STM32F446xx devices
    • Move +the following functions to extension file and add a __weak attribute in generic +driver : this update is related to new system clock source (PLL/PLLR) added and only available for +STM32F44xx devices
      • HAL_RCC_OscConfig()
      • HAL_RCC_GetSysClockFreq()
      • HAL_RCC_GetOscConfig()
    • Move the following macro to extension file as they have device dependent implementation
      • __HAL_RCC_PLL_CONFIG() +
      • __HAL_RCC_PLLI2S_CONFIG()
      • __HAL_RCC_I2S_CONFIG()
    • Add new +structure RCC_PLLI2SInitTypeDef +containing new PLLI2S division factors +used only w/ STM32F446xx devices
    • Add new +structure RCC_PLLSAIInitTypeDef +containing new PLLSAI division factors +used only w/ STM32F446xx devices
    • Add new +RCC_PeriphCLKInitTypeDef to support the +peripheral source clock selection for (I2S, +SAI, SDIO, FMPI2C, CEC, SPDIFRX and CLK48)
    • Update +the HAL_RCCEx_PeriphCLKConfig() and +HAL_RCCEx_GetPeriphCLKConfig() +functions to support the new peripherals Clock source +selection
    • Add +__HAL_RCC_PLL_CONFIG() macro (the +number of parameter and the implementation depend on the device part +number)
    • Add +__HAL_RCC_PLLI2S_CONFIG() macro(the number of parameter and the implementation depend on +device part number)
    • Update +__HAL_RCC_PLLSAI_CONFIG() macro to +support new PLLSAI factors (PLLSAIM and +PLLSAIP)
    • Add new +macros for clock enable/Disable for the following peripherals (CEC, SPDIFRX, SAI2, +QUADSPI)
    • Add the +following new macros for clock source selection :
      • __HAL_RCC_SAI1_CONFIG() / +__HAL_RCC_GET_SAI1_SOURCE()
      • __HAL_RCC_SAI2_CONFIG() / +__HAL_RCC_GET_SAI2_SOURCE()
      • __HAL_RCC_I2S1_CONFIG() / +__HAL_RCC_GET_I2S1_SOURCE()
      • __HAL_RCC_I2S2_CONFIG() / +__HAL_RCC_GET_I2S2_SOURCE()
      • __HAL_RCC_CEC_CONFIG() / __HAL_RCC__GET_CEC_SOURCE() +
      • __HAL_RCC_FMPI2C1_CONFIG() / __HAL_RCC_GET_FMPI2C1_SOURCE() +
      • __HAL_RCC_SDIO_CONFIG() / __HAL_RCC_GET_SDIO_SOURCE() +
      • __HAL_RCC_CLK48_CONFIG() / __HAL_RCC_GET_CLK48_SOURCE() +
      • __HAL_RCC_SPDIFRXCLK_CONFIG() / +__HAL_RCC_GET_SPDIFRX_SOURCE()
    • __HAL_RCC_PPP_CLK_ENABLE(): Implement workaround to cover RCC limitation regarding peripheral enable delay
    • HAL_RCC_OscConfig() fix issues: 
      • Add a check on LSERDY flag when LSE_BYPASS is selected as new state for LSE oscillator.
    • Add new possible value RCC_PERIPHCLK_PLLI2S to be selected as PeriphClockSelection parameter +in the  RCC_PeriphCLKInitTypeDef structure to allow the +possibility to output the PLLI2S on MCO without activating the I2S or +the SAI.
    • __HAL_RCC_HSE_CONFIG()  macro: add the comment below:
+ +
 * @note   Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not supported by this macro.
 *         User should request a +transition to HSE Off first and then HSE On or HSE Bypass.
    • __HAL_RCC_LSE_CONFIG()  macro: add the comment below:
+ +
  * @note   Transition LSE Bypass to LSE On and LSE On to LSE Bypass are not supported by this macro.
  +*         User should request a +transition to LSE Off first and then LSE On or LSE Bypass.
    • Add the +following new macros for PLL source and PLLM selection :
      • __HAL_RCC_PLL_PLLSOURCE_CONFIG()
      • __HAL_RCC_PLL_PLLM_CONFIG()
    • Macros rename:
      • HAL_RCC_OTGHS_FORCE_RESET() by HAL_RCC_USB_OTG_HS_FORCE_RESET()
      • HAL_RCC_OTGHS_RELEASE_RESET() by HAL_RCC_USB_OTG_HS_RELEASE_RESET()
      • HAL_RCC_OTGHS_CLK_SLEEP_ENABLE() by HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE()
      • HAL_RCC_OTGHS_CLK_SLEEP_DISABLE() by HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE()
      • HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE() by HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE()
      • HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE() by HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE()
    • Add __HAL_RCC_SYSCLK_CONFIG() new macro to configure the system clock source (SYSCLK)
    • __HAL_RCC_GET_SYSCLK_SOURCE() updates:
      • Add new RCC Literals:
        • RCC_SYSCLKSOURCE_STATUS_HSI
        • RCC_SYSCLKSOURCE_STATUS_HSE
        • RCC_SYSCLKSOURCE_STATUS_PLLCLK
        • RCC_SYSCLKSOURCE_STATUS_PLLRCLK
      •  Update macro description to refer to the literals above
  • HAL PWR update
    • Add new define PWR_WAKEUP_PIN2
    • Add new API to Control/Get VOS bits of CR register
      • HAL_PWR_HAL_PWREx_ControlVoltageScaling()
      • HAL_PWREx_GetVoltageRange()
    • __HAL_PWR_ VOLTAGESCALING_CONFIG(): Implement workaround to cover VOS limitation delay when PLL is enabled after setting the VOS configuration
  • HAL GPIO update
    • Add the +new Alternate functions literals related to remap for SPI, USART, I2C, SPDIFRX, CEC and +QSPI
    • HAL_GPIO_DeInit(): +Update to check if GPIO Pin x is already used in EXTI mode on +another GPIO Port before De-Initialize the EXTI registers
  • HAL FLASH update
    • __HAL_FLASH_INSTRUCTION_CACHE_RESET() macro: update to reset  ICRST bit in the ACR register after setting it.
    • __HAL_FLASH_DATA_CACHE_RESET() macro: update to reset  DCRST bit in the ACR register after setting it.
  • HAL ADC update
    • Add new literal: ADC_SOFTWARE_START to be used as possible value for the ExternalTrigConv parameter in the ADC_InitTypeDef structure to select the ADC software trigger mode.
    • IS_ADC_CHANNEL() macro update to don't assert stop the ADC_CHANNEL_TEMPSENSOR value
    • HAL_ADC_PollForConversion(): +update to manage particular case when ADC configured in DMA mode and +ADC sequencer with several ranks and polling for end of each conversion
    • HAL_ADC_Start()/HAL_ADC_Start_IT() /HAL_ADC_Start_DMA() update:
      • unlock the process before starting the ADC software conversion.
      • Optimize the ADC stabilization delays
    • __HAL_ADC_GET_IT_SOURCE() update macro implementation
    • Add more details in 'How to use this driver' section
  • HAL DAC update
    • + +

      Add new macro to check if the specified DAC interrupt source is enabled or disabled

      +
      • __HAL_DAC_GET_IT_SOURCE()
    • HAL_DACEx_TriangleWaveGeneration() update to use DAC CR bit mask definition
    • HAL_DACEx_NoiseWaveGeneration() update to use DAC CR bit mask definition
  • HAL CAN update
    • CanTxMsgTypeDef structure: update to use uint8_t Data[8] instead of uint32_t Data[8]
    • CanRxMsgTypeDef structure: update to use uint8_t Data[8] instead of uint32_t Data[8]
  • HAL RTC update
    • Update to use CMSIS mask definition instead of hardcoded values (EXTI_IMR_IM17, EXTI_IMR_IM19..)
  • HAL LTDC update
    • LTDC_SetConfig() update to allow the drawing of partial bitmap in active layer.
  • HAL USART update
    • HAL_USART_Init() fix USART baud rate configuration issue: USART baud rate is twice Higher than expected
  • HAL SMARTCARD update
    • HAL_SMARTCARD_Transmit_IT() update to force the disable for the ERR interrupt to avoid the OVR interrupt
    • HAL_SMARTCARD_IRQHandler() update check condition for transmission end
    • Clean up: remove the following literals that aren't used in smartcard mode
      • SMARTCARD_PARITY_NONE
      • SMARTCARD_WORDLENGTH_8B
      • SMARTCARD_STOPBITS_1
      • SMARTCADR_STOPBITS_2
  • HAL SPI update
    • HAL_SPI_Transmit_DMA()/HAL_SPI_Receive_DMA()/HAL_SPI_TarnsmitReceive_DMA() update to unlock the process before enabling the SPI peripheral
    • HAL_SPI_Transmit_DMA() update to manage correctly the DMA RX stream in SPI Full duplex mode
    • Section SPI_Exported_Functions_Group2 update to remove duplication in *.chm UM
  • HAL CRYP update
    • Update to manage multi instance:
      • Add new parameter Instance in the CRYP_HandleTypeDef Handle structure.
      • Add new parameter in all HAL CRYP macros
        • example: __HAL_CRYP_ENABLE()  updated by __HAL_CRYP_ENABLE(__HANDLE__)
  • HAL DCMI update
    • Add an +extension driver stm32f4xx_hal_dcmi_ex.c/h to manage the support of new Black and White feature +
    • Add  __weak attribute for HAL_DCMI_Init() function and add a new +implementation in the extension driver to manage the black and white configuration +only available in the  STM32F446xx devices. +
    • Move +DCMI_InitTypeDef structure to extension driver and add the +following new fields related to black and white feature: +ByteSelectMode, ByteSelectStart, LineSelectMode and LineSelectStart
  • HAL PCD update
    • Add the support of LPM feature
      • add PCD_LPM_StateTypeDef enum
      • update PCD_HandleTypeDef structure to support the LPM feature
      • add +new functions HAL_PCDEx_ActivateLPM(), HAL_PCDEx_DeActivateLPM() and +HAL_PCDEx_LPM_Callback() in the stm32f4xx_hal_pcd_ex.h/.c files
  • HAL TIM update
    • Add  TIM_TIM11_SPDIFRX define
  • HAL SAI update
    • Add +stm32f4xx_hal_sai_ex.h/.c files for the SAI_BlockSynchroConfig() and the +SAI_GetInputClock() management
    • Add new defines +HAL_SAI_ERROR_AFSDET, HAL_SAI_ERROR_LFSDET, HAL_SAI_ERROR_CNREADY, +HAL_SAI_ERROR_WCKCFG, HAL_SAI_ERROR_TIMEOUT in the SAI_Error_Code group +
    • Add new defines +SAI_SYNCEXT_DISABLE, SAI_SYNCEXT_IN_ENABLE, SAI_SYNCEXT_OUTBLOCKA_ENABLE, +SAI_SYNCEXT_OUTBLOCKB_ENABLE for the SAI External synchronization +
    • Add new defines +SAI_I2S_STANDARD, SAI_I2S_MSBJUSTIFIED, SAI_I2S_LSBJUSTIFIED, SAI_PCM_LONG and +SAI_PCM_SHORT for the SAI Supported protocol +
    • Add new defines +SAI_PROTOCOL_DATASIZE_16BIT, SAI_PROTOCOL_DATASIZE_16BITEXTENDED, +SAI_PROTOCOL_DATASIZE_24BIT and SAI_PROTOCOL_DATASIZE_32BIT for SAI protocol +data size
       +
    • Add SAI Callback +prototype definition
    • Update SAI_InitTypeDef structure by adding new fields: SynchroExt, Mckdiv, MonoStereoMode, CompandingMode, TriState
    • Update SAI_HandleTypeDef structure:
      • remove +uint16_t *pTxBuffPtr, *pRxBuffPtr, TxXferSize, RxXferSize, TxXferCount +and RxXferCount and replace them respectively by uint8_t *pBuffPtr, +uint16_t XferSize and uint16_t XferCount
      • add mutecallback field
      • add struct __SAI_HandleTypeDef *hsai field
    • Remove SAI_CLKSOURCE_PLLR and SAI_CLOCK_PLLSRC defines
    • Add SAI_CLKSOURCE_NA define
    • Add SAI_AUDIO_FREQUENCY_MCKDIV define
    • Add SAI_SPDIF_PROTOCOL define
    • Add SAI_SYNCHRONOUS_EXT define
    • Add +new functions HAL_SAI_InitProtocol(), HAL_SAI_Abort(), +HAL_SAI_EnableTxMuteMode(), HAL_SAI_DisableTxMuteMode(), +HAL_SAI_EnableRxMuteMode(), HAL_SAI_DisableRxMuteMode()
    • Update +HAL_SAI_Transmit(), HAL_SAI_Receive(), HAL_SAI_Transmit_IT(), +HAL_SAI_Receive_IT(), HAL_SAI_Transmit_DMA(), HAL_SAI_Receive_DMA() +functions to use uint8_t *pData instead of uint16_t *pData --> This update is mainly impacting the compatibility with previous driver version.
  • HAL I2S update
    • Split the +following functions between Generic and Extended API based on full +duplex management and add the attribute __weak in the Generic API
      • HAL_I2S_Init(), HAL_I2S_DMAPause(), HAL_I2S_DMAStop(), HAL_I2S_DMAResume(), HAL_I2S_IRQHandle()
    • Move the following static functions from generic to extension driver
      •  I2S_DMARxCplt() and I2S_DMATxCplt()
    • Remove static attribute from I2S_Transmit_IT() and I2S_Receive_IT() functions
    • Move I2SxEXT() macro to extension file
    • Add I2S_CLOCK_PLLR and I2S_CLOCK_PLLSRC defines for I2S clock source
    • Add new function I2S_GetInputClock()
  • HAL LL FMC update
    • Add WriteFifo and PageSize fields in the FMC_NORSRAM_InitTypeDef structure
    • Add +FMC_PAGE_SIZE_NONE, FMC_PAGE_SIZE_128, FMC_PAGE_SIZE_256, +FMC_PAGE_SIZE_1024, FMC_WRITE_FIFO_DISABLE, FMC_WRITE_FIFO_ENABLE +defines
    • Update FMC_NORSRAM_Init(), FMC_NORSRAM_DeInit() and FMC_NORSRAM_Extended_Timing_Init() functions
  • HAL LL USB update
    • Update USB_OTG_CfgTypeDef structure to support LPM, lpm_enable field added
    • Update USB_HostInit() and USB_DevInit() functions to support the VBUS Sensing B activation

V1.2.0 / 26-December-2014

+ + + +

Main Changes

+ + + + + + + + +
  • Maintenance release to fix known defects and enhancements implementation
    +
+ + +
  • Macros and literals renaming to ensure compatibles + across STM32 series, backward compatibility maintained thanks to new added file stm32_hal_legacy.h under /Inc/Legacy
  • Add *.chm UM for all drivers, a UM is provided for each superset RPN
  • Update +drivers to be C++ compliant +
  • Several +update on source code formatting, for better UM generation (i.e. Doxygen tags +updated)
    • +
  • Two changes done on the HAL requires an update on the application code based on HAL V1.1.0
    +
    • +
      +
    • LSI_VALUE constant has been corrected in stm32f4xx_hal_conf.h file, its value changed from 40 KHz to 32 KHz
      • +
    +
      +
    • UART, USART, IRDA and SMARTCARD (referenced as PPP here below) drivers: in DMA transmit process, the code has been updated to avoid waiting on TC flag under DMA ISR, PPP TC interrupt is used instead. Below the update to be done on user application:
      • +
    +
      +
        +
      • Configure and enable the USART IRQ in HAL_PPP_MspInit() function
        +
        • +
      +
    +
      +
        +
      • In stm32f4xx_it.c file, PPP_IRQHandler() function: add a call to HAL_PPP_IRQHandler() function
        • +
      +
    +
  • HAL generic update
+
    • stm32f4xx_hal_def.h
      • Update NULL definition to +fix C++ compilation issue
      • Add UNUSED() macro
      • + +

        Add a new define __NOINLINE to be used for the no inline +code independent from tool chain

        +
    • stm32f4xx_hal_conf_template.h
      • LSI_VALUE constant has been corrected, its value changed from 40 KHz to 32 +KHz
      +
    • Update all macros and literals naming to be uper case
      • +
    • ErrorCode +parameter in PPP_HandleTypeDef structure updated to uint32_t instead of enum HAL_PPP_ErrorTypeDef
      • +
    • Remove the unused FLAG and IT assert macros
      +
  • HAL ADC update
    • + +

      Fix temperature sensor channel configuration issue for STM32F427/437xx  and STM32F429/439xx devices

  • HAL DAC update
    • + +

      HAL_DAC_ConfigChannel(): +update the access to the DAC peripheral registers via the hdac handle instance

    • HAL_DAC_IRQHandler(): update to check on both DAC_FLAG_DMAUDR1 and DAC_FLAG_DMAUDR2
    • HAL_DACEx_NoiseWaveGenerate(): update to reset DAC CR register before setting the new DAC configuration
    • HAL_DACEx_TriangleWaveGenerate(): update to reset DAC CR register before setting the new DAC configuration
  • HAL CAN update
    • + +

      Unlock the CAN process when communication error +occurred

      +
  • HAL CORTEX update
    • Add new macro IS_NVIC_DEVICE_IRQ() to check on negative values of IRQn parameter
  • +

    HAL CRYP update

    • HAL_CRYP_DESECB_Decrypt_DMA(): fix the inverted pPlainData and pCypherData parameters issue
    • CRYPEx_GCMCCM_SetInitVector(): remove the IVSize parameter as the key length 192bits and 256bits are not supported by this version
    • Add restriction for the CCM Encrypt/Decrypt API's that only DataType equal to 8bits is supported
      +
    • HAL_CRYPEx_AESGCM_Finish():
      • Add restriction that the +implementation is limited to 32bits inputs data length  (Plain/Cyphertext, Header) compared with GCM stadards +specifications (800-38D)
      • Update Size parameter on 32bits instead of 16bits
      • Fix issue with 16-bit Data Type: update to use intrinsic __ROR() instead of __REV16()
  • +

    HAL DCMI update

    • + +

      HAL_DCMI_ConfigCROP(): Invert +assert macros to check Y0 and Ysize parameters

  • +

    HAL DMA update

    • + +

      HAL_DMA_Init(): Update to clear the DBM bit in the SxCR register before setting the new configuration

    • DMA_SetConfig(): add to clear the DBM bit in the SxCR register
  • +

    HAL FLASH update

    • Add "HAL_" prefix in the defined values for the FLASH error code
      • Example: FLASH_ERROR_PGP renamed by HAL_FLASH_ERROR_PGP
    • Clear the Flash ErrorCode in the FLASH_WaitForLastOperation() function
    • Update FLASH_SetErrorCode() function to use "|=" operant to update the Flash ErrorCode parameter in the FLASH handle
    • IS_FLASH_ADDRESS(): Update the macro check using '<=' condition instead of '<'
    • IS_OPTIONBYTE(): Update the macro check using '<=' condition instead of '<'
    • Add "FLASH_" prefix in the defined values of FLASH Type Program parameter
      +
      • Example: TYPEPROGRAM_BYTE renamed by FLASH_TYPEPROGRAM_BYTE
    • Add "FLASH_" prefix in the defined values of FLASH Type Erase parameter
      • Example: TYPEERASE_SECTORS renamed by FLASH_TYPEERASE_SECTORS
    • Add "FLASH_" prefix in the defined values of FLASH Voltage Range parameter
      • Example: VOLTAGE_RANGE_1 renamed by FLASH_VOLTAGE_RANGE_1
    • Add "OB_" prefix in the defined values of FLASH WRP State parameter
      • Example: WRPSTATE_ENABLE renamed by OB_WRPSTATE_ENABLE
    • Add "OB_" prefix in the defined values of the FLASH PCROP State parameter
      • PCROPSTATE_DISABLE  updated by OB_PCROP_STATE_DISABLE
      • PCROPSTATE_ENABLE  updated by OB_PCROP_STATE_ENABLE
    • Change "OBEX" prefix by "OPTIONBYTE" prefix in these defines:
      • OBEX_PCROP by OPTIONBYTE_PCROP 
      • OBEX_BOOTCONFIG by OPTIONBYTE_BOOTCONFIG
  • +

    HAL ETH update

    • Fix macros naming typo
+ +
      • Update __HAL_ETH_EXTI_SET_RISING_EGDE_TRIGGER() by + __HAL_ETH_EXTI_SET_RISING_EDGE_TRIGGER()
      • Update __HAL_ETH_EXTI_SET_FALLING_EGDE_TRIGGER() by __HAL_ETH_EXTI_SET_FALLING_EDGE_TRIGGER() +
+
  • +

    HAL PWR update

    +
    • Add new API to +manage SLEEPONEXIT and +SEVONPEND bits of SCR register
      • HAL_PWR_DisableSleepOnExit() +
      • HAL_PWR_EnableSleepOnExit() +
      • HAL_PWR_EnableSEVOnPend() +
      • HAL_PWR_DisableSEVOnPend()
    • HAL_PWR_EnterSTOPMode()
      • Update to clear the CORTEX SLEEPDEEP bit of SCR register before entering in sleep mode
      • Update +usage of __WFE() in low power entry function: if there is a pending +event, calling __WFE() will not enter the CortexM4 core to sleep mode. +The solution is to made the call below; the first __WFE() is always +ignored and clears the event if one was already pending, the second is +always applied
        +
+
__SEV()
+ __WFE()
+ __WFE()
    • + +

      Add new PVD configuration +modes

      +
      • PWR_PVD_MODE_NORMAL +
      • PWR_PVD_MODE_EVENT_RISING  +
      • PWR_PVD_MODE_EVENT_FALLING
      • PWR_PVD_MODE_EVENT_RISING_FALLING
    • + +

      Add new macros to manage PVD +Trigger

      +
      • __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() +
      • __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE( +
      • __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() +
      • __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE()
      • __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() +
      • __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE()
    • + +

      PVD macros:

      +
      • Remove the __EXTILINE__ parameter
      • Update to use prefix + "__HAL_PWR_PVD_" instead of  prefix "__HAL_PVD"
+
    • Rename HAL_PWR_PVDConfig() by HAL_PWR_ConfigPVD()
      • +
    • Rename HAL_PWREx_ActivateOverDrive() by HAL_PWREx_EnableOverDrive()
      • +
    • Rename HAL_PWREx_DeactivateOverDrive() by HAL_PWREx_DisableOverDrive()
  • HAL GPIO update
    • + +

      HAL_GPIO_Init()/HAL_GPIO_DeInit(): add a call to the CMSIS assert macro to check GPIO instance: IS_GPIO_ALL_INSTANCE() 

    • HAL_GPIO_WritePin(): update to write in BSRR register
    • Rename GPIO_GET_SOURCE() by GET_GPIO_INDEX() and move this later to file  stm32f4xx_hal_gpio_ex.h
    • Add new define for alternate function GPIO_AF5_SPI3 for STM32F429xx/439xx and STM32F427xx/437xx devices
  • HAL HASH update
    • HAL_HASH_MD5_Start_IT(): fix input address management issue
  • HAL RCC update
    • Rename the following Macros
      • __PPP_CLK_ENABLE()  by __HAL_RCC_PPP_CLK_ENABLE()
      • __PPP_CLK_DISABLE()  by __HAL_RCC_PPP_CLK_DISABLE()
      • __PPP_FORCE_RESET()  by __HAL_RCC_PPP_FORCE_RESET()
      • __PPP_RELEASE_RESET()  by __HAL_RCC_PPP_RELEASE_RESET()
      • __PPP_CLK_SLEEP_ENABLE() by __HAL_RCC_PPP_CLK_SLEEP_ENABLE()
      • __PPP_CLK_SLEEP_DISABLE() by __HAL_RCC_PPP_CLK_SLEEP_DISABLE()
    • IS_RCC_PLLSAIN_VALUE() macro: update the check condition
      +
    • Add description of RCC known Limitations
    • Rename HAL_RCC_CCSCallback() by HAL_RCC_CSSCallback()
    • HAL_RCC_OscConfig() fix issues: 
      • Remove the disable of HSE oscillator when HSE_BYPASS is used as system clock source or as PPL clock source
        +
      • Add a check on HSERDY flag when HSE_BYPASS is selected as new state for HSE oscillator.
    • Rename __HAL_RCC_I2SCLK() by __HAL_RCC_I2S_Config()
  • +

    HAL I2S update

    +
    • HAL_I2S_Init(): add check on I2S instance using CMSIS macro IS_I2S_ALL_INSTANCE() 
    • HAL_I2S_IRQHandler() update for compliancy w/ C++
    • Add use of tmpreg variable in __HAL_I2S_CLEAR_OVRFLAG() and __HAL_I2S_CLEAR_UDRFLAG() macro for compliancy with C++
    • HAL_I2S_GetError(): update to return uint32_t instead of HAL_I2S_ErrorTypeDef enumeration
  • +

    HAL I2C update

    • Update to clear the POS bit in the CR1 register at the end of HAL_I2C_Master_Read_IT() and HAL_I2C_Mem_Read_IT() process
    • Rename HAL_I2CEx_DigitalFilter_Config()  by HAL_I2CEx_ConfigDigitalFilter()
    • Rename HAL_I2CEx_AnalogFilter_Config()  by HAL_I2CEx_ConfigAnalogFilter()
    • Add use of tmpreg variable in __HAL_I2C_CLEAR_ADDRFLAG() and __HAL_I2C_CLEAR_STOPFLAG() macro for compliancy with C++
  • HAL IrDA update
    • DMA transmit process; the code +has been updated to avoid waiting on TC flag under DMA ISR, IrDA TC interrupt is used instead. Below the +update to be done on user application:
      • Configure and enable +the USART IRQ in HAL_IRDA_MspInit() function
      • In stm32f4xx_it.c file, UASRTx_IRQHandler() +function: add a call to +HAL_IRDA_IRQHandler() function
    • IT transmit process; the code +has been updated to avoid waiting on TC flag under IRDA ISR, IrDA TC interrupt is used instead. No impact on user application
    • Rename Macros: add prefix "__HAL"
      • __IRDA_ENABLE() by __HAL_IRDA_ENABLE()
      • __IRDA_DISABLE() by __HAL_IRDA_DISABLE()
    • Add new user macros to manage the sample method feature
      • __HAL_IRDA_ONE_BIT_SAMPLE_ENABLE()
      • __HAL_IRDA_ONE_BIT_SAMPLE_DISABLE()
    • HAL_IRDA_Transmit_IT(): update to remove the enable of the parity error interrupt
    • Add use of tmpreg variable in __HAL_IRDA_CLEAR_PEFLAG() macro for compliancy with C++
    • HAL_IRDA_Transmit_DMA() update to follow the right procedure "Transmission using DMA"  in the reference manual
      • Add clear the TC flag in the SR register before enabling the DMA transmit request
  • HAL IWDG update
    • Rename the defined IWDG keys: 
      • KR_KEY_RELOAD by IWDG_KEY_RELOAD
      • KR_KEY_ENABLE by IWDG_KEY_ENABLE
      • KR_KEY_EWA by IWDG_KEY_WRITE_ACCESS_ENABLE
      • KR_KEY_DWA by IWDG_KEY_WRITE_ACCESS_DISABLE
    •  Add new macros __HAL_IWDG_RESET_HANDLE_STATE() and __HAL_IWDG_CLEAR_FLAG() 
    • Update __HAL_IWDG_ENABLE_WRITE_ACCESS() and __HAL_IWDG_DISABLE_WRITE_ACCESS() as private macro

  • HAL SPI update

    • HAL_SPI_TransmitReceive_DMA() update to remove the  DMA Tx Error Callback initialization when SPI RxOnly mode is selected
    • Add use of +UNUSED(tmpreg) in __HAL_SPI_CLEAR_MODFFLAG(), __HAL_SPI_CLEAR_OVRFLAG(), +__HAL_SPI_CLEAR_FREFLAG() to fix "Unused variable" +warning with TrueSTUDIO.
    • Rename Literals: remove "D" from "DISABLED" and "ENABLED"
      • SPI_TIMODE_DISABLED by SPI_TIMODE_DISABLE
      • SPI_TIMODE_ENABLED by SPI_TIMODE_ENABLE
      • SPI_CRCCALCULATION_DISABLED by  SPI_CRCCALCULATION_DISABLE
      • SPI_CRCCALCULATION_ENABLED by  SPI_CRCCALCULATION_ENABLE
    • Add +use of tmpreg variable in __HAL_SPI_CLEAR_MODFFLAG(), +__HAL_SPI_CLEAR_FREFLAG() and __HAL_SPI_CLEAR_OVRFLAG() macros for compliancy with C++
  • +

    HAL SDMMC update

    • + +

      IS_SDIO_ALL_INSTANCE() + macro moved to CMSIS files

  • HAL LTDC update
    • + +

      HAL_LTDC_ConfigCLUT: optimize the function when +pixel format is LTDC_PIXEL_FORMAT_AL44 

      • Update the size of color look up table to 16 instead of 256 when +the pixel format is LTDC_PIXEL_FORMAT_AL44
        +
  • HAL NAND update
    • Rename NAND Address structure to NAND_AddressTypeDef instead of NAND_AddressTypedef
    • Update +the used algorithm of these functions
      • HAL_NAND_Read_Page()
      • HAL_NAND_Write_Page()
      • HAL_NAND_Read_SpareArea()
      • HAL_NAND_Write_SpareArea()
    • + +

      HAL_NAND_Write_Page(): move +initialization of tickstart before while loop

    • HAL_NAND_Erase_Block(): add whait until NAND status is ready before exiting this function
  • HAL NOR update
    • + +

      Rename NOR Address structure to NOR_AddressTypeDef instead of NOR_AddressTypedef

    • NOR Status literals renamed
      • NOR_SUCCESS by HAL_NOR_STATUS_SUCCESS
      • NOR_ONGOING by HAL_NOR_STATUS_ONGOING
      • NOR_ERROR by HAL_NOR_STATUS_ERROR
      • NOR_TIMEOUT by HAL_NOR_STATUS_TIMEOUT
    • + +

      HAL_NOR_GetStatus() update to fix Timeout issue and exit from waiting loop when timeout occurred

  • HAL PCCARD update
    • Rename PCCARD Address structure to HAL_PCCARD_StatusTypeDef instead of CF_StatusTypedef
    • PCCARD Status literals renamed
      • CF_SUCCESS by HAL_PCCARD_STATUS_SUCCESS
      • CF_ONGOING by HAL_PCCARD_STATUS_ONGOING
      • CF_ERROR by HAL_PCCARD_STATUS_ERROR
      • CF_TIMEOUT by HAL_PCCARD_STATUS_TIMEOUT
    • Update "CF" by "PCCARD" in functions, literals and macros
  • HAL PCD update
    • Rename functions
      • HAL_PCD_ActiveRemoteWakeup() by HAL_PCD_ActivateRemoteWakeup()
      • HAL_PCD_DeActiveRemoteWakeup() by HAL_PCD_DeActivateRemoteWakeup()
    • Rename literals
      • USB_FS_EXTI_TRIGGER_RISING_EDGE by USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE
      • USB_FS_EXTI_TRIGGER_FALLING_EDGE by USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE
      • USB_FS_EXTI_TRIGGER_BOTH_EDGE() by USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE
      • USB_HS_EXTI_TRIGGER_RISING_EDGE by USB_OTG_HS_WAKEUP_EXTI_RISING_EDGE 
      • USB_HS_EXTI_TRIGGER_FALLING_EDGE by USB_OTG_HS_WAKEUP_EXTI_FALLING_EDGE
      • USB_HS_EXTI_TRIGGER_BOTH_EDGE by USB_OTG_HS_WAKEUP_EXTI_RISING_FALLING_EDGE
      • USB_HS_EXTI_LINE_WAKEUP by USB_OTG_HS_EXTI_LINE_WAKEUP
      • USB_FS_EXTI_LINE_WAKEUP by USB_OTG_FS_EXTI_LINE_WAKEUP
    • Rename USB EXTI macros (FS, HS referenced as SUBBLOCK here below) + +
      • __HAL_USB_SUBBLOCK_EXTI_ENABLE_IT() +  by  __HAL_USB_OTG_SUBBLOCK_WAKEUP_EXTI_ENABLE_IT()  
      • __HAL_USB_SUBBLOCK_EXTI_DISABLE_IT() + by __HAL_USB_OTG_SUBBLOCK_WAKEUP_EXTI_DISABLE_IT()
      • __HAL_USB_SUBBLOCK_EXTI_GET_FLAG() + by __HAL_USB_OTG_SUBBLOCK_WAKEUP_EXTI_GET_FLAG() 
      • __HAL_USB_SUBBLOCK_EXTI_CLEAR_FLAG() + by __HAL_USB_OTG_SUBBLOCK_WAKEUP_EXTI_CLEAR_FLAG()
      • __HAL_USB_SUBBLOCK_EXTI_SET_RISING_EGDE_TRIGGER() + by __HAL_USB_OTG_SUBBLOCK_WAKEUP_EXTI_ENABLE_RISING_EDGE()
      • __HAL_USB_SUBBLOCK_EXTI_SET_FALLING_EGDE_TRIGGER() + by __HAL_USB_OTG_SUBBLOCK_WAKEUP_EXTI_ENABLE_FALLING_EDGE()
      • __HAL_USB_SUBBLOCK_EXTI_SET_FALLINGRISING_TRIGGER() + by __HAL_USB_OTG_SUBBLOCK_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE()
      • __HAL_USB_SUBBLOCK_EXTI_GENERATE_SWIT()  + by __HAL_USB_OTG_SUBBLOCK_WAKEUP_EXTI_GENERATE_SWIT()                                       +
+
  • HAL RNG update
    • Add new functions
      • + + + +

        HAL_RNG_GenerateRandomNumber(): to generate a 32-bits random number, return random value in argument and return HAL +status.

      • + +

        HAL_RNG_GenerateRandomNumber_IT(): to  start generation of the 32-bits random number, user should call the HAL_RNG_ReadLastRandomNumber() function under the HAL_RNG_ReadyCallback() to get the generated random value.

      • HAL_RNG_ReadLastRandomNumber(): to return the last random value stored in the RNG handle

    • HAL_RNG_GetRandomNumber(): return value update +(obsolete), replaced by HAL_RNG_GenerateRandomNumber()
    • + + + +

      HAL_RNG_GetRandomNumber_IT(): wrong implementation (obsolete), replaced by HAL_RNG_GenerateRandomNumber_IT()

    • + +

      __HAL_RNG_CLEAR_FLAG() macro (obsolete), replaced by new __HAL_RNG_CLEAR_IT() macro

    • Add new define for RNG ready interrupt:  RNG_IT_DRDY
  • HAL RTC update
    • HAL_RTC_GetTime() and HAL_RTC_GetDate(): add the comment below
      +
+
+
  * @note You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the values
+   * in the higher-order calendar shadow registers to ensure consistency between the time and date values.
+   * Reading RTC current time locks the values in calendar shadow registers until Current date is read. 
+
+
+
    +
    • Rename literals: add prefix "__HAL"
      • FORMAT_BIN by HAL_FORMAT_BIN
      • FORMAT_BCD by HAL_FORMAT_BCD
    • Rename macros (ALARM, WAKEUPTIMER and TIMESTAMP referenced as SUBBLOCK here below)
      • __HAL_RTC_EXTI_ENABLE_IT() by  __HAL_RTC_SUBBLOCK_EXTI_ENABLE_IT()
      • __HAL_RTC_EXTI_DISABLE_IT() by  __HAL_RTC_SUBBLOCK_EXTI_DISABLE_IT()
      • + +

        __HAL_RTC_EXTI_CLEAR_FLAG() by  __HAL_RTC_SUBBLOCK_EXTI_CLEAR_FLAG()

      • __HAL_RTC_EXTI_GENERATE_SWIT() by __HAL_RTC_SUBBLOCK_EXTI_GENERATE_SWIT()
    • Add new macros (ALARM, WAKEUPTIMER and TAMPER_TIMESTAMP referenced as SUBBLOCK here below)
      • __HAL_RTC_SUBBLOCK_GET_IT_SOURCE() 
      • __HAL_RTC_SUBBLOCK_EXTI_ENABLE_EVENT()
      • __HAL_RTC_SUBBLOCK_EXTI_DISABLE_EVENT()
      • __HAL_RTC_SUBBLOCK_EXTI_ENABLE_FALLING_EDGE()
      • __HAL_RTC_SUBBLOCK_EXTI_DISABLE_FALLING_EDGE()
      • __HAL_RTC_SUBBLOCK_EXTI_ENABLE_RISING_EDGE()
      • __HAL_RTC_SUBBLOCK_EXTI_DISABLE_RISING_EDGE()
      •  __HAL_RTC_SUBBLOCK_EXTI_ENABLE_RISING_FALLING_EDGE()
      •  __HAL_RTC_SUBBLOCK_EXTI_DISABLE_RISING_FALLING_EDGE()
      •  __HAL_RTC_SUBBLOCK_EXTI_GET_FLAG()
  • HAL SAI update
    • Update SAI_STREOMODE by SAI_STEREOMODE
    • Update FIFO status Level defines in upper case
    • Rename literals: remove "D" from "DISABLED" and "ENABLED"
      • SAI_OUTPUTDRIVE_DISABLED  by SAI_OUTPUTDRIVE_DISABLE
      • SAI_OUTPUTDRIVE_ENABLED  by SAI_OUTPUTDRIVE_ENABLE
      • SAI_MASTERDIVIDER_ENABLED  by SAI_MASTERDIVIDER_ENABLE
      • SAI_MASTERDIVIDER_DISABLED  by SAI_MASTERDIVIDER_DISABLE
    +
+
  • HAL SD update
    • Rename SD_CMD_SD_APP_STAUS by SD_CMD_SD_APP_STATUS
    • SD_PowerON() updated to add 1ms required power up waiting time before starting the SD initialization sequence
    • SD_DMA_RxCplt()/SD_DMA_TxCplt(): add a call to HAL_DMA_Abort()
    • HAL_SD_ReadBlocks() update to set the defined DATA_BLOCK_SIZE as SDIO DataBlockSize parameter
    • HAL_SD_ReadBlocks_DMA()/HAL_SD_WriteBlocks_DMA() update to call the HAL_DMA_Start_IT() function with DMA Datalength set to BlockSize/4  as the DMA is configured in word 
  • HAL SMARTCARD update 
    • DMA transmit process; the code +has been updated to avoid waiting on TC flag under DMA ISR, SMARTCARD TC interrupt is used instead. Below the +update to be done on user application:
      • Configure and enable +the USART IRQ in HAL_SAMRTCARD_MspInit() function
      • In stm32f4xx_it.c file, UASRTx_IRQHandler() +function: add a call to +HAL_SMARTCARD_IRQHandler() function
    • IT transmit process; the code +has been updated to avoid waiting on TC flag under SMARTCARD ISR, SMARTCARD TC interrupt is used instead. No impact on user application
    • Rename macros: add prefix "__HAL"
      • __SMARTCARD_ENABLE() by __HAL_SMARTCARD_ENABLE()
      • __SMARTCARD_DISABLE() by __HAL_SMARTCARD_DISABLE()
      • __SMARTCARD_ENABLE_IT() by __HAL_SMARTCARD_ENABLE_IT()
      • __SMARTCARD_DISABLE_IT() by __HAL_SMARTCARD_DISABLE_IT()
      • __SMARTCARD_DMA_REQUEST_ENABLE() by __HAL_SMARTCARD_DMA_REQUEST_ENABLE()
      • __SMARTCARD_DMA_REQUEST_DISABLE() by __HAL_SMARTCARD_DMA_REQUEST_DISABLE()
    • Rename literals: remove "D" from "DISABLED" and "ENABLED"
      • SMARTCARD_NACK_ENABLED by SMARTCARD_NACK_ENABLE
      • SMARTCARD_NACK_DISABLED by SMARTCARD_NACK_DISABLE
    • Add new user macros to manage the sample method feature
      • __HAL_SMARTCARD_ONE_BIT_SAMPLE_ENABLE()
      • __HAL_SMARTCARD_ONE_BIT_SAMPLE_DISABLE()
    • Add use of tmpreg variable in __HAL_SMARTCARD_CLEAR_PEFLAG() macro for compliancy with C++
    • HAL_SMARTCARD_Transmit_DMA() update to follow the right procedure "Transmission using DMA"  in the reference manual
      • Add clear the TC flag in the SR register before enabling the DMA transmit request
  • HAL TIM update
    • Add TIM_CHANNEL_ALL as possible value for all Encoder Start/Stop APIs Description
    • HAL_TIM_OC_ConfigChannel() remove call to IS_TIM_FAST_STATE() assert macro
    • HAL_TIM_PWM_ConfigChannel() add a call to IS_TIM_FAST_STATE() assert macro to check the OCFastMode parameter
    • HAL_TIM_DMADelayPulseCplt() Update to set the TIM Channel before to call  HAL_TIM_PWM_PulseFinishedCallback()
    • HAL_TIM_DMACaptureCplt() update to set the TIM Channel before to call  HAL_TIM_IC_CaptureCallback()
    • TIM_ICx_ConfigChannel() update to fix Timer CCMR1 register corruption when setting ICFilter parameter
    • HAL_TIM_DMABurst_WriteStop()/HAL_TIM_DMABurst_ReadStop() update to abort the DMA transfer for the specifc TIM channel
    • Add new function for TIM Slave configuration in IT mode: HAL_TIM_SlaveConfigSynchronization_IT() 
    • HAL_TIMEx_ConfigBreakDeadTime() add an assert check on Break & DeadTime parameters values
    • HAL_TIMEx_OCN_Start_IT() add the enable of Break Interrupt for all output modes
    • Add new macros to ENABLE/DISABLE URS bit in TIM CR1 register:
      • __HAL_TIM_URS_ENABLE()
      • __HAL_TIM_URS_DISABLE()
    • Add new macro for TIM Edge modification: __HAL_TIM_SET_CAPTUREPOLARITY()
  • HAL UART update
    • + +

      Add IS_LIN_WORD_LENGTH() and IS_LIN_OVERSAMPLING()  macros: to +check respectively WordLength and OverSampling parameters in LIN mode

    • DMA transmit process; the code +has been updated to avoid waiting on TC flag under DMA ISR, UART TC interrupt is used instead. Below the +update to be done on user application:

      • Configure and enable +the USART IRQ in HAL_UART_MspInit() function
      • In stm32f4xx_it.c file, USARTx_IRQHandler() +function: add a call to +HAL_UART_IRQHandler() function
    • IT transmit process; the code +has been updated to avoid waiting on TC flag under UART ISR, UART TC interrupt is used instead. No impact on user application
    • Rename macros:
      • __HAL_UART_ONEBIT_ENABLE() by __HAL_UART_ONE_BIT_SAMPLE_ENABLE()
      • __HAL_UART_ONEBIT_DISABLE() by __HAL_UART_ONE_BIT_SAMPLE_DISABLE()
    • Rename literals:
      • UART_WAKEUPMETHODE_IDLELINE by UART_WAKEUPMETHOD_IDLELINE
      • UART_WAKEUPMETHODE_ADDRESSMARK by UART_WAKEUPMETHOD_ADDRESSMARK
    • Add use of tmpreg variable in __HAL_UART_CLEAR_PEFLAG() macro for compliancy with C++
    • HAL_UART_Transmit_DMA() update to follow the right procedure "Transmission using DMA" in the reference manual
      • Add clear the TC flag in the SR register before enabling the DMA transmit request
  • HAL USART update

    • DMA transmit process; the code +has been updated to avoid waiting on TC flag under DMA ISR, USART TC interrupt is used instead. Below the +update to be done on user application:

      • Configure and enable +the USART IRQ in HAL_USART_MspInit() function
      • In stm32f4xx_it.c file, USARTx_IRQHandler() +function: add a call to +HAL_USART_IRQHandler() function
    • IT transmit process; the code +has been updated to avoid waiting on TC flag under USART ISR, USART TC interrupt is used instead. No impact on user application
    • HAL_USART_Init() update to enable the USART oversampling by 8 by default in order to reach max USART frequencies
    • USART_DMAReceiveCplt() update to set the new USART state after checking on the old state
    • HAL_USART_Transmit_DMA()/HAL_USART_TransmitReceive_DMA() update to follow the right procedure "Transmission using DMA"  in the reference manual
      • Add clear the TC flag in the SR register before enabling the DMA transmit request
    • Rename macros:
      • __USART_ENABLE() by __HAL_USART_ENABLE()
      • __USART_DISABLE() by __HAL_USART_DISABLE()
      • __USART_ENABLE_IT() by __HAL_USART_ENABLE_IT()
      • __USART_DISABLE_IT() by __HAL_USART_DISABLE_IT()
    • Rename literals: remove "D" from "DISABLED" and "ENABLED"
      • USART_CLOCK_DISABLED by USART_CLOCK_DISABLE
      • USART_CLOCK_ENABLED by USART_CLOCK_ENABLE
      • USARTNACK_ENABLED by USART_NACK_ENABLE
      • USARTNACK_DISABLED by USART_NACK_DISABLE
    • Add new user macros to manage the sample method feature
      • __HAL_USART_ONE_BIT_SAMPLE_ENABLE()
      • __HAL_USART_ONE_BIT_SAMPLE_DISABLE()
    • Add use of tmpreg variable in __HAL_USART_CLEAR_PEFLAG() macro for compliancy with C++
  • HAL WWDG update
    • Add new parameter in __HAL_WWDG_ENABLE_IT() macro
    • Add new macros +to manage WWDG IT & correction:
      • __HAL_WWDG_DISABLE()
      • __HAL_WWDG_DISABLE_IT()
      • __HAL_WWDG_GET_IT()
      • __HAL_WWDG_GET_IT_SOURCE()
    + + + +

    V1.1.0 / 19-June-2014

    Main Changes

    @@ -1023,8 +1380,7 @@ unexpected transition in the GPIO pin configuration
  • Private Macro __HAL_GET_GPIO_SOURCE renamed into GET_GPIO_SOURCE
  • Add the support of STM32F411xx devices : add the new Alternate functions values related to new remap added for SPI, USART, I2C
    • -
  • Update the following HAL GPIO - macros description: rename EXTI_Linex by GPIO_PIN_x
    • +
  • Update the following HAL GPIO macros description: rename EXTI_Linex by GPIO_PIN_x
    • __HAL_GPIO_EXTI_CLEAR_IT()
    • __HAL_GPIO_EXTI_GET_IT()
      • @@ -1118,7 +1474,7 @@ driver because they are only used within extension functions.
      • HAL_PWREx_EnableMainRegulatorLowVoltage()
      • HAL_PWREx_DisableMainRegulatorLowVoltage()
      • HAL_PWREx_EnableLowRegulatorLowVoltage()
      • HAL_PWREx_DisableLowRegulatorLowVoltage()
  • For STM32F42xxx/43xxx devices, - add a new function for Under Driver managment as the macro already added + add a new function for Under Driver management as the macro already added for this mode is not sufficient: HAL_PWREx_EnterUnderDriveSTOPMode()
    • @@ -1129,7 +1485,7 @@ driver because they are only used within extension functions. function: update the AHB clock divider before clock switch to new source
  • Allow to calibrate the HSI when it is used as system clock source
    • -
  • Rename the following Macros
    • +
  • Rename the following macros
    • __OTGFS_FORCE_RESET ()  by __USB_OTG_FS_FORCE_RESET()
    • __OTGFS_RELEASE_RESET ()  by  @@ -1154,8 +1510,7 @@ driver because they are only used within extension functions.

    • HAL UART update

      -
      • Add new -macros to control CTS and RTS
         +
        • Add new macros to control CTS and RTS
        • Add specific macros to manage the flags cleared only by a software sequence
          • __HAL_UART_CLEAR_PEFLAG() @@ -1428,7 +1783,7 @@ HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
      -

      V1.0.0 / 18-February-2014

      +

      V1.0.0 / 18-February-2014

      Main Changes

      @@ -1438,7 +1793,7 @@ HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
      -
    • First official release

    License

    +
  • First official release

    • License

    Redistribution and use in source and binary forms, with or without diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32_hal_legacy.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32_hal_legacy.h index 206e56f6a9..3c1a907e0e 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32_hal_legacy.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32_hal_legacy.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32_hal_legacy.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief This file contains aliases definition for the STM32Cube HAL constants * macros and functions maintained for legacy purpose. ****************************************************************************** @@ -30,7 +30,7 @@ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - UART * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * ****************************************************************************** @@ -51,8 +51,8 @@ /** @defgroup HAL_AES_Aliased_Defines HAL CRYP Aliased Defines maintained for legacy purpose * @{ */ -#define AES_FLAG_RDERR CRYP_FLAG_RDERR -#define AES_FLAG_WRERR CRYP_FLAG_WRERR +#define AES_FLAG_RDERR CRYP_FLAG_RDERR +#define AES_FLAG_WRERR CRYP_FLAG_WRERR #define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF #define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR #define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR @@ -154,6 +154,34 @@ * @} */ +/** @defgroup HAL_DMA_Aliased_Defines HAL DMA Aliased Defines maintained for legacy purpose + * @{ + */ +#define HAL_REMAPDMA_ADC_DMA_CH2 DMA_REMAP_ADC_DMA_CH2 +#define HAL_REMAPDMA_USART1_TX_DMA_CH4 DMA_REMAP_USART1_TX_DMA_CH4 +#define HAL_REMAPDMA_USART1_RX_DMA_CH5 DMA_REMAP_USART1_RX_DMA_CH5 +#define HAL_REMAPDMA_TIM16_DMA_CH4 DMA_REMAP_TIM16_DMA_CH4 +#define HAL_REMAPDMA_TIM17_DMA_CH2 DMA_REMAP_TIM17_DMA_CH2 +#define HAL_REMAPDMA_USART3_DMA_CH32 DMA_REMAP_USART3_DMA_CH32 +#define HAL_REMAPDMA_TIM16_DMA_CH6 DMA_REMAP_TIM16_DMA_CH6 +#define HAL_REMAPDMA_TIM17_DMA_CH7 DMA_REMAP_TIM17_DMA_CH7 +#define HAL_REMAPDMA_SPI2_DMA_CH67 DMA_REMAP_SPI2_DMA_CH67 +#define HAL_REMAPDMA_USART2_DMA_CH67 DMA_REMAP_USART2_DMA_CH67 +#define HAL_REMAPDMA_USART3_DMA_CH32 DMA_REMAP_USART3_DMA_CH32 +#define HAL_REMAPDMA_I2C1_DMA_CH76 DMA_REMAP_I2C1_DMA_CH76 +#define HAL_REMAPDMA_TIM1_DMA_CH6 DMA_REMAP_TIM1_DMA_CH6 +#define HAL_REMAPDMA_TIM2_DMA_CH7 DMA_REMAP_TIM2_DMA_CH7 +#define HAL_REMAPDMA_TIM3_DMA_CH6 DMA_REMAP_TIM3_DMA_CH6 + +#define IS_HAL_REMAPDMA IS_DMA_REMAP +#define __HAL_REMAPDMA_CHANNEL_ENABLE __HAL_DMA_REMAP_CHANNEL_ENABLE +#define __HAL_REMAPDMA_CHANNEL_DISABLE __HAL_DMA_REMAP_CHANNEL_DISABLE + + + +/** + * @} + */ /** @defgroup HAL_FLASH_Aliased_Defines HAL FLASH Aliased Defines maintained for legacy purpose * @{ @@ -201,7 +229,6 @@ #define IWDG_STDBY_ACTIVE OB_IWDG_STDBY_RUN #define IWDG_STOP_FREEZE OB_IWDG_STOP_FREEZE #define IWDG_STOP_ACTIVE OB_IWDG_STOP_RUN -#define IS_NBSECTORS IS_FLASH_NBSECTORS #define FLASH_ERROR_NONE HAL_FLASH_ERROR_NONE #define FLASH_ERROR_RD HAL_FLASH_ERROR_RD #define FLASH_ERROR_PG HAL_FLASH_ERROR_PROG @@ -221,6 +248,8 @@ #define FLASH_ERROR_NOTZERO HAL_FLASH_ERROR_NOTZERO #define FLASH_ERROR_OPERATION HAL_FLASH_ERROR_OPERATION #define FLASH_ERROR_ERS HAL_FLASH_ERROR_ERS +#define OB_WDG_SW OB_IWDG_SW +#define OB_WDG_HW OB_IWDG_HW /** * @} @@ -243,6 +272,24 @@ */ +/** @defgroup LL_FMC_Aliased_Defines LL FMC Aliased Defines maintained for compatibility purpose + * @{ + */ +#if defined(STM32L4) || defined(STM32F7) +#define FMC_NAND_PCC_WAIT_FEATURE_DISABLE FMC_NAND_WAIT_FEATURE_DISABLE +#define FMC_NAND_PCC_WAIT_FEATURE_ENABLE FMC_NAND_WAIT_FEATURE_ENABLE +#define FMC_NAND_PCC_MEM_BUS_WIDTH_8 FMC_NAND_MEM_BUS_WIDTH_8 +#define FMC_NAND_PCC_MEM_BUS_WIDTH_16 FMC_NAND_MEM_BUS_WIDTH_16 +#else +#define FMC_NAND_WAIT_FEATURE_DISABLE FMC_NAND_PCC_WAIT_FEATURE_DISABLE +#define FMC_NAND_WAIT_FEATURE_ENABLE FMC_NAND_PCC_WAIT_FEATURE_ENABLE +#define FMC_NAND_MEM_BUS_WIDTH_8 FMC_NAND_PCC_MEM_BUS_WIDTH_8 +#define FMC_NAND_MEM_BUS_WIDTH_16 FMC_NAND_PCC_MEM_BUS_WIDTH_16 +#endif +/** + * @} + */ + /** @defgroup LL_FSMC_Aliased_Defines LL FSMC Aliased Defines maintained for legacy purpose * @{ */ @@ -258,10 +305,45 @@ */ #define GET_GPIO_SOURCE GPIO_GET_INDEX #define GET_GPIO_INDEX GPIO_GET_INDEX + +#if defined(STM32F4) +#define GPIO_AF12_SDMMC GPIO_AF12_SDIO +#define GPIO_AF12_SDMMC1 GPIO_AF12_SDIO +#endif + +#if defined(STM32F7) +#define GPIO_AF12_SDIO GPIO_AF12_SDMMC1 +#define GPIO_AF12_SDMMC GPIO_AF12_SDMMC1 +#endif + +#if defined(STM32L4) +#define GPIO_AF12_SDIO GPIO_AF12_SDMMC1 +#define GPIO_AF12_SDMMC GPIO_AF12_SDMMC1 +#endif + +#define GPIO_AF0_LPTIM GPIO_AF0_LPTIM1 +#define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1 +#define GPIO_AF2_LPTIM GPIO_AF2_LPTIM1 + /** * @} */ +/** @defgroup HAL_HRTIM_Aliased_Macros HAL HRTIM Aliased Macros maintained for legacy purpose + * @{ + */ +#define HRTIM_TIMDELAYEDPROTECTION_DISABLED HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DISABLED +#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_EEV6 +#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_EEV6 +#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV6 +#define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV6 +#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_DEEV7 +#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_DEEV7 +#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV7 +#define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV7 +/** + * @} + */ /** @defgroup HAL_I2C_Aliased_Defines HAL I2C Aliased Defines maintained for legacy purpose * @{ @@ -311,6 +393,18 @@ #define LPTIM_CLOCKPOLARITY_RISINGEDGE LPTIM_CLOCKPOLARITY_RISING #define LPTIM_CLOCKPOLARITY_FALLINGEDGE LPTIM_CLOCKPOLARITY_FALLING #define LPTIM_CLOCKPOLARITY_BOTHEDGES LPTIM_CLOCKPOLARITY_RISING_FALLING + +#define LPTIM_TRIGSAMPLETIME_DIRECTTRANSISTION LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION +#define LPTIM_TRIGSAMPLETIME_2TRANSISTIONS LPTIM_TRIGSAMPLETIME_2TRANSITIONS +#define LPTIM_TRIGSAMPLETIME_4TRANSISTIONS LPTIM_TRIGSAMPLETIME_4TRANSITIONS +#define LPTIM_TRIGSAMPLETIME_8TRANSISTIONS LPTIM_TRIGSAMPLETIME_8TRANSITIONS + +/* The following 3 definition have also been present in a temporary version of lptim.h */ +/* They need to be renamed also to the right name, just in case */ +#define LPTIM_TRIGSAMPLETIME_2TRANSITION LPTIM_TRIGSAMPLETIME_2TRANSITIONS +#define LPTIM_TRIGSAMPLETIME_4TRANSITION LPTIM_TRIGSAMPLETIME_4TRANSITIONS +#define LPTIM_TRIGSAMPLETIME_8TRANSITION LPTIM_TRIGSAMPLETIME_8TRANSITIONS + /** * @} */ @@ -428,14 +522,27 @@ #define RTC_TAMPERMASK_FLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE #define RTC_TAMPERMASK_FLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE -#define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE +#define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE #define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE -#define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE -#define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE -#define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE +#define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE +#define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE +#define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE #define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE -#define RTC_TAMPER1_2_INTERRUPT RTC_ALL_TAMPER_INTERRUPT -#define RTC_TAMPER1_2_3_INTERRUPT RTC_ALL_TAMPER_INTERRUPT +#define RTC_TAMPER1_2_INTERRUPT RTC_ALL_TAMPER_INTERRUPT +#define RTC_TAMPER1_2_3_INTERRUPT RTC_ALL_TAMPER_INTERRUPT + +#define RTC_TIMESTAMPPIN_PC13 RTC_TIMESTAMPPIN_DEFAULT +#define RTC_TIMESTAMPPIN_PA0 RTC_TIMESTAMPPIN_POS1 +#define RTC_TIMESTAMPPIN_PI8 RTC_TIMESTAMPPIN_POS1 +#define RTC_TIMESTAMPPIN_PC1 RTC_TIMESTAMPPIN_POS2 + +#define RTC_OUTPUT_REMAP_PC13 RTC_OUTPUT_REMAP_NONE +#define RTC_OUTPUT_REMAP_PB14 RTC_OUTPUT_REMAP_POS1 +#define RTC_OUTPUT_REMAP_PB2 RTC_OUTPUT_REMAP_POS1 + +#define RTC_TAMPERPIN_PC13 RTC_TAMPERPIN_DEFAULT +#define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1 +#define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1 /** * @} @@ -474,6 +581,8 @@ #define SMBUS_NOSTRETCH_ENABLED SMBUS_NOSTRETCH_ENABLE #define SMBUS_ANALOGFILTER_ENABLED SMBUS_ANALOGFILTER_ENABLE #define SMBUS_ANALOGFILTER_DISABLED SMBUS_ANALOGFILTER_DISABLE +#define SMBUS_PEC_DISABLED SMBUS_PEC_DISABLE +#define SMBUS_PEC_ENABLED SMBUS_PEC_ENABLE #define HAL_SMBUS_STATE_SLAVE_LISTEN HAL_SMBUS_STATE_LISTEN /** * @} @@ -800,8 +909,7 @@ #define BRE_BitNumber BRE_BIT_NUMBER #define PWR_MODE_EVT PWR_PVD_MODE_NORMAL - -#define IS_PWR_REGULATOR_VOLTAGE IS_PWR_VOLTAGE_SCALING_RANGE + /** * @} */ @@ -842,6 +950,14 @@ /** * @} */ + +/** @defgroup HAL_LTDC_Aliased_Functions HAL LTDC Aliased Functions maintained for legacy purpose + * @{ + */ +#define HAL_LTDC_LineEvenCallback HAL_LTDC_LineEventCallback +/** + * @} + */ /** @defgroup HAL_PPP_Aliased_Functions HAL PPP Aliased Functions maintained for legacy purpose @@ -1100,6 +1216,8 @@ #define IS_TYPEPROGRAM IS_FLASH_TYPEPROGRAM #define IS_TYPEPROGRAMFLASH IS_FLASH_TYPEPROGRAM #define IS_TYPEERASE IS_FLASH_TYPEERASE +#define IS_NBSECTORS IS_FLASH_NBSECTORS +#define IS_OB_WDG_SOURCE IS_OB_IWDG_SOURCE /** * @} @@ -1888,10 +2006,14 @@ #define __OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE #define __HAL_RCC_OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE #define __HAL_RCC_OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE +#define __HAL_RCC_OTGHS_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_ENABLED +#define __HAL_RCC_OTGHS_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_DISABLED #define __HAL_RCC_OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET #define __HAL_RCC_OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET #define __HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE -#define __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE +#define __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE +#define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_ENABLED +#define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_DISABLED #define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET #define __SRAM3_CLK_SLEEP_ENABLE __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE #define __CAN2_CLK_SLEEP_ENABLE __HAL_RCC_CAN2_CLK_SLEEP_ENABLE @@ -1921,6 +2043,41 @@ #define __HAL_RCC_OTGFS_FORCE_RESET __HAL_RCC_USB_OTG_FS_FORCE_RESET #define __HAL_RCC_OTGFS_RELEASE_RESET __HAL_RCC_USB_OTG_FS_RELEASE_RESET +#if defined(STM32F4) +#define __HAL_RCC_SDMMC1_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE +#define __HAL_RCC_SDMMC1_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET +#define __HAL_RCC_SDMMC1_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET +#define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE +#define __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE +#define __HAL_RCC_SDMMC1_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE +#define __HAL_RCC_SDMMC1_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE +#define Sdmmc1ClockSelection SdioClockSelection +#define RCC_PERIPHCLK_SDMMC1 RCC_PERIPHCLK_SDIO +#define RCC_SDMMC1CLKSOURCE_CLK48 RCC_SDIOCLKSOURCE_CK48 +#define RCC_SDMMC1CLKSOURCE_SYSCLK RCC_SDIOCLKSOURCE_SYSCLK +#define __HAL_RCC_SDMMC1_CONFIG __HAL_RCC_SDIO_CONFIG +#define __HAL_RCC_GET_SDMMC1_SOURCE __HAL_RCC_GET_SDIO_SOURCE +#endif + +#if defined(STM32F7) || defined(STM32L4) +#define __HAL_RCC_SDIO_CLK_ENABLE __HAL_RCC_SDMMC1_CLK_ENABLE +#define __HAL_RCC_SDIO_FORCE_RESET __HAL_RCC_SDMMC1_FORCE_RESET +#define __HAL_RCC_SDIO_RELEASE_RESET __HAL_RCC_SDMMC1_RELEASE_RESET +#define __HAL_RCC_SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE +#define __HAL_RCC_SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE +#define __HAL_RCC_SDIO_CLK_ENABLE __HAL_RCC_SDMMC1_CLK_ENABLE +#define __HAL_RCC_SDIO_CLK_DISABLE __HAL_RCC_SDMMC1_CLK_DISABLE +#define SdioClockSelection Sdmmc1ClockSelection +#define RCC_PERIPHCLK_SDIO RCC_PERIPHCLK_SDMMC1 +#define __HAL_RCC_SDIO_CONFIG __HAL_RCC_SDMMC1_CONFIG +#define __HAL_RCC_GET_SDIO_SOURCE __HAL_RCC_GET_SDMMC1_SOURCE +#endif + +#if defined(STM32F7) +#define RCC_SDIOCLKSOURCE_CK48 RCC_SDMMC1CLKSOURCE_CLK48 +#define RCC_SDIOCLKSOURCE_SYSCLK RCC_SDMMC1CLKSOURCE_SYSCLK +#endif + #define __HAL_RCC_I2SCLK __HAL_RCC_I2S_CONFIG #define __HAL_RCC_I2SCLK_CONFIG __HAL_RCC_I2S_CONFIG @@ -1989,6 +2146,7 @@ #define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG #define __HAL_RTC_DISABLE_IT __HAL_RTC_EXTI_DISABLE_IT #define __HAL_RTC_ENABLE_IT __HAL_RTC_EXTI_ENABLE_IT + #if defined (STM32F1) #define __HAL_RTC_EXTI_CLEAR_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() @@ -2045,7 +2203,58 @@ #define SD_OCR_CID_CSD_OVERWRIETE SD_OCR_CID_CSD_OVERWRITE #define SD_CMD_SD_APP_STAUS SD_CMD_SD_APP_STATUS - + +#if defined(STM32F4) +#define SD_SDMMC_DISABLED SD_SDIO_DISABLED +#define SD_SDMMC_FUNCTION_BUSY SD_SDIO_FUNCTION_BUSY +#define SD_SDMMC_FUNCTION_FAILED SD_SDIO_FUNCTION_FAILED +#define SD_SDMMC_UNKNOWN_FUNCTION SD_SDIO_UNKNOWN_FUNCTION +#define SD_CMD_SDMMC_SEN_OP_COND SD_CMD_SDIO_SEN_OP_COND +#define SD_CMD_SDMMC_RW_DIRECT SD_CMD_SDIO_RW_DIRECT +#define SD_CMD_SDMMC_RW_EXTENDED SD_CMD_SDIO_RW_EXTENDED +#define __HAL_SD_SDMMC_ENABLE __HAL_SD_SDIO_ENABLE +#define __HAL_SD_SDMMC_DISABLE __HAL_SD_SDIO_DISABLE +#define __HAL_SD_SDMMC_DMA_ENABLE __HAL_SD_SDIO_DMA_ENABLE +#define __HAL_SD_SDMMC_DMA_DISABLE __HAL_SD_SDIO_DMA_DISABL +#define __HAL_SD_SDMMC_ENABLE_IT __HAL_SD_SDIO_ENABLE_IT +#define __HAL_SD_SDMMC_DISABLE_IT __HAL_SD_SDIO_DISABLE_IT +#define __HAL_SD_SDMMC_GET_FLAG __HAL_SD_SDIO_GET_FLAG +#define __HAL_SD_SDMMC_CLEAR_FLAG __HAL_SD_SDIO_CLEAR_FLAG +#define __HAL_SD_SDMMC_GET_IT __HAL_SD_SDIO_GET_IT +#define __HAL_SD_SDMMC_CLEAR_IT __HAL_SD_SDIO_CLEAR_IT +#define SDMMC_STATIC_FLAGS SDIO_STATIC_FLAGS +#define SDMMC_CMD0TIMEOUT SDIO_CMD0TIMEOUT +#define SD_SDMMC_SEND_IF_COND SD_SDIO_SEND_IF_COND +/* alias CMSIS */ +#define SDMMC1_IRQn SDIO_IRQn +#define SDMMC1_IRQHandler SDIO_IRQHandler +#endif + +#if defined(STM32F7) || defined(STM32L4) +#define SD_SDIO_DISABLED SD_SDMMC_DISABLED +#define SD_SDIO_FUNCTION_BUSY SD_SDMMC_FUNCTION_BUSY +#define SD_SDIO_FUNCTION_FAILED SD_SDMMC_FUNCTION_FAILED +#define SD_SDIO_UNKNOWN_FUNCTION SD_SDMMC_UNKNOWN_FUNCTION +#define SD_CMD_SDIO_SEN_OP_COND SD_CMD_SDMMC_SEN_OP_COND +#define SD_CMD_SDIO_RW_DIRECT SD_CMD_SDMMC_RW_DIRECT +#define SD_CMD_SDIO_RW_EXTENDED SD_CMD_SDMMC_RW_EXTENDED +#define __HAL_SD_SDIO_ENABLE __HAL_SD_SDMMC_ENABLE +#define __HAL_SD_SDIO_DISABLE __HAL_SD_SDMMC_DISABLE +#define __HAL_SD_SDIO_DMA_ENABLE __HAL_SD_SDMMC_DMA_ENABLE +#define __HAL_SD_SDIO_DMA_DISABL __HAL_SD_SDMMC_DMA_DISABLE +#define __HAL_SD_SDIO_ENABLE_IT __HAL_SD_SDMMC_ENABLE_IT +#define __HAL_SD_SDIO_DISABLE_IT __HAL_SD_SDMMC_DISABLE_IT +#define __HAL_SD_SDIO_GET_FLAG __HAL_SD_SDMMC_GET_FLAG +#define __HAL_SD_SDIO_CLEAR_FLAG __HAL_SD_SDMMC_CLEAR_FLAG +#define __HAL_SD_SDIO_GET_IT __HAL_SD_SDMMC_GET_IT +#define __HAL_SD_SDIO_CLEAR_IT __HAL_SD_SDMMC_CLEAR_IT +#define SDIO_STATIC_FLAGS SDMMC_STATIC_FLAGS +#define SDIO_CMD0TIMEOUT SDMMC_CMD0TIMEOUT +#define SD_SDIO_SEND_IF_COND SD_SDMMC_SEND_IF_COND +/* alias CMSIS for compatibilities */ +#define SDIO_IRQn SDMMC1_IRQn +#define SDIO_IRQHandler SDMMC1_IRQHandler +#endif /** * @} */ @@ -2064,13 +2273,7 @@ #define __HAL_SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE #define __SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE -#define IS_SMARTCARD_ONEBIT_SAMPLING IS_SMARTCARD_ONE_BIT_SAMPLE - -#define SMARTCARD_WORDLENGTH_8B ((uint32_t)0x00000000) -#define SMARTCARD_STOPBITS_1 ((uint32_t)0x00000000) -#define SMARTCARD_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) -#define SMARTCARD_PARITY_NONE ((uint32_t)0x00000000) - +#define IS_SMARTCARD_ONEBIT_SAMPLING IS_SMARTCARD_ONE_BIT_SAMPLE /** * @} diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal.c index 4a5586ddbd..32ae35feb6 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief HAL module driver. * This is the common part of the HAL initialization * @@ -68,17 +68,17 @@ * @{ */ /** - * @brief STM32F4xx HAL Driver version number V1.3.0 + * @brief STM32F4xx HAL Driver version number V1.3.2 */ #define __STM32F4xx_HAL_VERSION_MAIN (0x01) /*!< [31:24] main version */ #define __STM32F4xx_HAL_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */ -#define __STM32F4xx_HAL_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */ +#define __STM32F4xx_HAL_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */ #define __STM32F4xx_HAL_VERSION_RC (0x00) /*!< [7:0] release candidate */ #define __STM32F4xx_HAL_VERSION ((__STM32F4xx_HAL_VERSION_MAIN << 24)\ |(__STM32F4xx_HAL_VERSION_SUB1 << 16)\ |(__STM32F4xx_HAL_VERSION_SUB2 << 8 )\ |(__STM32F4xx_HAL_VERSION_RC)) - + #define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF) /* ------------ RCC registers bit address in the alias region ----------- */ @@ -87,7 +87,7 @@ /* Alias word address of UFB_MODE bit */ #define MEMRMP_OFFSET SYSCFG_OFFSET #define UFB_MODE_BIT_NUMBER POSITION_VAL(SYSCFG_MEMRMP_UFB_MODE) -#define UFB_MODE_BB (uint32_t)(PERIPH_BB_BASE + (MEMRMP_OFFSET * 32) + (UFB_MODE_BIT_NUMBER * 4)) +#define UFB_MODE_BB (uint32_t)(PERIPH_BB_BASE + (MEMRMP_OFFSET * 32) + (UFB_MODE_BIT_NUMBER * 4)) /* --- CMPCR Register ---*/ /* Alias word address of CMP_PD bit */ diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal.h index 5a3b1e30ba..a0cc063424 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief This file contains all the functions prototypes for the HAL * module driver. ****************************************************************************** diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_adc.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_adc.c index 1338ba6734..1b4dce2a70 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_adc.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_adc.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_adc.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief This file provides firmware functions to manage the following * functionalities of the Analog to Digital Convertor (ADC) peripheral: * + Initialization and de-initialization functions @@ -258,7 +258,7 @@ static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma); HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) { /* Check ADC handle */ - if(hadc == HAL_NULL) + if(hadc == NULL) { return HAL_ERROR; } @@ -317,7 +317,7 @@ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc) { /* Check ADC handle */ - if(hadc == HAL_NULL) + if(hadc == NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_adc.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_adc.h index 3590e769ab..74a2f159c9 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_adc.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_adc.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_adc.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of ADC HAL extension module. ****************************************************************************** * @attention @@ -97,7 +97,11 @@ typedef struct This parameter can be set to ENABLE or DISABLE */ uint32_t EOCSelection; /*!< Specifies whether the EOC flag is set at the end of single channel conversion or at the end of all conversions. - This parameter can be a value of @ref ADC_EOCSelection */ + This parameter can be a value of @ref ADC_EOCSelection + Note: Impact on overrun when not using DMA: When EOCSelection is set to ADC_EOC_SINGLE_CONV, + overrun detection is automatically enabled, in this case each conversion data must be read. + To perform ADC conversions without having to read all conversion data, this parameter must + be set to ADC_EOC_SEQ_CONV */ uint32_t ContinuousConvMode; /*!< Specifies whether the conversion is performed in Continuous or Single mode. This parameter can be set to ENABLE or DISABLE. */ uint32_t DMAContinuousRequests; /*!< Specifies whether the DMA requests is performed in Continuous or in Single mode. diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_adc_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_adc_ex.c index 2108d4a44c..ee889939b8 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_adc_ex.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_adc_ex.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_adc_ex.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief This file provides firmware functions to manage the following * functionalities of the ADC extension peripheral: * + Extended features functions @@ -626,7 +626,6 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_I assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank)); assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime)); assert_param(IS_ADC_EXT_INJEC_TRIG(sConfigInjected->ExternalTrigInjecConv)); - assert_param(IS_ADC_EXT_INJEC_TRIG_EDGE(sConfigInjected->ExternalTrigInjecConvEdge)); assert_param(IS_ADC_INJECTED_LENGTH(sConfigInjected->InjectedNbrOfConversion)); assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv)); assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode)); @@ -636,6 +635,11 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_I assert_param(IS_ADC_RANGE(tmp, sConfigInjected->InjectedOffset)); #endif /* USE_FULL_ASSERT */ + if(sConfigInjected->ExternalTrigInjecConvEdge != ADC_INJECTED_SOFTWARE_START) + { + assert_param(IS_ADC_EXT_INJEC_TRIG_EDGE(sConfigInjected->ExternalTrigInjecConvEdge)); + } + /* Process locked */ __HAL_LOCK(hadc); @@ -669,13 +673,27 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_I /* Set the SQx bits for the selected rank */ hadc->Instance->JSQR |= ADC_JSQR(sConfigInjected->InjectedChannel, sConfigInjected->InjectedRank,sConfigInjected->InjectedNbrOfConversion); - /* Select external trigger to start conversion */ - hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL); - hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConv; - - /* Select external trigger polarity */ - hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN); - hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConvEdge; + /* Enable external trigger if trigger selection is different of software */ + /* start. */ + /* Note: This configuration keeps the hardware feature of parameter */ + /* ExternalTrigConvEdge "trigger edge none" equivalent to */ + /* software start. */ + if(sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START) + { + /* Select external trigger to start conversion */ + hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL); + hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConv; + + /* Select external trigger polarity */ + hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN); + hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConvEdge; + } + else + { + /* Reset the external trigger */ + hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL); + hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN); + } if (sConfigInjected->AutoInjectedConv != DISABLE) { diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_adc_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_adc_ex.h index c9ba9aa270..24a010a320 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_adc_ex.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_adc_ex.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_adc_ex.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of ADC HAL module. ****************************************************************************** * @attention @@ -168,6 +168,7 @@ typedef struct #define ADC_EXTERNALTRIGINJECCONV_T8_CC3 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0)) #define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1)) #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ((uint32_t)ADC_CR2_JEXTSEL) +#define ADC_INJECTED_SOFTWARE_START ((uint32_t)ADC_CR2_JEXTSEL + 1) /** * @} */ @@ -306,7 +307,8 @@ HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_ ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \ ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC3) || \ ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \ - ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15)) + ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15)|| \ + ((INJTRIG) == ADC_INJECTED_SOFTWARE_START)) #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= ((uint32_t)1)) && ((LENGTH) <= ((uint32_t)4))) #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= ((uint32_t)1)) && ((RANK) <= ((uint32_t)4))) diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_can.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_can.c index 83528249f8..e6ad694515 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_can.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_can.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_can.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief This file provides firmware functions to manage the following * functionalities of the Controller Area Network (CAN) peripheral: * + Initialization and de-initialization functions @@ -171,7 +171,7 @@ HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan) uint32_t tickstart = 0; /* Check CAN handle */ - if(hcan == HAL_NULL) + if(hcan == NULL) { return HAL_ERROR; } @@ -460,7 +460,7 @@ HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTy HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan) { /* Check CAN handle */ - if(hcan == HAL_NULL) + if(hcan == NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_can.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_can.h index a020cc6e90..210d89f10f 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_can.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_can.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_can.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of CAN HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cec.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cec.c index c3742baa1c..9516bf2bd2 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cec.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cec.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_cec.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief CEC HAL module driver. * * This file provides firmware functions to manage the following diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cec.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cec.h index 4c0d5e7fb7..14cb738b1d 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cec.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cec.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_cec.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of CEC HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cortex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cortex.c index afc749119d..59209d028e 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cortex.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cortex.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_cortex.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief CORTEX HAL module driver. * This file provides firmware functions to manage the following * functionalities of the CORTEX: diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cortex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cortex.h index 5305f12698..71807bfda9 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cortex.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cortex.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_cortex.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of CORTEX HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_crc.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_crc.c index bba9be2657..6db9a2773e 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_crc.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_crc.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_crc.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief CRC HAL module driver. * This file provides firmware functions to manage the following * functionalities of the Cyclic Redundancy Check (CRC) peripheral: @@ -112,7 +112,7 @@ HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc) { /* Check the CRC handle allocation */ - if(hcrc == HAL_NULL) + if(hcrc == NULL) { return HAL_ERROR; } @@ -147,7 +147,7 @@ HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc) HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc) { /* Check the CRC handle allocation */ - if(hcrc == HAL_NULL) + if(hcrc == NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_crc.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_crc.h index b086c37141..24a4aeda91 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_crc.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_crc.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_crc.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of CRC HAL module. ****************************************************************************** * @attention @@ -121,7 +121,7 @@ typedef struct * @param __VALUE__: 8-bit value to be stored in the ID register * @retval None */ -#define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (MODIFY_REG((__HANDLE__)->Instance->IDR, CRC_IDR_IDR, (__VALUE__)) +#define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, (__VALUE__))) /** * @brief Returns the 8-bit data stored in the Independent Data(ID) register. diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cryp.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cryp.c index a459fe3b7a..74b3a9b0eb 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cryp.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cryp.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_cryp.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief CRYP HAL module driver. * This file provides firmware functions to manage the following * functionalities of the Cryptography (CRYP) peripheral: @@ -610,7 +610,7 @@ static void CRYP_SetTDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction) HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp) { /* Check the CRYP handle allocation */ - if(hcryp == HAL_NULL) + if(hcryp == NULL) { return HAL_ERROR; } @@ -656,7 +656,7 @@ HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp) HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp) { /* Check the CRYP handle allocation */ - if(hcryp == HAL_NULL) + if(hcryp == NULL) { return HAL_ERROR; } @@ -3701,59 +3701,59 @@ void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp) switch(CRYP->CR & CRYP_CR_ALGOMODE_DIRECTION) { case CRYP_CR_ALGOMODE_TDES_ECB_ENCRYPT: - HAL_CRYP_TDESECB_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL); + HAL_CRYP_TDESECB_Encrypt_IT(hcryp, NULL, 0, NULL); break; case CRYP_CR_ALGOMODE_TDES_ECB_DECRYPT: - HAL_CRYP_TDESECB_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL); + HAL_CRYP_TDESECB_Decrypt_IT(hcryp, NULL, 0, NULL); break; case CRYP_CR_ALGOMODE_TDES_CBC_ENCRYPT: - HAL_CRYP_TDESCBC_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL); + HAL_CRYP_TDESCBC_Encrypt_IT(hcryp, NULL, 0, NULL); break; case CRYP_CR_ALGOMODE_TDES_CBC_DECRYPT: - HAL_CRYP_TDESCBC_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL); + HAL_CRYP_TDESCBC_Decrypt_IT(hcryp, NULL, 0, NULL); break; case CRYP_CR_ALGOMODE_DES_ECB_ENCRYPT: - HAL_CRYP_DESECB_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL); + HAL_CRYP_DESECB_Encrypt_IT(hcryp, NULL, 0, NULL); break; case CRYP_CR_ALGOMODE_DES_ECB_DECRYPT: - HAL_CRYP_DESECB_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL); + HAL_CRYP_DESECB_Decrypt_IT(hcryp, NULL, 0, NULL); break; case CRYP_CR_ALGOMODE_DES_CBC_ENCRYPT: - HAL_CRYP_DESCBC_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL); + HAL_CRYP_DESCBC_Encrypt_IT(hcryp, NULL, 0, NULL); break; case CRYP_CR_ALGOMODE_DES_CBC_DECRYPT: - HAL_CRYP_DESCBC_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL); + HAL_CRYP_DESCBC_Decrypt_IT(hcryp, NULL, 0, NULL); break; case CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT: - HAL_CRYP_AESECB_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL); + HAL_CRYP_AESECB_Encrypt_IT(hcryp, NULL, 0, NULL); break; case CRYP_CR_ALGOMODE_AES_ECB_DECRYPT: - HAL_CRYP_AESECB_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL); + HAL_CRYP_AESECB_Decrypt_IT(hcryp, NULL, 0, NULL); break; case CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT: - HAL_CRYP_AESCBC_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL); + HAL_CRYP_AESCBC_Encrypt_IT(hcryp, NULL, 0, NULL); break; case CRYP_CR_ALGOMODE_AES_CBC_DECRYPT: - HAL_CRYP_AESCBC_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL); + HAL_CRYP_AESCBC_Decrypt_IT(hcryp, NULL, 0, NULL); break; case CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT: - HAL_CRYP_AESCTR_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL); + HAL_CRYP_AESCTR_Encrypt_IT(hcryp, NULL, 0, NULL); break; case CRYP_CR_ALGOMODE_AES_CTR_DECRYPT: - HAL_CRYP_AESCTR_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL); + HAL_CRYP_AESCTR_Decrypt_IT(hcryp, NULL, 0, NULL); break; default: diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cryp.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cryp.h index e1e39c6a5e..e0219cea7e 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cryp.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cryp.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_cryp.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of CRYP HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cryp_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cryp_ex.c index ac900e8b4a..a16078800e 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cryp_ex.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cryp_ex.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_cryp_ex.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Extended CRYP HAL module driver * This file provides firmware functions to manage the following * functionalities of CRYP extension peripheral: @@ -3002,19 +3002,19 @@ void HAL_CRYPEx_GCMCCM_IRQHandler(CRYP_HandleTypeDef *hcryp) switch(CRYP->CR & CRYP_CR_ALGOMODE_DIRECTION) { case CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT: - HAL_CRYPEx_AESGCM_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL); + HAL_CRYPEx_AESGCM_Encrypt_IT(hcryp, NULL, 0, NULL); break; case CRYP_CR_ALGOMODE_AES_GCM_DECRYPT: - HAL_CRYPEx_AESGCM_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL); + HAL_CRYPEx_AESGCM_Decrypt_IT(hcryp, NULL, 0, NULL); break; case CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT: - HAL_CRYPEx_AESCCM_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL); + HAL_CRYPEx_AESCCM_Encrypt_IT(hcryp, NULL, 0, NULL); break; case CRYP_CR_ALGOMODE_AES_CCM_DECRYPT: - HAL_CRYPEx_AESCCM_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL); + HAL_CRYPEx_AESCCM_Decrypt_IT(hcryp, NULL, 0, NULL); break; default: diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cryp_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cryp_ex.h index 60beecc8dc..e73ed536d9 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cryp_ex.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cryp_ex.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_cryp_ex.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of CRYP HAL Extension module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dac.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dac.c index 4234184782..9a7ccef878 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dac.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dac.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_dac.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief DAC HAL module driver. * This file provides firmware functions to manage the following * functionalities of the Digital to Analog Converter (DAC) peripheral: @@ -231,7 +231,7 @@ static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma); HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac) { /* Check DAC handle */ - if(hdac == HAL_NULL) + if(hdac == NULL) { return HAL_ERROR; } @@ -268,7 +268,7 @@ HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac) HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac) { /* Check DAC handle */ - if(hdac == HAL_NULL) + if(hdac == NULL) { return HAL_ERROR; } @@ -355,6 +355,8 @@ __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac) */ HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel) { + uint32_t tmp1 = 0, tmp2 = 0; + /* Check the parameters */ assert_param(IS_DAC_CHANNEL(Channel)); @@ -367,6 +369,29 @@ HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel) /* Enable the Peripheral */ __HAL_DAC_ENABLE(hdac, Channel); + if(Channel == DAC_CHANNEL_1) + { + tmp1 = hdac->Instance->CR & DAC_CR_TEN1; + tmp2 = hdac->Instance->CR & DAC_CR_TSEL1; + /* Check if software trigger enabled */ + if((tmp1 == DAC_CR_TEN1) && (tmp2 == DAC_CR_TSEL1)) + { + /* Enable the selected DAC software conversion */ + hdac->Instance->SWTRIGR |= (uint32_t)DAC_SWTRIGR_SWTRIG1; + } + } + else + { + tmp1 = hdac->Instance->CR & DAC_CR_TEN2; + tmp2 = hdac->Instance->CR & DAC_CR_TSEL2; + /* Check if software trigger enabled */ + if((tmp1 == DAC_CR_TEN2) && (tmp2 == DAC_CR_TSEL2)) + { + /* Enable the selected DAC software conversion*/ + hdac->Instance->SWTRIGR |= (uint32_t)DAC_SWTRIGR_SWTRIG2; + } + } + /* Change DAC state */ hdac->State = HAL_DAC_STATE_READY; diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dac.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dac.h index 1f03737f97..bfc12597df 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dac.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dac.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_dac.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of DAC HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dac_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dac_ex.c index 61c191c5e2..a8d3e7d857 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dac_ex.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dac_ex.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_dac_ex.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief DAC HAL module driver. * This file provides firmware functions to manage the following * functionalities of DAC extension peripheral: diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dac_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dac_ex.h index c742651c78..10a118b07f 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dac_ex.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dac_ex.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_dac.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of DAC HAL Extension module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dcmi.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dcmi.c index 419dd5f9bc..5713a86162 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dcmi.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dcmi.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_dcmi.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief DCMI HAL module driver * This file provides firmware functions to manage the following * functionalities of the Digital Camera Interface (DCMI) peripheral: diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dcmi.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dcmi.h index dceea95c2a..644f7a8afa 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dcmi.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dcmi.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_dcmi.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of DCMI HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dcmi_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dcmi_ex.c index fe31c919d6..4cc2d45bbe 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dcmi_ex.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dcmi_ex.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_dcmi_ex.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief DCMI Extension HAL module driver. * This file provides firmware functions to manage the following * functionalities of DCMI extension peripheral: diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dcmi_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dcmi_ex.h index 7c6ca943ba..6355fb50f5 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dcmi_ex.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dcmi_ex.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_dcmi_ex.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of DCMI Extension HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_def.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_def.h index 8ddc7ace13..d700336790 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_def.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_def.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_def.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief This file contains HAL common defines, enumeration, macros and * structures definitions. ****************************************************************************** @@ -72,9 +72,6 @@ typedef enum } HAL_LockTypeDef; /* Exported macro ------------------------------------------------------------*/ -//#ifndef NULL - #define HAL_NULL (void *) 0 -//#endif #define HAL_MAX_DELAY 0xFFFFFFFF #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) != RESET) diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma.c index 031f725b65..2e2757cfda 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_dma.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief DMA HAL module driver. * * This file provides firmware functions to manage the following @@ -182,7 +182,7 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) uint32_t tmp = 0; /* Check the DMA peripheral state */ - if(hdma == HAL_NULL) + if(hdma == NULL) { return HAL_ERROR; } @@ -272,7 +272,7 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma) { /* Check the DMA peripheral state */ - if(hdma == HAL_NULL) + if(hdma == NULL) { return HAL_ERROR; } @@ -657,7 +657,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) /* Process Unlocked */ __HAL_UNLOCK(hdma); - if(hdma->XferErrorCallback != HAL_NULL) + if(hdma->XferErrorCallback != NULL) { /* Transfer error callback */ hdma->XferErrorCallback(hdma); @@ -684,7 +684,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) /* Process Unlocked */ __HAL_UNLOCK(hdma); - if(hdma->XferErrorCallback != HAL_NULL) + if(hdma->XferErrorCallback != NULL) { /* Transfer error callback */ hdma->XferErrorCallback(hdma); @@ -711,7 +711,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) /* Process Unlocked */ __HAL_UNLOCK(hdma); - if(hdma->XferErrorCallback != HAL_NULL) + if(hdma->XferErrorCallback != NULL) { /* Transfer error callback */ hdma->XferErrorCallback(hdma); @@ -757,7 +757,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) hdma->State = HAL_DMA_STATE_READY_HALF_MEM0; } - if(hdma->XferHalfCpltCallback != HAL_NULL) + if(hdma->XferHalfCpltCallback != NULL) { /* Half transfer callback */ hdma->XferHalfCpltCallback(hdma); @@ -777,7 +777,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) /* Current memory buffer used is Memory 1 */ if((hdma->Instance->CR & DMA_SxCR_CT) == 0) { - if(hdma->XferM1CpltCallback != HAL_NULL) + if(hdma->XferM1CpltCallback != NULL) { /* Transfer complete Callback for memory1 */ hdma->XferM1CpltCallback(hdma); @@ -786,7 +786,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) /* Current memory buffer used is Memory 0 */ else if((hdma->Instance->CR & DMA_SxCR_CT) != 0) { - if(hdma->XferCpltCallback != HAL_NULL) + if(hdma->XferCpltCallback != NULL) { /* Transfer complete Callback for memory0 */ hdma->XferCpltCallback(hdma); @@ -813,7 +813,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) /* Process Unlocked */ __HAL_UNLOCK(hdma); - if(hdma->XferCpltCallback != HAL_NULL) + if(hdma->XferCpltCallback != NULL) { /* Transfer complete callback */ hdma->XferCpltCallback(hdma); diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma.h index 3f7c7da29f..d4585b1305 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_dma.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of DMA HAL module. ****************************************************************************** * @attention @@ -580,7 +580,7 @@ typedef struct __DMA_HandleTypeDef ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__)) : ((__HANDLE__)->Instance->FCR &= ~(__INTERRUPT__))) /** - * @brief Check whether the specified DMA Stream interrupt has occurred or not. + * @brief Check whether the specified DMA Stream interrupt is enabled or disabled. * @param __HANDLE__: DMA handle * @param __INTERRUPT__: specifies the DMA interrupt source to check. * This parameter can be one of the following values: diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma2d.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma2d.c index b1d3631f3d..a41cb31a58 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma2d.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma2d.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_dma2d.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief DMA2D HAL module driver. * This file provides firmware functions to manage the following * functionalities of the DMA2D peripheral: @@ -185,7 +185,7 @@ HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d) uint32_t tmp = 0; /* Check the DMA2D peripheral state */ - if(hdma2d == HAL_NULL) + if(hdma2d == NULL) { return HAL_ERROR; } @@ -266,7 +266,7 @@ HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d) HAL_StatusTypeDef HAL_DMA2D_DeInit(DMA2D_HandleTypeDef *hdma2d) { /* Check the DMA2D peripheral state */ - if(hdma2d == HAL_NULL) + if(hdma2d == NULL) { return HAL_ERROR; } @@ -737,7 +737,7 @@ void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d) /* Process Unlocked */ __HAL_UNLOCK(hdma2d); - if(hdma2d->XferErrorCallback != HAL_NULL) + if(hdma2d->XferErrorCallback != NULL) { /* Transfer error Callback */ hdma2d->XferErrorCallback(hdma2d); @@ -764,7 +764,7 @@ void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d) /* Process Unlocked */ __HAL_UNLOCK(hdma2d); - if(hdma2d->XferErrorCallback != HAL_NULL) + if(hdma2d->XferErrorCallback != NULL) { /* Transfer error Callback */ hdma2d->XferErrorCallback(hdma2d); @@ -791,7 +791,7 @@ void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d) /* Process Unlocked */ __HAL_UNLOCK(hdma2d); - if(hdma2d->XferCpltCallback != HAL_NULL) + if(hdma2d->XferCpltCallback != NULL) { /* Transfer complete Callback */ hdma2d->XferCpltCallback(hdma2d); @@ -895,7 +895,7 @@ HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t La if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8)) { /* Prepare the value to be wrote to the BGCOLR register */ - tmp |= ((pLayerCfg->InputAlpha) & 0x00FFFFFF); + tmp = ((pLayerCfg->InputAlpha) & 0x00FFFFFF); /* Write to DMA2D BGCOLR register */ hdma2d->Instance->BGCOLR = tmp; @@ -941,7 +941,7 @@ HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t La if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8)) { /* Prepare the value to be wrote to the FGCOLR register */ - tmp |= ((pLayerCfg->InputAlpha) & 0x00FFFFFF); + tmp = ((pLayerCfg->InputAlpha) & 0x00FFFFFF); /* Write to DMA2D FGCOLR register */ hdma2d->Instance->FGCOLR = tmp; diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma2d.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma2d.h index a57a7c6c9f..fc3ff1e4ab 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma2d.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma2d.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_dma2d.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of DMA2D HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma_ex.c index 1b847ab861..bf293fb005 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma_ex.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma_ex.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_dma_ex.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief DMA Extension HAL module driver * This file provides firmware functions to manage the following * functionalities of the DMA Extension peripheral: diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma_ex.h index d86afd046b..9cf760b352 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma_ex.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma_ex.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_dma_ex.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of DMA HAL extension module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_eth.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_eth.c index c27249402e..e458ede97e 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_eth.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_eth.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_eth.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief ETH HAL module driver. * This file provides firmware functions to manage the following * functionalities of the Ethernet (ETH) peripheral: @@ -182,7 +182,7 @@ HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth) uint32_t err = ETH_SUCCESS; /* Check the ETH peripheral state */ - if(heth == HAL_NULL) + if(heth == NULL) { return HAL_ERROR; } @@ -809,7 +809,7 @@ HAL_StatusTypeDef HAL_ETH_GetReceivedFrame(ETH_HandleTypeDef *heth) else if((heth->RxDesc->Status & ETH_DMARXDESC_FS) != (uint32_t)RESET) { (heth->RxFrameInfos).FSRxDesc = heth->RxDesc; - (heth->RxFrameInfos).LSRxDesc = HAL_NULL; + (heth->RxFrameInfos).LSRxDesc = NULL; (heth->RxFrameInfos).SegCount = 1; /* Point to next descriptor */ heth->RxDesc = (ETH_DMADescTypeDef*) (heth->RxDesc->Buffer2NextDescAddr); @@ -1285,7 +1285,7 @@ HAL_StatusTypeDef HAL_ETH_ConfigMAC(ETH_HandleTypeDef *heth, ETH_MACInitTypeDef assert_param(IS_ETH_SPEED(heth->Init.Speed)); assert_param(IS_ETH_DUPLEX_MODE(heth->Init.DuplexMode)); - if (macconf != HAL_NULL) + if (macconf != NULL) { /* Check the parameters */ assert_param(IS_ETH_WATCHDOG(macconf->Watchdog)); diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_eth.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_eth.h index 26a1d8e55f..79e936e96c 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_eth.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_eth.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_eth.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of ETH HAL module. ****************************************************************************** * @attention @@ -65,14 +65,8 @@ ((SPEED) == ETH_SPEED_100M)) #define IS_ETH_DUPLEX_MODE(MODE) (((MODE) == ETH_MODE_FULLDUPLEX) || \ ((MODE) == ETH_MODE_HALFDUPLEX)) -#define IS_ETH_DUPLEX_MODE(MODE) (((MODE) == ETH_MODE_FULLDUPLEX) || \ - ((MODE) == ETH_MODE_HALFDUPLEX)) #define IS_ETH_RX_MODE(MODE) (((MODE) == ETH_RXPOLLING_MODE) || \ ((MODE) == ETH_RXINTERRUPT_MODE)) -#define IS_ETH_RX_MODE(MODE) (((MODE) == ETH_RXPOLLING_MODE) || \ - ((MODE) == ETH_RXINTERRUPT_MODE)) -#define IS_ETH_RX_MODE(MODE) (((MODE) == ETH_RXPOLLING_MODE) || \ - ((MODE) == ETH_RXINTERRUPT_MODE)) #define IS_ETH_CHECKSUM_MODE(MODE) (((MODE) == ETH_CHECKSUM_BY_HARDWARE) || \ ((MODE) == ETH_CHECKSUM_BY_SOFTWARE)) #define IS_ETH_MEDIA_INTERFACE(MODE) (((MODE) == ETH_MEDIA_INTERFACE_MII) || \ @@ -1258,10 +1252,10 @@ typedef struct #define ETH_MAC_RXFIFO_BELOW_THRESHOLD ((uint32_t)0x00000100) /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */ #define ETH_MAC_RXFIFO_ABOVE_THRESHOLD ((uint32_t)0x00000200) /* Rx FIFO fill level: fill-level above flow-control activate threshold */ #define ETH_MAC_RXFIFO_FULL ((uint32_t)0x00000300) /* Rx FIFO fill level: full */ -#define ETH_MAC_READCONTROLLER_IDLE ((uint32_t)0x00000060) /* Rx FIFO read controller IDLE state */ -#define ETH_MAC_READCONTROLLER_READING_DATA ((uint32_t)0x00000060) /* Rx FIFO read controller Reading frame data */ -#define ETH_MAC_READCONTROLLER_READING_STATUS ((uint32_t)0x00000060) /* Rx FIFO read controller Reading frame status (or time-stamp) */ -#define ETH_MAC_READCONTROLLER_ FLUSHING ((uint32_t)0x00000060) /* Rx FIFO read controller Flushing the frame data and status */ +#define ETH_MAC_READCONTROLLER_IDLE ((uint32_t)0x00000000) /* Rx FIFO read controller IDLE state */ +#define ETH_MAC_READCONTROLLER_READING_DATA ((uint32_t)0x00000020) /* Rx FIFO read controller Reading frame data */ +#define ETH_MAC_READCONTROLLER_READING_STATUS ((uint32_t)0x00000040) /* Rx FIFO read controller Reading frame status (or time-stamp) */ +#define ETH_MAC_READCONTROLLER_FLUSHING ((uint32_t)0x00000060) /* Rx FIFO read controller Flushing the frame data and status */ #define ETH_MAC_RXFIFO_WRITE_ACTIVE ((uint32_t)0x00000010) /* Rx FIFO write controller active */ #define ETH_MAC_SMALL_FIFO_NOTACTIVE ((uint32_t)0x00000000) /* MAC small FIFO read / write controllers not active */ #define ETH_MAC_SMALL_FIFO_READ_ACTIVE ((uint32_t)0x00000002) /* MAC small FIFO read controller active */ @@ -2096,7 +2090,7 @@ typedef struct * @brief Disables the rising edge trigger to the ETH External interrupt line. * @retval None */ -#define __HAL_ETH_WAKEUP_EXTI_DISABLE_RISING_EDGE_TRIGGER() EXTI->RTSR &= ~(ETH_EXTI_LINE_WAKEUP) +#define __HAL_ETH_WAKEUP_EXTI_DISABLE_RISING_EDGE_TRIGGER() EXTI->RTSR &= ~(ETH_EXTI_LINE_WAKEUP) /** * @brief Enables falling edge trigger to the ETH External interrupt line. diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash.c index db0947e361..4492f55d5e 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_flash.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief FLASH HAL module driver. * This file provides firmware functions to manage the following * functionalities of the internal FLASH memory: diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash.h index 14bfd3e08b..1060645e13 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_flash.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of FLASH HAL module. ****************************************************************************** * @attention @@ -193,6 +193,13 @@ typedef struct */ #define __HAL_FLASH_SET_LATENCY(__LATENCY__) (*(__IO uint8_t *)ACR_BYTE0_ADDRESS = (uint8_t)(__LATENCY__)) +/** + * @brief Get the FLASH Latency. + * @retval FLASH Latency + * The value of this parameter depend on device used within the same series + */ +#define __HAL_FLASH_GET_LATENCY() (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)) + /** * @brief Enable the FLASH prefetch buffer. * @retval none diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash_ex.c index 2d1fb44f4e..97ee094278 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash_ex.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash_ex.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_flash_ex.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Extended FLASH HAL module driver. * This file provides firmware functions to manage the following * functionalities of the FLASH extension peripheral: @@ -125,7 +125,7 @@ static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_ static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level); static uint8_t FLASH_OB_GetUser(void); static uint16_t FLASH_OB_GetWRP(void); -static FlagStatus FLASH_OB_GetRDP(void); +static uint8_t FLASH_OB_GetRDP(void); static uint8_t FLASH_OB_GetBOR(void); #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) @@ -361,16 +361,16 @@ void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit) pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_BOR; /*Get WRP*/ - pOBInit->WRPSector = FLASH_OB_GetWRP(); - + pOBInit->WRPSector = (uint32_t)FLASH_OB_GetWRP(); + /*Get RDP Level*/ - pOBInit->RDPLevel = FLASH_OB_GetRDP(); - + pOBInit->RDPLevel = (uint32_t)FLASH_OB_GetRDP(); + /*Get USER*/ - pOBInit->USERConfig = FLASH_OB_GetUser(); + pOBInit->USERConfig = (uint8_t)FLASH_OB_GetUser(); /*Get BOR Level*/ - pOBInit->BORLevel = FLASH_OB_GetBOR(); + pOBInit->BORLevel = (uint32_t)FLASH_OB_GetBOR(); } #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\ @@ -1212,7 +1212,6 @@ static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t } return status; - } /** @@ -1234,8 +1233,7 @@ static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level) *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV); *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= Level; - return HAL_OK; - + return HAL_OK; } /** @@ -1261,17 +1259,27 @@ static uint16_t FLASH_OB_GetWRP(void) /** * @brief Returns the FLASH Read Protection level. - * @retval FlagStatus FLASH Readout Protection Status: - * - SET, when OB_RDP_Level_1 or OB_RDP_Level_2 is set - * - RESET, when OB_RDP_Level_0 is set + * @retval FLASH ReadOut Protection Status: + * This parameter can be one of the following values: + * @arg OB_RDP_LEVEL_0: No protection + * @arg OB_RDP_LEVEL_1: Read protection of the memory + * @arg OB_RDP_LEVEL_2: Full chip protection */ -static FlagStatus FLASH_OB_GetRDP(void) +static uint8_t FLASH_OB_GetRDP(void) { - FlagStatus readstatus = RESET; + uint8_t readstatus = OB_RDP_LEVEL_0; - if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) != (uint8_t)OB_RDP_LEVEL_0)) + if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2)) { - readstatus = SET; + readstatus = OB_RDP_LEVEL_2; + } + else if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_1)) + { + readstatus = OB_RDP_LEVEL_1; + } + else + { + readstatus = OB_RDP_LEVEL_0; } return readstatus; diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash_ex.h index 2ae52d4a82..a917577f73 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash_ex.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash_ex.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_flash_ex.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of FLASH HAL Extension module. ****************************************************************************** * @attention @@ -197,8 +197,8 @@ typedef struct */ #define OB_RDP_LEVEL_0 ((uint8_t)0xAA) #define OB_RDP_LEVEL_1 ((uint8_t)0x55) -/*#define OB_RDP_LEVEL_2 ((uint8_t)0xCC)*/ /*!< Warning: When enabling read protection level 2 - it s no more possible to go back to level 1 or 0 */ +#define OB_RDP_LEVEL_2 ((uint8_t)0xCC) /*!< Warning: When enabling read protection level 2 + it s no more possible to go back to level 1 or 0 */ /** * @} */ @@ -685,9 +685,9 @@ uint16_t HAL_FLASHEx_OB_GetBank2WRP(void); #define IS_OPTIONBYTE(VALUE)(((VALUE) <= (OPTIONBYTE_WRP|OPTIONBYTE_RDP|OPTIONBYTE_USER|OPTIONBYTE_BOR))) -#define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\ - ((LEVEL) == OB_RDP_LEVEL_1))/*||\ - ((LEVEL) == OB_RDP_LEVEL_2))*/ +#define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\ + ((LEVEL) == OB_RDP_LEVEL_1) ||\ + ((LEVEL) == OB_RDP_LEVEL_2)) #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash_ramfunc.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash_ramfunc.c index 368fa4c8b0..1bfb475347 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash_ramfunc.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash_ramfunc.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_flash_ramfunc.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief FLASH RAMFUNC module driver. * This file provides a FLASH firmware functions which should be * executed from internal SRAM diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash_ramfunc.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash_ramfunc.h index 08770bf603..db308ac4c2 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash_ramfunc.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash_ramfunc.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_flash_ramfunc.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of FLASH RAMFUNC driver. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_fmpi2c.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_fmpi2c.c index 1c15cc2e3d..79b1c5bdf3 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_fmpi2c.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_fmpi2c.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_fmpi2c.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief FMPI2C HAL module driver. * * This file provides firmware functions to manage the following diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_fmpi2c.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_fmpi2c.h index 7e5ef307f7..dff8815506 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_fmpi2c.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_fmpi2c.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_fmpi2c.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of FMPI2C HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_fmpi2c_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_fmpi2c_ex.c index 38e03b8a8a..431b1a16c0 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_fmpi2c_ex.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_fmpi2c_ex.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_fmpi2c_ex.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Extended FMPI2C HAL module driver. * * This file provides firmware functions to manage the following diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_fmpi2c_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_fmpi2c_ex.h index 57f0574012..b485c9733b 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_fmpi2c_ex.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_fmpi2c_ex.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_fmpi2c_ex.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of FMPI2C HAL Extension module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_gpio.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_gpio.c index 3ad1ac9c5e..56275fea9a 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_gpio.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_gpio.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_gpio.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief GPIO HAL module driver. * This file provides firmware functions to manage the following * functionalities of the General Purpose Input/Output (GPIO) peripheral: @@ -350,7 +350,7 @@ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) /*------------------------- EXTI Mode Configuration --------------------*/ tmp = SYSCFG->EXTICR[position >> 2]; tmp &= (((uint32_t)0x0F) << (4 * (position & 0x03))); - if(tmp == ((uint32_t)(GET_GPIO_SOURCE(GPIOx)) << (4 * (position & 0x03)))) + if(tmp == ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03)))) { /* Configure the External Interrupt or event for the current IO */ tmp = ((uint32_t)0x0F) << (4 * (position & 0x03)); diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_gpio.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_gpio.h index 0e9c6248f4..f31c0ad75b 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_gpio.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_gpio.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_gpio.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of GPIO HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_gpio_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_gpio_ex.h index 41e7b75563..ddd191dd36 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_gpio_ex.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_gpio_ex.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_gpio_ex.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of GPIO HAL Extension module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hash.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hash.c index 95165aa6f6..1dc145a6e8 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hash.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hash.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_hash.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief HASH HAL module driver. * This file provides firmware functions to manage the following * functionalities of the HASH peripheral: @@ -176,7 +176,7 @@ static void HASH_DMAXferCplt(DMA_HandleTypeDef *hdma) buffersize = hhash->Init.KeySize; } /* Configure the number of valid bits in last word of the message */ - HASH->STR |= 8 * (buffersize % 4); + MODIFY_REG(HASH->STR, HASH_STR_NBLW, 8 * (buffersize % 4)); /* Set the HASH DMA transfer complete */ hhash->hdmain->XferCpltCallback = HASH_DMAXferCplt; @@ -345,7 +345,7 @@ static void HASH_GetDigest(uint8_t *pMsgDigest, uint8_t Size) HAL_StatusTypeDef HAL_HASH_Init(HASH_HandleTypeDef *hhash) { /* Check the hash handle allocation */ - if(hhash == HAL_NULL) + if(hhash == NULL) { return HAL_ERROR; } @@ -392,7 +392,7 @@ HAL_StatusTypeDef HAL_HASH_Init(HASH_HandleTypeDef *hhash) HAL_StatusTypeDef HAL_HASH_DeInit(HASH_HandleTypeDef *hhash) { /* Check the HASH handle allocation */ - if(hhash == HAL_NULL) + if(hhash == NULL) { return HAL_ERROR; } @@ -714,10 +714,15 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuf * @param pInBuffer: Pointer to the input buffer (buffer to be hashed). * @param Size: Length of the input buffer in bytes. * If the Size is not multiple of 64 bytes, the padding is managed by hardware. + * @note Input buffer size in bytes must be a multiple of 4 otherwise the digest computation is corrupted. * @retval HAL status */ HAL_StatusTypeDef HAL_HASH_SHA1_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) { + + /* Check the parameters */ + assert_param(IS_HASH_SHA1_BUFFER_SIZE(Size)); + /* Process Locked */ __HAL_LOCK(hhash); @@ -792,14 +797,6 @@ HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInB /* Process Locked */ __HAL_LOCK(hhash); - if(hhash->HashITCounter == 0) - { - hhash->HashITCounter = 1; - } - else - { - hhash->HashITCounter = 0; - } if(hhash->State == HAL_HASH_STATE_READY) { /* Change the HASH state */ @@ -818,6 +815,8 @@ HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInB the message digest of a new message */ HASH->CR |= HASH_CR_INIT; } + /* Reset interrupt counter */ + hhash->HashITCounter = 0; /* Set the phase */ hhash->Phase = HAL_HASH_PHASE_PROCESS; @@ -851,11 +850,17 @@ HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInB hhash->State = HAL_HASH_STATE_READY; /* Call digest computation complete callback */ HAL_HASH_DgstCpltCallback(hhash); + + /* Process Unlocked */ + __HAL_UNLOCK(hhash); + + /* Return function status */ + return HAL_OK; } } if(__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS)) { - if(hhash->HashInCount > 64) + if(hhash->HashInCount >= 68) { inputaddr = (uint32_t)hhash->pHashInBuffPtr; /* Write the Input block in the Data IN register */ @@ -876,8 +881,11 @@ HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInB } else { - hhash->HashInCount -= 64; + hhash->HashInCount = 0; + hhash->pHashInBuffPtr+= hhash->HashInCount; } + /* Set Interrupt counter */ + hhash->HashITCounter = 1; } else { @@ -901,7 +909,10 @@ HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInB { inputcounter = (inputcounter+4-inputcounter%4); } - + else if ((inputcounter < 4) && (inputcounter != 0)) + { + inputcounter = 4; + } /* Write the Input block in the Data IN register */ for(buffercounter = 0; buffercounter < inputcounter/4; buffercounter++) { @@ -912,11 +923,12 @@ HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInB __HAL_HASH_START_DIGEST(); /* Reset buffer counter */ hhash->HashInCount = 0; + + /* Call Input data transfer complete callback */ + HAL_HASH_InCpltCallback(hhash); } - /* Call Input data transfer complete callback */ - HAL_HASH_InCpltCallback(hhash); } - + /* Process Unlocked */ __HAL_UNLOCK(hhash); @@ -945,14 +957,6 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn /* Process Locked */ __HAL_LOCK(hhash); - if(hhash->HashITCounter == 0) - { - hhash->HashITCounter = 1; - } - else - { - hhash->HashITCounter = 0; - } if(hhash->State == HAL_HASH_STATE_READY) { /* Change the HASH state */ @@ -972,6 +976,9 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn HASH->CR |= HASH_CR_INIT; } + /* Reset interrupt counter */ + hhash->HashITCounter = 0; + /* Set the phase */ hhash->Phase = HAL_HASH_PHASE_PROCESS; @@ -1005,11 +1012,17 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn hhash->State = HAL_HASH_STATE_READY; /* Call digest computation complete callback */ HAL_HASH_DgstCpltCallback(hhash); + + /* Process Unlocked */ + __HAL_UNLOCK(hhash); + + /* Return function status */ + return HAL_OK; } } if(__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS)) { - if(hhash->HashInCount > 64) + if(hhash->HashInCount >= 68) { inputaddr = (uint32_t)hhash->pHashInBuffPtr; /* Write the Input block in the Data IN register */ @@ -1021,7 +1034,6 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn if(hhash->HashITCounter == 0) { HASH->DIN = *(uint32_t*)inputaddr; - if(hhash->HashInCount >= 68) { /* Decrement buffer counter */ @@ -1030,8 +1042,11 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn } else { - hhash->HashInCount -= 64; + hhash->HashInCount = 0; + hhash->pHashInBuffPtr+= hhash->HashInCount; } + /* Set Interrupt counter */ + hhash->HashITCounter = 1; } else { @@ -1055,7 +1070,10 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn { inputcounter = (inputcounter+4-inputcounter%4); } - + else if ((inputcounter < 4) && (inputcounter != 0)) + { + inputcounter = 4; + } /* Write the Input block in the Data IN register */ for(buffercounter = 0; buffercounter < inputcounter/4; buffercounter++) { @@ -1066,9 +1084,10 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn __HAL_HASH_START_DIGEST(); /* Reset buffer counter */ hhash->HashInCount = 0; + + /* Call Input data transfer complete callback */ + HAL_HASH_InCpltCallback(hhash); } - /* Call Input data transfer complete callback */ - HAL_HASH_InCpltCallback(hhash); } /* Process Unlocked */ @@ -1089,11 +1108,11 @@ void HAL_HASH_IRQHandler(HASH_HandleTypeDef *hhash) switch(HASH->CR & HASH_CR_ALGO) { case HASH_ALGOSELECTION_MD5: - HAL_HASH_MD5_Start_IT(hhash, HAL_NULL, 0, HAL_NULL); + HAL_HASH_MD5_Start_IT(hhash, NULL, 0, NULL); break; case HASH_ALGOSELECTION_SHA1: - HAL_HASH_SHA1_Start_IT(hhash, HAL_NULL, 0, HAL_NULL); + HAL_HASH_SHA1_Start_IT(hhash, NULL, 0, NULL); break; default: diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hash.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hash.h index 8fcc0e708b..fb39cdd772 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hash.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hash.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_hash.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of HASH HAL module. ****************************************************************************** * @attention @@ -210,8 +210,8 @@ typedef struct /** @defgroup HASH_Exported_Constants_Group6 HASH Interrupts definition * @{ */ -#define HASH_IT_DINI HASH_IMR_DINIM /*!< A new block can be entered into the input buffer (DIN) */ -#define HASH_IT_DCI HASH_IMR_DCIM /*!< Digest calculation complete */ +#define HASH_IT_DINI HASH_IMR_DINIE /*!< A new block can be entered into the input buffer (DIN) */ +#define HASH_IT_DCI HASH_IMR_DCIE /*!< Digest calculation complete */ /** * @} */ @@ -241,8 +241,8 @@ typedef struct * @arg HASH_FLAG_DINNE: DIN not empty : The input buffer contains at least one word of data * @retval The new state of __FLAG__ (TRUE or FALSE). */ -#define __HAL_HASH_GET_FLAG(__FLAG__) ((HASH->SR & (__FLAG__)) == (__FLAG__)) - +#define __HAL_HASH_GET_FLAG(__FLAG__) (((__FLAG__) > 8U) ? ((HASH->CR & (__FLAG__)) == (__FLAG__)) :\ + ((HASH->SR & (__FLAG__)) == (__FLAG__))) /** * @brief Enable the multiple DMA mode. * This feature is available only in STM32F429x and STM32F439x devices. @@ -267,7 +267,7 @@ typedef struct * @param SIZE: size in byte of last data written in Data register. * @retval None */ -#define __HAL_HASH_SET_NBVALIDBITS(SIZE) do{HASH->STR &= ~(HASH_STR_NBW);\ +#define __HAL_HASH_SET_NBVALIDBITS(SIZE) do{HASH->STR &= ~(HASH_STR_NBLW);\ HASH->STR |= 8 * ((SIZE) % 4);\ }while(0) @@ -416,6 +416,8 @@ void HAL_HASH_ErrorCallback(HASH_HandleTypeDef *hhash); #define IS_HASH_HMAC_KEYTYPE(__KEYTYPE__) (((__KEYTYPE__) == HASH_HMAC_KEYTYPE_SHORTKEY) || \ ((__KEYTYPE__) == HASH_HMAC_KEYTYPE_LONGKEY)) +#define IS_HASH_SHA1_BUFFER_SIZE(__SIZE__) ((((__SIZE__)%4) != 0)? 0U: 1U) + /** * @} */ diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hash_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hash_ex.c index d56e4c5a8e..1daa4b54c1 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hash_ex.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hash_ex.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_hash_ex.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief HASH HAL Extension module driver. * This file provides firmware functions to manage the following * functionalities of HASH peripheral: @@ -265,7 +265,7 @@ static void HASHEx_DMAXferCplt(DMA_HandleTypeDef *hdma) buffersize = hhash->Init.KeySize; } /* Configure the number of valid bits in last word of the message */ - HASH->STR |= 8 * (buffersize % 4); + MODIFY_REG(HASH->STR, HASH_STR_NBLW, 8 * (buffersize % 4)); /* Set the HASH DMA transfer complete */ hhash->hdmain->XferCpltCallback = HASHEx_DMAXferCplt; @@ -926,14 +926,6 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t /* Process Locked */ __HAL_LOCK(hhash); - if(hhash->HashITCounter == 0) - { - hhash->HashITCounter = 1; - } - else - { - hhash->HashITCounter = 0; - } if(hhash->State == HAL_HASH_STATE_READY) { /* Change the HASH state */ @@ -953,6 +945,9 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t HASH->CR |= HASH_CR_INIT; } + /* Reset interrupt counter */ + hhash->HashITCounter = 0; + /* Set the phase */ hhash->Phase = HAL_HASH_PHASE_PROCESS; @@ -977,11 +972,17 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t hhash->State = HAL_HASH_STATE_READY; /* Call digest computation complete callback */ HAL_HASH_DgstCpltCallback(hhash); + + /* Process Unlocked */ + __HAL_UNLOCK(hhash); + + /* Return function status */ + return HAL_OK; } } if(__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS)) { - if(hhash->HashInCount > 64) + if(hhash->HashInCount >= 68) { inputaddr = (uint32_t)hhash->pHashInBuffPtr; /* Write the Input block in the Data IN register */ @@ -993,6 +994,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t if(hhash->HashITCounter == 0) { HASH->DIN = *(uint32_t*)inputaddr; + if(hhash->HashInCount >= 68) { /* Decrement buffer counter */ @@ -1001,8 +1003,11 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t } else { - hhash->HashInCount -= 64; + hhash->HashInCount = 0; + hhash->pHashInBuffPtr+= hhash->HashInCount; } + /* Set Interrupt counter */ + hhash->HashITCounter = 1; } else { @@ -1026,7 +1031,10 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t { inputcounter = (inputcounter+4-inputcounter%4); } - + else if ((inputcounter < 4) && (inputcounter != 0)) + { + inputcounter = 4; + } /* Write the Input block in the Data IN register */ for(buffercounter = 0; buffercounter < inputcounter/4; buffercounter++) { @@ -1037,9 +1045,10 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t __HAL_HASH_START_DIGEST(); /* Reset buffer counter */ hhash->HashInCount = 0; + + /* Call Input data transfer complete callback */ + HAL_HASH_InCpltCallback(hhash); } - /* Call Input data transfer complete callback */ - HAL_HASH_InCpltCallback(hhash); } /* Process Unlocked */ @@ -1070,14 +1079,6 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t /* Process Locked */ __HAL_LOCK(hhash); - if(hhash->HashITCounter == 0) - { - hhash->HashITCounter = 1; - } - else - { - hhash->HashITCounter = 0; - } if(hhash->State == HAL_HASH_STATE_READY) { /* Change the HASH state */ @@ -1097,6 +1098,9 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t HASH->CR |= HASH_CR_INIT; } + /* Reset interrupt counter */ + hhash->HashITCounter = 0; + /* Set the phase */ hhash->Phase = HAL_HASH_PHASE_PROCESS; @@ -1121,11 +1125,17 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t hhash->State = HAL_HASH_STATE_READY; /* Call digest computation complete callback */ HAL_HASH_DgstCpltCallback(hhash); + + /* Process Unlocked */ + __HAL_UNLOCK(hhash); + + /* Return function status */ + return HAL_OK; } } if(__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS)) { - if(hhash->HashInCount > 64) + if(hhash->HashInCount >= 68) { inputaddr = (uint32_t)hhash->pHashInBuffPtr; /* Write the Input block in the Data IN register */ @@ -1137,7 +1147,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t if(hhash->HashITCounter == 0) { HASH->DIN = *(uint32_t*)inputaddr; - + if(hhash->HashInCount >= 68) { /* Decrement buffer counter */ @@ -1146,8 +1156,11 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t } else { - hhash->HashInCount -= 64; + hhash->HashInCount = 0; + hhash->pHashInBuffPtr+= hhash->HashInCount; } + /* Set Interrupt counter */ + hhash->HashITCounter = 1; } else { @@ -1171,7 +1184,10 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t { inputcounter = (inputcounter+4-inputcounter%4); } - + else if ((inputcounter < 4) && (inputcounter != 0)) + { + inputcounter = 4; + } /* Write the Input block in the Data IN register */ for(buffercounter = 0; buffercounter < inputcounter/4; buffercounter++) { @@ -1182,9 +1198,10 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t __HAL_HASH_START_DIGEST(); /* Reset buffer counter */ hhash->HashInCount = 0; + + /* Call Input data transfer complete callback */ + HAL_HASH_InCpltCallback(hhash); } - /* Call Input data transfer complete callback */ - HAL_HASH_InCpltCallback(hhash); } /* Process Unlocked */ @@ -1206,11 +1223,11 @@ void HAL_HASHEx_IRQHandler(HASH_HandleTypeDef *hhash) { case HASH_ALGOSELECTION_SHA224: - HAL_HASHEx_SHA224_Start_IT(hhash, HAL_NULL, 0, HAL_NULL); + HAL_HASHEx_SHA224_Start_IT(hhash, NULL, 0, NULL); break; case HASH_ALGOSELECTION_SHA256: - HAL_HASHEx_SHA256_Start_IT(hhash, HAL_NULL, 0, HAL_NULL); + HAL_HASHEx_SHA256_Start_IT(hhash, NULL, 0, NULL); break; default: diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hash_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hash_ex.h index 0bab531a63..b4d2625b2d 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hash_ex.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hash_ex.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_hash_ex.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of HASH HAL Extension module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hcd.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hcd.c index 38994e1002..2395983cdd 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hcd.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hcd.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_hcd.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief HCD HAL module driver. * This file provides firmware functions to manage the following * functionalities of the USB Peripheral Controller: @@ -26,8 +26,9 @@ (#)Initialize the HCD low level resources through the HAL_HCD_MspInit() API: (##) Enable the HCD/USB Low Level interface clock using the following macros - (+++) __OTGFS-OTG_CLK_ENABLE() or __OTGHS-OTG_CLK_ENABLE() - (+++) __OTGHSULPI_CLK_ENABLE() For High Speed Mode + (+++) __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); + (+++) __HAL_RCC_USB_OTG_HS_CLK_ENABLE(); (For High Speed Mode) + (+++) __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE(); (For High Speed Mode) (##) Initialize the related GPIO clocks (##) Configure HCD pin-out @@ -77,7 +78,8 @@ * @{ */ -/** @addtogroup HCD +/** @defgroup HCD HCD + * @brief HCD HAL module driver * @{ */ @@ -87,8 +89,8 @@ /* Private define ------------------------------------------------------------*/ /* Private macro -------------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/ -/* Private function ----------------------------------------------------------*/ -/** @addtogroup HCD_Private_Functions +/* Private function prototypes -----------------------------------------------*/ +/** @defgroup HCD_Private_Functions HCD Private Functions * @{ */ static void HCD_HC_IN_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum); @@ -100,12 +102,12 @@ static void HCD_Port_IRQHandler(HCD_HandleTypeDef *hhcd); */ /* Exported functions --------------------------------------------------------*/ -/** @addtogroup HCD_Exported_Functions +/** @defgroup HCD_Exported_Functions HCD Exported Functions * @{ */ -/** @addtogroup HCD_Exported_Functions_Group1 - * @brief Initialization and de-initialization functions +/** @defgroup HCD_Exported_Functions_Group1 Initialization and de-initialization functions + * @brief Initialization and Configuration functions * @verbatim =============================================================================== @@ -118,14 +120,14 @@ static void HCD_Port_IRQHandler(HCD_HandleTypeDef *hhcd); */ /** - * @brief Initialize the host driver + * @brief Initialize the host driver. * @param hhcd: HCD handle * @retval HAL status */ HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd) { /* Check the HCD handle allocation */ - if(hhcd == HAL_NULL) + if(hhcd == NULL) { return HAL_ERROR; } @@ -156,7 +158,7 @@ HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd) } /** - * @brief Initialize a host channel + * @brief Initialize a host channel. * @param hhcd: HCD handle * @param ch_num: Channel number. * This parameter can be a value from 1 to 15 @@ -212,7 +214,7 @@ HAL_StatusTypeDef HAL_HCD_HC_Init(HCD_HandleTypeDef *hhcd, } /** - * @brief Halt a host channel + * @brief Halt a host channel. * @param hhcd: HCD handle * @param ch_num: Channel number. * This parameter can be a value from 1 to 15 @@ -230,14 +232,14 @@ HAL_StatusTypeDef HAL_HCD_HC_Halt(HCD_HandleTypeDef *hhcd, uint8_t ch_num) } /** - * @brief DeInitialize the host driver + * @brief DeInitialize the host driver. * @param hhcd: HCD handle * @retval HAL status */ HAL_StatusTypeDef HAL_HCD_DeInit(HCD_HandleTypeDef *hhcd) { /* Check the HCD handle allocation */ - if(hhcd == HAL_NULL) + if(hhcd == NULL) { return HAL_ERROR; } @@ -255,7 +257,7 @@ HAL_StatusTypeDef HAL_HCD_DeInit(HCD_HandleTypeDef *hhcd) } /** - * @brief Initializes the HCD MSP. + * @brief Initialize the HCD MSP. * @param hhcd: HCD handle * @retval None */ @@ -267,7 +269,7 @@ __weak void HAL_HCD_MspInit(HCD_HandleTypeDef *hhcd) } /** - * @brief DeInitializes HCD MSP. + * @brief DeInitialize the HCD MSP. * @param hhcd: HCD handle * @retval None */ @@ -282,14 +284,14 @@ __weak void HAL_HCD_MspDeInit(HCD_HandleTypeDef *hhcd) * @} */ -/** @addtogroup HCD_Exported_Functions_Group2 +/** @defgroup HCD_Exported_Functions_Group2 Input and Output operation functions * @brief HCD IO operation functions * @verbatim =============================================================================== ##### IO operation functions ##### =============================================================================== - This subsection provides a set of functions allowing to manage the USB Host Data + [..] This subsection provides a set of functions allowing to manage the USB Host Data Transfer @endverbatim @@ -297,7 +299,7 @@ __weak void HAL_HCD_MspDeInit(HCD_HandleTypeDef *hhcd) */ /** - * @brief Submit a new URB for processing + * @brief Submit a new URB for processing. * @param hhcd: HCD handle * @param ch_num: Channel number. * This parameter can be a value from 1 to 15 @@ -440,7 +442,7 @@ HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd, } /** - * @brief This function handles HCD interrupt request. + * @brief Handle HCD interrupt request. * @param hhcd: HCD handle * @retval None */ @@ -555,7 +557,7 @@ __weak void HAL_HCD_SOF_Callback(HCD_HandleTypeDef *hhcd) } /** - * @brief Connexion Event callback. + * @brief Connection Event callback. * @param hhcd: HCD handle * @retval None */ @@ -567,7 +569,7 @@ __weak void HAL_HCD_Connect_Callback(HCD_HandleTypeDef *hhcd) } /** - * @brief Disconnexion Event callback. + * @brief Disconnection Event callback. * @param hhcd: HCD handle * @retval None */ @@ -604,8 +606,8 @@ __weak void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd, uint8_t * @} */ -/** @addtogroup HCD_Exported_Functions_Group3 - * @brief Peripheral State functions +/** @defgroup HCD_Exported_Functions_Group3 Peripheral Control functions + * @brief Management functions * @verbatim =============================================================================== @@ -620,7 +622,7 @@ __weak void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd, uint8_t */ /** - * @brief Start the host driver + * @brief Start the host driver. * @param hhcd: HCD handle * @retval HAL status */ @@ -634,7 +636,7 @@ HAL_StatusTypeDef HAL_HCD_Start(HCD_HandleTypeDef *hhcd) } /** - * @brief Stop the host driver + * @brief Stop the host driver. * @param hhcd: HCD handle * @retval HAL status */ @@ -648,7 +650,7 @@ HAL_StatusTypeDef HAL_HCD_Stop(HCD_HandleTypeDef *hhcd) } /** - * @brief Reset the host port + * @brief Reset the host port. * @param hhcd: HCD handle * @retval HAL status */ @@ -661,7 +663,7 @@ HAL_StatusTypeDef HAL_HCD_ResetPort(HCD_HandleTypeDef *hhcd) * @} */ -/** @addtogroup HCD_Exported_Functions_Group4 +/** @defgroup HCD_Exported_Functions_Group4 Peripheral State functions * @brief Peripheral State functions * @verbatim @@ -677,7 +679,7 @@ HAL_StatusTypeDef HAL_HCD_ResetPort(HCD_HandleTypeDef *hhcd) */ /** - * @brief Return the HCD state + * @brief Return the HCD handle state. * @param hhcd: HCD handle * @retval HAL state */ @@ -687,7 +689,7 @@ HCD_StateTypeDef HAL_HCD_GetState(HCD_HandleTypeDef *hhcd) } /** - * @brief Return URB state for a channel + * @brief Return URB state for a channel. * @param hhcd: HCD handle * @param chnum: Channel number. * This parameter can be a value from 1 to 15 @@ -698,7 +700,7 @@ HCD_StateTypeDef HAL_HCD_GetState(HCD_HandleTypeDef *hhcd) * URB_NOTREADY/ * URB_NYET/ * URB_ERROR/ - * URB_STALL/ + * URB_STALL */ HCD_URBStateTypeDef HAL_HCD_HC_GetURBState(HCD_HandleTypeDef *hhcd, uint8_t chnum) { @@ -707,7 +709,7 @@ HCD_URBStateTypeDef HAL_HCD_HC_GetURBState(HCD_HandleTypeDef *hhcd, uint8_t chnu /** - * @brief Return the last host transfer size + * @brief Return the last host transfer size. * @param hhcd: HCD handle * @param chnum: Channel number. * This parameter can be a value from 1 to 15 @@ -719,12 +721,12 @@ uint32_t HAL_HCD_HC_GetXferCount(HCD_HandleTypeDef *hhcd, uint8_t chnum) } /** - * @brief Return the Host Channel state + * @brief Return the Host Channel state. * @param hhcd: HCD handle * @param chnum: Channel number. * This parameter can be a value from 1 to 15 * @retval Host channel state - * This parameter can be one of the these values: + * This parameter can be one of these values: * HC_IDLE/ * HC_XFRC/ * HC_HALTED/ @@ -733,7 +735,7 @@ uint32_t HAL_HCD_HC_GetXferCount(HCD_HandleTypeDef *hhcd, uint8_t chnum) * HC_STALL/ * HC_XACTERR/ * HC_BBLERR/ - * HC_DATATGLERR/ + * HC_DATATGLERR */ HCD_HCStateTypeDef HAL_HCD_HC_GetState(HCD_HandleTypeDef *hhcd, uint8_t chnum) { @@ -741,7 +743,7 @@ HCD_HCStateTypeDef HAL_HCD_HC_GetState(HCD_HandleTypeDef *hhcd, uint8_t chnum) } /** - * @brief Return the current Host frame number + * @brief Return the current Host frame number. * @param hhcd: HCD handle * @retval Current Host frame number */ @@ -751,7 +753,7 @@ uint32_t HAL_HCD_GetCurrentFrame(HCD_HandleTypeDef *hhcd) } /** - * @brief Return the Host enumeration speed + * @brief Return the Host enumeration speed. * @param hhcd: HCD handle * @retval Enumeration speed */ @@ -759,6 +761,7 @@ uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd) { return (USB_GetHostSpeed(hhcd->Instance)); } + /** * @} */ @@ -771,7 +774,7 @@ uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd) * @{ */ /** - * @brief This function handles Host Channel IN interrupt requests. + * @brief Handle Host Channel IN interrupt requests. * @param hhcd: HCD handle * @param chnum: Channel number. * This parameter can be a value from 1 to 15 @@ -780,6 +783,7 @@ uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd) static void HCD_HC_IN_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum) { USB_OTG_GlobalTypeDef *USBx = hhcd->Instance; + uint32_t tmpreg = 0; if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_AHBERR) { @@ -874,8 +878,10 @@ static void HCD_HC_IN_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum) } /* re-activate the channel */ - USBx_HC(chnum)->HCCHAR &= ~USB_OTG_HCCHAR_CHDIS; - USBx_HC(chnum)->HCCHAR |= USB_OTG_HCCHAR_CHENA; + tmpreg = USBx_HC(chnum)->HCCHAR; + tmpreg &= ~USB_OTG_HCCHAR_CHDIS; + tmpreg |= USB_OTG_HCCHAR_CHENA; + USBx_HC(chnum)->HCCHAR = tmpreg; } __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_CHH); HAL_HCD_HC_NotifyURBChange_Callback(hhcd, chnum, hhcd->hc[chnum].urb_state); @@ -899,10 +905,11 @@ static void HCD_HC_IN_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum) else if ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL)|| (hhcd->hc[chnum].ep_type == EP_TYPE_BULK)) { - /* re-activate the channel */ - USBx_HC(chnum)->HCCHAR &= ~USB_OTG_HCCHAR_CHDIS; - USBx_HC(chnum)->HCCHAR |= USB_OTG_HCCHAR_CHENA; - + /* re-activate the channel */ + tmpreg = USBx_HC(chnum)->HCCHAR; + tmpreg &= ~USB_OTG_HCCHAR_CHDIS; + tmpreg |= USB_OTG_HCCHAR_CHENA; + USBx_HC(chnum)->HCCHAR = tmpreg; } hhcd->hc[chnum].state = HC_NAK; __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NAK); @@ -910,7 +917,7 @@ static void HCD_HC_IN_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum) } /** - * @brief This function handles Host Channel OUT interrupt requests. + * @brief Handle Host Channel OUT interrupt requests. * @param hhcd: HCD handle * @param chnum: Channel number. * This parameter can be a value from 1 to 15 @@ -919,6 +926,7 @@ static void HCD_HC_IN_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum) static void HCD_HC_OUT_IRQHandler (HCD_HandleTypeDef *hhcd, uint8_t chnum) { USB_OTG_GlobalTypeDef *USBx = hhcd->Instance; + uint32_t tmpreg = 0; if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_AHBERR) { @@ -1042,8 +1050,10 @@ static void HCD_HC_OUT_IRQHandler (HCD_HandleTypeDef *hhcd, uint8_t chnum) } /* re-activate the channel */ - USBx_HC(chnum)->HCCHAR &= ~USB_OTG_HCCHAR_CHDIS; - USBx_HC(chnum)->HCCHAR |= USB_OTG_HCCHAR_CHENA; + tmpreg = USBx_HC(chnum)->HCCHAR; + tmpreg &= ~USB_OTG_HCCHAR_CHDIS; + tmpreg |= USB_OTG_HCCHAR_CHENA; + USBx_HC(chnum)->HCCHAR = tmpreg; } __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_CHH); @@ -1052,7 +1062,7 @@ static void HCD_HC_OUT_IRQHandler (HCD_HandleTypeDef *hhcd, uint8_t chnum) } /** - * @brief This function handles Rx Queue Level interrupt requests. + * @brief Handle Rx Queue Level interrupt requests. * @param hhcd: HCD handle * @retval None */ @@ -1063,6 +1073,7 @@ static void HCD_RXQLVL_IRQHandler(HCD_HandleTypeDef *hhcd) uint32_t pktsts; uint32_t pktcnt; uint32_t temp = 0; + uint32_t tmpreg = 0; temp = hhcd->Instance->GRXSTSP; channelnum = temp & USB_OTG_GRXSTSP_EPNUM; @@ -1085,8 +1096,10 @@ static void HCD_RXQLVL_IRQHandler(HCD_HandleTypeDef *hhcd) if((USBx_HC(channelnum)->HCTSIZ & USB_OTG_HCTSIZ_PKTCNT) > 0) { /* re-activate the channel when more packets are expected */ - USBx_HC(channelnum)->HCCHAR &= ~USB_OTG_HCCHAR_CHDIS; - USBx_HC(channelnum)->HCCHAR |= USB_OTG_HCCHAR_CHENA; + tmpreg = USBx_HC(channelnum)->HCCHAR; + tmpreg &= ~USB_OTG_HCCHAR_CHDIS; + tmpreg |= USB_OTG_HCCHAR_CHENA; + USBx_HC(channelnum)->HCCHAR = tmpreg; hhcd->hc[channelnum].toggle_in ^= 1; } } @@ -1102,7 +1115,7 @@ static void HCD_RXQLVL_IRQHandler(HCD_HandleTypeDef *hhcd) } /** - * @brief This function handles Host Port interrupt requests. + * @brief Handle Host Port interrupt requests. * @param hhcd: HCD handle * @retval None */ @@ -1182,6 +1195,10 @@ static void HCD_Port_IRQHandler (HCD_HandleTypeDef *hhcd) USBx_HPRT0 = hprt0_dup; } +/** + * @} + */ + /** * @} */ diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hcd.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hcd.h index c9a353f0e0..5627d56f6a 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hcd.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_hcd.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_hcd.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of HCD HAL module. ****************************************************************************** * @attention @@ -50,8 +50,7 @@ * @{ */ -/** @defgroup HCD HCD - * @brief HCD HAL module driver +/** @addtogroup HCD * @{ */ @@ -105,6 +104,7 @@ typedef struct /** @defgroup HCD_Exported_Constants HCD Exported Constants * @{ */ + /** @defgroup HCD_Speed HCD Speed * @{ */ @@ -150,11 +150,12 @@ typedef struct */ /* Exported functions --------------------------------------------------------*/ -/** @defgroup HCD_Exported_Functions HCD Exported Functions +/** @addtogroup HCD_Exported_Functions HCD Exported Functions * @{ */ -/** @defgroup HCD_Exported_Functions_Group1 Initialization and de-initialization functions +/* Initialization/de-initialization functions ********************************/ +/** @addtogroup HCD_Exported_Functions_Group1 Initialization and de-initialization functions * @{ */ HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd); @@ -168,13 +169,15 @@ HAL_StatusTypeDef HAL_HCD_HC_Init(HCD_HandleTypeDef *hhcd, uint16_t mps); HAL_StatusTypeDef HAL_HCD_HC_Halt(HCD_HandleTypeDef *hhcd, uint8_t ch_num); + void HAL_HCD_MspInit(HCD_HandleTypeDef *hhcd); void HAL_HCD_MspDeInit(HCD_HandleTypeDef *hhcd); /** * @} */ -/** @defgroup HCD_Exported_Functions_Group2 IO operation functions +/* I/O operation functions ***************************************************/ +/** @addtogroup HCD_Exported_Functions_Group2 IO operation functions * @{ */ HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd, @@ -198,7 +201,8 @@ void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd, * @} */ -/** @defgroup HCD_Exported_Functions_Group3 Peripheral Control functions +/* Peripheral Control functions **********************************************/ +/** @addtogroup HCD_Exported_Functions_Group3 Peripheral Control functions * @{ */ HAL_StatusTypeDef HAL_HCD_ResetPort(HCD_HandleTypeDef *hhcd); @@ -208,7 +212,8 @@ HAL_StatusTypeDef HAL_HCD_Stop(HCD_HandleTypeDef *hhcd); * @} */ -/** @defgroup HCD_Exported_Functions_Group4 Peripheral State functions +/* Peripheral State functions ************************************************/ +/** @addtogroup HCD_Exported_Functions_Group4 Peripheral State functions * @{ */ HCD_StateTypeDef HAL_HCD_GetState(HCD_HandleTypeDef *hhcd); @@ -247,24 +252,6 @@ uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd); * @} */ -/* Private functions prototypes ----------------------------------------------*/ -/** @defgroup HCD_Private_Functions_Prototypes HCD Private Functions Prototypes - * @{ - */ - -/** - * @} - */ - -/* Private functions ---------------------------------------------------------*/ -/** @defgroup HCD_Private_Functions HCD Private Functions - * @{ - */ - -/** - * @} - */ - /** * @} */ diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2c.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2c.c index 88042f7de0..179b608b7a 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2c.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2c.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_i2c.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief I2C HAL module driver. * This file provides firmware functions to manage the following * functionalities of the Inter Integrated Circuit (I2C) peripheral: @@ -201,6 +201,7 @@ */ #define I2C_TIMEOUT_FLAG ((uint32_t)35) /* 35 ms */ #define I2C_TIMEOUT_ADDR_SLAVE ((uint32_t)10000) /* 10 s */ +#define I2C_TIMEOUT_BUSY_FLAG ((uint32_t)10000) /* 10 s */ /** * @} */ @@ -291,7 +292,7 @@ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) uint32_t pclk1 = 0; /* Check the I2C handle allocation */ - if(hi2c == HAL_NULL) + if(hi2c == NULL) { return HAL_ERROR; } @@ -368,7 +369,7 @@ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c) { /* Check the I2C handle allocation */ - if(hi2c == HAL_NULL) + if(hi2c == NULL) { return HAL_ERROR; } @@ -497,18 +498,22 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevA { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } - if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) + /* Wait until BUSY flag is reset */ + if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) { return HAL_BUSY; } /* Process Locked */ __HAL_LOCK(hi2c); + + /* Disable Pos */ + hi2c->Instance->CR1 &= ~I2C_CR1_POS; hi2c->State = HAL_I2C_STATE_BUSY_TX; hi2c->ErrorCode = HAL_I2C_ERROR_NONE; @@ -562,12 +567,6 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevA /* Generate Stop */ hi2c->Instance->CR1 |= I2C_CR1_STOP; - /* Wait until BUSY flag is reset */ - if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - hi2c->State = HAL_I2C_STATE_READY; /* Process Unlocked */ @@ -595,18 +594,22 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAd { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } - if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) + /* Wait until BUSY flag is reset */ + if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) { return HAL_BUSY; } - + /* Process Locked */ __HAL_LOCK(hi2c); + + /* Disable Pos */ + hi2c->Instance->CR1 &= ~I2C_CR1_POS; hi2c->State = HAL_I2C_STATE_BUSY_RX; hi2c->ErrorCode = HAL_I2C_ERROR_NONE; @@ -751,15 +754,6 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAd } } - /* Disable Pos */ - hi2c->Instance->CR1 &= ~I2C_CR1_POS; - - /* Wait until BUSY flag is reset */ - if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - hi2c->State = HAL_I2C_STATE_READY; /* Process Unlocked */ @@ -786,18 +780,22 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } - if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) + /* Wait until BUSY flag is reset */ + if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) { return HAL_BUSY; } /* Process Locked */ __HAL_LOCK(hi2c); + + /* Disable Pos */ + hi2c->Instance->CR1 &= ~I2C_CR1_POS; hi2c->State = HAL_I2C_STATE_BUSY_TX; hi2c->ErrorCode = HAL_I2C_ERROR_NONE; @@ -859,12 +857,6 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData /* Disable Address Acknowledge */ hi2c->Instance->CR1 &= ~I2C_CR1_ACK; - /* Wait until BUSY flag is reset */ - if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - hi2c->State = HAL_I2C_STATE_READY; /* Process Unlocked */ @@ -891,18 +883,22 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } - if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) + /* Wait until BUSY flag is reset */ + if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) { return HAL_BUSY; } /* Process Locked */ __HAL_LOCK(hi2c); + + /* Disable Pos */ + hi2c->Instance->CR1 &= ~I2C_CR1_POS; hi2c->State = HAL_I2C_STATE_BUSY_RX; hi2c->ErrorCode = HAL_I2C_ERROR_NONE; @@ -951,12 +947,6 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, /* Disable Address Acknowledge */ hi2c->Instance->CR1 &= ~I2C_CR1_ACK; - /* Wait until BUSY flag is reset */ - if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - hi2c->State = HAL_I2C_STATE_READY; /* Process Unlocked */ @@ -983,18 +973,22 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t D { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } - if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) + /* Wait until BUSY flag is reset */ + if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) { return HAL_BUSY; } /* Process Locked */ __HAL_LOCK(hi2c); + + /* Disable Pos */ + hi2c->Instance->CR1 &= ~I2C_CR1_POS; hi2c->State = HAL_I2C_STATE_BUSY_TX; hi2c->ErrorCode = HAL_I2C_ERROR_NONE; @@ -1054,18 +1048,22 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t De { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } - if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) + /* Wait until BUSY flag is reset */ + if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) { return HAL_BUSY; } /* Process Locked */ __HAL_LOCK(hi2c); + + /* Disable Pos */ + hi2c->Instance->CR1 &= ~I2C_CR1_POS; hi2c->State = HAL_I2C_STATE_BUSY_RX; hi2c->ErrorCode = HAL_I2C_ERROR_NONE; @@ -1152,18 +1150,22 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pD { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } - if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) + /* Wait until BUSY flag is reset */ + if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) { return HAL_BUSY; } /* Process Locked */ __HAL_LOCK(hi2c); + + /* Disable Pos */ + hi2c->Instance->CR1 &= ~I2C_CR1_POS; hi2c->State = HAL_I2C_STATE_BUSY_TX; hi2c->ErrorCode = HAL_I2C_ERROR_NONE; @@ -1205,18 +1207,22 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pDa { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } - if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) + /* Wait until BUSY flag is reset */ + if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) { return HAL_BUSY; } /* Process Locked */ __HAL_LOCK(hi2c); + + /* Disable Pos */ + hi2c->Instance->CR1 &= ~I2C_CR1_POS; hi2c->State = HAL_I2C_STATE_BUSY_RX; hi2c->ErrorCode = HAL_I2C_ERROR_NONE; @@ -1259,18 +1265,22 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } - if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) + /* Wait until BUSY flag is reset */ + if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) { return HAL_BUSY; } /* Process Locked */ __HAL_LOCK(hi2c); + + /* Disable Pos */ + hi2c->Instance->CR1 &= ~I2C_CR1_POS; hi2c->State = HAL_I2C_STATE_BUSY_TX; hi2c->ErrorCode = HAL_I2C_ERROR_NONE; @@ -1335,18 +1345,22 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t D { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } - if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) + /* Wait until BUSY flag is reset */ + if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) { return HAL_BUSY; } /* Process Locked */ __HAL_LOCK(hi2c); + + /* Disable Pos */ + hi2c->Instance->CR1 &= ~I2C_CR1_POS; hi2c->State = HAL_I2C_STATE_BUSY_RX; hi2c->ErrorCode = HAL_I2C_ERROR_NONE; @@ -1421,18 +1435,22 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *p { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } - if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) + /* Wait until BUSY flag is reset */ + if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) { return HAL_BUSY; } /* Process Locked */ __HAL_LOCK(hi2c); + + /* Disable Pos */ + hi2c->Instance->CR1 &= ~I2C_CR1_POS; hi2c->State = HAL_I2C_STATE_BUSY_TX; hi2c->ErrorCode = HAL_I2C_ERROR_NONE; @@ -1506,18 +1524,22 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pD { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } - if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) + /* Wait until BUSY flag is reset */ + if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) { return HAL_BUSY; } /* Process Locked */ __HAL_LOCK(hi2c); + + /* Disable Pos */ + hi2c->Instance->CR1 &= ~I2C_CR1_POS; hi2c->State = HAL_I2C_STATE_BUSY_RX; hi2c->ErrorCode = HAL_I2C_ERROR_NONE; @@ -1579,18 +1601,22 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } - if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) + /* Wait until BUSY flag is reset */ + if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) { return HAL_BUSY; } /* Process Locked */ __HAL_LOCK(hi2c); + + /* Disable Pos */ + hi2c->Instance->CR1 &= ~I2C_CR1_POS; hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX; hi2c->ErrorCode = HAL_I2C_ERROR_NONE; @@ -1641,12 +1667,6 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress /* Generate Stop */ hi2c->Instance->CR1 |= I2C_CR1_STOP; - /* Wait until BUSY flag is reset */ - if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - hi2c->State = HAL_I2C_STATE_READY; /* Process Unlocked */ @@ -1679,18 +1699,22 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } - if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) + /* Wait until BUSY flag is reset */ + if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) { return HAL_BUSY; } /* Process Locked */ __HAL_LOCK(hi2c); + + /* Disable Pos */ + hi2c->Instance->CR1 &= ~I2C_CR1_POS; hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX; hi2c->ErrorCode = HAL_I2C_ERROR_NONE; @@ -1832,15 +1856,6 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, } } - /* Disable Pos */ - hi2c->Instance->CR1 &= ~I2C_CR1_POS; - - /* Wait until BUSY flag is reset */ - if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - hi2c->State = HAL_I2C_STATE_READY; /* Process Unlocked */ @@ -1871,18 +1886,22 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddr if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } - if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) + /* Wait until BUSY flag is reset */ + if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) { return HAL_BUSY; } /* Process Locked */ __HAL_LOCK(hi2c); + + /* Disable Pos */ + hi2c->Instance->CR1 &= ~I2C_CR1_POS; hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX; hi2c->ErrorCode = HAL_I2C_ERROR_NONE; @@ -1944,18 +1963,22 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddre if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } - if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) + /* Wait until BUSY flag is reset */ + if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) { return HAL_BUSY; } /* Process Locked */ __HAL_LOCK(hi2c); + + /* Disable Pos */ + hi2c->Instance->CR1 &= ~I2C_CR1_POS; hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX; hi2c->ErrorCode = HAL_I2C_ERROR_NONE; @@ -2047,18 +2070,22 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAdd if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } - if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) + /* Wait until BUSY flag is reset */ + if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) { return HAL_BUSY; } /* Process Locked */ __HAL_LOCK(hi2c); + + /* Disable Pos */ + hi2c->Instance->CR1 &= ~I2C_CR1_POS; hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX; hi2c->ErrorCode = HAL_I2C_ERROR_NONE; @@ -2125,18 +2152,22 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddr if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } - if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) + /* Wait until BUSY flag is reset */ + if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) { return HAL_BUSY; } /* Process Locked */ __HAL_LOCK(hi2c); + + /* Disable Pos */ + hi2c->Instance->CR1 &= ~I2C_CR1_POS; hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX; hi2c->ErrorCode = HAL_I2C_ERROR_NONE; @@ -2215,13 +2246,17 @@ HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAdd if(hi2c->State == HAL_I2C_STATE_READY) { - if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) + /* Wait until BUSY flag is reset */ + if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) { return HAL_BUSY; } /* Process Locked */ __HAL_LOCK(hi2c); + + /* Disable Pos */ + hi2c->Instance->CR1 &= ~I2C_CR1_POS; hi2c->State = HAL_I2C_STATE_BUSY; hi2c->ErrorCode = HAL_I2C_ERROR_NONE; @@ -2270,7 +2305,7 @@ HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAdd __HAL_I2C_CLEAR_ADDRFLAG(hi2c); /* Wait until BUSY flag is reset */ - if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK) + if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) { return HAL_TIMEOUT; } @@ -2291,10 +2326,11 @@ HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAdd __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); /* Wait until BUSY flag is reset */ - if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK) + if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) { return HAL_TIMEOUT; } + } }while(I2C_Trials++ < Trials); @@ -2667,12 +2703,6 @@ static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c) /* Generate Stop */ hi2c->Instance->CR1 |= I2C_CR1_STOP; - /* Wait until BUSY flag is reset */ - if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK) - { - return HAL_TIMEOUT; - } - if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX) { hi2c->State = HAL_I2C_STATE_READY; @@ -2720,15 +2750,6 @@ static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c) (*hi2c->pBuffPtr++) = hi2c->Instance->DR; hi2c->XferCount--; - /* Wait until BUSY flag is reset */ - if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK) - { - return HAL_TIMEOUT; - } - - /* Disable Pos */ - hi2c->Instance->CR1 &= ~I2C_CR1_POS; - if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX) { hi2c->State = HAL_I2C_STATE_READY; @@ -2778,15 +2799,6 @@ static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c) /* Disable EVT and ERR interrupt */ __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR); - /* Wait until BUSY flag is reset */ - if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK) - { - return HAL_TIMEOUT; - } - - /* Disable Pos */ - hi2c->Instance->CR1 &= ~I2C_CR1_POS; - if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX) { hi2c->State = HAL_I2C_STATE_READY; @@ -2908,12 +2920,6 @@ static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c) /* Disable Acknowledge */ hi2c->Instance->CR1 &= ~I2C_CR1_ACK; - /* Wait until BUSY flag is reset */ - if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK) - { - return HAL_TIMEOUT; - } - hi2c->State = HAL_I2C_STATE_READY; HAL_I2C_SlaveRxCpltCallback(hi2c); @@ -2937,12 +2943,6 @@ static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c) /* Disable Acknowledge */ hi2c->Instance->CR1 &= ~I2C_CR1_ACK; - /* Wait until BUSY flag is reset */ - if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK) - { - return HAL_TIMEOUT; - } - hi2c->State = HAL_I2C_STATE_READY; HAL_I2C_SlaveTxCpltCallback(hi2c); @@ -3303,12 +3303,6 @@ static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma) hi2c->XferCount = 0; - /* Wait until BUSY flag is reset */ - if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK) - { - hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - } - hi2c->State = HAL_I2C_STATE_READY; /* Check if Errors has been detected during transfer */ @@ -3348,12 +3342,6 @@ static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma) hi2c->XferCount = 0; - /* Wait until BUSY flag is reset */ - if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK) - { - hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - } - hi2c->State = HAL_I2C_STATE_READY; /* Check if Errors has been detected during transfer */ @@ -3376,26 +3364,20 @@ static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma) { I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; + /* Disable Acknowledge */ + hi2c->Instance->CR1 &= ~I2C_CR1_ACK; + /* Generate Stop */ hi2c->Instance->CR1 |= I2C_CR1_STOP; /* Disable Last DMA */ hi2c->Instance->CR2 &= ~I2C_CR2_LAST; - /* Disable Acknowledge */ - hi2c->Instance->CR1 &= ~I2C_CR1_ACK; - /* Disable DMA Request */ hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN; hi2c->XferCount = 0; - /* Wait until BUSY flag is reset */ - if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK) - { - hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - } - hi2c->State = HAL_I2C_STATE_READY; /* Check if Errors has been detected during transfer */ @@ -3435,12 +3417,6 @@ static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma) hi2c->XferCount = 0; - /* Wait until BUSY flag is reset */ - if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK) - { - hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - } - hi2c->State = HAL_I2C_STATE_READY; /* Check if Errors has been detected during transfer */ @@ -3477,12 +3453,6 @@ static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma) hi2c->XferCount = 0; - /* Wait until BUSY flag is reset */ - if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK) - { - hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - } - hi2c->State = HAL_I2C_STATE_READY; /* Check if Errors has been detected during transfer */ @@ -3505,26 +3475,20 @@ static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma) { I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; + /* Disable Acknowledge */ + hi2c->Instance->CR1 &= ~I2C_CR1_ACK; + /* Generate Stop */ hi2c->Instance->CR1 |= I2C_CR1_STOP; /* Disable Last DMA */ hi2c->Instance->CR2 &= ~I2C_CR2_LAST; - /* Disable Acknowledge */ - hi2c->Instance->CR1 &= ~I2C_CR1_ACK; - /* Disable DMA Request */ hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN; hi2c->XferCount = 0; - /* Wait until BUSY flag is reset */ - if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK) - { - hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - } - hi2c->State = HAL_I2C_STATE_READY; /* Check if Errors has been detected during transfer */ diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2c.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2c.h index 4f2b8c1d9b..dc58d5fa78 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2c.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2c.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_i2c.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of I2C HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2c_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2c_ex.c index 9338c157ae..b829d3b62a 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2c_ex.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2c_ex.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_i2c_ex.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief I2C Extension HAL module driver. * This file provides firmware functions to manage the following * functionalities of I2C extension peripheral: diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2c_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2c_ex.h index 87cff0d1ad..b3646208f3 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2c_ex.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2c_ex.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_i2c_ex.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of I2C HAL Extension module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2s.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2s.c index aecc11ae3f..487b12bad7 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2s.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2s.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_i2s.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief I2S HAL module driver. * This file provides firmware functions to manage the following * functionalities of the Integrated Interchip Sound (I2S) peripheral: @@ -209,7 +209,7 @@ __weak HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s) uint32_t tmp = 0, i2sclk = 0; /* Check the I2S handle allocation */ - if(hi2s == HAL_NULL) + if(hi2s == NULL) { return HAL_ERROR; } @@ -330,7 +330,7 @@ __weak HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s) HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s) { /* Check the I2S handle allocation */ - if(hi2s == HAL_NULL) + if(hi2s == NULL) { return HAL_ERROR; } @@ -438,7 +438,7 @@ HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s) HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout) { uint32_t tmp1 = 0, tmp2 = 0; - if((pData == HAL_NULL ) || (Size == 0)) + if((pData == NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -480,13 +480,16 @@ HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uin { return HAL_TIMEOUT; } - } - /* Wait until Busy flag is reset */ - if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_BSY, SET, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; } - + /* Check if Slave mode is selected */ + if(((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_TX) || ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_RX)) + { + /* Wait until Busy flag is reset */ + if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_BSY, SET, Timeout) != HAL_OK) + { + return HAL_TIMEOUT; + } + } hi2s->State = HAL_I2S_STATE_READY; /* Process Unlocked */ @@ -520,7 +523,7 @@ HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uin HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout) { uint32_t tmp1 = 0, tmp2 = 0; - if((pData == HAL_NULL ) || (Size == 0)) + if((pData == NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -605,7 +608,7 @@ HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint32_t tmp1 = 0, tmp2 = 0; if(hi2s->State == HAL_I2S_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -673,7 +676,7 @@ HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, u uint32_t tmp1 = 0, tmp2 = 0; if(hi2s->State == HAL_I2S_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -739,7 +742,7 @@ HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint32_t *tmp; uint32_t tmp1 = 0, tmp2 = 0; - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -824,7 +827,7 @@ HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint32_t *tmp; uint32_t tmp1 = 0, tmp2 = 0; - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1002,12 +1005,12 @@ __weak HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s) hi2s->Instance->CR2 &= ~SPI_CR2_RXDMAEN; /* Abort the I2S DMA Stream tx */ - if(hi2s->hdmatx != HAL_NULL) + if(hi2s->hdmatx != NULL) { HAL_DMA_Abort(hi2s->hdmatx); } /* Abort the I2S DMA Stream rx */ - if(hi2s->hdmarx != HAL_NULL) + if(hi2s->hdmarx != NULL) { HAL_DMA_Abort(hi2s->hdmarx); } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2s.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2s.h index 35e65903ec..18e6c2d17c 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2s.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2s.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_i2s.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of I2S HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2s_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2s_ex.c index d35ae242c2..7b9032412a 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2s_ex.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2s_ex.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_i2s_ex.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief I2S HAL module driver. * This file provides firmware functions to manage the following * functionalities of I2S extension peripheral: @@ -188,7 +188,7 @@ HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s) uint32_t tmp = 0, i2sclk = 0; /* Check the I2S handle allocation */ - if(hi2s == HAL_NULL) + if(hi2s == NULL) { return HAL_ERROR; } @@ -351,7 +351,7 @@ HAL_StatusTypeDef HAL_I2SEx_TransmitReceive(I2S_HandleTypeDef *hi2s, uint16_t *p uint32_t tickstart = 0; uint32_t tmp1 = 0, tmp2 = 0; - if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0)) + if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -525,7 +525,7 @@ HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_IT(I2S_HandleTypeDef *hi2s, uint16_t if(hi2s->State == HAL_I2S_STATE_READY) { - if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0)) + if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -649,7 +649,7 @@ HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_DMA(I2S_HandleTypeDef *hi2s, uint16_ uint32_t *tmp; uint32_t tmp1 = 0, tmp2 = 0; - if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0)) + if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -902,12 +902,12 @@ HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s) } /* Abort the I2S DMA Stream tx */ - if(hi2s->hdmatx != HAL_NULL) + if(hi2s->hdmatx != NULL) { HAL_DMA_Abort(hi2s->hdmatx); } /* Abort the I2S DMA Stream rx */ - if(hi2s->hdmarx != HAL_NULL) + if(hi2s->hdmarx != NULL) { HAL_DMA_Abort(hi2s->hdmarx); } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2s_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2s_ex.h index 45e53e0925..81cdc624a5 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2s_ex.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2s_ex.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_i2s_ex.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of I2S HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_irda.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_irda.c index 126ff243b3..17d6f48161 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_irda.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_irda.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_irda.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief IRDA HAL module driver. * This file provides firmware functions to manage the following * functionalities of the IrDA SIR ENDEC block (IrDA): @@ -213,7 +213,7 @@ static HAL_StatusTypeDef IRDA_WaitOnFlagUntilTimeout(IRDA_HandleTypeDef *hirda, HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda) { /* Check the IRDA handle allocation */ - if(hirda == HAL_NULL) + if(hirda == NULL) { return HAL_ERROR; } @@ -273,7 +273,7 @@ HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda) HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda) { /* Check the IRDA handle allocation */ - if(hirda == HAL_NULL) + if(hirda == NULL) { return HAL_ERROR; } @@ -396,7 +396,7 @@ HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, u tmp1 = hirda->State; if((tmp1 == HAL_IRDA_STATE_READY) || (tmp1 == HAL_IRDA_STATE_BUSY_RX)) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -488,7 +488,7 @@ HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, ui tmp1 = hirda->State; if((tmp1 == HAL_IRDA_STATE_READY) || (tmp1 == HAL_IRDA_STATE_BUSY_TX)) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -580,7 +580,7 @@ HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData tmp1 = hirda->State; if((tmp1 == HAL_IRDA_STATE_READY) || (tmp1 == HAL_IRDA_STATE_BUSY_RX)) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -632,7 +632,7 @@ HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, tmp1 = hirda->State; if((tmp1 == HAL_IRDA_STATE_READY) || (tmp1 == HAL_IRDA_STATE_BUSY_TX)) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -689,7 +689,7 @@ HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pDat tmp1 = hirda->State; if((tmp1 == HAL_IRDA_STATE_READY) || (tmp1 == HAL_IRDA_STATE_BUSY_RX)) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -759,7 +759,7 @@ HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData tmp1 = hirda->State; if((tmp1 == HAL_IRDA_STATE_READY) || (tmp1 == HAL_IRDA_STATE_BUSY_TX)) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -912,12 +912,12 @@ HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda) hirda->Instance->CR3 &= ~USART_CR3_DMAR; /* Abort the UART DMA tx Stream */ - if(hirda->hdmatx != HAL_NULL) + if(hirda->hdmatx != NULL) { HAL_DMA_Abort(hirda->hdmatx); } /* Abort the UART DMA rx Stream */ - if(hirda->hdmarx != HAL_NULL) + if(hirda->hdmarx != NULL) { HAL_DMA_Abort(hirda->hdmarx); } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_irda.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_irda.h index bc99fd4621..2516f7c50e 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_irda.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_irda.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_irda.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of IRDA HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_iwdg.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_iwdg.c index 5386723c06..9ac08fb728 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_iwdg.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_iwdg.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_iwdg.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief IWDG HAL module driver. * This file provides firmware functions to manage the following * functionalities of the Independent Watchdog (IWDG) peripheral: @@ -168,7 +168,7 @@ HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg) { /* Check the IWDG handle allocation */ - if(hiwdg == HAL_NULL) + if(hiwdg == NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_iwdg.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_iwdg.h index 40b17f83aa..f71195705c 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_iwdg.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_iwdg.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_iwdg.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of IWDG HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_ltdc.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_ltdc.c index 83972df09d..596a896ae9 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_ltdc.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_ltdc.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_ltdc.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief LTDC HAL module driver. * This file provides firmware functions to manage the following * functionalities of the LTDC peripheral: @@ -150,7 +150,7 @@ HAL_StatusTypeDef HAL_LTDC_Init(LTDC_HandleTypeDef *hltdc) uint32_t tmp = 0, tmp1 = 0; /* Check the LTDC peripheral state */ - if(hltdc == HAL_NULL) + if(hltdc == NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_ltdc.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_ltdc.h index 1b5e487798..096364c5d7 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_ltdc.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_ltdc.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_ltdc.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of LTDC HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_msp_template.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_msp_template.c deleted file mode 100644 index 689f118ead..0000000000 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_msp_template.c +++ /dev/null @@ -1,119 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_msp_template.c - * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 - * @brief This file contains the HAL System and Peripheral (PPP) MSP initialization - * and de-initialization functions. - * It should be copied to the application folder and renamed into 'stm32f4xx_hal_msp.c'. - ****************************************************************************** - * @attention - * - *

    © COPYRIGHT(c) 2015 STMicroelectronics

    - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f4xx_hal.h" - -/** @addtogroup STM32F4xx_HAL_Driver - * @{ - */ - -/** @defgroup HAL_MSP HAL MSP - * @brief HAL MSP module. - * @{ - */ - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - -/** @defgroup HAL_MSP_Private_Functions HAL MSP Private Functions - * @{ - */ - -/** - * @brief Initializes the Global MSP. - * @note This function is called from HAL_Init() function to perform system - * level initialization (GPIOs, clock, DMA, interrupt). - * @retval None - */ -void HAL_MspInit(void) -{ - -} - -/** - * @brief DeInitializes the Global MSP. - * @note This functiona is called from HAL_DeInit() function to perform system - * level de-initialization (GPIOs, clock, DMA, interrupt). - * @retval None - */ -void HAL_MspDeInit(void) -{ - -} - -/** - * @brief Initializes the PPP MSP. - * @note This functiona is called from HAL_PPP_Init() function to perform - * peripheral(PPP) system level initialization (GPIOs, clock, DMA, interrupt) - * @retval None - */ -void HAL_PPP_MspInit(void) -{ - -} - -/** - * @brief DeInitializes the PPP MSP. - * @note This functiona is called from HAL_PPP_DeInit() function to perform - * peripheral(PPP) system level de-initialization (GPIOs, clock, DMA, interrupt) - * @retval None - */ -void HAL_PPP_MspDeInit(void) -{ - -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_nand.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_nand.c index 4ab61d4b25..0a78d6a5ab 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_nand.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_nand.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_nand.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief NAND HAL module driver. * This file provides a generic firmware to drive NAND memories mounted * as external device. @@ -152,7 +152,7 @@ HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing) { /* Check the NAND handle state */ - if(hnand == HAL_NULL) + if(hnand == NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_nand.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_nand.h index 7731e47588..6cf3ae3705 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_nand.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_nand.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_nand.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of NAND HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_nor.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_nor.c index 4549702ee9..754aafb60b 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_nor.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_nor.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_nor.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief NOR HAL module driver. * This file provides a generic firmware to drive NOR memories mounted * as external device. @@ -170,7 +170,7 @@ HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming) { /* Check the NOR handle parameter */ - if(hnor == HAL_NULL) + if(hnor == NULL) { return HAL_ERROR; } @@ -433,7 +433,7 @@ HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint /* Send read data command */ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST); NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND); - __NOR_WRITE((uint32_t)pAddress, NOR_CMD_DATA_READ_RESET); + NOR_WRITE((uint32_t)pAddress, NOR_CMD_DATA_READ_RESET); /* Read the data */ *pData = *(__IO uint32_t *)(uint32_t)pAddress; diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_nor.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_nor.h index fd883a91e1..55f8690c6d 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_nor.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_nor.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_nor.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of NOR HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pccard.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pccard.c index 2f51d3ec3f..c8e54e3984 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pccard.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pccard.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_pccard.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief PCCARD HAL module driver. * This file provides a generic firmware to drive PCCARD memories mounted * as external device. @@ -143,7 +143,7 @@ HAL_StatusTypeDef HAL_PCCARD_Init(PCCARD_HandleTypeDef *hpccard, FMC_NAND_PCC_TimingTypeDef *ComSpaceTiming, FMC_NAND_PCC_TimingTypeDef *AttSpaceTiming, FMC_NAND_PCC_TimingTypeDef *IOSpaceTiming) { /* Check the PCCARD controller state */ - if(hpccard == HAL_NULL) + if(hpccard == NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pccard.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pccard.h index d666adce20..a67f54f391 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pccard.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pccard.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_pccard.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of PCCARD HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pcd.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pcd.c index bd5be2e170..bbf1d13171 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pcd.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pcd.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_pcd.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief PCD HAL module driver. * This file provides firmware functions to manage the following * functionalities of the USB Peripheral Controller: @@ -24,12 +24,12 @@ (#) Fill parameters of Init structure in HCD handle - (#) Call HAL_PCD_Init() API to initialize the HCD peripheral (Core, Device core, ...) + (#) Call HAL_PCD_Init() API to initialize the PCD peripheral (Core, Device core, ...) (#) Initialize the PCD low level resources through the HAL_PCD_MspInit() API: (##) Enable the PCD/USB Low Level interface clock using - (+++) __OTGFS-OTG_CLK_ENABLE()/__OTGHS-OTG_CLK_ENABLE(); - (+++) __OTGHSULPI_CLK_ENABLE(); (For High Speed Mode) + (+++) __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); + (+++) __HAL_RCC_USB_OTG_HS_CLK_ENABLE(); (For High Speed Mode) (##) Initialize the related GPIO clocks (##) Configure PCD pin-out @@ -38,7 +38,7 @@ (#)Associate the Upper USB device stack to the HAL PCD Driver: (##) hpcd.pData = pdev; - (#)Enable HCD transmission and reception: + (#)Enable PCD transmission and reception: (##) HAL_PCD_Start(); @endverbatim @@ -128,7 +128,7 @@ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t /** * @brief Initializes the PCD according to the specified - * parameters in the PCD_InitTypeDef and create the associated handle. + * parameters in the PCD_InitTypeDef and initialize the associated handle. * @param hpcd: PCD handle * @retval HAL status */ @@ -137,7 +137,7 @@ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd) uint32_t i = 0; /* Check the PCD handle allocation */ - if(hpcd == HAL_NULL) + if(hpcd == NULL) { return HAL_ERROR; } @@ -205,14 +205,14 @@ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd) } /** - * @brief DeInitializes the PCD peripheral + * @brief DeInitializes the PCD peripheral. * @param hpcd: PCD handle * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd) { /* Check the PCD handle allocation */ - if(hpcd == HAL_NULL) + if(hpcd == NULL) { return HAL_ERROR; } @@ -258,7 +258,7 @@ __weak void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd) * @} */ -/** @defgroup PCD_Exported_Functions_Group2 IO operation functions +/** @defgroup PCD_Exported_Functions_Group2 Input and Output operation functions * @brief Data transfers functions * @verbatim @@ -303,7 +303,7 @@ HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd) } /** - * @brief This function handles PCD interrupt request. + * @brief Handles PCD interrupt request. * @param hpcd: PCD handle * @retval HAL status */ @@ -460,13 +460,13 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) { HAL_PCD_ResumeCallback(hpcd); } + __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_WKUINT); } /* Handle Suspend Interrupt */ if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_USBSUSP)) { - if((USBx_DEVICE->DSTS & USB_OTG_DSTS_SUSPSTS) == USB_OTG_DSTS_SUSPSTS) { @@ -537,13 +537,13 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) { hpcd->Init.speed = USB_OTG_SPEED_HIGH; hpcd->Init.ep0_mps = USB_OTG_HS_MAX_PACKET_SIZE ; - hpcd->Instance->GUSBCFG |= (USB_OTG_GUSBCFG_TRDT_0 | USB_OTG_GUSBCFG_TRDT_3); + hpcd->Instance->GUSBCFG |= (uint32_t)((USBD_HS_TRDT_VALUE << 10) & USB_OTG_GUSBCFG_TRDT); } else { hpcd->Init.speed = USB_OTG_SPEED_FULL; hpcd->Init.ep0_mps = USB_OTG_FS_MAX_PACKET_SIZE ; - hpcd->Instance->GUSBCFG |= (USB_OTG_GUSBCFG_TRDT_0 | USB_OTG_GUSBCFG_TRDT_2); + hpcd->Instance->GUSBCFG |= (uint32_t)((USBD_FS_TRDT_VALUE << 10) & USB_OTG_GUSBCFG_TRDT); } HAL_PCD_ResetCallback(hpcd); @@ -555,7 +555,9 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) { USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); + temp = USBx->GRXSTSP; + ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM]; if(((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_DATA_UPDT) @@ -618,7 +620,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) } /** - * @brief Data OUT stage callbacks + * @brief Data OUT stage callback. * @param hpcd: PCD handle * @param epnum: endpoint number * @retval None @@ -631,7 +633,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) } /** - * @brief Data IN stage callbacks + * @brief Data IN stage callback. * @param hpcd: PCD handle * @param epnum: endpoint number * @retval None @@ -643,7 +645,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) */ } /** - * @brief Setup stage callback + * @brief Setup stage callback. * @param hpcd: PCD handle * @retval None */ @@ -655,7 +657,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) } /** - * @brief USB Start Of Frame callbacks + * @brief USB Start Of Frame callback. * @param hpcd: PCD handle * @retval None */ @@ -667,7 +669,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) } /** - * @brief USB Reset callbacks + * @brief USB Reset callback. * @param hpcd: PCD handle * @retval None */ @@ -678,9 +680,8 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) */ } - /** - * @brief Suspend event callbacks + * @brief Suspend event callback. * @param hpcd: PCD handle * @retval None */ @@ -692,7 +693,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) } /** - * @brief Resume event callbacks + * @brief Resume event callback. * @param hpcd: PCD handle * @retval None */ @@ -704,7 +705,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) } /** - * @brief Incomplete ISO OUT callbacks + * @brief Incomplete ISO OUT callback. * @param hpcd: PCD handle * @param epnum: endpoint number * @retval None @@ -717,7 +718,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) } /** - * @brief Incomplete ISO IN callbacks + * @brief Incomplete ISO IN callback. * @param hpcd: PCD handle * @param epnum: endpoint number * @retval None @@ -730,7 +731,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) } /** - * @brief Connection event callbacks + * @brief Connection event callback. * @param hpcd: PCD handle * @retval None */ @@ -742,7 +743,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) } /** - * @brief Disconnection event callbacks + * @brief Disconnection event callback. * @param hpcd: PCD handle * @retval None */ @@ -773,7 +774,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) */ /** - * @brief Connect the USB device + * @brief Connect the USB device. * @param hpcd: PCD handle * @retval HAL status */ @@ -786,7 +787,7 @@ HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd) } /** - * @brief Disconnect the USB device + * @brief Disconnect the USB device. * @param hpcd: PCD handle * @retval HAL status */ @@ -799,7 +800,7 @@ HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd) } /** - * @brief Set the USB Device address + * @brief Set the USB Device address. * @param hpcd: PCD handle * @param address: new device address * @retval HAL status @@ -812,7 +813,7 @@ HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address) return HAL_OK; } /** - * @brief Open and configure an endpoint + * @brief Open and configure an endpoint. * @param hpcd: PCD handle * @param ep_addr: endpoint address * @param ep_mps: endpoint max packet size @@ -856,7 +857,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint /** - * @brief Deactivate an endpoint + * @brief Deactivate an endpoint. * @param hpcd: PCD handle * @param ep_addr: endpoint address * @retval HAL status @@ -885,7 +886,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) /** - * @brief Receive an amount of data + * @brief Receive an amount of data. * @param hpcd: PCD handle * @param ep_addr: endpoint address * @param pBuf: pointer to the reception buffer @@ -926,7 +927,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, u } /** - * @brief Get Received Data Size + * @brief Get Received Data Size. * @param hpcd: PCD handle * @param ep_addr: endpoint address * @retval Data Size @@ -936,7 +937,7 @@ uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) return hpcd->OUT_ep[ep_addr & 0x7F].xfer_count; } /** - * @brief Send an amount of data + * @brief Send an amount of data. * @param hpcd: PCD handle * @param ep_addr: endpoint address * @param pBuf: pointer to the transmission buffer @@ -978,7 +979,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, } /** - * @brief Set a STALL condition over an endpoint + * @brief Set a STALL condition over an endpoint. * @param hpcd: PCD handle * @param ep_addr: endpoint address * @retval HAL status @@ -1013,7 +1014,7 @@ HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) } /** - * @brief Clear a STALL condition over in an endpoint + * @brief Clear a STALL condition over in an endpoint. * @param hpcd: PCD handle * @param ep_addr: endpoint address * @retval HAL status @@ -1043,7 +1044,7 @@ HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) } /** - * @brief Flush an endpoint + * @brief Flush an endpoint. * @param hpcd: PCD handle * @param ep_addr: endpoint address * @retval HAL status @@ -1067,7 +1068,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) } /** - * @brief HAL_PCD_ActivateRemoteWakeup : Active remote wake-up signalling + * @brief Activate remote wakeup signalling. * @param hpcd: PCD handle * @retval HAL status */ @@ -1077,14 +1078,14 @@ HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd) if((USBx_DEVICE->DSTS & USB_OTG_DSTS_SUSPSTS) == USB_OTG_DSTS_SUSPSTS) { - /* Activate Remote wake-up signaling */ + /* Activate Remote wakeup signaling */ USBx_DEVICE->DCTL |= USB_OTG_DCTL_RWUSIG; } return HAL_OK; } /** - * @brief HAL_PCD_DeActivateRemoteWakeup : de-active remote wake-up signalling + * @brief De-activate remote wakeup signalling. * @param hpcd: PCD handle * @retval HAL status */ @@ -1092,7 +1093,7 @@ HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd) { USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - /* De-activate Remote wake-up signaling */ + /* De-activate Remote wakeup signaling */ USBx_DEVICE->DCTL &= ~(USB_OTG_DCTL_RWUSIG); return HAL_OK; } @@ -1116,7 +1117,7 @@ HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd) */ /** - * @brief Return the PCD state + * @brief Return the PCD handle state. * @param hpcd: PCD handle * @retval HAL state */ @@ -1138,8 +1139,7 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd) */ /** - * @brief DCD_WriteEmptyTxFifo - * check FIFO for the next packet to be loaded + * @brief Check FIFO for the next packet to be loaded. * @param hpcd: PCD handle * @param epnum : endpoint number * @retval HAL status diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pcd.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pcd.h index 40964eae9c..ad6ae87bab 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pcd.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pcd.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_pcd.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of PCD HAL module. ****************************************************************************** * @attention @@ -138,6 +138,19 @@ typedef struct * @} */ +/** @defgroup PCD_Turnaround_Timeout Turnaround Timeout Value + * @{ + */ +#ifndef USBD_HS_TRDT_VALUE + #define USBD_HS_TRDT_VALUE 9 +#endif /* USBD_HS_TRDT_VALUE */ +#ifndef USBD_FS_TRDT_VALUE + #define USBD_FS_TRDT_VALUE 5 +#endif /* USBD_FS_TRDT_VALUE */ +/** + * @} + */ + /** * @} */ @@ -209,6 +222,9 @@ typedef struct EXTI->FTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER |= USB_OTG_FS_WAKEUP_EXTI_LINE) +/** + * @} + */ /* Exported functions --------------------------------------------------------*/ /** @addtogroup PCD_Exported_Functions PCD Exported Functions @@ -284,8 +300,12 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); /** * @} - */ - + */ + +/* Private macros ------------------------------------------------------------*/ +/** @defgroup PCD_Private_Macros PCD Private Macros + * @{ + */ /** @defgroup PCD_Instance_definition PCD Instance definition * @{ */ @@ -299,10 +319,9 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); /** * @} */ - /** * @} - */ + */ /** * @} diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pcd_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pcd_ex.c index ac40e85d80..2d14dd4272 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pcd_ex.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pcd_ex.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_pcd_ex.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief PCD HAL module driver. * This file provides firmware functions to manage the following * functionalities of the USB Peripheral Controller: @@ -59,7 +59,7 @@ /* Private functions ---------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/ -/** @defgroup PCDEx_Exported_Functions PCDEx Exported Functions +/** @defgroup PCDEx_Exported_Functions PCD Extended Exported Functions * @{ */ @@ -103,7 +103,7 @@ HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uin if(fifo == 0) { - hpcd->Instance->DIEPTXF0_HNPTXFSIZ = (size << 16) | Tx_Offset; + hpcd->Instance->DIEPTXF0_HNPTXFSIZ = (uint32_t)(((uint32_t)size << 16) | Tx_Offset); } else { @@ -114,8 +114,7 @@ HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uin } /* Multiply Tx_Size by 2 to get higher performance */ - hpcd->Instance->DIEPTXF[fifo - 1] = (size << 16) | Tx_Offset; - + hpcd->Instance->DIEPTXF[fifo - 1] = (uint32_t)(((uint32_t)size << 16) | Tx_Offset); } return HAL_OK; @@ -136,7 +135,7 @@ HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size) #if defined(STM32F446xx) /** - * @brief HAL_PCDEx_ActivateLPM : active LPM Feature + * @brief Activate LPM feature * @param hpcd: PCD handle * @retval HAL status */ @@ -153,7 +152,7 @@ HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd) } /** - * @brief HAL_PCDEx_DeActivateLPM : de-active LPM feature + * @brief Deactivate LPM feature. * @param hpcd: PCD handle * @retval HAL status */ @@ -169,7 +168,7 @@ HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd) } /** - * @brief HAL_PCDEx_LPM_Callback : Send LPM message to user layer + * @brief Send LPM message to user layer callback. * @param hpcd: PCD handle * @param msg: LPM message * @retval HAL status diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pcd_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pcd_ex.h index ae4085c31f..7d4b0c3274 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pcd_ex.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pcd_ex.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_pcd_ex.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of PCD HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pwr.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pwr.c index a917ea6f95..5834418e0a 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pwr.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pwr.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_pwr.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief PWR HAL module driver. * This file provides firmware functions to manage the following * functionalities of the Power Controller (PWR) peripheral: diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pwr.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pwr.h index 6158ae5087..0532721e94 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pwr.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pwr.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_pwr.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of PWR HAL module. ****************************************************************************** * @attention @@ -169,7 +169,7 @@ typedef struct * @{ */ -#if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F17xx) +#if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx) /** @brief macros configure the main internal regulator output voltage. * @param __REGULATOR__: specifies the regulator output voltage to achieve * a tradeoff between performance and power consumption when the device does diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pwr_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pwr_ex.c index 78a544c4ac..a1e469148d 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pwr_ex.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pwr_ex.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_pwr_ex.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Extended PWR HAL module driver. * This file provides firmware functions to manage the following * functionalities of PWR extension peripheral: diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pwr_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pwr_ex.h index 65f8dedd5c..17032d6185 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pwr_ex.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pwr_ex.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_pwr_ex.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of PWR HAL Extension module. ****************************************************************************** * @attention @@ -85,7 +85,7 @@ /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale * @{ */ -#if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F17xx) +#if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx) #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS /* Scale 1 mode(default value at reset): the maximum value of fHCLK = 168 MHz. */ #define PWR_REGULATOR_VOLTAGE_SCALE2 ((uint32_t)0x00000000) /* Scale 2 mode: the maximum value of fHCLK = 144 MHz. */ #else @@ -256,7 +256,7 @@ HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t ((REGULATOR) == PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON)) #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx */ -#if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F17xx) +#if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx) #define IS_PWR_VOLTAGE_SCALING_RANGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \ ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2)) #else diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_qspi.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_qspi.c index 5e0fd2fa19..526a048ca6 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_qspi.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_qspi.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_qspi.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief QSPI HAL module driver. * * This file provides firmware functions to manage the following diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_qspi.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_qspi.h index e88938d21c..bd76eeb0ea 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_qspi.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_qspi.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_qspi.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of QSPI HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc.c index 5c1f8164bd..343ce74057 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_rcc.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief RCC HAL module driver. * This file provides firmware functions to manage the following * functionalities of the Reset and Clock Control (RCC) peripheral: diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc.h index 0433616fda..596f7efc40 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_rcc.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of RCC HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc_ex.c index f7ae5eb833..87ebc8bd09 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc_ex.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc_ex.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_rcc_ex.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Extension RCC HAL module driver. * This file provides firmware functions to manage the following * functionalities RCC extension peripheral: @@ -191,7 +191,7 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClk /*------------------------------------ RTC configuration --------------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC)) - { + { /* Enable Power Clock*/ __HAL_RCC_PWR_CLK_ENABLE(); @@ -208,10 +208,9 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClk return HAL_TIMEOUT; } } - /* Reset the Backup domain only if the RTC Clock source selction is modified */ if((RCC->BDCR & RCC_BDCR_RTCSEL) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)) - { + { /* Store the content of BDCR register before the reset of Backup Domain */ tmpreg1 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); /* RTC Clock selection can be changed only if the Backup Domain is reset */ @@ -219,24 +218,24 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClk __HAL_RCC_BACKUPRESET_RELEASE(); /* Restore the Content of BDCR register */ RCC->BDCR = tmpreg1; - } - - /* If LSE is selected as RTC clock source, wait for LSE reactivation */ - if(PeriphClkInit->RTCClockSelection == RCC_RTCCLKSOURCE_LSE) - { - /* Get tick */ - tickstart = HAL_GetTick(); - - /* Wait till LSE is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) + + /* Wait for LSERDY if LSE was enabled */ + if(HAL_IS_BIT_SET(tmpreg1, RCC_BDCR_LSERDY)) { - if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) + /* Get tick */ + tickstart = HAL_GetTick(); + + /* Wait till LSE is ready */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) { - return HAL_TIMEOUT; - } - } + if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) + { + return HAL_TIMEOUT; + } + } + } + __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); } - __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); } /*------------------------------------ TIM configuration --------------------------------------*/ @@ -388,11 +387,10 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClk /* Check for Parameters */ assert_param(IS_RCC_PLLI2SP_VALUE(PeriphClkInit->PLLI2S.PLLI2SP)); assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR)); - assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ)); + assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ)); /* Configure the PLLI2S division factors */ /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) × (PLLI2SN/PLLI2SM) */ - /* SPDIFRXCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */ __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR); } @@ -857,7 +855,7 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClk /*---------------------------- RTC configuration ---------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC)) - { + { /* Enable Power Clock*/ __HAL_RCC_PWR_CLK_ENABLE(); @@ -874,10 +872,9 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClk return HAL_TIMEOUT; } } - /* Reset the Backup domain only if the RTC Clock source selection is modified */ if((RCC->BDCR & RCC_BDCR_RTCSEL) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)) - { + { /* Store the content of BDCR register before the reset of Backup Domain */ tmpreg1 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); /* RTC Clock selection can be changed only if the Backup Domain is reset */ @@ -885,24 +882,23 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClk __HAL_RCC_BACKUPRESET_RELEASE(); /* Restore the Content of BDCR register */ RCC->BDCR = tmpreg1; - } - - /* If LSE is selected as RTC clock source, wait for LSE reactivation */ - if(PeriphClkInit->RTCClockSelection == RCC_RTCCLKSOURCE_LSE) - { - /* Get tick */ - tickstart = HAL_GetTick(); - - /* Wait till LSE is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) + /* Wait for LSERDY if LSE was enabled */ + if(HAL_IS_BIT_SET(tmpreg1, RCC_BDCR_LSERDY)) { - if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) + /* Get tick */ + tickstart = HAL_GetTick(); + + /* Wait till LSE is ready */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) { - return HAL_TIMEOUT; - } - } + if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) + { + return HAL_TIMEOUT; + } + } + } + __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); } - __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); } /*---------------------------- TIM configuration ---------------------------*/ @@ -1029,16 +1025,16 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClk /*---------------------------- RTC configuration ---------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC)) - { + { /* Enable Power Clock*/ __HAL_RCC_PWR_CLK_ENABLE(); /* Enable write access to Backup domain */ PWR->CR |= PWR_CR_DBP; - + /* Get tick */ tickstart = HAL_GetTick(); - + while((PWR->CR & PWR_CR_DBP) == RESET) { if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE) @@ -1046,10 +1042,9 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClk return HAL_TIMEOUT; } } - /* Reset the Backup domain only if the RTC Clock source selection is modified */ if((RCC->BDCR & RCC_BDCR_RTCSEL) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)) - { + { /* Store the content of BDCR register before the reset of Backup Domain */ tmpreg1 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); /* RTC Clock selection can be changed only if the Backup Domain is reset */ @@ -1057,24 +1052,23 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClk __HAL_RCC_BACKUPRESET_RELEASE(); /* Restore the Content of BDCR register */ RCC->BDCR = tmpreg1; - } - - /* If LSE is selected as RTC clock source, wait for LSE reactivation */ - if(PeriphClkInit->RTCClockSelection == RCC_RTCCLKSOURCE_LSE) - { - /* Get tick */ - tickstart = HAL_GetTick(); - - /* Wait till LSE is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) + /* Wait for LSERDY if LSE was enabled */ + if(HAL_IS_BIT_SET(tmpreg1, RCC_BDCR_LSERDY)) { - if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) + /* Get tick */ + tickstart = HAL_GetTick(); + + /* Wait till LSE is ready */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) { - return HAL_TIMEOUT; + if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) + { + return HAL_TIMEOUT; + } } - } + } + __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); } - __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); } return HAL_OK; diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc_ex.h index 2cb37e997c..3f7722a2fd 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc_ex.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc_ex.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_rcc_ex.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of RCC HAL Extension module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rng.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rng.c index 7e9364094d..136c5d657d 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rng.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rng.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_rng.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief RNG HAL module driver. * This file provides firmware functions to manage the following * functionalities of the Random Number Generator (RNG) peripheral: @@ -120,7 +120,7 @@ HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng) { /* Check the RNG handle allocation */ - if(hrng == HAL_NULL) + if(hrng == NULL) { return HAL_ERROR; } @@ -159,7 +159,7 @@ HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng) HAL_StatusTypeDef HAL_RNG_DeInit(RNG_HandleTypeDef *hrng) { /* Check the RNG handle allocation */ - if(hrng == HAL_NULL) + if(hrng == NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rng.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rng.h index c523ed5b37..e4890fd41a 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rng.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rng.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_rng.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of RNG HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rtc.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rtc.c index 9d7b949891..735205eb6b 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rtc.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rtc.c @@ -2,15 +2,15 @@ ****************************************************************************** * @file stm32f4xx_hal_rtc.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief RTC HAL module driver. * This file provides firmware functions to manage the following * functionalities of the Real Time Clock (RTC) peripheral: * + Initialization and de-initialization functions * + RTC Time and Date functions * + RTC Alarm functions - * + Peripheral Control functions + * + Peripheral Control functions * + Peripheral State functions * @verbatim @@ -203,7 +203,7 @@ HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc) { /* Check the RTC peripheral state */ - if(hrtc == HAL_NULL) + if(hrtc == NULL) { return HAL_ERROR; } @@ -547,9 +547,13 @@ HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTim * This parameter can be one of the following values: * @arg RTC_FORMAT_BIN: Binary data format * @arg RTC_FORMAT_BCD: BCD data format + * @note You can use SubSeconds and SecondFraction (sTime structure fields returned) to convert SubSeconds + * value in second fraction ratio with time unit following generic formula: + * Second fraction ratio * time_unit= [(SecondFraction-SubSeconds)/(SecondFraction+1)] * time_unit + * This conversion can be performed only if no shift operation is pending (ie. SHFP=0) when PREDIV_S >= SS * @note You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the values - * in the higher-order calendar shadow registers to ensure consistency between the time and date values. - * Reading RTC current time locks the values in calendar shadow registers until Current date is read. + * in the higher-order calendar shadow registers to ensure consistency between the time and date values. + * Reading RTC current time locks the values in calendar shadow registers until current date is read. * @retval HAL status */ HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format) @@ -559,9 +563,12 @@ HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTim /* Check the parameters */ assert_param(IS_RTC_FORMAT(Format)); - /* Get subseconds values from the correspondent registers*/ + /* Get subseconds structure field from the corresponding register */ sTime->SubSeconds = (uint32_t)(hrtc->Instance->SSR); + /* Get SecondFraction structure field from the corresponding register field */ + sTime->SecondFraction = (uint32_t)(hrtc->Instance->PRER & RTC_PRER_PREDIV_S); + /* Get the TR register */ tmpreg = (uint32_t)(hrtc->Instance->TR & RTC_TR_RESERVED_MASK); diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rtc.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rtc.h index 5819af8bb6..76bf948ba1 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rtc.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rtc.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_rtc.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of RTC HAL module. ****************************************************************************** * @attention @@ -111,11 +111,18 @@ typedef struct uint8_t Seconds; /*!< Specifies the RTC Time Seconds. This parameter must be a number between Min_Data = 0 and Max_Data = 59 */ - uint32_t SubSeconds; /*!< Specifies the RTC Time SubSeconds. - This parameter must be a number between Min_Data = 0 and Max_Data = 59 */ - uint8_t TimeFormat; /*!< Specifies the RTC AM/PM Time. - This parameter can be a value of @ref RTC_AM_PM_Definitions */ + This parameter can be a value of @ref RTC_AM_PM_Definitions */ + + uint32_t SubSeconds; /*!< Specifies the RTC_SSR RTC Sub Second register content. + This parameter corresponds to a time unit range between [0-1] Second + with [1 Sec / SecondFraction +1] granularity */ + + uint32_t SecondFraction; /*!< Specifies the range or granularity of Sub Second register content + corresponding to Synchronous pre-scaler factor value (PREDIV_S) + This parameter corresponds to a time unit range between [0-1] Second + with [1 Sec / SecondFraction +1] granularity. + This field will be used only by HAL_RTC_GetTime function */ uint32_t DayLightSaving; /*!< Specifies DayLight Save Operation. This parameter can be a value of @ref RTC_DayLightSaving_Definitions */ @@ -503,7 +510,7 @@ typedef struct * @arg RTC_IT_ALRB: Alarm B interrupt * @retval None */ -#define __HAL_RTC_ALARM_GET_IT(__HANDLE__, __INTERRUPT__) ((((((__HANDLE__)->Instance->ISR)& ((__INTERRUPT__)>> 4)) & 0x0000FFFF) != RESET)? SET : RESET) +#define __HAL_RTC_ALARM_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR)& ((__INTERRUPT__)>> 4)) != RESET)? SET : RESET) /** * @brief Get the selected RTC Alarm's flag status. @@ -527,7 +534,7 @@ typedef struct * @arg RTC_FLAG_ALRBF * @retval None */ -#define __HAL_RTC_ALARM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~(((__FLAG__) | RTC_ISR_INIT)& 0x0000FFFF)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)) +#define __HAL_RTC_ALARM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)) /** diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rtc_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rtc_ex.c index 5abed477e0..11d046d93d 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rtc_ex.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rtc_ex.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_rtc_ex.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief RTC HAL module driver. * This file provides firmware functions to manage the following * functionalities of the Real Time Clock (RTC) Extension peripheral: @@ -149,8 +149,9 @@ * falling edge of the related pin. * @param RTC_TimeStampPin: specifies the RTC TimeStamp Pin. * This parameter can be one of the following values: - * @arg RTC_TIMESTAMPPIN_PC13: PC13 is selected as RTC TimeStamp Pin. - * @arg RTC_TIMESTAMPPIN_PI8: PI8 is selected as RTC TimeStamp Pin. (not applicable in the case of STM32F446xx devices) + * @arg RTC_TIMESTAMPPIN_DEFAULT: PC13 is selected as RTC TimeStamp Pin. + * @arg RTC_TIMESTAMPPIN_POS1: PI8/PA0 is selected as RTC TimeStamp Pin. + * (PI8 for all STM32 devices except for STM32F446xx devices the PA0 is used) * @arg RTC_TIMESTAMPPIN_PA0: PA0 is selected as RTC TimeStamp Pin only for STM32F446xx devices * @retval HAL status */ diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rtc_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rtc_ex.h index 4d5bd9dbe5..dcc820e591 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rtc_ex.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rtc_ex.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_rtc_ex.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of RTC HAL Extension module. ****************************************************************************** * @attention @@ -68,7 +68,7 @@ typedef struct This parameter can be a value of @ref RTCEx_Tamper_Pins_Definitions */ uint32_t PinSelection; /*!< Specifies the Tamper Pin. - This parameter can be a value of @ref RTCEx_Tamper_Pins_Selection */ + This parameter can be a value of @ref RTCEx_Tamper_Pins_Selection */ uint32_t Trigger; /*!< Specifies the Tamper Trigger. This parameter can be a value of @ref RTCEx_Tamper_Trigger_Definitions */ @@ -145,12 +145,9 @@ typedef struct /** @defgroup RTCEx_Tamper_Pins_Selection RTC tamper Pins Selection * @{ */ -#define RTC_TAMPERPIN_PC13 ((uint32_t)0x00000000) -#if defined (STM32F446xx) - #define RTC_TAMPERPIN_PA0 ((uint32_t)0x00010000) -#else - #define RTC_TAMPERPIN_PI8 ((uint32_t)0x00010000) -#endif /* STM32F446xx */ +#define RTC_TAMPERPIN_DEFAULT ((uint32_t)0x00000000) +#define RTC_TAMPERPIN_POS1 ((uint32_t)0x00010000) + /** * @} */ @@ -158,12 +155,9 @@ typedef struct /** @defgroup RTCEx_TimeStamp_Pin_Selection RTC TimeStamp Pins Selection * @{ */ -#define RTC_TIMESTAMPPIN_PC13 ((uint32_t)0x00000000) -#if defined (STM32F446xx) - #define RTC_TIMESTAMPPIN_PA0 ((uint32_t)0x00020000) -#else - #define RTC_TIMESTAMPPIN_PI8 ((uint32_t)0x00020000) -#endif /* STM32F446xx */ +#define RTC_TIMESTAMPPIN_DEFAULT ((uint32_t)0x00000000) +#define RTC_TIMESTAMPPIN_POS1 ((uint32_t)0x00020000) + /** * @} */ @@ -403,7 +397,7 @@ typedef struct * @arg RTC_FLAG_WUTF * @retval None */ -#define __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~(((__FLAG__) | RTC_ISR_INIT)& 0x0000FFFF)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)) +#define __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)) /** * @brief Enable interrupt on the RTC Wake-up Timer associated Exti line. @@ -566,7 +560,7 @@ typedef struct * @arg RTC_FLAG_TSF * @retval None */ -#define __HAL_RTC_TIMESTAMP_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~(((__FLAG__) | RTC_ISR_INIT)& 0x0000FFFF)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)) +#define __HAL_RTC_TIMESTAMP_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)) /** * @} @@ -646,7 +640,7 @@ typedef struct * @arg RTC_FLAG_TAMP2F * @retval None */ -#define __HAL_RTC_TAMPER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~(((__FLAG__) | RTC_ISR_INIT)& 0x0000FFFF)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)) +#define __HAL_RTC_TAMPER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)) /** * @} */ @@ -721,7 +715,7 @@ typedef struct * @brief Check whether the RTC Tamper and Timestamp associated Exti line interrupt flag is set or not. * @retval Line Status. */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG() (EXTI->PR & RTC_EXTI_LINE_WAKEUPTIMER_EVENT) +#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG() (EXTI->PR & RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) /** * @brief Clear the RTC Tamper and Timestamp associated Exti line flag. @@ -923,23 +917,14 @@ HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t ((BKP) == RTC_BKP_DR19)) #define IS_TIMESTAMP_EDGE(EDGE) (((EDGE) == RTC_TIMESTAMPEDGE_RISING) || \ ((EDGE) == RTC_TIMESTAMPEDGE_FALLING)) -#define IS_RTC_TAMPER(TAMPER) ((((TAMPER) & (uint32_t)0xFFFFFFF6) == 0x00) && ((TAMPER) != (uint32_t)RESET)) +#define IS_RTC_TAMPER(TAMPER) ((((TAMPER) & ((uint32_t)!(RTC_TAFCR_TAMP1E | RTC_TAFCR_TAMP2E))) == 0x00) && ((TAMPER) != (uint32_t)RESET)) -#if defined (STM32F446xx) -#define IS_RTC_TAMPER_PIN(PIN) (((PIN) == RTC_TAMPERPIN_PC13) || \ - ((PIN) == RTC_TAMPERPIN_PA0)) -#else -#define IS_RTC_TAMPER_PIN(PIN) (((PIN) == RTC_TAMPERPIN_PC13) || \ - ((PIN) == RTC_TAMPERPIN_PI8)) -#endif /* STM32F446xx */ +#define IS_RTC_TAMPER_PIN(PIN) (((PIN) == RTC_TAMPERPIN_DEFAULT) || \ + ((PIN) == RTC_TAMPERPIN_POS1)) + +#define IS_RTC_TIMESTAMP_PIN(PIN) (((PIN) == RTC_TIMESTAMPPIN_DEFAULT) || \ + ((PIN) == RTC_TIMESTAMPPIN_POS1)) -#if defined (STM32F446xx) -#define IS_RTC_TIMESTAMP_PIN(PIN) (((PIN) == RTC_TIMESTAMPPIN_PC13) || \ - ((PIN) == RTC_TIMESTAMPPIN_PA0)) -#else -#define IS_RTC_TIMESTAMP_PIN(PIN) (((PIN) == RTC_TIMESTAMPPIN_PC13) || \ - ((PIN) == RTC_TIMESTAMPPIN_PI8)) -#endif /* STM32F446xx */ #define IS_RTC_TAMPER_TRIGGER(TRIGGER) (((TRIGGER) == RTC_TAMPERTRIGGER_RISINGEDGE) || \ ((TRIGGER) == RTC_TAMPERTRIGGER_FALLINGEDGE) || \ ((TRIGGER) == RTC_TAMPERTRIGGER_LOWLEVEL) || \ diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sai.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sai.c index 6c81400b3f..187c45bf70 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sai.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sai.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_sai.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief SAI HAL module driver. * This file provides firmware functions to manage the following * functionalities of the Serial Audio Interface (SAI) peripheral: @@ -320,7 +320,7 @@ HAL_StatusTypeDef HAL_SAI_Init(SAI_HandleTypeDef *hsai) uint32_t freq = 0; /* Check the SAI handle allocation */ - if(hsai == HAL_NULL) + if(hsai == NULL) { return HAL_ERROR; } @@ -448,7 +448,7 @@ HAL_StatusTypeDef HAL_SAI_Init(SAI_HandleTypeDef *hsai) HAL_StatusTypeDef HAL_SAI_DeInit(SAI_HandleTypeDef *hsai) { /* Check the SAI handle allocation */ - if(hsai == HAL_NULL) + if(hsai == NULL) { return HAL_ERROR; } @@ -568,7 +568,7 @@ HAL_StatusTypeDef HAL_SAI_Transmit(SAI_HandleTypeDef *hsai, uint8_t* pData, uint { uint32_t tickstart = 0; - if((pData == HAL_NULL ) || (Size == 0)) + if((pData == NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -664,7 +664,7 @@ HAL_StatusTypeDef HAL_SAI_Receive(SAI_HandleTypeDef *hsai, uint8_t *pData, uint1 { uint32_t tickstart = 0; - if((pData == HAL_NULL ) || (Size == 0)) + if((pData == NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -758,7 +758,7 @@ HAL_StatusTypeDef HAL_SAI_Transmit_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, u { if(hsai->State == HAL_SAI_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -821,7 +821,7 @@ HAL_StatusTypeDef HAL_SAI_Receive_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, ui if(hsai->State == HAL_SAI_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -930,12 +930,12 @@ HAL_StatusTypeDef HAL_SAI_DMAStop(SAI_HandleTypeDef *hsai) hsai->Instance->CR1 &= ~SAI_xCR1_DMAEN; /* Abort the SAI DMA Tx Stream */ - if(hsai->hdmatx != HAL_NULL) + if(hsai->hdmatx != NULL) { HAL_DMA_Abort(hsai->hdmatx); } /* Abort the SAI DMA Rx Stream */ - if(hsai->hdmarx != HAL_NULL) + if(hsai->hdmarx != NULL) { HAL_DMA_Abort(hsai->hdmarx); } @@ -963,12 +963,12 @@ HAL_StatusTypeDef HAL_SAI_Abort(SAI_HandleTypeDef *hsai) hsai->Instance->CR1 &= ~SAI_xCR1_DMAEN; /* Abort the SAI DMA Tx Stream */ - if(hsai->hdmatx != HAL_NULL) + if(hsai->hdmatx != NULL) { HAL_DMA_Abort(hsai->hdmatx); } /* Abort the SAI DMA Rx Stream */ - if(hsai->hdmarx != HAL_NULL) + if(hsai->hdmarx != NULL) { HAL_DMA_Abort(hsai->hdmarx); } @@ -1003,7 +1003,7 @@ HAL_StatusTypeDef HAL_SAI_Transmit_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, { uint32_t *tmp; - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1068,7 +1068,7 @@ HAL_StatusTypeDef HAL_SAI_Receive_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, u { uint32_t *tmp; - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sai.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sai.h index 50e1340895..13d9d2fc7a 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sai.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sai.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_sai.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of SAI HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sai_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sai_ex.c index 6ffe22a5a7..275c27c15d 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sai_ex.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sai_ex.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_sai_ex.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief SAI Extension HAL module driver. * This file provides firmware functions to manage the following * functionalities of SAI extension peripheral: diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sai_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sai_ex.h index 50058b8e34..638bfd77ee 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sai_ex.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sai_ex.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_sai_ex.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of SAI Extension HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sd.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sd.c index 0dd32586b6..c9e9a46605 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sd.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sd.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_sd.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief SD card HAL module driver. * This file provides firmware functions to manage the following * functionalities of the Secure Digital (SD) peripheral: @@ -2642,7 +2642,7 @@ static HAL_SD_ErrorTypedef SD_SendStatus(SD_HandleTypeDef *hsd, uint32_t *pCardS SDIO_CmdInitTypeDef sdio_cmdinitstructure; HAL_SD_ErrorTypedef errorstate = SD_OK; - if(pCardStatus == HAL_NULL) + if(pCardStatus == NULL) { errorstate = SD_INVALID_PARAMETER; diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sd.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sd.h index 51b7541761..8d8a1ac21e 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sd.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sd.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_sd.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of SD HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sdram.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sdram.c index ff0032f84c..bcf1dfe15b 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sdram.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sdram.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_sdram.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief SDRAM HAL module driver. * This file provides a generic firmware to drive SDRAM memories mounted * as external device. @@ -139,7 +139,7 @@ HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing) { /* Check the SDRAM handle parameter */ - if(hsdram == HAL_NULL) + if(hsdram == NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sdram.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sdram.h index 131824788f..ab7782e4dc 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sdram.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sdram.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_sdram.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of SDRAM HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_smartcard.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_smartcard.c index 0864988dcc..b3bc7e3182 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_smartcard.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_smartcard.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_smartcard.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief SMARTCARD HAL module driver. * This file provides firmware functions to manage the following * functionalities of the SMARTCARD peripheral: @@ -236,7 +236,7 @@ static HAL_StatusTypeDef SMARTCARD_WaitOnFlagUntilTimeout(SMARTCARD_HandleTypeDe HAL_StatusTypeDef HAL_SMARTCARD_Init(SMARTCARD_HandleTypeDef *hsc) { /* Check the SMARTCARD handle allocation */ - if(hsc == HAL_NULL) + if(hsc == NULL) { return HAL_ERROR; } @@ -301,7 +301,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Init(SMARTCARD_HandleTypeDef *hsc) HAL_StatusTypeDef HAL_SMARTCARD_DeInit(SMARTCARD_HandleTypeDef *hsc) { /* Check the SMARTCARD handle allocation */ - if(hsc == HAL_NULL) + if(hsc == NULL) { return HAL_ERROR; } @@ -423,7 +423,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Transmit(SMARTCARD_HandleTypeDef *hsc, uint8_t * tmp1 = hsc->State; if((tmp1 == HAL_SMARTCARD_STATE_READY) || (tmp1 == HAL_SMARTCARD_STATE_BUSY_RX)) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -498,7 +498,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Receive(SMARTCARD_HandleTypeDef *hsc, uint8_t *p tmp1 = hsc->State; if((tmp1 == HAL_SMARTCARD_STATE_READY) || (tmp1 == HAL_SMARTCARD_STATE_BUSY_TX)) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -570,7 +570,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsc, uint8_ tmp1 = hsc->State; if((tmp1 == HAL_SMARTCARD_STATE_READY) || (tmp1 == HAL_SMARTCARD_STATE_BUSY_RX)) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -628,7 +628,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsc, uint8_t tmp1 = hsc->State; if((tmp1 == HAL_SMARTCARD_STATE_READY) || (tmp1 == HAL_SMARTCARD_STATE_BUSY_TX)) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -686,7 +686,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Transmit_DMA(SMARTCARD_HandleTypeDef *hsc, uint8 tmp1 = hsc->State; if((tmp1 == HAL_SMARTCARD_STATE_READY) || (tmp1 == HAL_SMARTCARD_STATE_BUSY_RX)) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -754,7 +754,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Receive_DMA(SMARTCARD_HandleTypeDef *hsc, uint8_ tmp1 = hsc->State; if((tmp1 == HAL_SMARTCARD_STATE_READY) || (tmp1 == HAL_SMARTCARD_STATE_BUSY_TX)) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_smartcard.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_smartcard.h index 4c46967f0b..43fec1f631 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_smartcard.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_smartcard.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_smartcard.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of SMARTCARD HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_spdifrx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_spdifrx.c index 578bc58543..63a40954c9 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_spdifrx.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_spdifrx.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_spdifrx.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief This file provides firmware functions to manage the following * functionalities of the SPDIFRX audio interface: * + Initialization and Configuration diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_spdifrx.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_spdifrx.h index 03bbbcb0a5..c0d84bc40f 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_spdifrx.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_spdifrx.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_spdifrx.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of SPDIFRX HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_spi.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_spi.c index 58765e99ec..541dae00eb 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_spi.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_spi.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_spi.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief SPI HAL module driver. * * This file provides firmware functions to manage the following @@ -175,7 +175,7 @@ static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(SPI_HandleTypeDef *hspi, uin HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi) { /* Check the SPI handle allocation */ - if(hspi == HAL_NULL) + if(hspi == NULL) { return HAL_ERROR; } @@ -238,7 +238,7 @@ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi) HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi) { /* Check the SPI handle allocation */ - if(hspi == HAL_NULL) + if(hspi == NULL) { return HAL_ERROR; } @@ -334,7 +334,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint if(hspi->State == HAL_SPI_STATE_READY) { - if((pData == HAL_NULL ) || (Size == 0)) + if((pData == NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -478,7 +478,7 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 if(hspi->State == HAL_SPI_STATE_READY) { - if((pData == HAL_NULL ) || (Size == 0)) + if((pData == NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -655,7 +655,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD tmpstate = hspi->State; if((tmpstate == HAL_SPI_STATE_READY) || (tmpstate == HAL_SPI_STATE_BUSY_RX)) { - if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0)) + if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -903,7 +903,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, u { if(hspi->State == HAL_SPI_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -978,7 +978,7 @@ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, ui { if(hspi->State == HAL_SPI_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1062,7 +1062,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *p if((tmpstate == HAL_SPI_STATE_READY) || \ ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmpstate == HAL_SPI_STATE_BUSY_RX))) { - if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0)) + if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -1131,7 +1131,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, { if(hspi->State == HAL_SPI_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1214,7 +1214,7 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u { if(hspi->State == HAL_SPI_STATE_READY) { - if((pData == HAL_NULL) || (Size == 0)) + if((pData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1306,7 +1306,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t * if((tmpstate == HAL_SPI_STATE_READY) || ((hspi->Init.Mode == SPI_MODE_MASTER) && \ (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmpstate == HAL_SPI_STATE_BUSY_RX))) { - if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0)) + if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -1371,7 +1371,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t * /* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing is performed in DMA reception complete callback */ - hspi->hdmatx->XferCpltCallback = HAL_NULL; + hspi->hdmatx->XferCpltCallback = NULL; if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX) { @@ -1380,7 +1380,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t * } else { - hspi->hdmatx->XferErrorCallback = HAL_NULL; + hspi->hdmatx->XferErrorCallback = NULL; } /* Enable the Tx DMA Stream */ @@ -1464,12 +1464,12 @@ HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi) */ /* Abort the SPI DMA tx Stream */ - if(hspi->hdmatx != HAL_NULL) + if(hspi->hdmatx != NULL) { HAL_DMA_Abort(hspi->hdmatx); } /* Abort the SPI DMA rx Stream */ - if(hspi->hdmarx != HAL_NULL) + if(hspi->hdmarx != NULL) { HAL_DMA_Abort(hspi->hdmarx); } @@ -2110,19 +2110,17 @@ static void SPI_DMAEndTransmitReceive(SPI_HandleTypeDef *hspi) /** * @brief DMA SPI transmit receive process complete callback * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. + * the configuration information for the specified DMA module. * @retval None */ -static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma) +static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma) { - __IO uint16_t tmpreg; - SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0) { /**/ SPI_DMAEndTransmitReceive(hspi); - hspi->State = HAL_SPI_STATE_READY; + hspi->State = HAL_SPI_STATE_READY; /* Check if Errors has been detected during transfer */ if(hspi->ErrorCode != HAL_SPI_ERROR_NONE) diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_spi.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_spi.h index 4d5c767ae3..145846ce8d 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_spi.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_spi.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_spi.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of SPI HAL module. ****************************************************************************** * @attention @@ -173,7 +173,7 @@ typedef struct __SPI_HandleTypeDef #define HAL_SPI_ERROR_OVR ((uint32_t)0x00000004) /*!< OVR error */ #define HAL_SPI_ERROR_FRE ((uint32_t)0x00000008) /*!< FRE error */ #define HAL_SPI_ERROR_DMA ((uint32_t)0x00000010) /*!< DMA transfer error */ -#define HAL_SPI_ERROR_FLAG ((uint32_t)0x00000010) /*!< Flag: RXNE,TXE, BSY */ +#define HAL_SPI_ERROR_FLAG ((uint32_t)0x00000020) /*!< Flag: RXNE,TXE, BSY */ /** * @} */ diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sram.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sram.c index 2672c5fcb0..77f6fd3512 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sram.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sram.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_sram.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief SRAM HAL module driver. * This file provides a generic firmware to drive SRAM memories * mounted as external device. @@ -143,7 +143,7 @@ HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming) { /* Check the SRAM handle parameter */ - if(hsram == HAL_NULL) + if(hsram == NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sram.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sram.h index 3ccdd56ddd..a77d4c8c55 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sram.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sram.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_sram.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of SRAM HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_tim.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_tim.c index aafc96f4c5..7c8eaf8c15 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_tim.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_tim.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_tim.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief TIM HAL module driver. * This file provides firmware functions to manage the following * functionalities of the Timer (TIM) peripheral: @@ -208,7 +208,7 @@ static void TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim, HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { /* Check the TIM handle allocation */ - if(htim == HAL_NULL) + if(htim == NULL) { return HAL_ERROR; } @@ -486,7 +486,7 @@ HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim) HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef* htim) { /* Check the TIM handle allocation */ - if(htim == HAL_NULL) + if(htim == NULL) { return HAL_ERROR; } @@ -994,7 +994,7 @@ HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) { /* Check the TIM handle allocation */ - if(htim == HAL_NULL) + if(htim == NULL) { return HAL_ERROR; } @@ -1505,7 +1505,7 @@ HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim) { /* Check the TIM handle allocation */ - if(htim == HAL_NULL) + if(htim == NULL) { return HAL_ERROR; } @@ -1983,7 +1983,7 @@ HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode) { /* Check the TIM handle allocation */ - if(htim == HAL_NULL) + if(htim == NULL) { return HAL_ERROR; } @@ -2259,7 +2259,7 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_Ini uint32_t tmpccer = 0; /* Check the TIM handle allocation */ - if(htim == HAL_NULL) + if(htim == NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_tim.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_tim.h index db8ddf2dfc..e60782528a 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_tim.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_tim.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_tim.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of TIM HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_tim_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_tim_ex.c index 43fe5e22b7..9feb385fa0 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_tim_ex.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_tim_ex.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_tim_ex.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief TIM HAL module driver. * This file provides firmware functions to manage the following * functionalities of the Timer extension peripheral: @@ -161,7 +161,7 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSen TIM_OC_InitTypeDef OC_Config; /* Check the TIM handle allocation */ - if(htim == HAL_NULL) + if(htim == NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_tim_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_tim_ex.h index a1f70d7efa..81cf0769b7 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_tim_ex.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_tim_ex.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_tim_ex.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of TIM HAL Extension module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_uart.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_uart.c index b78f938e88..786b79842e 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_uart.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_uart.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_uart.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief UART HAL module driver. * This file provides firmware functions to manage the following * functionalities of the Universal Asynchronous Receiver Transmitter (UART) peripheral: @@ -240,7 +240,7 @@ static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { /* Check the UART handle allocation */ - if(huart == HAL_NULL) + if(huart == NULL) { return HAL_ERROR; } @@ -301,7 +301,7 @@ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart) { /* Check the UART handle allocation */ - if(huart == HAL_NULL) + if(huart == NULL) { return HAL_ERROR; } @@ -360,7 +360,7 @@ HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart) HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength) { /* Check the UART handle allocation */ - if(huart == HAL_NULL) + if(huart == NULL) { return HAL_ERROR; } @@ -425,7 +425,7 @@ HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLe HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod) { /* Check the UART handle allocation */ - if(huart == HAL_NULL) + if(huart == NULL) { return HAL_ERROR; } @@ -487,7 +487,7 @@ HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Add HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart) { /* Check the UART handle allocation */ - if(huart == HAL_NULL) + if(huart == NULL) { return HAL_ERROR; } @@ -608,7 +608,7 @@ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, u tmp1 = huart->State; if((tmp1 == HAL_UART_STATE_READY) || (tmp1 == HAL_UART_STATE_BUSY_RX)) { - if((pData == HAL_NULL ) || (Size == 0)) + if((pData == NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -702,7 +702,7 @@ HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, ui tmp1 = huart->State; if((tmp1 == HAL_UART_STATE_READY) || (tmp1 == HAL_UART_STATE_BUSY_TX)) { - if((pData == HAL_NULL ) || (Size == 0)) + if((pData == NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -800,7 +800,7 @@ HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData tmp = huart->State; if((tmp == HAL_UART_STATE_READY) || (tmp == HAL_UART_STATE_BUSY_RX)) { - if((pData == HAL_NULL ) || (Size == 0)) + if((pData == NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -858,7 +858,7 @@ HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, tmp = huart->State; if((tmp == HAL_UART_STATE_READY) || (tmp == HAL_UART_STATE_BUSY_TX)) { - if((pData == HAL_NULL ) || (Size == 0)) + if((pData == NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -917,7 +917,7 @@ HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pDat tmp1 = huart->State; if((tmp1 == HAL_UART_STATE_READY) || (tmp1 == HAL_UART_STATE_BUSY_RX)) { - if((pData == HAL_NULL ) || (Size == 0)) + if((pData == NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -988,7 +988,7 @@ HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData tmp1 = huart->State; if((tmp1 == HAL_UART_STATE_READY) || (tmp1 == HAL_UART_STATE_BUSY_TX)) { - if((pData == HAL_NULL ) || (Size == 0)) + if((pData == NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -1129,12 +1129,12 @@ HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart) huart->Instance->CR3 &= ~USART_CR3_DMAR; /* Abort the UART DMA tx Stream */ - if(huart->hdmatx != HAL_NULL) + if(huart->hdmatx != NULL) { HAL_DMA_Abort(huart->hdmatx); } /* Abort the UART DMA rx Stream */ - if(huart->hdmarx != HAL_NULL) + if(huart->hdmarx != NULL) { HAL_DMA_Abort(huart->hdmarx); } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_uart.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_uart.h index 7434a1ccdc..f3f8c0a622 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_uart.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_uart.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_uart.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of UART HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_usart.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_usart.c index 250a488f64..6eb31b1524 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_usart.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_usart.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_usart.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief USART HAL module driver. * This file provides firmware functions to manage the following * functionalities of the Universal Synchronous Asynchronous Receiver Transmitter (USART) peripheral: @@ -222,7 +222,7 @@ static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husar HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart) { /* Check the USART handle allocation */ - if(husart == HAL_NULL) + if(husart == NULL) { return HAL_ERROR; } @@ -268,7 +268,7 @@ HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart) HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart) { /* Check the USART handle allocation */ - if(husart == HAL_NULL) + if(husart == NULL) { return HAL_ERROR; } @@ -399,7 +399,7 @@ HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxDa if(husart->State == HAL_USART_STATE_READY) { - if((pTxData == HAL_NULL) || (Size == 0)) + if((pTxData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -476,7 +476,7 @@ HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxDat if(husart->State == HAL_USART_STATE_READY) { - if((pRxData == HAL_NULL) || (Size == 0)) + if((pRxData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -578,7 +578,7 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t if(husart->State == HAL_USART_STATE_READY) { - if((pTxData == HAL_NULL) || (pRxData == HAL_NULL) || (Size == 0)) + if((pTxData == NULL) || (pRxData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -686,7 +686,7 @@ HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pT { if(husart->State == HAL_USART_STATE_READY) { - if((pTxData == HAL_NULL) || (Size == 0)) + if((pTxData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -735,7 +735,7 @@ HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRx { if(husart->State == HAL_USART_STATE_READY) { - if((pRxData == HAL_NULL) || (Size == 0)) + if((pRxData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -785,7 +785,7 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint { if(husart->State == HAL_USART_STATE_READY) { - if((pTxData == HAL_NULL) || (pRxData == HAL_NULL) || (Size == 0)) + if((pTxData == NULL) || (pRxData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -839,7 +839,7 @@ HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *p if(husart->State == HAL_USART_STATE_READY) { - if((pTxData == HAL_NULL) || (Size == 0)) + if((pTxData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -900,7 +900,7 @@ HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pR if(husart->State == HAL_USART_STATE_READY) { - if((pRxData == HAL_NULL) || (Size == 0)) + if((pRxData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -973,7 +973,7 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uin if(husart->State == HAL_USART_STATE_READY) { - if((pTxData == HAL_NULL) || (pRxData == HAL_NULL) || (Size == 0)) + if((pTxData == NULL) || (pRxData == NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1094,12 +1094,12 @@ HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart) */ /* Abort the USART DMA Tx Stream */ - if(husart->hdmatx != HAL_NULL) + if(husart->hdmatx != NULL) { HAL_DMA_Abort(husart->hdmatx); } /* Abort the USART DMA Rx Stream */ - if(husart->hdmarx != HAL_NULL) + if(husart->hdmarx != NULL) { HAL_DMA_Abort(husart->hdmarx); } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_usart.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_usart.h index 72341d75a9..f6a135a4c0 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_usart.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_usart.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_usart.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of USART HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_wwdg.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_wwdg.c index 530ed46313..01a6186d21 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_wwdg.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_wwdg.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_wwdg.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief WWDG HAL module driver. * This file provides firmware functions to manage the following * functionalities of the Window Watchdog (WWDG) peripheral: @@ -150,7 +150,7 @@ HAL_StatusTypeDef HAL_WWDG_Init(WWDG_HandleTypeDef *hwwdg) { /* Check the WWDG handle allocation */ - if(hwwdg == HAL_NULL) + if(hwwdg == NULL) { return HAL_ERROR; } @@ -193,7 +193,7 @@ HAL_StatusTypeDef HAL_WWDG_Init(WWDG_HandleTypeDef *hwwdg) HAL_StatusTypeDef HAL_WWDG_DeInit(WWDG_HandleTypeDef *hwwdg) { /* Check the WWDG handle allocation */ - if(hwwdg == HAL_NULL) + if(hwwdg == NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_wwdg.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_wwdg.h index b34d3f4d88..37d99426a9 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_wwdg.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_wwdg.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_hal_wwdg.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of WWDG HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_fmc.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_fmc.c index ed5b85f81a..ef1055ded3 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_fmc.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_fmc.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_ll_fmc.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief FMC Low Layer HAL module driver. * * This file provides firmware functions to manage the following @@ -1625,7 +1625,7 @@ HAL_StatusTypeDef FMC_SDRAM_SendCommand(FMC_SDRAM_TypeDef *Device, FMC_SDRAM_Com /* Get tick */ tickstart = HAL_GetTick(); - /* wait until command is send */ + /* Wait until command is send */ while(HAL_IS_BIT_SET(Device->SDSR, FMC_SDSR_BUSY)) { /* Check for the Timeout */ @@ -1636,8 +1636,6 @@ HAL_StatusTypeDef FMC_SDRAM_SendCommand(FMC_SDRAM_TypeDef *Device, FMC_SDRAM_Com return HAL_TIMEOUT; } } - - return HAL_ERROR; } return HAL_OK; diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_fmc.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_fmc.h index 824dca8234..3386a27134 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_fmc.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_fmc.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_ll_fmc.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of FMC HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_fsmc.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_fsmc.c index 089870c959..005d5e1700 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_fsmc.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_fsmc.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_ll_fsmc.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief FSMC Low Layer HAL module driver. * * This file provides firmware functions to manage the following diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_fsmc.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_fsmc.h index e9a6f0965e..56b3ebd422 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_fsmc.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_fsmc.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_ll_fsmc.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of FSMC HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_sdmmc.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_sdmmc.c index 96b71e7dd2..fb61e41c3e 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_sdmmc.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_sdmmc.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_ll_sdmmc.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief SDMMC Low Layer HAL module driver. * * This file provides firmware functions to manage the following diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_sdmmc.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_sdmmc.h index f664647014..801a9f8178 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_sdmmc.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_sdmmc.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_ll_sdmmc.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of SDMMC HAL module. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_usb.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_usb.c index 8c64e027ab..a094e0c963 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_usb.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_usb.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_ll_usb.c * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief USB Low Layer HAL module driver. * * This file provides firmware functions to manage the following @@ -72,7 +72,9 @@ /* Private functions ---------------------------------------------------------*/ static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx); -/** @defgroup PCD_Private_Functions +/* Exported functions --------------------------------------------------------*/ + +/** @defgroup LL_USB_Exported_Functions USB Low Layer Exported Functions * @{ */ @@ -117,7 +119,6 @@ HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef c } else /* FS interface (embedded Phy) */ { - /* Select FS Embedded PHY */ USBx->GUSBCFG |= USB_OTG_GUSBCFG_PHYSEL; @@ -166,7 +167,7 @@ HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx) * @brief USB_SetCurrentMode : Set functional mode * @param USBx : Selected device * @param mode : current core mode - * This parameter can be one of the these values: + * This parameter can be one of these values: * @arg USB_OTG_DEVICE_MODE: Peripheral mode * @arg USB_OTG_HOST_MODE: Host mode * @arg USB_OTG_DRD_MODE: Dual Role Device mode @@ -207,7 +208,7 @@ HAL_StatusTypeDef USB_DevInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef c if (cfg.vbus_sensing_enable == 0) { - /*Desactivate VBUS Sensing B */ + /* Deactivate VBUS Sensing B */ USBx->GCCFG &= ~USB_OTG_GCCFG_VBDEN; /* B-peripheral session valid override enable*/ @@ -251,7 +252,6 @@ HAL_StatusTypeDef USB_DevInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef c /* Flush the FIFOs */ USB_FlushTxFifo(USBx , 0x10); /* all Tx FIFOs */ USB_FlushRxFifo(USBx); - /* Clear all pending Device Interrupts */ USBx_DEVICE->DIEPMSK = 0; @@ -344,7 +344,7 @@ HAL_StatusTypeDef USB_FlushTxFifo (USB_OTG_GlobalTypeDef *USBx, uint32_t num ) { uint32_t count = 0; - USBx->GRSTCTL = ( USB_OTG_GRSTCTL_TXFFLSH |(uint32_t)( num << 5 )); + USBx->GRSTCTL = ( USB_OTG_GRSTCTL_TXFFLSH |(uint32_t)( num << 6)); do { @@ -387,7 +387,7 @@ HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx) * depending the PHY type and the enumeration speed of the device. * @param USBx : Selected device * @param speed : device speed - * This parameter can be one of the these values: + * This parameter can be one of these values: * @arg USB_OTG_SPEED_HIGH: High speed mode * @arg USB_OTG_SPEED_HIGH_IN_FULL: High speed core in Full Speed mode * @arg USB_OTG_SPEED_FULL: Full speed mode @@ -404,7 +404,7 @@ HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx , uint8_t speed) * @brief USB_GetDevSpeed :Return the Dev Speed * @param USBx : Selected device * @retval speed : device speed - * This parameter can be one of the these values: + * This parameter can be one of these values: * @arg USB_OTG_SPEED_HIGH: High speed mode * @arg USB_OTG_SPEED_FULL: Full speed mode * @arg USB_OTG_SPEED_LOW: Low speed mode @@ -521,7 +521,6 @@ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EP } else { - USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16)); USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16)); USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_USBAEP; @@ -556,7 +555,7 @@ HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, U * @param USBx : Selected device * @param ep: pointer to endpoint structure * @param dma: USB dma enabled or disabled - * This parameter can be one of the these values: + * This parameter can be one of these values: * 0 : DMA feature not used * 1 : DMA feature used * @retval HAL status @@ -678,7 +677,7 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDe * @param USBx : Selected device * @param ep: pointer to endpoint structure * @param dma: USB dma enabled or disabled - * This parameter can be one of the these values: + * This parameter can be one of these values: * 0 : DMA feature not used * 1 : DMA feature used * @retval HAL status @@ -767,7 +766,7 @@ HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeD * @param ch_ep_num : endpoint or host channel number * @param len : Number of bytes to write * @param dma: USB dma enabled or disabled - * This parameter can be one of the these values: + * This parameter can be one of these values: * 0 : DMA feature not used * 1 : DMA feature used * @retval HAL status @@ -795,7 +794,7 @@ HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uin * @param ch_ep_num : endpoint or host channel number * @param len : Number of bytes to read * @param dma: USB dma enabled or disabled - * This parameter can be one of the these values: + * This parameter can be one of these values: * 0 : DMA feature not used * 1 : DMA feature used * @retval pointer to destination buffer @@ -1026,7 +1025,7 @@ void USB_ClearInterrupts (USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt) * @brief Returns USB core mode * @param USBx : Selected device * @retval return core mode : Host or Device - * This parameter can be one of the these values: + * This parameter can be one of these values: * 0 : Host * 1 : Device */ @@ -1060,7 +1059,7 @@ HAL_StatusTypeDef USB_ActivateSetup (USB_OTG_GlobalTypeDef *USBx) * @brief Prepare the EP0 to start the first control setup * @param USBx : Selected device * @param dma: USB dma enabled or disabled - * This parameter can be one of the these values: + * This parameter can be one of these values: * 0 : DMA feature not used * 1 : DMA feature used * @param psetup : pointer to setup packet @@ -1176,7 +1175,6 @@ HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef /* Clear any pending interrupts */ USBx->GINTSTS = 0xFFFFFFFF; - if(USBx == USB_OTG_FS) { @@ -1184,9 +1182,7 @@ HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef USBx->GRXFSIZ = (uint32_t )0x80; USBx->DIEPTXF0_HNPTXFSIZ = (uint32_t )(((0x60 << 16)& USB_OTG_NPTXFD) | 0x80); USBx->HPTXFSIZ = (uint32_t )(((0x40 << 16)& USB_OTG_HPTXFSIZ_PTXFD) | 0xE0); - } - else { /* set Rx FIFO size */ @@ -1214,7 +1210,7 @@ HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef * HCFG register on the PHY type and set the right frame interval * @param USBx : Selected device * @param freq : clock frequency - * This parameter can be one of the these values: + * This parameter can be one of these values: * HCFG_48_MHZ : Full Speed 48 MHz Clock * HCFG_6_MHZ : Low Speed 6 MHz Clock * @retval HAL status @@ -1239,7 +1235,7 @@ HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx , uint8_t freq * @brief USB_OTG_ResetPort : Reset Host Port * @param USBx : Selected device * @retval HAL status - * @note : (1)The application must wait at least 10 ms + * @note (1)The application must wait at least 10 ms * before clearing the reset bit. */ HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx) @@ -1260,7 +1256,7 @@ HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx) /** * @brief USB_DriveVbus : activate or de-activate vbus * @param state : VBUS state - * This parameter can be one of the these values: + * This parameter can be one of these values: * 0 : VBUS Active * 1 : VBUS Inactive * @retval HAL status @@ -1288,7 +1284,7 @@ HAL_StatusTypeDef USB_DriveVbus (USB_OTG_GlobalTypeDef *USBx, uint8_t state) * @brief Return Host Core speed * @param USBx : Selected device * @retval speed : Host speed - * This parameter can be one of the these values: + * This parameter can be one of these values: * @arg USB_OTG_SPEED_HIGH: High speed mode * @arg USB_OTG_SPEED_FULL: Full speed mode * @arg USB_OTG_SPEED_LOW: Low speed mode @@ -1321,12 +1317,12 @@ uint32_t USB_GetCurrentFrame (USB_OTG_GlobalTypeDef *USBx) * @param dev_address : Current device address * This parameter can be a value from 0 to 255 * @param speed : Current device speed - * This parameter can be one of the these values: + * This parameter can be one of these values: * @arg USB_OTG_SPEED_HIGH: High speed mode * @arg USB_OTG_SPEED_FULL: Full speed mode * @arg USB_OTG_SPEED_LOW: Low speed mode * @param ep_type : Endpoint Type - * This parameter can be one of the these values: + * This parameter can be one of these values: * @arg EP_TYPE_CTRL: Control type * @arg EP_TYPE_ISOC: Isochronous type * @arg EP_TYPE_BULK: Bulk type @@ -1372,6 +1368,7 @@ HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx, } } break; + case EP_TYPE_INTR: USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\ @@ -1429,7 +1426,7 @@ HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx, * @param USBx : Selected device * @param hc : pointer to host channel structure * @param dma: USB dma enabled or disabled - * This parameter can be one of the these values: + * This parameter can be one of these values: * 0 : DMA feature not used * 1 : DMA feature used * @retval HAL state @@ -1445,7 +1442,8 @@ HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDe uint16_t len_words = 0; uint16_t num_packets = 0; uint16_t max_hc_pkt_count = 256; - + uint32_t tmpreg = 0; + if((USBx != USB_OTG_FS) && (hc->speed == USB_OTG_SPEED_HIGH)) { if((dma == 0) && (hc->do_ping == 1)) @@ -1480,8 +1478,6 @@ HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDe hc->xfer_len = num_packets * hc->max_packet; } - - /* Initialize the HCTSIZn register */ USBx_HC(hc->ch_num)->HCTSIZ = (((hc->xfer_len) & USB_OTG_HCTSIZ_XFRSIZ)) |\ ((num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |\ @@ -1498,8 +1494,10 @@ HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDe USBx_HC(hc->ch_num)->HCCHAR |= (is_oddframe << 29); /* Set host channel enable */ - USBx_HC(hc->ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHDIS; - USBx_HC(hc->ch_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA; + tmpreg = USBx_HC(hc->ch_num)->HCCHAR; + tmpreg &= ~USB_OTG_HCCHAR_CHDIS; + tmpreg |= USB_OTG_HCCHAR_CHENA; + USBx_HC(hc->ch_num)->HCCHAR = tmpreg; if (dma == 0) /* Slave mode */ { @@ -1626,13 +1624,16 @@ HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx , uint8_t hc_num) HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx , uint8_t ch_num) { uint8_t num_packets = 1; + uint32_t tmpreg = 0; USBx_HC(ch_num)->HCTSIZ = ((num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |\ USB_OTG_HCTSIZ_DOPING; /* Set host channel enable */ - USBx_HC(ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHDIS; - USBx_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA; + tmpreg = USBx_HC(ch_num)->HCCHAR; + tmpreg &= ~USB_OTG_HCCHAR_CHDIS; + tmpreg |= USB_OTG_HCCHAR_CHENA; + USBx_HC(ch_num)->HCCHAR = tmpreg; return HAL_OK; } @@ -1667,8 +1668,7 @@ HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx) /* Halt all channels to put them into a known state. */ for (i = 0; i <= 15; i++) - { - + { value = USBx_HC(i)->HCCHAR ; value |= USB_OTG_HCCHAR_CHDIS; diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_usb.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_usb.h index b4cb4130db..9f43ca830a 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_usb.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_usb.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f4xx_ll_usb.h * @author MCD Application Team - * @version V1.3.0 - * @date 09-March-2015 + * @version V1.3.2 + * @date 26-June-2015 * @brief Header file of USB Core HAL module. ****************************************************************************** * @attention