mirror of https://github.com/ARMmbed/mbed-os.git
Merge branch 'master' of https://github.com/mbedmicro/mbed into dev_nucleo_f042k6
commit
f769fee22f
|
@ -16,7 +16,7 @@
|
|||
#ifndef MBED_H
|
||||
#define MBED_H
|
||||
|
||||
#define MBED_LIBRARY_VERSION 106
|
||||
#define MBED_LIBRARY_VERSION 107
|
||||
|
||||
#include "platform.h"
|
||||
|
||||
|
|
|
@ -0,0 +1,126 @@
|
|||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
SEARCH_DIR(.)
|
||||
|
||||
/* Memory Spaces Definitions */
|
||||
MEMORY
|
||||
{
|
||||
rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000
|
||||
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
|
||||
}
|
||||
|
||||
/* The stack size used by the application. NOTE: you need to adjust according to your application. */
|
||||
STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
|
||||
|
||||
/* Section Definitions */
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sfixed = .;
|
||||
KEEP(*(.vectors .vectors.*))
|
||||
*(.text .text.* .gnu.linkonce.t.*)
|
||||
*(.glue_7t) *(.glue_7)
|
||||
*(.rodata .rodata* .gnu.linkonce.r.*)
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
|
||||
/* Support C constructors, and C destructors in both user code
|
||||
and the C library. This also provides support for C++ code. */
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.init))
|
||||
. = ALIGN(4);
|
||||
__preinit_array_start = .;
|
||||
KEEP (*(.preinit_array))
|
||||
__preinit_array_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__init_array_start = .;
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
__init_array_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*crtend.o(.ctors))
|
||||
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.fini))
|
||||
|
||||
. = ALIGN(4);
|
||||
__fini_array_start = .;
|
||||
KEEP (*(.fini_array))
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
__fini_array_end = .;
|
||||
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*crtend.o(.dtors))
|
||||
|
||||
. = ALIGN(4);
|
||||
_efixed = .; /* End of text section */
|
||||
} > rom
|
||||
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
PROVIDE_HIDDEN (__exidx_start = .);
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > rom
|
||||
PROVIDE_HIDDEN (__exidx_end = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
|
||||
.dvectors (NOLOAD) :
|
||||
{
|
||||
_sdvectors = .;
|
||||
. = . + 0xB0;
|
||||
_edvectors = .;
|
||||
} > ram
|
||||
|
||||
.relocate : AT (_etext)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_srelocate = .;
|
||||
*(.ramfunc .ramfunc.*);
|
||||
*(.data .data.*);
|
||||
. = ALIGN(4);
|
||||
_erelocate = .;
|
||||
} > ram
|
||||
|
||||
/* .bss section which is used for uninitialized data */
|
||||
.bss (NOLOAD) :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sbss = . ;
|
||||
_szero = .;
|
||||
*(.bss .bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_ebss = . ;
|
||||
_ezero = .;
|
||||
} > ram
|
||||
|
||||
.heap (NOLOAD) :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__end__ = . ;
|
||||
. = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE;
|
||||
} > ram
|
||||
|
||||
/* stack section */
|
||||
.stack (NOLOAD):
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sstack = .;
|
||||
. = . + STACK_SIZE;
|
||||
. = ALIGN(8);
|
||||
_estack = .;
|
||||
} > ram
|
||||
|
||||
. = ALIGN(4);
|
||||
}
|
|
@ -0,0 +1,158 @@
|
|||
#include "samd21.h"
|
||||
|
||||
/* Initialize segments */
|
||||
extern uint32_t _sfixed;
|
||||
extern uint32_t _efixed;
|
||||
extern uint32_t _etext;
|
||||
extern uint32_t _srelocate;
|
||||
extern uint32_t _erelocate;
|
||||
extern uint32_t _szero;
|
||||
extern uint32_t _ezero;
|
||||
extern uint32_t _sstack;
|
||||
extern uint32_t _estack;
|
||||
|
||||
/** \cond DOXYGEN_SHOULD_SKIP_THIS */
|
||||
int main(void);
|
||||
/** \endcond */
|
||||
|
||||
void __libc_init_array(void);
|
||||
|
||||
/* Default empty handler */
|
||||
void Dummy_Handler(void);
|
||||
|
||||
/* Cortex-M0+ core handlers */
|
||||
void NMI_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void HardFault_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void SVC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void PendSV_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void SysTick_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
|
||||
/* Peripherals handlers */
|
||||
void PM_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void SYSCTRL_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void WDT_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void RTC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void EIC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void NVMCTRL_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void DMAC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void USB_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void EVSYS_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void SERCOM0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void SERCOM1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void SERCOM2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void SERCOM3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void SERCOM4_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void SERCOM5_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void TCC0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void TCC1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void TCC2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void TC3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void TC4_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void TC5_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void TC6_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void TC7_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void ADC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void AC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void DAC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void PTC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void I2S_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
|
||||
/* Exception Table */
|
||||
__attribute__ ((section(".vectors")))
|
||||
const DeviceVectors exception_table = {
|
||||
|
||||
/* Configure Initial Stack Pointer, using linker-generated symbols */
|
||||
(void*) (&_estack),
|
||||
|
||||
(void*) Reset_Handler,
|
||||
(void*) NMI_Handler,
|
||||
(void*) HardFault_Handler,
|
||||
(void*) (0UL), /* Reserved */
|
||||
(void*) (0UL), /* Reserved */
|
||||
(void*) (0UL), /* Reserved */
|
||||
(void*) (0UL), /* Reserved */
|
||||
(void*) (0UL), /* Reserved */
|
||||
(void*) (0UL), /* Reserved */
|
||||
(void*) (0UL), /* Reserved */
|
||||
(void*) SVC_Handler,
|
||||
(void*) (0UL), /* Reserved */
|
||||
(void*) (0UL), /* Reserved */
|
||||
(void*) PendSV_Handler,
|
||||
(void*) SysTick_Handler,
|
||||
|
||||
/* Configurable interrupts */
|
||||
(void*) PM_Handler, /* 0 Power Manager */
|
||||
(void*) SYSCTRL_Handler, /* 1 System Control */
|
||||
(void*) WDT_Handler, /* 2 Watchdog Timer */
|
||||
(void*) RTC_Handler, /* 3 Real-Time Counter */
|
||||
(void*) EIC_Handler, /* 4 External Interrupt Controller */
|
||||
(void*) NVMCTRL_Handler, /* 5 Non-Volatile Memory Controller */
|
||||
(void*) DMAC_Handler, /* 6 Direct Memory Access Controller */
|
||||
(void*) USB_Handler, /* 7 Universal Serial Bus */
|
||||
(void*) EVSYS_Handler, /* 8 Event System Interface */
|
||||
(void*) SERCOM0_Handler, /* 9 Serial Communication Interface 0 */
|
||||
(void*) SERCOM1_Handler, /* 10 Serial Communication Interface 1 */
|
||||
(void*) SERCOM2_Handler, /* 11 Serial Communication Interface 2 */
|
||||
(void*) SERCOM3_Handler, /* 12 Serial Communication Interface 3 */
|
||||
(void*) SERCOM4_Handler, /* 13 Serial Communication Interface 4 */
|
||||
(void*) SERCOM5_Handler, /* 14 Serial Communication Interface 5 */
|
||||
(void*) TCC0_Handler, /* 15 Timer Counter Control 0 */
|
||||
(void*) TCC1_Handler, /* 16 Timer Counter Control 1 */
|
||||
(void*) TCC2_Handler, /* 17 Timer Counter Control 2 */
|
||||
(void*) TC3_Handler, /* 18 Basic Timer Counter 0 */
|
||||
(void*) TC4_Handler, /* 19 Basic Timer Counter 1 */
|
||||
(void*) TC5_Handler, /* 20 Basic Timer Counter 2 */
|
||||
(void*) TC6_Handler, /* 21 Basic Timer Counter 3 */
|
||||
(void*) TC7_Handler, /* 22 Basic Timer Counter 4 */
|
||||
(void*) ADC_Handler, /* 23 Analog Digital Converter */
|
||||
(void*) AC_Handler, /* 24 Analog Comparators */
|
||||
(void*) DAC_Handler, /* 25 Digital Analog Converter */
|
||||
(void*) PTC_Handler, /* 26 Peripheral Touch Controller */
|
||||
(void*) I2S_Handler /* 27 Inter-IC Sound Interface */
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief This is the code that gets called on processor reset.
|
||||
* To initialize the device, and call the main() routine.
|
||||
*/
|
||||
void Reset_Handler(void)
|
||||
{
|
||||
uint32_t *pSrc, *pDest;
|
||||
|
||||
/* Initialize the relocate segment */
|
||||
pSrc = &_etext;
|
||||
pDest = &_srelocate;
|
||||
|
||||
if (pSrc != pDest) {
|
||||
for (; pDest < &_erelocate;) {
|
||||
*pDest++ = *pSrc++;
|
||||
}
|
||||
}
|
||||
|
||||
/* Clear the zero segment */
|
||||
for (pDest = &_szero; pDest < &_ezero;) {
|
||||
*pDest++ = 0;
|
||||
}
|
||||
|
||||
/* Set the vector table base address */
|
||||
pSrc = (uint32_t *) & _sfixed;
|
||||
SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);
|
||||
|
||||
/* Initialize the C library */
|
||||
__libc_init_array();
|
||||
|
||||
/* Branch to main function */ // expected to be done by MBED OS
|
||||
main();
|
||||
|
||||
/* Infinite loop */
|
||||
while (1);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Default interrupt handler for unused IRQs.
|
||||
*/
|
||||
void Dummy_Handler(void)
|
||||
{
|
||||
while (1) {
|
||||
}
|
||||
}
|
|
@ -0,0 +1,173 @@
|
|||
#include "samd21.h"
|
||||
|
||||
void __iar_program_start(void);
|
||||
int __low_level_init(void);
|
||||
|
||||
void Dummy_Handler(void);
|
||||
void Reset_Handler(void);
|
||||
|
||||
/**
|
||||
* \brief Default interrupt handler for unused IRQs.
|
||||
*/
|
||||
void Dummy_Handler(void)
|
||||
{
|
||||
while (1) {
|
||||
}
|
||||
}
|
||||
|
||||
/* Cortex-M0+ core handlers */
|
||||
void NMI_Handler ( void );
|
||||
void HardFault_Handler ( void );
|
||||
void SVC_Handler ( void );
|
||||
void PendSV_Handler ( void );
|
||||
void SysTick_Handler ( void );
|
||||
|
||||
/* Peripherals handlers */
|
||||
void PM_Handler ( void );
|
||||
void SYSCTRL_Handler ( void );
|
||||
void WDT_Handler ( void );
|
||||
void RTC_Handler ( void );
|
||||
void EIC_Handler ( void );
|
||||
void NVMCTRL_Handler ( void );
|
||||
void DMAC_Handler ( void );
|
||||
void USB_Handler ( void );
|
||||
void EVSYS_Handler ( void );
|
||||
void SERCOM0_Handler ( void );
|
||||
void SERCOM1_Handler ( void );
|
||||
void SERCOM2_Handler ( void );
|
||||
void SERCOM3_Handler ( void );
|
||||
void SERCOM4_Handler ( void );
|
||||
void SERCOM5_Handler ( void );
|
||||
void TCC0_Handler ( void );
|
||||
void TCC1_Handler ( void );
|
||||
void TCC2_Handler ( void );
|
||||
void TC3_Handler ( void );
|
||||
void TC4_Handler ( void );
|
||||
void TC5_Handler ( void );
|
||||
void TC6_Handler ( void );
|
||||
void TC7_Handler ( void );
|
||||
void ADC_Handler ( void );
|
||||
void AC_Handler ( void );
|
||||
void DAC_Handler ( void );
|
||||
void PTC_Handler ( void );
|
||||
void I2S_Handler ( void );
|
||||
|
||||
/* Cortex-M0+ core handlers */
|
||||
#pragma weak NMI_Handler = Dummy_Handler
|
||||
#pragma weak HardFault_Handler = Dummy_Handler
|
||||
#pragma weak SVC_Handler = Dummy_Handler
|
||||
#pragma weak PendSV_Handler = Dummy_Handler
|
||||
#pragma weak SysTick_Handler = Dummy_Handler
|
||||
|
||||
/* Peripherals handlers */
|
||||
#pragma weak PM_Handler = Dummy_Handler
|
||||
#pragma weak SYSCTRL_Handler = Dummy_Handler
|
||||
#pragma weak WDT_Handler = Dummy_Handler
|
||||
#pragma weak RTC_Handler = Dummy_Handler
|
||||
#pragma weak EIC_Handler = Dummy_Handler
|
||||
#pragma weak NVMCTRL_Handler = Dummy_Handler
|
||||
#pragma weak DMAC_Handler = Dummy_Handler
|
||||
#pragma weak USB_Handler = Dummy_Handler
|
||||
#pragma weak EVSYS_Handler = Dummy_Handler
|
||||
#pragma weak SERCOM0_Handler = Dummy_Handler
|
||||
#pragma weak SERCOM1_Handler = Dummy_Handler
|
||||
#pragma weak SERCOM2_Handler = Dummy_Handler
|
||||
#pragma weak SERCOM3_Handler = Dummy_Handler
|
||||
#pragma weak SERCOM4_Handler = Dummy_Handler
|
||||
#pragma weak SERCOM5_Handler = Dummy_Handler
|
||||
#pragma weak TCC0_Handler = Dummy_Handler
|
||||
#pragma weak TCC1_Handler = Dummy_Handler
|
||||
#pragma weak TCC2_Handler = Dummy_Handler
|
||||
#pragma weak TC3_Handler = Dummy_Handler
|
||||
#pragma weak TC4_Handler = Dummy_Handler
|
||||
#pragma weak TC5_Handler = Dummy_Handler
|
||||
#pragma weak TC6_Handler = Dummy_Handler
|
||||
#pragma weak TC7_Handler = Dummy_Handler
|
||||
#pragma weak ADC_Handler = Dummy_Handler
|
||||
#pragma weak AC_Handler = Dummy_Handler
|
||||
#pragma weak DAC_Handler = Dummy_Handler
|
||||
#pragma weak PTC_Handler = Dummy_Handler
|
||||
#pragma weak I2S_Handler = Dummy_Handler
|
||||
|
||||
/* Exception Table */
|
||||
#pragma language=extended
|
||||
#pragma segment="CSTACK"
|
||||
|
||||
/* The name "__vector_table" has special meaning for C-SPY: */
|
||||
/* it is where the SP start value is found, and the NVIC vector */
|
||||
/* table register (VTOR) is initialized to this address if != 0 */
|
||||
|
||||
#pragma section = ".intvec"
|
||||
#pragma location = ".intvec"
|
||||
//! [startup_vector_table]
|
||||
const DeviceVectors __vector_table[] = {
|
||||
__sfe("CSTACK"),
|
||||
(void*) __iar_program_start,
|
||||
(void*) NMI_Handler,
|
||||
(void*) HardFault_Handler,
|
||||
(void*) (0UL), /* Reserved */
|
||||
(void*) (0UL), /* Reserved */
|
||||
(void*) (0UL), /* Reserved */
|
||||
(void*) (0UL), /* Reserved */
|
||||
(void*) (0UL), /* Reserved */
|
||||
(void*) (0UL), /* Reserved */
|
||||
(void*) (0UL), /* Reserved */
|
||||
(void*) SVC_Handler,
|
||||
(void*) (0UL), /* Reserved */
|
||||
(void*) (0UL), /* Reserved */
|
||||
(void*) PendSV_Handler,
|
||||
(void*) SysTick_Handler,
|
||||
|
||||
/* Configurable interrupts */
|
||||
(void*) PM_Handler, /* 0 Power Manager */
|
||||
(void*) SYSCTRL_Handler, /* 1 System Control */
|
||||
(void*) WDT_Handler, /* 2 Watchdog Timer */
|
||||
(void*) RTC_Handler, /* 3 Real-Time Counter */
|
||||
(void*) EIC_Handler, /* 4 External Interrupt Controller */
|
||||
(void*) NVMCTRL_Handler, /* 5 Non-Volatile Memory Controller */
|
||||
(void*) DMAC_Handler, /* 6 Direct Memory Access Controller */
|
||||
(void*) USB_Handler, /* 7 Universal Serial Bus */
|
||||
(void*) EVSYS_Handler, /* 8 Event System Interface */
|
||||
(void*) SERCOM0_Handler, /* 9 Serial Communication Interface 0 */
|
||||
(void*) SERCOM1_Handler, /* 10 Serial Communication Interface 1 */
|
||||
(void*) SERCOM2_Handler, /* 11 Serial Communication Interface 2 */
|
||||
(void*) SERCOM3_Handler, /* 12 Serial Communication Interface 3 */
|
||||
(void*) SERCOM4_Handler, /* 13 Serial Communication Interface 4 */
|
||||
(void*) SERCOM5_Handler, /* 14 Serial Communication Interface 5 */
|
||||
(void*) TCC0_Handler, /* 15 Timer Counter Control 0 */
|
||||
(void*) TCC1_Handler, /* 16 Timer Counter Control 1 */
|
||||
(void*) TCC2_Handler, /* 17 Timer Counter Control 2 */
|
||||
(void*) TC3_Handler, /* 18 Basic Timer Counter 0 */
|
||||
(void*) TC4_Handler, /* 19 Basic Timer Counter 1 */
|
||||
(void*) TC5_Handler, /* 20 Basic Timer Counter 2 */
|
||||
(void*) TC6_Handler, /* 21 Basic Timer Counter 3 */
|
||||
(void*) TC7_Handler, /* 22 Basic Timer Counter 4 */
|
||||
(void*) ADC_Handler, /* 23 Analog Digital Converter */
|
||||
(void*) AC_Handler, /* 24 Analog Comparators */
|
||||
(void*) DAC_Handler, /* 25 Digital Analog Converter */
|
||||
(void*) PTC_Handler, /* 26 Peripheral Touch Controller */
|
||||
(void*) I2S_Handler /* 27 Inter-IC Sound Interface */
|
||||
};
|
||||
//! [startup_vector_table]
|
||||
|
||||
/**------------------------------------------------------------------------------
|
||||
* This is the code that gets called on processor reset. To initialize the
|
||||
* device.
|
||||
*------------------------------------------------------------------------------*/
|
||||
int __low_level_init(void)
|
||||
{
|
||||
uint32_t *pSrc = __section_begin(".intvec");
|
||||
|
||||
SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);
|
||||
|
||||
return 1; /* if return 0, the data sections will not be initialized */
|
||||
}
|
||||
|
||||
/**------------------------------------------------------------------------------
|
||||
* This is the code that gets called on processor reset. To initialize the
|
||||
* device.
|
||||
*------------------------------------------------------------------------------*/
|
||||
void Reset_Handler(void)
|
||||
{
|
||||
__iar_program_start();
|
||||
}
|
|
@ -42,22 +42,20 @@
|
|||
|
||||
#define DISABLE_WDOG 1
|
||||
|
||||
#define CLOCK_SETUP 3
|
||||
#define CLOCK_SETUP 1
|
||||
/* Predefined clock setups
|
||||
0 ... Multipurpose Clock Generator (MCG) in FLL Engaged Internal (FEI) mode
|
||||
Reference clock source for MCG module is the slow internal clock source 32.768kHz
|
||||
Core clock = 41.94MHz, BusClock = 41.94MHz
|
||||
This works on Teensy3.1
|
||||
Works on Teensy3.1 but no USB support
|
||||
1 ... Multipurpose Clock Generator (MCG) in PLL Engaged External (PEE) mode
|
||||
Reference clock source for MCG module is an external crystal 8MHz
|
||||
Core clock = 48MHz, BusClock = 48MHz
|
||||
2 ... Multipurpose Clock Generator (MCG) in Bypassed Low Power External (BLPE) mode
|
||||
Core clock/Bus clock derived directly from an external crystal 8MHz with no multiplication
|
||||
Core clock = 8MHz, BusClock = 8MHz
|
||||
3 ... Multipurpose Clock Generator (MCG) in PLL Engaged External (PEE) mode
|
||||
Reference clock source for MCG module is an external crystal 16MHz
|
||||
Core clock = 72MHz, BusClock = 48MHz
|
||||
This is the default Teensy3.1 72Mhz set up
|
||||
Core clock = 96MHz, BusClock = 48MHz
|
||||
Default high speed Teensy3.1 96Mhz set up
|
||||
2 ... Multipurpose Clock Generator (MCG) in PLL Engaged External (PEE) mode
|
||||
Reference clock source for MCG module is an external crystal 16MHz
|
||||
Core clock = 72MHz, BusClock = 36MHz
|
||||
Alternative standard 'slower' Teensy3.1 72Mhz set up
|
||||
*/
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
|
@ -70,23 +68,17 @@
|
|||
#define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
|
||||
#define DEFAULT_SYSTEM_CLOCK 41943040u /* Default System clock value */
|
||||
#elif (CLOCK_SETUP == 1)
|
||||
#define CPU_XTAL_CLK_HZ 8000000u /* Value of the external crystal or oscillator clock frequency in Hz */
|
||||
#define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
|
||||
#define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
|
||||
#define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
|
||||
#define DEFAULT_SYSTEM_CLOCK 48000000u /* Default System clock value */
|
||||
#elif (CLOCK_SETUP == 2)
|
||||
#define CPU_XTAL_CLK_HZ 8000000u /* Value of the external crystal or oscillator clock frequency in Hz */
|
||||
#define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
|
||||
#define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
|
||||
#define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
|
||||
#define DEFAULT_SYSTEM_CLOCK 8000000u /* Default System clock value */
|
||||
#elif (CLOCK_SETUP == 3)
|
||||
#define CPU_XTAL_CLK_HZ 16000000u /* Value of the external crystal or oscillator clock frequency in Hz */
|
||||
#define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
|
||||
#define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
|
||||
#define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
|
||||
#define DEFAULT_SYSTEM_CLOCK 72000000u /* Default System clock value */
|
||||
#define DEFAULT_SYSTEM_CLOCK 96000000u /* Default System clock value */
|
||||
#elif (CLOCK_SETUP == 2)
|
||||
#define CPU_XTAL_CLK_HZ 16000000u /* Value of the external crystal or oscillator clock frequency in Hz */
|
||||
#define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
|
||||
#define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
|
||||
#define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
|
||||
#define DEFAULT_SYSTEM_CLOCK 72000000u /* Default System clock value */
|
||||
#endif /* (CLOCK_SETUP == 2) */
|
||||
|
||||
|
||||
|
@ -130,65 +122,44 @@ void SystemInit (void) {
|
|||
while((MCG->S & 0x0Cu) != 0x00u) { } /* Wait until output of the FLL is selected */
|
||||
|
||||
#elif (CLOCK_SETUP == 1)
|
||||
/* SIM->CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV4=1 Set Prescalers 48MHz cpu, 48MHz system, 24MHz flash*/
|
||||
SIM->CLKDIV1 = SIM_CLKDIV1_OUTDIV4(1);
|
||||
/* SIM->CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV4=3 Set Prescalers 96MHz cpu, 48MHz bus, 24MHz flash*/
|
||||
SIM->CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1) | SIM_CLKDIV1_OUTDIV4(3);
|
||||
/* SIM->CLKDIV2: USBDIV=2, Divide 96MHz system clock for USB 48MHz */
|
||||
SIM->CLKDIV2 = SIM_CLKDIV2_USBDIV(1);
|
||||
/* OSC0->CR: ERCLKEN=0,EREFSTEN=0,SC2P=1,SC4P=0,SC8P=1,SC16P=0 10pF loading capacitors for 16MHz system oscillator*/
|
||||
OSC0->CR = OSC_CR_SC8P_MASK | OSC_CR_SC2P_MASK;
|
||||
/* Switch to FBE Mode */
|
||||
/* OSC0->CR: ERCLKEN=0,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
|
||||
OSC0->CR = (uint8_t)0x00u;
|
||||
/* MCG->C7: OSCSEL=0 */
|
||||
MCG->C7 = (uint8_t)0x00u;
|
||||
/* MCG->C2: LOCKRE0=0,RANGE0=2,HGO=0,EREFS=1,LP=0,IRCS=0 */
|
||||
MCG->C2 = MCG_C2_RANGE0(2);
|
||||
MCG->C2 = MCG_C2_RANGE0(2) | MCG_C2_EREFS0_MASK;
|
||||
//MCG->C2 = (uint8_t)0x24u;
|
||||
/* MCG->C1: CLKS=2,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
|
||||
MCG->C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(3) | MCG_C1_IRCLKEN_MASK;
|
||||
/* MCG->C4: DMX32=0,DRST_DRS=0 */
|
||||
MCG->C4 &= (uint8_t)~(uint8_t)0xE0u;
|
||||
/* MCG->C5: PLLCLKEN=0,PLLSTEN=0,PRDIV0=3 */
|
||||
MCG->C5 = MCG_C5_PRDIV0(3);
|
||||
/* MCG->C4: DMX32=0,DRST_DRS=0,FCTRIM=0,SCFTRIM=0 */
|
||||
MCG->C4 &= (uint8_t)~(uint8_t)0xE0u;
|
||||
/* MCG->C5: PLLCLKEN=0,PLLSTEN=0,PRDIV0=7 */
|
||||
MCG->C5 = MCG_C5_PRDIV0(7);
|
||||
/* MCG->C6: LOLIE=0,PLLS=0,CME=0,VDIV0=0 */
|
||||
MCG->C6 = (uint8_t)0x00u;
|
||||
while((MCG->S & MCG_S_OSCINIT0_MASK) == 0u) { } /* Check that the oscillator is running */
|
||||
while((MCG->S & 0x0Cu) != 0x08u) { } /* Wait until external reference clock is selected as MCG output */
|
||||
/* Switch to PBE Mode */
|
||||
/* MCG_C5: PLLCLKEN=0,PLLSTEN=0,PRDIV0=3 */
|
||||
MCG->C5 = MCG_C5_PRDIV0(3);
|
||||
/* MCG->C6: LOLIE=0,PLLS=1,CME=0,VDIV0=0 */
|
||||
MCG->C6 = MCG_C6_PLLS_MASK;
|
||||
/* MCG_C5: PLLCLKEN=0,PLLSTEN=0,PRDIV0=5 */
|
||||
MCG->C5 = MCG_C5_PRDIV0(3); // config PLL input for 16 MHz Crystal / 4 = 4 MHz
|
||||
/* MCG->C6: LOLIE=0,PLLS=1,CME=0,VDIV0=3 */
|
||||
MCG->C6 = MCG_C6_PLLS_MASK | MCG_C6_VDIV0(0);// config PLL for 96 MHz output
|
||||
while((MCG->S & MCG_S_PLLST_MASK) == 0u) { } /* Wait until the source of the PLLS clock has switched to the PLL */
|
||||
while((MCG->S & MCG_S_LOCK0_MASK) == 0u) { } /* Wait until locked */
|
||||
/* Switch to PEE Mode */
|
||||
/* MCG->C1: CLKS=0,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
|
||||
MCG->C1 = MCG_C1_FRDIV(3) | MCG_C1_IRCLKEN_MASK;
|
||||
/* MCG->C1: CLKS=0,FRDIV=2,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
|
||||
MCG->C1 = MCG_C1_FRDIV(2) | MCG_C1_IRCLKEN_MASK;
|
||||
while((MCG->S & 0x0Cu) != 0x0Cu) { } /* Wait until output of the PLL is selected */
|
||||
while((MCG->S & MCG_S_LOCK0_MASK) == 0u) { } /* Wait until locked */
|
||||
while((MCG->S & MCG_S_LOCK0_MASK) == 0u) { } /* Wait until locked */
|
||||
|
||||
#elif (CLOCK_SETUP == 2)
|
||||
/* SIM->CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV4=1 Set Prescalers 8MHz cpu, 8MHz system, 8MHz flash*/
|
||||
SIM->CLKDIV1 = SIM_CLKDIV1_OUTDIV4(1);
|
||||
/* Switch to FBE Mode */
|
||||
/* OSC0->CR: ERCLKEN=0,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
|
||||
OSC0->CR = (uint8_t)0x00u;
|
||||
/* MCG->C7: OSCSEL=0 */
|
||||
MCG->C7 = (uint8_t)0x00u;
|
||||
/* MCG->C2: LOCKRE0=0,RANGE0=2,HGO=0,EREFS=1,LP=0,IRCS=0 */
|
||||
MCG->C2 = MCG_C2_RANGE0(2) | MCG_C2_EREFS0_MASK;
|
||||
/* MCG->C1: CLKS=2,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
|
||||
MCG->C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(3) | MCG_C1_IRCLKEN_MASK;
|
||||
/* MCG->C4: DMX32=0,DRST_DRS=0 */
|
||||
MCG->C4 &= (uint8_t)~(uint8_t)0xE0u;
|
||||
/* MCG->C5: PLLCLKEN=0,PLLSTEN=0,PRDIV0=0 */
|
||||
MCG->C5 = (uint8_t)0x00u;
|
||||
/* MCG->C6: LOLIE=0,PLLS=0,CME=0,VDIV0=0 */
|
||||
MCG->C6 = (uint8_t)0x00u;
|
||||
while((MCG->S & MCG_S_OSCINIT0_MASK) == 0u) { } /* Check that the oscillator is running */
|
||||
while((MCG->S & 0x0CU) != 0x08u) { } /* Wait until external reference clock is selected as MCG output */
|
||||
/* Switch to BLPE Mode */
|
||||
/* MCG->C2: LOCKRE0=0,RANGE0=2,HGO=0,EREFS=1,LP=0,IRCS=0 */
|
||||
MCG->C2 = MCG_C2_RANGE0(2) | MCG_C2_EREFS0_MASK;
|
||||
|
||||
#elif (CLOCK_SETUP == 3)
|
||||
/* SIM->CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV4=1 Set Prescalers 72MHz cpu, 72MHz system, 36MHz flash*/
|
||||
SIM->CLKDIV1 = SIM_CLKDIV1_OUTDIV4(1);
|
||||
/* SIM->CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV4=1 Set Prescalers 72MHz cpu, 36MHz bus, 24MHz flash*/
|
||||
SIM->CLKDIV1 = SIM_CLKDIV1_OUTDIV2(1) | SIM_CLKDIV1_OUTDIV4(2);
|
||||
/* SIM->CLKDIV2: USBDIV=2,USBFRAC=1 Divide 72MHz system clock for USB 48MHz */
|
||||
SIM->CLKDIV2 = SIM_CLKDIV2_USBDIV(2) | SIM_CLKDIV2_USBFRAC_MASK;
|
||||
/* OSC0->CR: ERCLKEN=0,EREFSTEN=0,SC2P=1,SC4P=0,SC8P=1,SC16P=0 10pF loading capacitors for 16MHz system oscillator*/
|
||||
|
@ -220,7 +191,7 @@ void SystemInit (void) {
|
|||
/* MCG->C1: CLKS=0,FRDIV=2,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
|
||||
MCG->C1 = MCG_C1_FRDIV(2) | MCG_C1_IRCLKEN_MASK;
|
||||
while((MCG->S & 0x0Cu) != 0x0Cu) { } /* Wait until output of the PLL is selected */
|
||||
while((MCG->S & MCG_S_LOCK0_MASK) == 0u) { } /* Wait until locked */
|
||||
while((MCG->S & MCG_S_LOCK0_MASK) == 0u) { } /* Wait until locked */
|
||||
#endif /* (CLOCK_SETUP) */
|
||||
}
|
||||
|
||||
|
@ -306,4 +277,4 @@ void SystemCoreClockUpdate (void) {
|
|||
return;
|
||||
} /* (!((MCG->C1 & MCG_C1_CLKS_MASK) == 0x80u)) */
|
||||
SystemCoreClock = (MCGOUTClock / (1u + ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT)));
|
||||
}
|
||||
}
|
|
@ -664,7 +664,7 @@ ul
|
|||
<h1 style="margin-bottom: 0.25in; text-align: center;" align="center"><span style="font-size: 20pt; font-family: "Verdana","sans-serif"; color: rgb(51, 102, 255);">Release
|
||||
Notes for STM32F3xx HAL Drivers</span><span style="font-size: 20pt; font-family: "Verdana","sans-serif";"><o:p></o:p></span></h1>
|
||||
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: "Arial","sans-serif"; color: black;">Copyright
|
||||
2015 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
|
||||
2014 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
|
||||
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: "Arial","sans-serif"; color: black;"><img id="_x0000_i1026" src="../../_htmresc/st_logo.png" border="0" height="65" width="86"></span><span style="font-size: 10pt;"><o:p></o:p></span></p>
|
||||
</td>
|
||||
</tr>
|
||||
|
@ -676,13 +676,7 @@ Notes for STM32F3xx HAL Drivers</span><span style="font-size: 20pt; font-family:
|
|||
<tr style="">
|
||||
<td style="padding: 0in;" valign="top">
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">Update History</span></h2>
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.1.1
|
||||
/ 19-June-2015<o:p></o:p></span></h3><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes</span></u></b></p>
|
||||
|
||||
|
||||
|
||||
<span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><ul style="margin-top: 0cm; list-style-type: square;"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Fixed compilation warnings reported by TrueSTUDIO and SW4STM32 toolchains.</span></li></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.1.0
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.1.0
|
||||
/ 12-Sept-2014<o:p></o:p></span></h3><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes</span></u></b></p>
|
||||
|
||||
|
|
|
@ -1,342 +0,0 @@
|
|||
;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32f303x8.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V2.1.0
|
||||
;* Date : 12-Sept-2014
|
||||
;* Description : STM32F303x6/x8 devices vector table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the CortexM4 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
;
|
||||
;* Redistribution and use in source and binary forms, with or without modification,
|
||||
;* are permitted provided that the following conditions are met:
|
||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer.
|
||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer in the documentation
|
||||
;* and/or other materials provided with the distribution.
|
||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
;* may be used to endorse or promote products derived from this software
|
||||
;* without specific prior written permission.
|
||||
;*
|
||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x20003000 ; Top of RAM
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000200
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit EQU (__initial_sp - Stack_Size)
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window WatchDog
|
||||
DCD PVD_IRQHandler ; PVD through EXTI Line detection
|
||||
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line1
|
||||
DCD EXTI2_TSC_IRQHandler ; EXTI Line2 and Touch Sense controller
|
||||
DCD EXTI3_IRQHandler ; EXTI Line3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_2_IRQHandler ; ADC1 and ADC2
|
||||
DCD CAN_TX_IRQHandler ; CAN TX
|
||||
DCD CAN_RX0_IRQHandler ; CAN RX0
|
||||
DCD CAN_RX1_IRQHandler ; CAN RX1
|
||||
DCD CAN_SCE_IRQHandler ; CAN SCE
|
||||
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
|
||||
DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
|
||||
DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
|
||||
DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD 0 ; Reserved
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event and EXTI Line 23
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD 0 ; Reserved
|
||||
DCD USART1_IRQHandler ; USART1 and EXTI Line 25
|
||||
DCD USART2_IRQHandler ; USART2 and EXTI Line 26
|
||||
DCD USART3_IRQHandler ; USART3 and EXTI Line 28
|
||||
DCD EXTI15_10_IRQHandler ; External Line[15:10]s
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM6_DAC1_IRQHandler ; TIM6 and DAC1 underrun errors
|
||||
DCD TIM7_DAC2_IRQHandler ; TIM7 and DAC2 underrun errors
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD COMP2_IRQHandler ; COMP2
|
||||
DCD COMP4_6_IRQHandler ; COMP4 and COMP6
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD FPU_IRQHandler ; FPU
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_IRQHandler [WEAK]
|
||||
EXPORT TAMP_STAMP_IRQHandler [WEAK]
|
||||
EXPORT RTC_WKUP_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_TSC_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
||||
EXPORT ADC1_2_IRQHandler [WEAK]
|
||||
EXPORT CAN_TX_IRQHandler [WEAK]
|
||||
EXPORT CAN_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN_SCE_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
|
||||
EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
|
||||
EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT TIM3_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
||||
EXPORT TIM6_DAC1_IRQHandler [WEAK]
|
||||
EXPORT TIM7_DAC2_IRQHandler [WEAK]
|
||||
EXPORT COMP2_IRQHandler [WEAK]
|
||||
EXPORT COMP4_6_IRQHandler [WEAK]
|
||||
EXPORT FPU_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_IRQHandler
|
||||
TAMP_STAMP_IRQHandler
|
||||
RTC_WKUP_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_TSC_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_IRQHandler
|
||||
DMA1_Channel3_IRQHandler
|
||||
DMA1_Channel4_IRQHandler
|
||||
DMA1_Channel5_IRQHandler
|
||||
DMA1_Channel6_IRQHandler
|
||||
DMA1_Channel7_IRQHandler
|
||||
ADC1_2_IRQHandler
|
||||
CAN_TX_IRQHandler
|
||||
CAN_RX0_IRQHandler
|
||||
CAN_RX1_IRQHandler
|
||||
CAN_SCE_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
TIM1_BRK_TIM15_IRQHandler
|
||||
TIM1_UP_TIM16_IRQHandler
|
||||
TIM1_TRG_COM_TIM17_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
TIM3_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTC_Alarm_IRQHandler
|
||||
TIM6_DAC1_IRQHandler
|
||||
TIM7_DAC2_IRQHandler
|
||||
COMP2_IRQHandler
|
||||
COMP4_6_IRQHandler
|
||||
FPU_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
END
|
||||
|
||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
|
@ -1,45 +0,0 @@
|
|||
; Scatter-Loading Description File
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; Copyright (c) 2014, STMicroelectronics
|
||||
; All rights reserved.
|
||||
;
|
||||
; Redistribution and use in source and binary forms, with or without
|
||||
; modification, are permitted provided that the following conditions are met:
|
||||
;
|
||||
; 1. Redistributions of source code must retain the above copyright notice,
|
||||
; this list of conditions and the following disclaimer.
|
||||
; 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
; this list of conditions and the following disclaimer in the documentation
|
||||
; and/or other materials provided with the distribution.
|
||||
; 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
; may be used to endorse or promote products derived from this software
|
||||
; without specific prior written permission.
|
||||
;
|
||||
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
|
||||
; STM32F303K8: 64KB FLASH (0x10000) + 12KB SRAM (0x3000)
|
||||
LR_IROM1 0x08000000 0x10000 { ; load region size_region
|
||||
|
||||
ER_IROM1 0x08000000 0x10000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; 98 vectors = 392 bytes (0x188) to be reserved in RAM
|
||||
RW_IRAM1 (0x20000000+0x188) (0x3000-0x188) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
}
|
||||
|
|
@ -1,56 +0,0 @@
|
|||
/* mbed Microcontroller Library - stackheap
|
||||
* Setup a fixed single stack/heap memory model,
|
||||
* between the top of the RW/ZI region and the stackpointer
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, STMicroelectronics
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <rt_misc.h>
|
||||
#include <stdint.h>
|
||||
|
||||
extern char Image$$RW_IRAM1$$ZI$$Limit[];
|
||||
|
||||
extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
|
||||
uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
|
||||
uint32_t sp_limit = __current_sp();
|
||||
|
||||
zi_limit = (zi_limit + 7) & ~0x7; // ensure zi_limit is 8-byte aligned
|
||||
|
||||
struct __initial_stackheap r;
|
||||
r.heap_base = zi_limit;
|
||||
r.heap_limit = sp_limit;
|
||||
return r;
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
|
@ -1,315 +0,0 @@
|
|||
;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32f303x8.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V2.1.0
|
||||
;* Date : 12-Sept-2014
|
||||
;* Description : STM32F303x6/x8 devices vector table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the CortexM4 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
;
|
||||
;* Redistribution and use in source and binary forms, with or without modification,
|
||||
;* are permitted provided that the following conditions are met:
|
||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer.
|
||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer in the documentation
|
||||
;* and/or other materials provided with the distribution.
|
||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
;* may be used to endorse or promote products derived from this software
|
||||
;* without specific prior written permission.
|
||||
;*
|
||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;
|
||||
;*******************************************************************************
|
||||
|
||||
__initial_sp EQU 0x20003000 ; Top of RAM
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window WatchDog
|
||||
DCD PVD_IRQHandler ; PVD through EXTI Line detection
|
||||
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line1
|
||||
DCD EXTI2_TSC_IRQHandler ; EXTI Line2 and Touch Sense controller
|
||||
DCD EXTI3_IRQHandler ; EXTI Line3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_2_IRQHandler ; ADC1 and ADC2
|
||||
DCD CAN_TX_IRQHandler ; CAN TX
|
||||
DCD CAN_RX0_IRQHandler ; CAN RX0
|
||||
DCD CAN_RX1_IRQHandler ; CAN RX1
|
||||
DCD CAN_SCE_IRQHandler ; CAN SCE
|
||||
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
|
||||
DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
|
||||
DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
|
||||
DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD 0 ; Reserved
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event and EXTI Line 23
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD 0 ; Reserved
|
||||
DCD USART1_IRQHandler ; USART1 and EXTI Line 25
|
||||
DCD USART2_IRQHandler ; USART2 and EXTI Line 26
|
||||
DCD USART3_IRQHandler ; USART3 and EXTI Line 28
|
||||
DCD EXTI15_10_IRQHandler ; External Line[15:10]s
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM6_DAC1_IRQHandler ; TIM6 and DAC1 underrun errors
|
||||
DCD TIM7_DAC2_IRQHandler ; TIM7 and DAC2 underrun errors
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD COMP2_IRQHandler ; COMP2
|
||||
DCD COMP4_6_IRQHandler ; COMP4 and COMP6
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD FPU_IRQHandler ; FPU
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_IRQHandler [WEAK]
|
||||
EXPORT TAMP_STAMP_IRQHandler [WEAK]
|
||||
EXPORT RTC_WKUP_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_TSC_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
||||
EXPORT ADC1_2_IRQHandler [WEAK]
|
||||
EXPORT CAN_TX_IRQHandler [WEAK]
|
||||
EXPORT CAN_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN_SCE_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
|
||||
EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
|
||||
EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT TIM3_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
||||
EXPORT TIM6_DAC1_IRQHandler [WEAK]
|
||||
EXPORT TIM7_DAC2_IRQHandler [WEAK]
|
||||
EXPORT COMP2_IRQHandler [WEAK]
|
||||
EXPORT COMP4_6_IRQHandler [WEAK]
|
||||
EXPORT FPU_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_IRQHandler
|
||||
TAMP_STAMP_IRQHandler
|
||||
RTC_WKUP_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_TSC_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_IRQHandler
|
||||
DMA1_Channel3_IRQHandler
|
||||
DMA1_Channel4_IRQHandler
|
||||
DMA1_Channel5_IRQHandler
|
||||
DMA1_Channel6_IRQHandler
|
||||
DMA1_Channel7_IRQHandler
|
||||
ADC1_2_IRQHandler
|
||||
CAN_TX_IRQHandler
|
||||
CAN_RX0_IRQHandler
|
||||
CAN_RX1_IRQHandler
|
||||
CAN_SCE_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
TIM1_BRK_TIM15_IRQHandler
|
||||
TIM1_UP_TIM16_IRQHandler
|
||||
TIM1_TRG_COM_TIM17_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
TIM3_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTC_Alarm_IRQHandler
|
||||
TIM6_DAC1_IRQHandler
|
||||
TIM7_DAC2_IRQHandler
|
||||
COMP2_IRQHandler
|
||||
COMP4_6_IRQHandler
|
||||
FPU_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
END
|
||||
|
||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
|
@ -1,45 +0,0 @@
|
|||
; Scatter-Loading Description File
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; Copyright (c) 2014, STMicroelectronics
|
||||
; All rights reserved.
|
||||
;
|
||||
; Redistribution and use in source and binary forms, with or without
|
||||
; modification, are permitted provided that the following conditions are met:
|
||||
;
|
||||
; 1. Redistributions of source code must retain the above copyright notice,
|
||||
; this list of conditions and the following disclaimer.
|
||||
; 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
; this list of conditions and the following disclaimer in the documentation
|
||||
; and/or other materials provided with the distribution.
|
||||
; 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
; may be used to endorse or promote products derived from this software
|
||||
; without specific prior written permission.
|
||||
;
|
||||
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
|
||||
; STM32F303K8: 64KB FLASH (0x10000) + 12KB SRAM (0x3000)
|
||||
LR_IROM1 0x08000000 0x10000 { ; load region size_region
|
||||
|
||||
ER_IROM1 0x08000000 0x10000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; 98 vectors = 392 bytes (0x188) to be reserved in RAM
|
||||
RW_IRAM1 (0x20000000+0x188) (0x3000-0x188) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
}
|
||||
|
|
@ -1,56 +0,0 @@
|
|||
/* mbed Microcontroller Library - stackheap
|
||||
* Setup a fixed single stack/heap memory model,
|
||||
* between the top of the RW/ZI region and the stackpointer
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, STMicroelectronics
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <rt_misc.h>
|
||||
#include <stdint.h>
|
||||
|
||||
extern char Image$$RW_IRAM1$$ZI$$Limit[];
|
||||
|
||||
extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
|
||||
uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
|
||||
uint32_t sp_limit = __current_sp();
|
||||
|
||||
zi_limit = (zi_limit + 7) & ~0x7; // ensure zi_limit is 8-byte aligned
|
||||
|
||||
struct __initial_stackheap r;
|
||||
r.heap_base = zi_limit;
|
||||
r.heap_limit = sp_limit;
|
||||
return r;
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
|
@ -1,155 +0,0 @@
|
|||
/* Linker script to configure memory regions. */
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 64K
|
||||
CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 4K
|
||||
RAM (rwx) : ORIGIN = 0x20000188, LENGTH = 12K - 0x188
|
||||
}
|
||||
|
||||
/* Linker script to place sections and symbol values. Should be used together
|
||||
* with other linker script that defines memory regions FLASH and RAM.
|
||||
* It references following symbols, which must be defined in code:
|
||||
* Reset_Handler : Entry of reset handler
|
||||
*
|
||||
* It defines following symbols, which code can use without definition:
|
||||
* __exidx_start
|
||||
* __exidx_end
|
||||
* __etext
|
||||
* __data_start__
|
||||
* __preinit_array_start
|
||||
* __preinit_array_end
|
||||
* __init_array_start
|
||||
* __init_array_end
|
||||
* __fini_array_start
|
||||
* __fini_array_end
|
||||
* __data_end__
|
||||
* __bss_start__
|
||||
* __bss_end__
|
||||
* __end__
|
||||
* end
|
||||
* __HeapLimit
|
||||
* __StackLimit
|
||||
* __StackTop
|
||||
* __stack
|
||||
* _estack
|
||||
*/
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
KEEP(*(.isr_vector))
|
||||
*(.text*)
|
||||
KEEP(*(.init))
|
||||
KEEP(*(.fini))
|
||||
|
||||
/* .ctors */
|
||||
*crtbegin.o(.ctors)
|
||||
*crtbegin?.o(.ctors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
|
||||
*(SORT(.ctors.*))
|
||||
*(.ctors)
|
||||
|
||||
/* .dtors */
|
||||
*crtbegin.o(.dtors)
|
||||
*crtbegin?.o(.dtors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
|
||||
*(SORT(.dtors.*))
|
||||
*(.dtors)
|
||||
|
||||
*(.rodata*)
|
||||
|
||||
KEEP(*(.eh_frame*))
|
||||
} > FLASH
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > FLASH
|
||||
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > FLASH
|
||||
__exidx_end = .;
|
||||
|
||||
__etext = .;
|
||||
_sidata = .;
|
||||
|
||||
.data : AT (__etext)
|
||||
{
|
||||
__data_start__ = .;
|
||||
_sdata = .;
|
||||
*(vtable)
|
||||
*(.data*)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* preinit data */
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP(*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* init data */
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
|
||||
|
||||
. = ALIGN(4);
|
||||
/* finit data */
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
KEEP(*(.fini_array))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
|
||||
KEEP(*(.jcr*))
|
||||
. = ALIGN(4);
|
||||
/* All data end */
|
||||
__data_end__ = .;
|
||||
_edata = .;
|
||||
|
||||
} > RAM
|
||||
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__bss_start__ = .;
|
||||
_sbss = .;
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
__bss_end__ = .;
|
||||
_ebss = .;
|
||||
} > RAM
|
||||
|
||||
.heap (COPY):
|
||||
{
|
||||
__end__ = .;
|
||||
end = __end__;
|
||||
*(.heap*)
|
||||
__HeapLimit = .;
|
||||
} > RAM
|
||||
|
||||
/* .stack_dummy section doesn't contains any symbols. It is only
|
||||
* used for linker to calculate size of stack sections, and assign
|
||||
* values to stack symbols later */
|
||||
.stack_dummy (COPY):
|
||||
{
|
||||
*(.stack*)
|
||||
} > RAM
|
||||
|
||||
/* Set stack top to end of RAM, and stack limit move down by
|
||||
* size of stack_dummy section */
|
||||
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
||||
_estack = __StackTop;
|
||||
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
|
||||
PROVIDE(__stack = __StackTop);
|
||||
|
||||
/* Check if data + heap + stack exceeds RAM limit */
|
||||
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
|
||||
}
|
||||
|
|
@ -1,409 +0,0 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32f303x8.s
|
||||
* @author MCD Application Team
|
||||
* @version
|
||||
* @date 12-Sept-2014
|
||||
* @brief STM32F303x6/STM32F303x8 devices vector table for
|
||||
* Atollic TrueSTUDIO toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address,
|
||||
* - Configure the clock system
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m4
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
|
||||
.equ BootRAM, 0xF1E0F85F
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr sp, =_estack /* Atollic update: set stack pointer */
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2], #4
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
//bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
//bl main
|
||||
/**
|
||||
* Calling the crt0 'cold-start' entry point. There __libc_init_array is called
|
||||
* and when existing hardware_init_hook() and software_init_hook() before
|
||||
* starting main(). software_init_hook() is available and has to be called due
|
||||
* to initializsation when using rtos.
|
||||
*/
|
||||
bl _start
|
||||
|
||||
LoopForever:
|
||||
b LoopForever
|
||||
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex-M4. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler
|
||||
.word PVD_IRQHandler
|
||||
.word TAMP_STAMP_IRQHandler
|
||||
.word RTC_WKUP_IRQHandler
|
||||
.word FLASH_IRQHandler
|
||||
.word RCC_IRQHandler
|
||||
.word EXTI0_IRQHandler
|
||||
.word EXTI1_IRQHandler
|
||||
.word EXTI2_TSC_IRQHandler
|
||||
.word EXTI3_IRQHandler
|
||||
.word EXTI4_IRQHandler
|
||||
.word DMA1_Channel1_IRQHandler
|
||||
.word DMA1_Channel2_IRQHandler
|
||||
.word DMA1_Channel3_IRQHandler
|
||||
.word DMA1_Channel4_IRQHandler
|
||||
.word DMA1_Channel5_IRQHandler
|
||||
.word DMA1_Channel6_IRQHandler
|
||||
.word DMA1_Channel7_IRQHandler
|
||||
.word ADC1_2_IRQHandler
|
||||
.word CAN_TX_IRQHandler
|
||||
.word CAN_RX0_IRQHandler
|
||||
.word CAN_RX1_IRQHandler
|
||||
.word CAN_SCE_IRQHandler
|
||||
.word EXTI9_5_IRQHandler
|
||||
.word TIM1_BRK_TIM15_IRQHandler
|
||||
.word TIM1_UP_TIM16_IRQHandler
|
||||
.word TIM1_TRG_COM_TIM17_IRQHandler
|
||||
.word TIM1_CC_IRQHandler
|
||||
.word TIM2_IRQHandler
|
||||
.word TIM3_IRQHandler
|
||||
.word 0
|
||||
.word I2C1_EV_IRQHandler
|
||||
.word I2C1_ER_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word SPI1_IRQHandler
|
||||
.word 0
|
||||
.word USART1_IRQHandler
|
||||
.word USART2_IRQHandler
|
||||
.word USART3_IRQHandler
|
||||
.word EXTI15_10_IRQHandler
|
||||
.word RTC_Alarm_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word TIM6_DAC1_IRQHandler
|
||||
.word TIM7_DAC2_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word COMP2_IRQHandler
|
||||
.word COMP4_6_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word FPU_IRQHandler
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_IRQHandler
|
||||
.thumb_set PVD_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMP_STAMP_IRQHandler
|
||||
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_WKUP_IRQHandler
|
||||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_TSC_IRQHandler
|
||||
.thumb_set EXTI2_TSC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_IRQHandler
|
||||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel3_IRQHandler
|
||||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel4_IRQHandler
|
||||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel5_IRQHandler
|
||||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel6_IRQHandler
|
||||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel7_IRQHandler
|
||||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC1_2_IRQHandler
|
||||
.thumb_set ADC1_2_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN_TX_IRQHandler
|
||||
.thumb_set CAN_TX_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN_RX0_IRQHandler
|
||||
.thumb_set CAN_RX0_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN_RX1_IRQHandler
|
||||
.thumb_set CAN_RX1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN_SCE_IRQHandler
|
||||
.thumb_set CAN_SCE_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_TIM15_IRQHandler
|
||||
.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_UP_TIM16_IRQHandler
|
||||
.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_TRG_COM_TIM17_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_DAC1_IRQHandler
|
||||
.thumb_set TIM6_DAC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_DAC2_IRQHandler
|
||||
.thumb_set TIM7_DAC2_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP2_IRQHandler
|
||||
.thumb_set COMP2_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP4_6_IRQHandler
|
||||
.thumb_set COMP4_6_IRQHandler,Default_Handler
|
||||
|
||||
.weak FPU_IRQHandler
|
||||
.thumb_set FPU_IRQHandler,Default_Handler
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
@ -1,450 +0,0 @@
|
|||
;/******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32f303x8.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V2.1.0
|
||||
;* Date : 12-Sept-2014
|
||||
;* Description : STM32F303x6/STM32F303x8 devices vector table for EWARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == _iar_program_start,
|
||||
;* - Set the vector table entries with the exceptions ISR
|
||||
;* address.
|
||||
;* - Branches to main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;********************************************************************************
|
||||
;*
|
||||
;* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
;*
|
||||
;* Redistribution and use in source and binary forms, with or without modification,
|
||||
;* are permitted provided that the following conditions are met:
|
||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer.
|
||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer in the documentation
|
||||
;* and/or other materials provided with the distribution.
|
||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
;* may be used to endorse or promote products derived from this software
|
||||
;* without specific prior written permission.
|
||||
;*
|
||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;*
|
||||
;*******************************************************************************
|
||||
;
|
||||
;
|
||||
; The modules in this file are included in the libraries, and may be replaced
|
||||
; by any user-defined modules that define the PUBLIC symbol _program_start or
|
||||
; a user defined start symbol.
|
||||
; To override the cstartup defined in the library, simply add your modified
|
||||
; version to the workbench project.
|
||||
;
|
||||
; The vector table is normally located at address 0.
|
||||
; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
|
||||
; The name "__vector_table" has special meaning for C-SPY:
|
||||
; it is where the SP start value is found, and the NVIC vector
|
||||
; table register (VTOR) is initialized to this address if != 0.
|
||||
;
|
||||
; Cortex-M version
|
||||
;
|
||||
|
||||
MODULE ?cstartup
|
||||
|
||||
;; Forward declaration of sections.
|
||||
SECTION CSTACK:DATA:NOROOT(3)
|
||||
|
||||
SECTION .intvec:CODE:NOROOT(2)
|
||||
|
||||
EXTERN __iar_program_start
|
||||
EXTERN SystemInit
|
||||
PUBLIC __vector_table
|
||||
|
||||
DATA
|
||||
__vector_table
|
||||
DCD sfe(CSTACK)
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window WatchDog
|
||||
DCD PVD_IRQHandler ; PVD through EXTI Line detection
|
||||
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line1
|
||||
DCD EXTI2_TSC_IRQHandler ; EXTI Line2 and Touch Sense controller
|
||||
DCD EXTI3_IRQHandler ; EXTI Line3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_2_IRQHandler ; ADC1 and ADC2
|
||||
DCD CAN_TX_IRQHandler ; CAN TX
|
||||
DCD CAN_RX0_IRQHandler ; CAN RX0
|
||||
DCD CAN_RX1_IRQHandler ; CAN RX1
|
||||
DCD CAN_SCE_IRQHandler ; CAN SCE
|
||||
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
|
||||
DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
|
||||
DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
|
||||
DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD 0 ; Reserved
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD 0 ; Reserved
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; External Line[15:10]s
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM6_DAC1_IRQHandler ; TIM6 and DAC1 underrun errors
|
||||
DCD TIM7_DAC2_IRQHandler ; TIM7 and DAC2 underrun errors
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD COMP2_IRQHandler ; COMP2
|
||||
DCD COMP4_6_IRQHandler ; COMP4 and COMP6
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD FPU_IRQHandler ; FPU
|
||||
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
;;
|
||||
;; Default interrupt handlers.
|
||||
;;
|
||||
THUMB
|
||||
PUBWEAK Reset_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(2)
|
||||
Reset_Handler
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__iar_program_start
|
||||
BX R0
|
||||
|
||||
PUBWEAK NMI_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
NMI_Handler
|
||||
B NMI_Handler
|
||||
|
||||
PUBWEAK HardFault_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HardFault_Handler
|
||||
B HardFault_Handler
|
||||
|
||||
PUBWEAK MemManage_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
MemManage_Handler
|
||||
B MemManage_Handler
|
||||
|
||||
PUBWEAK BusFault_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BusFault_Handler
|
||||
B BusFault_Handler
|
||||
|
||||
PUBWEAK UsageFault_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
UsageFault_Handler
|
||||
B UsageFault_Handler
|
||||
|
||||
PUBWEAK SVC_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SVC_Handler
|
||||
B SVC_Handler
|
||||
|
||||
PUBWEAK DebugMon_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DebugMon_Handler
|
||||
B DebugMon_Handler
|
||||
|
||||
PUBWEAK PendSV_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
PendSV_Handler
|
||||
B PendSV_Handler
|
||||
|
||||
PUBWEAK SysTick_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SysTick_Handler
|
||||
B SysTick_Handler
|
||||
|
||||
PUBWEAK WWDG_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
WWDG_IRQHandler
|
||||
B WWDG_IRQHandler
|
||||
|
||||
PUBWEAK PVD_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
PVD_IRQHandler
|
||||
B PVD_IRQHandler
|
||||
|
||||
PUBWEAK TAMP_STAMP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TAMP_STAMP_IRQHandler
|
||||
B TAMP_STAMP_IRQHandler
|
||||
|
||||
PUBWEAK RTC_WKUP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
RTC_WKUP_IRQHandler
|
||||
B RTC_WKUP_IRQHandler
|
||||
|
||||
PUBWEAK FLASH_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FLASH_IRQHandler
|
||||
B FLASH_IRQHandler
|
||||
|
||||
PUBWEAK RCC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
RCC_IRQHandler
|
||||
B RCC_IRQHandler
|
||||
|
||||
PUBWEAK EXTI0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI0_IRQHandler
|
||||
B EXTI0_IRQHandler
|
||||
|
||||
PUBWEAK EXTI1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI1_IRQHandler
|
||||
B EXTI1_IRQHandler
|
||||
|
||||
PUBWEAK EXTI2_TSC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI2_TSC_IRQHandler
|
||||
B EXTI2_TSC_IRQHandler
|
||||
|
||||
PUBWEAK EXTI3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI3_IRQHandler
|
||||
B EXTI3_IRQHandler
|
||||
|
||||
PUBWEAK EXTI4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI4_IRQHandler
|
||||
B EXTI4_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Channel1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Channel1_IRQHandler
|
||||
B DMA1_Channel1_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Channel2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Channel2_IRQHandler
|
||||
B DMA1_Channel2_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Channel3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Channel3_IRQHandler
|
||||
B DMA1_Channel3_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Channel4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Channel4_IRQHandler
|
||||
B DMA1_Channel4_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Channel5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Channel5_IRQHandler
|
||||
B DMA1_Channel5_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Channel6_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Channel6_IRQHandler
|
||||
B DMA1_Channel6_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Channel7_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Channel7_IRQHandler
|
||||
B DMA1_Channel7_IRQHandler
|
||||
|
||||
PUBWEAK ADC1_2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
ADC1_2_IRQHandler
|
||||
B ADC1_2_IRQHandler
|
||||
|
||||
PUBWEAK CAN_TX_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
CAN_TX_IRQHandler
|
||||
B CAN_TX_IRQHandler
|
||||
|
||||
PUBWEAK CAN_RX0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
CAN_RX0_IRQHandler
|
||||
B CAN_RX0_IRQHandler
|
||||
|
||||
PUBWEAK CAN_RX1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
CAN_RX1_IRQHandler
|
||||
B CAN_RX1_IRQHandler
|
||||
|
||||
PUBWEAK CAN_SCE_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
CAN_SCE_IRQHandler
|
||||
B CAN_SCE_IRQHandler
|
||||
|
||||
PUBWEAK EXTI9_5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI9_5_IRQHandler
|
||||
B EXTI9_5_IRQHandler
|
||||
|
||||
PUBWEAK TIM1_BRK_TIM15_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM1_BRK_TIM15_IRQHandler
|
||||
B TIM1_BRK_TIM15_IRQHandler
|
||||
|
||||
PUBWEAK TIM1_UP_TIM16_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM1_UP_TIM16_IRQHandler
|
||||
B TIM1_UP_TIM16_IRQHandler
|
||||
|
||||
PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM1_TRG_COM_TIM17_IRQHandler
|
||||
B TIM1_TRG_COM_TIM17_IRQHandler
|
||||
|
||||
PUBWEAK TIM1_CC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM1_CC_IRQHandler
|
||||
B TIM1_CC_IRQHandler
|
||||
|
||||
PUBWEAK TIM2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM2_IRQHandler
|
||||
B TIM2_IRQHandler
|
||||
|
||||
PUBWEAK TIM3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM3_IRQHandler
|
||||
B TIM3_IRQHandler
|
||||
|
||||
PUBWEAK I2C1_EV_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C1_EV_IRQHandler
|
||||
B I2C1_EV_IRQHandler
|
||||
|
||||
PUBWEAK I2C1_ER_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C1_ER_IRQHandler
|
||||
B I2C1_ER_IRQHandler
|
||||
|
||||
PUBWEAK SPI1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPI1_IRQHandler
|
||||
B SPI1_IRQHandler
|
||||
|
||||
PUBWEAK USART1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
USART1_IRQHandler
|
||||
B USART1_IRQHandler
|
||||
|
||||
PUBWEAK USART2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
USART2_IRQHandler
|
||||
B USART2_IRQHandler
|
||||
|
||||
PUBWEAK USART3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
USART3_IRQHandler
|
||||
B USART3_IRQHandler
|
||||
|
||||
PUBWEAK EXTI15_10_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI15_10_IRQHandler
|
||||
B EXTI15_10_IRQHandler
|
||||
|
||||
PUBWEAK RTC_Alarm_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
RTC_Alarm_IRQHandler
|
||||
B RTC_Alarm_IRQHandler
|
||||
|
||||
PUBWEAK TIM6_DAC1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM6_DAC1_IRQHandler
|
||||
B TIM6_DAC1_IRQHandler
|
||||
|
||||
PUBWEAK TIM7_DAC2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM7_DAC2_IRQHandler
|
||||
B TIM7_DAC2_IRQHandler
|
||||
|
||||
PUBWEAK COMP2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
COMP2_IRQHandler
|
||||
B COMP2_IRQHandler
|
||||
|
||||
PUBWEAK COMP4_6_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
COMP4_6_IRQHandler
|
||||
B COMP4_6_IRQHandler
|
||||
|
||||
PUBWEAK FPU_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FPU_IRQHandler
|
||||
B FPU_IRQHandler
|
||||
|
||||
END
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
@ -1,35 +0,0 @@
|
|||
/* [ROM = 64kb = 0x10000] */
|
||||
define symbol __intvec_start__ = 0x08000000;
|
||||
define symbol __region_ROM_start__ = 0x08000000;
|
||||
define symbol __region_ROM_end__ = 0x0800FFFF;
|
||||
|
||||
define symbol __region_CCMRAM_start__ = 0x10000000;
|
||||
define symbol __region_CCMRAM_end__ = 0x10000FFF;
|
||||
|
||||
/* [RAM = 12kb = 0x3000] Vector table dynamic copy: 98 vectors = 392 bytes (0x188) to be reserved in RAM */
|
||||
define symbol __NVIC_start__ = 0x20000000;
|
||||
define symbol __NVIC_end__ = 0x20000187; /* No need to add 4 more bytes to be aligned on 8 bytes */
|
||||
define symbol __region_RAM_start__ = 0x20000188;
|
||||
define symbol __region_RAM_end__ = 0x20002FFF;
|
||||
|
||||
/* Memory regions */
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
|
||||
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
|
||||
define region CCMRAM_region = mem:[from __region_CCMRAM_start__ to __region_CCMRAM_end__];
|
||||
|
||||
/* Stack and Heap */
|
||||
/*Heap 1/4 of ram and stack 1/8*/
|
||||
define symbol __size_cstack__ = 0x600;
|
||||
define symbol __size_heap__ = 0xC00;
|
||||
define block CSTACK with alignment = 8, size = __size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __size_heap__ { };
|
||||
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
|
||||
|
||||
initialize by copy with packing = zeros { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite, block STACKHEAP };
|
|
@ -1,38 +0,0 @@
|
|||
/* mbed Microcontroller Library
|
||||
* A generic CMSIS include header
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, STMicroelectronics
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef MBED_CMSIS_H
|
||||
#define MBED_CMSIS_H
|
||||
|
||||
#include "stm32f3xx.h"
|
||||
#include "cmsis_nvic.h"
|
||||
|
||||
#endif
|
|
@ -1,55 +0,0 @@
|
|||
/* mbed Microcontroller Library
|
||||
* CMSIS-style functionality to support dynamic vectors
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, STMicroelectronics
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*******************************************************************************
|
||||
*/
|
||||
#include "cmsis_nvic.h"
|
||||
|
||||
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
|
||||
#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash
|
||||
|
||||
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
|
||||
uint32_t *vectors = (uint32_t *)SCB->VTOR;
|
||||
uint32_t i;
|
||||
|
||||
// Copy and switch to dynamic vectors if the first time called
|
||||
if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) {
|
||||
uint32_t *old_vectors = vectors;
|
||||
vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
|
||||
for (i=0; i<NVIC_NUM_VECTORS; i++) {
|
||||
vectors[i] = old_vectors[i];
|
||||
}
|
||||
SCB->VTOR = (uint32_t)NVIC_RAM_VECTOR_ADDRESS;
|
||||
}
|
||||
vectors[IRQn + NVIC_USER_IRQ_OFFSET] = vector;
|
||||
}
|
||||
|
||||
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
|
||||
uint32_t *vectors = (uint32_t*)SCB->VTOR;
|
||||
return vectors[IRQn + NVIC_USER_IRQ_OFFSET];
|
||||
}
|
|
@ -1,55 +0,0 @@
|
|||
/* mbed Microcontroller Library
|
||||
* CMSIS-style functionality to support dynamic vectors
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, STMicroelectronics
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef MBED_CMSIS_NVIC_H
|
||||
#define MBED_CMSIS_NVIC_H
|
||||
|
||||
// STM32F303RE
|
||||
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
|
||||
// MCU Peripherals: 85 vectors = 340 bytes from 0x40 to 0x193
|
||||
// Total: 101 vectors = 404 bytes (0x194) to be reserved in RAM
|
||||
#define NVIC_NUM_VECTORS 101
|
||||
#define NVIC_USER_IRQ_OFFSET 16
|
||||
|
||||
#include "cmsis.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
|
||||
uint32_t NVIC_GetVector(IRQn_Type IRQn);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
|
@ -1,120 +0,0 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file hal_tick.c
|
||||
* @author MCD Application Team
|
||||
* @brief Initialization of HAL tick
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
#include "hal_tick.h"
|
||||
|
||||
TIM_HandleTypeDef TimMasterHandle;
|
||||
uint32_t PreviousVal = 0;
|
||||
|
||||
void us_ticker_irq_handler(void);
|
||||
|
||||
void timer_irq_handler(void) {
|
||||
// Channel 1 for mbed timeout
|
||||
if (__HAL_TIM_GET_ITSTATUS(&TimMasterHandle, TIM_IT_CC1) == SET) {
|
||||
__HAL_TIM_CLEAR_IT(&TimMasterHandle, TIM_IT_CC1);
|
||||
us_ticker_irq_handler();
|
||||
}
|
||||
|
||||
// Channel 2 for HAL tick
|
||||
if (__HAL_TIM_GET_ITSTATUS(&TimMasterHandle, TIM_IT_CC2) == SET) {
|
||||
__HAL_TIM_CLEAR_IT(&TimMasterHandle, TIM_IT_CC2);
|
||||
uint32_t val = __HAL_TIM_GetCounter(&TimMasterHandle);
|
||||
if ((val - PreviousVal) >= HAL_TICK_DELAY) {
|
||||
// Increment HAL variable
|
||||
HAL_IncTick();
|
||||
// Prepare next interrupt
|
||||
__HAL_TIM_SetCompare(&TimMasterHandle, TIM_CHANNEL_2, val + HAL_TICK_DELAY);
|
||||
PreviousVal = val;
|
||||
#if 0 // For DEBUG only
|
||||
HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_6);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// Reconfigure the HAL tick using a standard timer instead of systick.
|
||||
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) {
|
||||
// Enable timer clock
|
||||
TIM_MST_RCC;
|
||||
|
||||
// Reset timer
|
||||
TIM_MST_RESET_ON;
|
||||
TIM_MST_RESET_OFF;
|
||||
|
||||
// Configure time base
|
||||
TimMasterHandle.Instance = TIM_MST;
|
||||
TimMasterHandle.Init.Period = 0xFFFFFFFF;
|
||||
TimMasterHandle.Init.Prescaler = (uint32_t)(SystemCoreClock / 1000000) - 1; // 1 us tick
|
||||
TimMasterHandle.Init.ClockDivision = 0;
|
||||
TimMasterHandle.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||
TimMasterHandle.Init.RepetitionCounter = 0;
|
||||
HAL_TIM_OC_Init(&TimMasterHandle);
|
||||
|
||||
NVIC_SetVector(TIM_MST_IRQ, (uint32_t)timer_irq_handler);
|
||||
NVIC_EnableIRQ(TIM_MST_IRQ);
|
||||
|
||||
// Channel 1 for mbed timeout
|
||||
HAL_TIM_OC_Start(&TimMasterHandle, TIM_CHANNEL_1);
|
||||
|
||||
// Channel 2 for HAL tick
|
||||
HAL_TIM_OC_Start(&TimMasterHandle, TIM_CHANNEL_2);
|
||||
PreviousVal = __HAL_TIM_GetCounter(&TimMasterHandle);
|
||||
__HAL_TIM_SetCompare(&TimMasterHandle, TIM_CHANNEL_2, PreviousVal + HAL_TICK_DELAY);
|
||||
__HAL_TIM_ENABLE_IT(&TimMasterHandle, TIM_IT_CC2);
|
||||
|
||||
#if 0 // For DEBUG only
|
||||
__GPIOB_CLK_ENABLE();
|
||||
GPIO_InitTypeDef GPIO_InitStruct;
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_6;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
#endif
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
@ -1,60 +0,0 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file hal_tick.h
|
||||
* @author MCD Application Team
|
||||
* @brief Initialization of HAL tick
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
#ifndef __HAL_TICK_H
|
||||
#define __HAL_TICK_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "stm32f3xx.h"
|
||||
#include "cmsis_nvic.h"
|
||||
|
||||
#define TIM_MST TIM2
|
||||
#define TIM_MST_IRQ TIM2_IRQn
|
||||
#define TIM_MST_RCC __TIM2_CLK_ENABLE()
|
||||
|
||||
#define TIM_MST_RESET_ON __TIM2_FORCE_RESET()
|
||||
#define TIM_MST_RESET_OFF __TIM2_RELEASE_RESET()
|
||||
|
||||
#define HAL_TICK_DELAY (1000) // 1 ms
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __HAL_TICK_H
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
File diff suppressed because it is too large
Load Diff
|
@ -1,238 +0,0 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f3xx.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief CMSIS STM32F3xx Device Peripheral Access Layer Header File.
|
||||
*
|
||||
* The file is the unique include file that the application programmer
|
||||
* is using in the C source code, usually in main.c. This file contains:
|
||||
* - Configuration section that allows to select:
|
||||
* - The STM32F3xx device used in the target application
|
||||
* - To use or not the peripheral’s drivers in application code(i.e.
|
||||
* code will be based on direct access to peripheral’s registers
|
||||
* rather than drivers API), this option is controlled by
|
||||
* "#define USE_HAL_DRIVER"
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32f3xx
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef __STM32F3xx_H
|
||||
#define __STM32F3xx_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/** @addtogroup Library_configuration_section
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Uncomment the line below according to the target STM32 device used in your
|
||||
application
|
||||
*/
|
||||
|
||||
#if !defined (STM32F301x8) && !defined (STM32F302x8) && !defined (STM32F318xx) && \
|
||||
!defined (STM32F302xC) && !defined (STM32F303xC) && !defined (STM32F358xx) && \
|
||||
!defined (STM32F303x8) && !defined (STM32F334x8) && !defined (STM32F328xx) && \
|
||||
!defined (STM32F302xE) && !defined (STM32F303xE) && !defined (STM32F398xx) && \
|
||||
!defined (STM32F373xC) && !defined (STM32F378xx)
|
||||
|
||||
/* #define STM32F301x8 */ /*!< STM32F301K6, STM32F301K8, STM32F301C6, STM32F301C8,
|
||||
STM32F301R6 and STM32F301R8 Devices */
|
||||
/* #define STM32F302x8 */ /*!< STM32F302K6, STM32F302K8, STM32F302C6, STM32F302C8,
|
||||
STM32F302R6 and STM32F302R8 Devices */
|
||||
/* #define STM32F302xC */ /*!< STM32F302CB, STM32F302CC, STM32F302RB, STM32F302RC, STM32F302VB and STM32F302VC Devices */
|
||||
/* #define STM32F302xE */ /*!< STM32F302CE, STM32F302RE, and STM32F302VE Devices */
|
||||
#define STM32F303x8 /*!< STM32F303K6, STM32F303K8, STM32F303C6, STM32F303C8,
|
||||
STM32F303R6 and STM32F303R8 Devices */
|
||||
/* #define STM32F303xC */ /*!< STM32F303CB, STM32F303CC, STM32F303RB, STM32F303RC, STM32F303VB and STM32F303VC Devices */
|
||||
/* #define STM32F303xE */ /*!< STM32F303RE, STM32F303VE and STM32F303ZE Devices */
|
||||
/* #define STM32F373xC */ /*!< STM32F373C8, STM32F373CB, STM32F373CC, STM32F373R8, STM32F373RB, STM32F373RC,
|
||||
STM32F373V8, STM32F373VB and STM32F373VC Devices */
|
||||
/* #define STM32F334x8 */ /*!< STM32F334C4, STM32F334C6, STM32F334C8, STM32F334R4, STM32F334R6 and STM32F334R8 Devices */
|
||||
/* #define STM32F318xx */ /*!< STM32F318K8, STM32F318C8: STM32F301x8 with regulator off: STM32F318xx Devices */
|
||||
/* #define STM32F328xx */ /*!< STM32F328C8, STM32F328R8: STM32F334x8 with regulator off: STM32F328xx Devices */
|
||||
/* #define STM32F358xx */ /*!< STM32F358CC, STM32F358RC, STM32F358VC: STM32F303xC with regulator off: STM32F358xx Devices */
|
||||
/* #define STM32F378xx */ /*!< STM32F378CC, STM32F378RC, STM32F378VC: STM32F373xC with regulator off: STM32F378xx Devices */
|
||||
/* #define STM32F398xx */ /*!< STM32F398CE, STM32F398RE, STM32F398VE: STM32F303xE with regulator off: STM32F398xx Devices */
|
||||
#endif
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to switch between these
|
||||
devices, you can define the device in your toolchain compiler preprocessor.
|
||||
*/
|
||||
#if !defined (USE_HAL_DRIVER)
|
||||
/**
|
||||
* @brief Comment the line below if you will not use the peripherals drivers.
|
||||
In this case, these drivers will not be included and the application code will
|
||||
be based on direct access to peripherals registers
|
||||
*/
|
||||
#define USE_HAL_DRIVER
|
||||
#endif /* USE_HAL_DRIVER */
|
||||
|
||||
/**
|
||||
* @brief CMSIS Device version number V2.1.0
|
||||
*/
|
||||
#define __STM32F3xx_CMSIS_DEVICE_VERSION_MAIN (0x02) /*!< [31:24] main version */
|
||||
#define __STM32F3xx_CMSIS_DEVICE_VERSION_SUB1 (0x01) /*!< [23:16] sub1 version */
|
||||
#define __STM32F3xx_CMSIS_DEVICE_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
|
||||
#define __STM32F3xx_CMSIS_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */
|
||||
#define __STM32F3xx_CMSIS_DEVICE_VERSION ((__CMSIS_DEVICE_VERSION_MAIN << 24)\
|
||||
|(__CMSIS_DEVICE_HAL_VERSION_SUB1 << 16)\
|
||||
|(__CMSIS_DEVICE_HAL_VERSION_SUB2 << 8 )\
|
||||
|(__CMSIS_DEVICE_HAL_VERSION_RC))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup Device_Included
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(STM32F301x8)
|
||||
#include "stm32f301x8.h"
|
||||
#elif defined(STM32F302x8)
|
||||
#include "stm32f302x8.h"
|
||||
#elif defined(STM32F302xC)
|
||||
#include "stm32f302xc.h"
|
||||
#elif defined(STM32F302xE)
|
||||
#include "stm32f302xe.h"
|
||||
#elif defined(STM32F303x8)
|
||||
#include "stm32f303x8.h"
|
||||
#elif defined(STM32F303xC)
|
||||
#include "stm32f303xc.h"
|
||||
#elif defined(STM32F303xE)
|
||||
#include "stm32f303xe.h"
|
||||
#elif defined(STM32F373xC)
|
||||
#include "stm32f373xc.h"
|
||||
#elif defined(STM32F334x8)
|
||||
#include "stm32f334x8.h"
|
||||
#elif defined(STM32F318xx)
|
||||
#include "stm32f318xx.h"
|
||||
#elif defined(STM32F328xx)
|
||||
#include "stm32f328xx.h"
|
||||
#elif defined(STM32F358xx)
|
||||
#include "stm32f358xx.h"
|
||||
#elif defined(STM32F378xx)
|
||||
#include "stm32f378xx.h"
|
||||
#elif defined(STM32F398xx)
|
||||
#include "stm32f398xx.h"
|
||||
#else
|
||||
#error "Please select first the target STM32F3xx device used in your application (in stm32f3xx.h file)"
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup Exported_types
|
||||
* @{
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
RESET = 0,
|
||||
SET = !RESET
|
||||
} FlagStatus, ITStatus;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
DISABLE = 0,
|
||||
ENABLE = !DISABLE
|
||||
} FunctionalState;
|
||||
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
|
||||
|
||||
typedef enum
|
||||
{
|
||||
ERROR = 0,
|
||||
SUCCESS = !ERROR
|
||||
} ErrorStatus;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @addtogroup Exported_macros
|
||||
* @{
|
||||
*/
|
||||
#define SET_BIT(REG, BIT) ((REG) |= (BIT))
|
||||
|
||||
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
|
||||
|
||||
#define READ_BIT(REG, BIT) ((REG) & (BIT))
|
||||
|
||||
#define CLEAR_REG(REG) ((REG) = (0x0))
|
||||
|
||||
#define WRITE_REG(REG, VAL) ((REG) = (VAL))
|
||||
|
||||
#define READ_REG(REG) ((REG))
|
||||
|
||||
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
|
||||
|
||||
#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
|
||||
|
||||
|
||||
#if defined (USE_HAL_DRIVER)
|
||||
#include "stm32f3xx_hal.h"
|
||||
#endif /* USE_HAL_DRIVER */
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* __STM32F3xx_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
@ -1,456 +0,0 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32f3xx.c
|
||||
* @author MCD Application Team
|
||||
* @version V2.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
|
||||
*
|
||||
* 1. This file provides two functions and one global variable to be called from
|
||||
* user application:
|
||||
* - SystemInit(): This function is called at startup just after reset and
|
||||
* before branch to main program. This call is made inside
|
||||
* the "startup_stm32f3xx.s" file.
|
||||
*
|
||||
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
||||
* by the user application to setup the SysTick
|
||||
* timer or configure other parameters.
|
||||
*
|
||||
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||
* be called whenever the core clock is changed
|
||||
* during program execution.
|
||||
*
|
||||
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
|
||||
* Then SystemInit() function is called, in "startup_stm32f3xx.s" file, to
|
||||
* configure the system clock before to branch to main program.
|
||||
*
|
||||
* 3. This file configures the system clock as follows:
|
||||
*-----------------------------------------------------------------------------
|
||||
* System clock source | 1- PLL_HSE_EXTC | 3- PLL_HSI
|
||||
* | (external 8 MHz clock) | (internal 8 MHz)
|
||||
* | 2- PLL_HSE_XTAL |
|
||||
* | (external 8 MHz xtal) |
|
||||
*-----------------------------------------------------------------------------
|
||||
* SYSCLK(MHz) | 72 | 64
|
||||
*-----------------------------------------------------------------------------
|
||||
* AHBCLK (MHz) | 72 | 64
|
||||
*-----------------------------------------------------------------------------
|
||||
* APB1CLK (MHz) | 36 | 32
|
||||
*-----------------------------------------------------------------------------
|
||||
* APB2CLK (MHz) | 72 | 64
|
||||
*-----------------------------------------------------------------------------
|
||||
* USB capable (48 MHz precise clock) | NO | NO
|
||||
*-----------------------------------------------------------------------------
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32f3xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F3xx_System_Private_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "stm32f3xx.h"
|
||||
#include "hal_tick.h"
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F3xx_System_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F3xx_System_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz.
|
||||
This value can be provided and adapted by the user application. */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz.
|
||||
This value can be provided and adapted by the user application. */
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/*!< Uncomment the following line if you need to relocate your vector Table in
|
||||
Internal SRAM. */
|
||||
/* #define VECT_TAB_SRAM */
|
||||
#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x200. */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F3xx_System_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Select the clock sources (other than HSI) to start with (0=OFF, 1=ON) */
|
||||
#define USE_PLL_HSE_EXTC (1) /* Use external clock */
|
||||
#define USE_PLL_HSE_XTAL (1) /* Use external xtal */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F3xx_System_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
/* This variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||
Note: If you use this function to configure the system clock there is no need to
|
||||
call the 2 first functions listed above, since SystemCoreClock variable is
|
||||
updated automatically.
|
||||
*/
|
||||
uint32_t SystemCoreClock = 72000000;
|
||||
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F3xx_System_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if (USE_PLL_HSE_XTAL != 0) || (USE_PLL_HSE_EXTC != 0)
|
||||
uint8_t SetSysClock_PLL_HSE(uint8_t bypass);
|
||||
#endif
|
||||
|
||||
uint8_t SetSysClock_PLL_HSI(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F3xx_System_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Setup the microcontroller system
|
||||
* Initialize the FPU setting, vector table location and the PLL configuration is reset.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit(void)
|
||||
{
|
||||
/* FPU settings ------------------------------------------------------------*/
|
||||
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
|
||||
#endif
|
||||
|
||||
/* Reset the RCC clock configuration to the default reset state ------------*/
|
||||
/* Set HSION bit */
|
||||
RCC->CR |= (uint32_t)0x00000001;
|
||||
|
||||
/* Reset CFGR register */
|
||||
RCC->CFGR &= 0xF87FC00C;
|
||||
|
||||
/* Reset HSEON, CSSON and PLLON bits */
|
||||
RCC->CR &= (uint32_t)0xFEF6FFFF;
|
||||
|
||||
/* Reset HSEBYP bit */
|
||||
RCC->CR &= (uint32_t)0xFFFBFFFF;
|
||||
|
||||
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE bits */
|
||||
RCC->CFGR &= (uint32_t)0xFF80FFFF;
|
||||
|
||||
/* Reset PREDIV1[3:0] bits */
|
||||
RCC->CFGR2 &= (uint32_t)0xFFFFFFF0;
|
||||
|
||||
/* Reset USARTSW[1:0], I2CSW and TIMs bits */
|
||||
RCC->CFGR3 &= (uint32_t)0xFF00FCCC;
|
||||
|
||||
/* Disable all interrupts */
|
||||
RCC->CIR = 0x00000000;
|
||||
|
||||
#ifdef VECT_TAB_SRAM
|
||||
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
||||
#else
|
||||
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
|
||||
#endif
|
||||
|
||||
/* Configure the Cube driver */
|
||||
SystemCoreClock = 8000000; // At this stage the HSI is used as system clock
|
||||
HAL_Init();
|
||||
|
||||
/* Configure the System clock source, PLL Multiplier and Divider factors,
|
||||
AHB/APBx prescalers and Flash settings */
|
||||
SetSysClock();
|
||||
|
||||
/* Reset the timer to avoid issues after the RAM initialization */
|
||||
TIM_MST_RESET_ON;
|
||||
TIM_MST_RESET_OFF;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Update SystemCoreClock variable according to Clock Register Values.
|
||||
* The SystemCoreClock variable contains the core clock (HCLK), it can
|
||||
* be used by the user application to setup the SysTick timer or configure
|
||||
* other parameters.
|
||||
*
|
||||
* @note Each time the core clock (HCLK) changes, this function must be called
|
||||
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||
* based on this variable will be incorrect.
|
||||
*
|
||||
* @note - The system frequency computed by this function is not the real
|
||||
* frequency in the chip. It is calculated based on the predefined
|
||||
* constant and the selected clock source:
|
||||
*
|
||||
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
|
||||
*
|
||||
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
|
||||
*
|
||||
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
|
||||
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
|
||||
*
|
||||
* (*) HSI_VALUE is a constant defined in stm32f3xx_hal.h file (default value
|
||||
* 8 MHz) but the real value may vary depending on the variations
|
||||
* in voltage and temperature.
|
||||
*
|
||||
* (**) HSE_VALUE is a constant defined in stm32f3xx_hal.h file (default value
|
||||
* 8 MHz), user has to ensure that HSE_VALUE is same as the real
|
||||
* frequency of the crystal used. Otherwise, this function may
|
||||
* have wrong result.
|
||||
*
|
||||
* - The result of this function could be not correct when using fractional
|
||||
* value for HSE crystal.
|
||||
*
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
uint32_t tmp = 0, pllmull = 0, pllsource = 0, predivfactor = 0;
|
||||
|
||||
/* Get SYSCLK source -------------------------------------------------------*/
|
||||
tmp = RCC->CFGR & RCC_CFGR_SWS;
|
||||
|
||||
switch (tmp)
|
||||
{
|
||||
case RCC_CFGR_SWS_HSI: /* HSI used as system clock */
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
case RCC_CFGR_SWS_HSE: /* HSE used as system clock */
|
||||
SystemCoreClock = HSE_VALUE;
|
||||
break;
|
||||
case RCC_CFGR_SWS_PLL: /* PLL used as system clock */
|
||||
/* Get PLL clock source and multiplication factor ----------------------*/
|
||||
pllmull = RCC->CFGR & RCC_CFGR_PLLMUL;
|
||||
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
|
||||
pllmull = ( pllmull >> 18) + 2;
|
||||
|
||||
#if defined (STM32F302xE) || defined (STM32F303xE) || defined (STM32F398xx)
|
||||
predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1;
|
||||
if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV)
|
||||
{
|
||||
/* HSE oscillator clock selected as PREDIV1 clock entry */
|
||||
SystemCoreClock = (HSE_VALUE / predivfactor) * pllmull;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* HSI oscillator clock selected as PREDIV1 clock entry */
|
||||
SystemCoreClock = (HSI_VALUE / predivfactor) * pllmull;
|
||||
}
|
||||
#else
|
||||
if (pllsource == RCC_CFGR_PLLSRC_HSI_DIV2)
|
||||
{
|
||||
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
|
||||
SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
|
||||
}
|
||||
else
|
||||
{
|
||||
predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1;
|
||||
/* HSE oscillator clock selected as PREDIV1 clock entry */
|
||||
SystemCoreClock = (HSE_VALUE / predivfactor) * pllmull;
|
||||
}
|
||||
#endif /* STM32F302xE || STM32F303xE || STM32F398xx */
|
||||
break;
|
||||
default: /* HSI used as system clock */
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
}
|
||||
/* Compute HCLK clock frequency ----------------*/
|
||||
/* Get HCLK prescaler */
|
||||
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
|
||||
/* HCLK clock frequency */
|
||||
SystemCoreClock >>= tmp;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures the System clock source, PLL Multiplier and Divider factors,
|
||||
* AHB/APBx prescalers and Flash settings
|
||||
* @note This function should be called only once the RCC clock configuration
|
||||
* is reset to the default reset state (done in SystemInit() function).
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SetSysClock(void)
|
||||
{
|
||||
/* 1- Try to start with HSE and external clock */
|
||||
#if USE_PLL_HSE_EXTC != 0
|
||||
if (SetSysClock_PLL_HSE(1) == 0)
|
||||
#endif
|
||||
{
|
||||
/* 2- If fail try to start with HSE and external xtal */
|
||||
#if USE_PLL_HSE_XTAL != 0
|
||||
if (SetSysClock_PLL_HSE(0) == 0)
|
||||
#endif
|
||||
{
|
||||
/* 3- If fail start with HSI clock */
|
||||
if (SetSysClock_PLL_HSI() == 0)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
// [TODO] Put something here to tell the user that a problem occured...
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Output clock on MCO1 pin(PA8) for debugging purpose */
|
||||
//HAL_RCC_MCOConfig(RCC_MCO, RCC_MCOSOURCE_SYSCLK, RCC_MCO_DIV1); // 72 MHz or 64 MHz
|
||||
}
|
||||
|
||||
#if (USE_PLL_HSE_XTAL != 0) || (USE_PLL_HSE_EXTC != 0)
|
||||
/******************************************************************************/
|
||||
/* PLL (clocked by HSE) used as System clock source */
|
||||
/******************************************************************************/
|
||||
uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
|
||||
{
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||
|
||||
/* Enable HSE oscillator and activate PLL with HSE as source */
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||
if (bypass == 0)
|
||||
{
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON; /* External 8 MHz xtal on OSC_IN/OSC_OUT */
|
||||
}
|
||||
else
|
||||
{
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; /* External 8 MHz clock on OSC_IN */
|
||||
}
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; // 72 MHz (8 MHz * 9)
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
return 0; // FAIL
|
||||
}
|
||||
|
||||
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
|
||||
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 72 MHz
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 72 MHz
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; // 36 MHz
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 72 MHz
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
|
||||
{
|
||||
return 0; // FAIL
|
||||
}
|
||||
|
||||
/* Output clock on MCO1 pin(PA8) for debugging purpose */
|
||||
//if (bypass == 0)
|
||||
// HAL_RCC_MCOConfig(RCC_MCO, RCC_MCOSOURCE_HSE, RCC_MCO_DIV2); // 4 MHz with xtal
|
||||
//else
|
||||
// HAL_RCC_MCOConfig(RCC_MCO, RCC_MCOSOURCE_HSE, RCC_MCO_DIV1); // 8 MHz with ext clock
|
||||
|
||||
return 1; // OK
|
||||
}
|
||||
#endif
|
||||
|
||||
/******************************************************************************/
|
||||
/* PLL (clocked by HSI) used as System clock source */
|
||||
/******************************************************************************/
|
||||
uint8_t SetSysClock_PLL_HSI(void)
|
||||
{
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||
|
||||
/* Enable HSI oscillator and activate PLL with HSI as source */
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
|
||||
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
|
||||
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
|
||||
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16; // 64 MHz (8 MHz/2 * 16)
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
return 0; // FAIL
|
||||
}
|
||||
|
||||
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
|
||||
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 64 MHz
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 64 MHz
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; // 32 MHz
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 64 MHz
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
|
||||
{
|
||||
return 0; // FAIL
|
||||
}
|
||||
|
||||
/* Output clock on MCO1 pin(PA8) for debugging purpose */
|
||||
//HAL_RCC_MCOConfig(RCC_MCO, RCC_MCOSOURCE_HSI, RCC_MCO_DIV1); // 8 MHz
|
||||
|
||||
return 1; // OK
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -1,124 +0,0 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32f3xx.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief CMSIS Cortex-M4 Device System Source File for STM32F3xx devices.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32f3xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Define to prevent recursive inclusion
|
||||
*/
|
||||
#ifndef __SYSTEM_STM32F3XX_H
|
||||
#define __SYSTEM_STM32F3XX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** @addtogroup STM32F3xx_System_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @addtogroup STM32F3xx_System_Exported_types
|
||||
* @{
|
||||
*/
|
||||
/* This variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
3) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||
3) by calling HAL API function HAL_RCC_ClockConfig()
|
||||
Note: If you use this function to configure the system clock; then there
|
||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||
variable is updated automatically.
|
||||
*/
|
||||
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F3xx_System_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F3xx_System_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F3xx_System_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
extern void SystemInit(void);
|
||||
extern void SystemCoreClockUpdate(void);
|
||||
extern void SetSysClock(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__SYSTEM_STM32F3XX_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief HAL module driver.
|
||||
* This is the common part of the HAL initialization
|
||||
*
|
||||
|
@ -23,7 +23,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
@ -70,11 +70,11 @@
|
|||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief STM32F3xx HAL Driver version number V1.1.1
|
||||
* @brief STM32F3xx HAL Driver version number V1.1.0
|
||||
*/
|
||||
#define __STM32F3xx_HAL_VERSION_MAIN (0x01) /*!< [31:24] main version */
|
||||
#define __STM32F3xx_HAL_VERSION_SUB1 (0x01) /*!< [23:16] sub1 version */
|
||||
#define __STM32F3xx_HAL_VERSION_SUB2 (0x01) /*!< [15:8] sub2 version */
|
||||
#define __STM32F3xx_HAL_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
|
||||
#define __STM32F3xx_HAL_VERSION_RC (0x00) /*!< [7:0] release candidate */
|
||||
#define __STM32F3xx_HAL_VERSION ((__STM32F3xx_HAL_VERSION_MAIN << 24)\
|
||||
|(__STM32F3xx_HAL_VERSION_SUB1 << 16)\
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief This file contains all the functions prototypes for the HAL
|
||||
* module driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_adc.c
|
||||
* @author MCD Application conversion
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Analog to Digital Convertor (ADC)
|
||||
* peripheral:
|
||||
|
@ -158,7 +158,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_adc.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file containing functions prototypes of ADC HAL library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_adc_ex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Analog to Digital Convertor (ADC)
|
||||
* peripheral:
|
||||
|
@ -164,7 +164,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
@ -379,7 +379,7 @@ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
|
|||
uint32_t WaitLoopIndex = 0;
|
||||
|
||||
/* Check ADC handle */
|
||||
if(hadc == NULL)
|
||||
if(hadc == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -501,7 +501,7 @@ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
|
|||
/* Parameters that can be updated only when ADC is disabled: */
|
||||
/* - Multimode clock configuration */
|
||||
if ((__HAL_ADC_IS_ENABLED(hadc) == RESET) &&
|
||||
( (tmphadcSharingSameCommonRegister.Instance == NULL) ||
|
||||
( (tmphadcSharingSameCommonRegister.Instance == HAL_NULL) ||
|
||||
(__HAL_ADC_IS_ENABLED(&tmphadcSharingSameCommonRegister) == RESET) ))
|
||||
{
|
||||
/* Reset configuration of ADC common register CCR: */
|
||||
|
@ -652,7 +652,7 @@ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
|
|||
HAL_StatusTypeDef tmpHALStatus = HAL_OK;
|
||||
|
||||
/* Check ADC handle */
|
||||
if(hadc == NULL)
|
||||
if(hadc == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -793,7 +793,7 @@ HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
|
|||
ADC_HandleTypeDef tmphadcSharingSameCommonRegister;
|
||||
|
||||
/* Check ADC handle */
|
||||
if(hadc == NULL)
|
||||
if(hadc == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -953,7 +953,7 @@ HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
|
|||
/* Software is allowed to change common parameters only when all ADCs of */
|
||||
/* the common group are disabled. */
|
||||
if ((__HAL_ADC_IS_ENABLED(hadc) == RESET) &&
|
||||
( (tmphadcSharingSameCommonRegister.Instance == NULL) ||
|
||||
( (tmphadcSharingSameCommonRegister.Instance == HAL_NULL) ||
|
||||
(__HAL_ADC_IS_ENABLED(&tmphadcSharingSameCommonRegister) == RESET) ))
|
||||
{
|
||||
/* Reset configuration of ADC common register CCR:
|
||||
|
@ -1051,7 +1051,7 @@ HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
|
|||
HAL_StatusTypeDef tmpHALStatus = HAL_OK;
|
||||
|
||||
/* Check ADC handle */
|
||||
if(hadc == NULL)
|
||||
if(hadc == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -3875,7 +3875,7 @@ HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t
|
|||
/* (Depending on STM32F3 product, there may be up to 2 ADC slaves) */
|
||||
__HAL_ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
|
||||
|
||||
if (tmphadcSlave.Instance == NULL)
|
||||
if (tmphadcSlave.Instance == HAL_NULL)
|
||||
{
|
||||
/* Update ADC state machine to error */
|
||||
hadc->State = HAL_ADC_STATE_ERROR;
|
||||
|
@ -3995,7 +3995,7 @@ HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc)
|
|||
/* (Depending on STM32F3 product, there may be up to 2 ADC slaves) */
|
||||
__HAL_ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
|
||||
|
||||
if (tmphadcSlave.Instance == NULL)
|
||||
if (tmphadcSlave.Instance == HAL_NULL)
|
||||
{
|
||||
/* Update ADC state machine to error */
|
||||
hadc->State = HAL_ADC_STATE_ERROR;
|
||||
|
@ -4554,7 +4554,7 @@ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConf
|
|||
/* Software is allowed to change common parameters only when all ADCs */
|
||||
/* of the common group are disabled. */
|
||||
if ((__HAL_ADC_IS_ENABLED(hadc) == RESET) &&
|
||||
( (tmphadcSharingSameCommonRegister.Instance == NULL) ||
|
||||
( (tmphadcSharingSameCommonRegister.Instance == HAL_NULL) ||
|
||||
(__HAL_ADC_IS_ENABLED(&tmphadcSharingSameCommonRegister) == RESET) ))
|
||||
{
|
||||
/* If Channel_16 is selected, enable Temp. sensor measurement path */
|
||||
|
@ -5205,7 +5205,7 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_I
|
|||
/* Software is allowed to change common parameters only when all ADCs */
|
||||
/* of the common group are disabled. */
|
||||
if ((__HAL_ADC_IS_ENABLED(hadc) == RESET) &&
|
||||
( (tmphadcSharingSameCommonRegister.Instance == NULL) ||
|
||||
( (tmphadcSharingSameCommonRegister.Instance == HAL_NULL) ||
|
||||
(__HAL_ADC_IS_ENABLED(&tmphadcSharingSameCommonRegister) == RESET) ))
|
||||
{
|
||||
/* If Channel_16 is selected, enable Temp. sensor measurement path */
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_adc_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file containing functions prototypes of ADC HAL library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
@ -3300,7 +3300,7 @@ typedef struct
|
|||
)? \
|
||||
((__HANDLE_OTHER_ADC__)->Instance = ADC3) \
|
||||
: \
|
||||
((__HANDLE_OTHER_ADC__)->Instance = NULL) \
|
||||
((__HANDLE_OTHER_ADC__)->Instance = HAL_NULL) \
|
||||
) \
|
||||
) \
|
||||
) \
|
||||
|
@ -3324,7 +3324,7 @@ typedef struct
|
|||
|
||||
#if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
|
||||
#define __HAL_ADC_COMMON_ADC_OTHER(__HANDLE__, __HANDLE_OTHER_ADC__) \
|
||||
((__HANDLE_OTHER_ADC__)->Instance = NULL)
|
||||
((__HANDLE_OTHER_ADC__)->Instance = HAL_NULL)
|
||||
#endif /* STM32F301x8 || STM32F302x8 || STM32F318xx */
|
||||
|
||||
/**
|
||||
|
@ -3345,7 +3345,7 @@ typedef struct
|
|||
)? \
|
||||
((__HANDLE_SLAVE__)->Instance = ADC4) \
|
||||
: \
|
||||
((__HANDLE_SLAVE__)->Instance = NULL) \
|
||||
((__HANDLE_SLAVE__)->Instance = HAL_NULL) \
|
||||
) \
|
||||
)
|
||||
#endif /* STM32F303xE || STM32F398xx || */
|
||||
|
@ -3359,7 +3359,7 @@ typedef struct
|
|||
)? \
|
||||
((__HANDLE_SLAVE__)->Instance = ADC2) \
|
||||
: \
|
||||
( NULL ) \
|
||||
( HAL_NULL ) \
|
||||
)
|
||||
#endif /* STM32F302xE || */
|
||||
/* STM32F302xC || */
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_can.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief CAN HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
|
@ -73,7 +73,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
@ -161,7 +161,7 @@ HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan)
|
|||
uint32_t tickstart = 0;
|
||||
|
||||
/* Check CAN handle */
|
||||
if(hcan == NULL)
|
||||
if(hcan == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -431,7 +431,7 @@ HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTy
|
|||
HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan)
|
||||
{
|
||||
/* Check CAN handle */
|
||||
if(hcan == NULL)
|
||||
if(hcan == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_can.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of CAN HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_cec.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief CEC HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
|
@ -49,7 +49,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
@ -148,7 +148,7 @@ HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec)
|
|||
uint32_t tmpreg = 0x0;
|
||||
|
||||
/* Check the CEC handle allocation */
|
||||
if(hcec == NULL)
|
||||
if(hcec == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -209,7 +209,7 @@ HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec)
|
|||
HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec)
|
||||
{
|
||||
/* Check the CEC handle allocation */
|
||||
if(hcec == NULL)
|
||||
if(hcec == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -324,7 +324,7 @@ HAL_StatusTypeDef HAL_CEC_Transmit(CEC_HandleTypeDef *hcec, uint8_t DestinationA
|
|||
if((hcec->State == HAL_CEC_STATE_READY) && (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) == RESET))
|
||||
{
|
||||
hcec->ErrorCode = HAL_CEC_ERROR_NONE;
|
||||
if((pData == NULL) && (Size > 0))
|
||||
if((pData == HAL_NULL) && (Size > 0))
|
||||
{
|
||||
hcec->State = HAL_CEC_STATE_ERROR;
|
||||
return HAL_ERROR;
|
||||
|
@ -472,7 +472,7 @@ HAL_StatusTypeDef HAL_CEC_Receive(CEC_HandleTypeDef *hcec, uint8_t *pData, uint3
|
|||
if (hcec->State == HAL_CEC_STATE_READY)
|
||||
{
|
||||
hcec->ErrorCode = HAL_CEC_ERROR_NONE;
|
||||
if (pData == NULL)
|
||||
if (pData == HAL_NULL)
|
||||
{
|
||||
hcec->State = HAL_CEC_STATE_ERROR;
|
||||
return HAL_ERROR;
|
||||
|
@ -576,7 +576,7 @@ HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t Destinati
|
|||
if (((hcec->State == HAL_CEC_STATE_READY) || (hcec->State == HAL_CEC_STATE_STANDBY_RX))
|
||||
&& (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) == RESET))
|
||||
{
|
||||
if((pData == NULL) && (Size > 0))
|
||||
if((pData == HAL_NULL) && (Size > 0))
|
||||
{
|
||||
hcec->State = HAL_CEC_STATE_ERROR;
|
||||
return HAL_ERROR;
|
||||
|
@ -706,7 +706,7 @@ HAL_StatusTypeDef HAL_CEC_Receive_IT(CEC_HandleTypeDef *hcec, uint8_t *pData)
|
|||
{
|
||||
if(hcec->State == HAL_CEC_STATE_READY)
|
||||
{
|
||||
if(pData == NULL)
|
||||
if(pData == HAL_NULL)
|
||||
{
|
||||
hcec->State = HAL_CEC_STATE_ERROR;
|
||||
return HAL_ERROR;
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_cec.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of CEC HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_comp.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief COMP HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
|
@ -201,7 +201,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
@ -279,7 +279,7 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
|
|||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
/* Check the COMP handle allocation and lock status */
|
||||
if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
|
||||
if((hcomp == HAL_NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
|
||||
{
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
@ -342,7 +342,7 @@ HAL_StatusTypeDef HAL_COMP_DeInit(COMP_HandleTypeDef *hcomp)
|
|||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
/* Check the COMP handle allocation and lock status */
|
||||
if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
|
||||
if((hcomp == HAL_NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
|
||||
{
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
@ -416,7 +416,7 @@ HAL_StatusTypeDef HAL_COMP_Start(COMP_HandleTypeDef *hcomp)
|
|||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
/* Check the COMP handle allocation and lock status */
|
||||
if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
|
||||
if((hcomp == HAL_NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
|
||||
{
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
@ -451,7 +451,7 @@ HAL_StatusTypeDef HAL_COMP_Stop(COMP_HandleTypeDef *hcomp)
|
|||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
/* Check the COMP handle allocation and lock status */
|
||||
if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
|
||||
if((hcomp == HAL_NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
|
||||
{
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
@ -587,7 +587,7 @@ HAL_StatusTypeDef HAL_COMP_Lock(COMP_HandleTypeDef *hcomp)
|
|||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
/* Check the COMP handle allocation and lock status */
|
||||
if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
|
||||
if((hcomp == HAL_NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
|
||||
{
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
@ -679,7 +679,7 @@ __weak void HAL_COMP_TriggerCallback(COMP_HandleTypeDef *hcomp)
|
|||
HAL_COMP_StateTypeDef HAL_COMP_GetState(COMP_HandleTypeDef *hcomp)
|
||||
{
|
||||
/* Check the COMP handle allocation */
|
||||
if(hcomp == NULL)
|
||||
if(hcomp == HAL_NULL)
|
||||
{
|
||||
return HAL_COMP_STATE_RESET;
|
||||
}
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_comp.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of COMP HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_comp_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of COMP HAL Extended module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_conf.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief HAL configuration file.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_cortex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief CORTEX HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
|
@ -94,7 +94,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_cortex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of CORTEX HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_crc.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief CRC HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
|
@ -34,7 +34,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
@ -115,7 +115,7 @@ static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint3
|
|||
HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc)
|
||||
{
|
||||
/* Check the CRC handle allocation */
|
||||
if(hcrc == NULL)
|
||||
if(hcrc == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -189,7 +189,7 @@ HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc)
|
|||
HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc)
|
||||
{
|
||||
/* Check the CRC handle allocation */
|
||||
if(hcrc == NULL)
|
||||
if(hcrc == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_crc.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of CRC HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_crc_ex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Extended CRC HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
|
@ -51,7 +51,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_crc_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of CRC HAL Extended module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_dac.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Digital-to-Analog Converter (DAC) peripheral:
|
||||
* + DAC channels configuration: trigger, output buffer, data format
|
||||
|
@ -171,7 +171,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
@ -249,7 +249,7 @@
|
|||
HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac)
|
||||
{
|
||||
/* Check DAC handle */
|
||||
if(hdac == NULL)
|
||||
if(hdac == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -284,7 +284,7 @@ HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac)
|
|||
HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac)
|
||||
{
|
||||
/* Check DAC handle */
|
||||
if(hdac == NULL)
|
||||
if(hdac == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_dac.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of DAC HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_dac_ex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Extended DAC HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
|
@ -16,7 +16,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_dac_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of DAC HAL Extended module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_def.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief This file contains HAL common defines, enumeration, macros and
|
||||
* structures definitions.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
@ -70,8 +70,8 @@ typedef enum
|
|||
} HAL_LockTypeDef;
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifndef NULL
|
||||
#define NULL 0
|
||||
#ifndef HAL_NULL
|
||||
#define HAL_NULL (void *) 0
|
||||
#endif
|
||||
|
||||
#define HAL_MAX_DELAY 0xFFFFFFFF
|
||||
|
@ -85,8 +85,6 @@ typedef enum
|
|||
(__DMA_HANDLE_).Parent = (__HANDLE__); \
|
||||
} while(0)
|
||||
|
||||
#define UNUSED(x) ((void)(x))
|
||||
|
||||
/** @brief Reset the Handle's State field.
|
||||
* @param __HANDLE__: specifies the Peripheral Handle.
|
||||
* @note This macro can be used for the following purpose:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_dma.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief DMA HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
|
@ -75,7 +75,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
@ -173,7 +173,7 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
|
|||
uint32_t tmp = 0;
|
||||
|
||||
/* Check the DMA handle allocation */
|
||||
if(hdma == NULL)
|
||||
if(hdma == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -226,7 +226,7 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
|
|||
HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
|
||||
{
|
||||
/* Check the DMA handle allocation */
|
||||
if(hdma == NULL)
|
||||
if(hdma == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -531,7 +531,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
|
|||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(hdma);
|
||||
|
||||
if (hdma->XferErrorCallback != NULL)
|
||||
if (hdma->XferErrorCallback != HAL_NULL)
|
||||
{
|
||||
/* Transfer error callback */
|
||||
hdma->XferErrorCallback(hdma);
|
||||
|
@ -556,7 +556,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
|
|||
/* Change DMA peripheral state */
|
||||
hdma->State = HAL_DMA_STATE_READY_HALF;
|
||||
|
||||
if(hdma->XferHalfCpltCallback != NULL)
|
||||
if(hdma->XferHalfCpltCallback != HAL_NULL)
|
||||
{
|
||||
/* Half transfer callback */
|
||||
hdma->XferHalfCpltCallback(hdma);
|
||||
|
@ -586,7 +586,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
|
|||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(hdma);
|
||||
|
||||
if(hdma->XferCpltCallback != NULL)
|
||||
if(hdma->XferCpltCallback != HAL_NULL)
|
||||
{
|
||||
/* Transfer complete callback */
|
||||
hdma->XferCpltCallback(hdma);
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_dma.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of DMA HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_dma_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of DMA HAL Extended module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_flash.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief FLASH HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
|
@ -72,7 +72,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_flash.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of Flash HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_flash_ex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Extended FLASH HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
|
@ -31,7 +31,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_flash_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of Flash HAL Extended module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_gpio.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief GPIO HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
|
@ -101,7 +101,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_gpio.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of GPIO HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_gpio_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of GPIO HAL Extended module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_hrtim.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief TIM HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the High Resolution Timer (HRTIM) peripheral:
|
||||
|
@ -288,7 +288,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
@ -481,7 +481,7 @@ HAL_StatusTypeDef HAL_HRTIM_Init(HRTIM_HandleTypeDef * hhrtim)
|
|||
uint32_t hrtim_mcr;
|
||||
|
||||
/* Check the HRTIM handle allocation */
|
||||
if(hhrtim == NULL)
|
||||
if(hhrtim == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -494,12 +494,12 @@ HAL_StatusTypeDef HAL_HRTIM_Init(HRTIM_HandleTypeDef * hhrtim)
|
|||
hhrtim->State = HAL_HRTIM_STATE_BUSY;
|
||||
|
||||
/* Initialize the DMA handles */
|
||||
hhrtim->hdmaMaster = (DMA_HandleTypeDef *)NULL;
|
||||
hhrtim->hdmaTimerA = (DMA_HandleTypeDef *)NULL;
|
||||
hhrtim->hdmaTimerB = (DMA_HandleTypeDef *)NULL;
|
||||
hhrtim->hdmaTimerC = (DMA_HandleTypeDef *)NULL;
|
||||
hhrtim->hdmaTimerD = (DMA_HandleTypeDef *)NULL;
|
||||
hhrtim->hdmaTimerE = (DMA_HandleTypeDef *)NULL;
|
||||
hhrtim->hdmaMaster = (DMA_HandleTypeDef *)HAL_NULL;
|
||||
hhrtim->hdmaTimerA = (DMA_HandleTypeDef *)HAL_NULL;
|
||||
hhrtim->hdmaTimerB = (DMA_HandleTypeDef *)HAL_NULL;
|
||||
hhrtim->hdmaTimerC = (DMA_HandleTypeDef *)HAL_NULL;
|
||||
hhrtim->hdmaTimerD = (DMA_HandleTypeDef *)HAL_NULL;
|
||||
hhrtim->hdmaTimerE = (DMA_HandleTypeDef *)HAL_NULL;
|
||||
|
||||
/* HRTIM output synchronization configuration (if required) */
|
||||
if ((hhrtim->Init.SyncOptions & HRTIM_SYNCOPTION_MASTER) != RESET)
|
||||
|
@ -580,7 +580,7 @@ HAL_StatusTypeDef HAL_HRTIM_Init(HRTIM_HandleTypeDef * hhrtim)
|
|||
HAL_StatusTypeDef HAL_HRTIM_DeInit (HRTIM_HandleTypeDef * hhrtim)
|
||||
{
|
||||
/* Check the HRTIM handle allocation */
|
||||
if(hhrtim == NULL)
|
||||
if(hhrtim == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -1215,8 +1215,8 @@ HAL_StatusTypeDef HAL_HRTIM_SimpleOCChannelConfig(HRTIM_HandleTypeDef * hhrtim,
|
|||
HRTIM_SimpleOCChannelCfgTypeDef* pSimpleOCChannelCfg)
|
||||
{
|
||||
uint32_t CompareUnit = 0xFFFFFFFF;
|
||||
HRTIM_CompareCfgTypeDef CompareCfg = {0};
|
||||
HRTIM_OutputCfgTypeDef OutputCfg = {0};
|
||||
HRTIM_CompareCfgTypeDef CompareCfg;
|
||||
HRTIM_OutputCfgTypeDef OutputCfg;
|
||||
|
||||
/* Check parameters */
|
||||
assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
|
||||
|
@ -7281,7 +7281,7 @@ static uint32_t HRTIM_GetDMAFromOCMode(HRTIM_HandleTypeDef * hhrtim,
|
|||
static DMA_HandleTypeDef * HRTIM_GetDMAHandleFromTimerIdx(HRTIM_HandleTypeDef * hhrtim,
|
||||
uint32_t TimerIdx)
|
||||
{
|
||||
DMA_HandleTypeDef * hdma = (DMA_HandleTypeDef *)NULL;
|
||||
DMA_HandleTypeDef * hdma = (DMA_HandleTypeDef *)HAL_NULL;
|
||||
|
||||
switch (TimerIdx)
|
||||
{
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_hrtim.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of HRTIM HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_i2c.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief I2C HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
|
@ -152,7 +152,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
@ -295,7 +295,7 @@ static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, ui
|
|||
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
|
||||
{
|
||||
/* Check the I2C handle allocation */
|
||||
if(hi2c == NULL)
|
||||
if(hi2c == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -375,7 +375,7 @@ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
|
|||
HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
|
||||
{
|
||||
/* Check the I2C handle allocation */
|
||||
if(hi2c == NULL)
|
||||
if(hi2c == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -509,7 +509,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevA
|
|||
|
||||
if(hi2c->State == HAL_I2C_STATE_READY)
|
||||
{
|
||||
if((pData == NULL ) || (Size == 0))
|
||||
if((pData == HAL_NULL ) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -629,7 +629,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAd
|
|||
|
||||
if(hi2c->State == HAL_I2C_STATE_READY)
|
||||
{
|
||||
if((pData == NULL ) || (Size == 0))
|
||||
if((pData == HAL_NULL ) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -740,7 +740,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData
|
|||
{
|
||||
if(hi2c->State == HAL_I2C_STATE_READY)
|
||||
{
|
||||
if((pData == NULL ) || (Size == 0))
|
||||
if((pData == HAL_NULL ) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -869,7 +869,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData,
|
|||
{
|
||||
if(hi2c->State == HAL_I2C_STATE_READY)
|
||||
{
|
||||
if((pData == NULL ) || (Size == 0))
|
||||
if((pData == HAL_NULL ) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -988,7 +988,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t D
|
|||
{
|
||||
if(hi2c->State == HAL_I2C_STATE_READY)
|
||||
{
|
||||
if((pData == NULL) || (Size == 0))
|
||||
if((pData == HAL_NULL) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -1060,7 +1060,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t De
|
|||
{
|
||||
if(hi2c->State == HAL_I2C_STATE_READY)
|
||||
{
|
||||
if((pData == NULL) || (Size == 0))
|
||||
if((pData == HAL_NULL) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -1130,7 +1130,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pD
|
|||
{
|
||||
if(hi2c->State == HAL_I2C_STATE_READY)
|
||||
{
|
||||
if((pData == NULL) || (Size == 0))
|
||||
if((pData == HAL_NULL) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -1180,7 +1180,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pDa
|
|||
{
|
||||
if(hi2c->State == HAL_I2C_STATE_READY)
|
||||
{
|
||||
if((pData == NULL) || (Size == 0))
|
||||
if((pData == HAL_NULL) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -1239,7 +1239,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t
|
|||
{
|
||||
if(hi2c->State == HAL_I2C_STATE_READY)
|
||||
{
|
||||
if((pData == NULL) || (Size == 0))
|
||||
if((pData == HAL_NULL) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -1330,7 +1330,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t D
|
|||
{
|
||||
if(hi2c->State == HAL_I2C_STATE_READY)
|
||||
{
|
||||
if((pData == NULL) || (Size == 0))
|
||||
if((pData == HAL_NULL) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -1410,7 +1410,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *p
|
|||
{
|
||||
if(hi2c->State == HAL_I2C_STATE_READY)
|
||||
{
|
||||
if((pData == NULL) || (Size == 0))
|
||||
if((pData == HAL_NULL) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -1496,7 +1496,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pD
|
|||
{
|
||||
if(hi2c->State == HAL_I2C_STATE_READY)
|
||||
{
|
||||
if((pData == NULL) || (Size == 0))
|
||||
if((pData == HAL_NULL) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -1584,7 +1584,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress
|
|||
|
||||
if(hi2c->State == HAL_I2C_STATE_READY)
|
||||
{
|
||||
if((pData == NULL) || (Size == 0))
|
||||
if((pData == HAL_NULL) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -1727,7 +1727,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress,
|
|||
|
||||
if(hi2c->State == HAL_I2C_STATE_READY)
|
||||
{
|
||||
if((pData == NULL) || (Size == 0))
|
||||
if((pData == HAL_NULL) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -1869,7 +1869,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddr
|
|||
|
||||
if(hi2c->State == HAL_I2C_STATE_READY)
|
||||
{
|
||||
if((pData == NULL) || (Size == 0))
|
||||
if((pData == HAL_NULL) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -1962,7 +1962,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddre
|
|||
|
||||
if(hi2c->State == HAL_I2C_STATE_READY)
|
||||
{
|
||||
if((pData == NULL) || (Size == 0))
|
||||
if((pData == HAL_NULL) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -2062,7 +2062,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAdd
|
|||
|
||||
if(hi2c->State == HAL_I2C_STATE_READY)
|
||||
{
|
||||
if((pData == NULL) || (Size == 0))
|
||||
if((pData == HAL_NULL) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -2171,7 +2171,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddr
|
|||
|
||||
if(hi2c->State == HAL_I2C_STATE_READY)
|
||||
{
|
||||
if((pData == NULL) || (Size == 0))
|
||||
if((pData == HAL_NULL) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_i2c.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of I2C HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_i2c_ex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief I2C Extended HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of I2C Extended peripheral:
|
||||
|
@ -34,7 +34,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_i2c_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of I2C HAL Extended module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_i2s.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief I2S HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the Integrated Interchip Sound (I2S) peripheral:
|
||||
|
@ -109,7 +109,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
@ -236,7 +236,7 @@ __weak HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
|
|||
HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
|
||||
{
|
||||
/* Check the I2S handle allocation */
|
||||
if(hi2s == NULL)
|
||||
if(hi2s == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -347,7 +347,7 @@ HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
|
|||
*/
|
||||
HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
|
||||
{
|
||||
if((pData == NULL ) || (Size == 0))
|
||||
if((pData == HAL_NULL ) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -450,7 +450,7 @@ HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uin
|
|||
*/
|
||||
HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
|
||||
{
|
||||
if((pData == NULL ) || (Size == 0))
|
||||
if((pData == HAL_NULL ) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -552,7 +552,7 @@ HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData,
|
|||
{
|
||||
if(hi2s->State == HAL_I2S_STATE_READY)
|
||||
{
|
||||
if((pData == NULL) || (Size == 0))
|
||||
if((pData == HAL_NULL) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -617,7 +617,7 @@ HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, u
|
|||
{
|
||||
if(hi2s->State == HAL_I2S_STATE_READY)
|
||||
{
|
||||
if((pData == NULL) || (Size == 0))
|
||||
if((pData == HAL_NULL) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -679,7 +679,7 @@ HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData,
|
|||
{
|
||||
uint32_t *tmp;
|
||||
|
||||
if((pData == NULL) || (Size == 0))
|
||||
if((pData == HAL_NULL) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -757,7 +757,7 @@ HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData,
|
|||
{
|
||||
uint32_t *tmp;
|
||||
|
||||
if((pData == NULL) || (Size == 0))
|
||||
if((pData == HAL_NULL) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_i2s.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of I2S HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_i2s_ex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief I2S Extended HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of I2S Extended peripheral:
|
||||
|
@ -88,7 +88,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
@ -228,7 +228,7 @@ HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
|
|||
/* STM32F302xC || STM32F303xC || STM32F358xx */
|
||||
|
||||
/* Check the I2S handle allocation */
|
||||
if(hi2s == NULL)
|
||||
if(hi2s == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -789,7 +789,7 @@ HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s)
|
|||
*/
|
||||
HAL_StatusTypeDef HAL_I2SEx_TransmitReceive(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData, uint16_t Size, uint32_t Timeout)
|
||||
{
|
||||
if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
|
||||
if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -1028,7 +1028,7 @@ HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_IT(I2S_HandleTypeDef *hi2s, uint16_t
|
|||
{
|
||||
if(hi2s->State == HAL_I2S_STATE_READY)
|
||||
{
|
||||
if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
|
||||
if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -1176,7 +1176,7 @@ HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_DMA(I2S_HandleTypeDef *hi2s, uint16_
|
|||
{
|
||||
uint32_t *tmp;
|
||||
|
||||
if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
|
||||
if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_i2s_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of I2S HAL Extended module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_irda.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief IRDA HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
|
@ -57,7 +57,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
@ -192,7 +192,7 @@ static HAL_StatusTypeDef IRDA_Receive_IT(IRDA_HandleTypeDef *hirda);
|
|||
HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda)
|
||||
{
|
||||
/* Check the IRDA handle allocation */
|
||||
if(hirda == NULL)
|
||||
if(hirda == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -241,7 +241,7 @@ HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda)
|
|||
HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda)
|
||||
{
|
||||
/* Check the IRDA handle allocation */
|
||||
if(hirda == NULL)
|
||||
if(hirda == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -354,7 +354,7 @@ HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, u
|
|||
|
||||
if ((hirda->State == HAL_IRDA_STATE_READY) || (hirda->State == HAL_IRDA_STATE_BUSY_RX))
|
||||
{
|
||||
if((pData == NULL) || (Size == 0))
|
||||
if((pData == HAL_NULL) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -434,7 +434,7 @@ HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, ui
|
|||
|
||||
if ((hirda->State == HAL_IRDA_STATE_READY) || (hirda->State == HAL_IRDA_STATE_BUSY_TX))
|
||||
{
|
||||
if((pData == NULL) || (Size == 0))
|
||||
if((pData == HAL_NULL) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -512,7 +512,7 @@ HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData
|
|||
{
|
||||
if ((hirda->State == HAL_IRDA_STATE_READY) || (hirda->State == HAL_IRDA_STATE_BUSY_RX))
|
||||
{
|
||||
if((pData == NULL) || (Size == 0))
|
||||
if((pData == HAL_NULL) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -562,7 +562,7 @@ HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData,
|
|||
{
|
||||
if ((hirda->State == HAL_IRDA_STATE_READY) || (hirda->State == HAL_IRDA_STATE_BUSY_TX))
|
||||
{
|
||||
if((pData == NULL) || (Size == 0))
|
||||
if((pData == HAL_NULL) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -621,7 +621,7 @@ HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pDat
|
|||
|
||||
if ((hirda->State == HAL_IRDA_STATE_READY) || (hirda->State == HAL_IRDA_STATE_BUSY_RX))
|
||||
{
|
||||
if((pData == NULL) || (Size == 0))
|
||||
if((pData == HAL_NULL) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -684,7 +684,7 @@ HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData
|
|||
|
||||
if ((hirda->State == HAL_IRDA_STATE_READY) || (hirda->State == HAL_IRDA_STATE_BUSY_TX))
|
||||
{
|
||||
if((pData == NULL) || (Size == 0))
|
||||
if((pData == HAL_NULL) || (Size == 0))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_irda.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of IRDA HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_irda_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of IRDA HAL Extended module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_iwdg.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief IWDG HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
|
@ -79,7 +79,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
@ -169,7 +169,7 @@ HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
|
|||
uint32_t tickstart = 0;
|
||||
|
||||
/* Check the IWDG handle allocation */
|
||||
if(hiwdg == NULL)
|
||||
if(hiwdg == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_iwdg.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of IWDG HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_nand.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief NAND HAL module driver.
|
||||
* This file provides a generic firmware to drive NAND memories mounted
|
||||
* as external device.
|
||||
|
@ -55,7 +55,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
@ -134,7 +134,7 @@
|
|||
HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing)
|
||||
{
|
||||
/* Check the NAND handle state */
|
||||
if(hnand == NULL)
|
||||
if(hnand == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_nand.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of NAND HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_nor.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief NOR HAL module driver.
|
||||
* This file provides a generic firmware to drive NOR memories mounted
|
||||
* as external device.
|
||||
|
@ -55,7 +55,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
@ -141,7 +141,7 @@ static uint32_t uwNORMememoryDataWidth = NOR_MEMORY_8B;
|
|||
HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming)
|
||||
{
|
||||
/* Check the NOR handle parameter */
|
||||
if(hnor == NULL)
|
||||
if(hnor == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_nor.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of NOR HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_opamp.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief OPAMP HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
|
@ -158,7 +158,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
@ -252,7 +252,7 @@ HAL_StatusTypeDef HAL_OPAMP_Init(OPAMP_HandleTypeDef *hopamp)
|
|||
|
||||
/* Check the OPAMP handle allocation and lock status */
|
||||
/* Init not allowed if calibration is ongoing */
|
||||
if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED) \
|
||||
if((hopamp == HAL_NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED) \
|
||||
|| (hopamp->State == HAL_OPAMP_STATE_CALIBBUSY))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
|
@ -376,7 +376,7 @@ HAL_StatusTypeDef HAL_OPAMP_DeInit(OPAMP_HandleTypeDef *hopamp)
|
|||
/* Check the OPAMP handle allocation */
|
||||
/* Check if OPAMP locked */
|
||||
/* DeInit not allowed if calibration is ongoing */
|
||||
if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED) \
|
||||
if((hopamp == HAL_NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED) \
|
||||
|| (hopamp->State == HAL_OPAMP_STATE_CALIBBUSY))
|
||||
{
|
||||
status = HAL_ERROR;
|
||||
|
@ -457,7 +457,7 @@ HAL_StatusTypeDef HAL_OPAMP_Start(OPAMP_HandleTypeDef *hopamp)
|
|||
|
||||
/* Check the OPAMP handle allocation */
|
||||
/* Check if OPAMP locked */
|
||||
if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED))
|
||||
if((hopamp == HAL_NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED))
|
||||
|
||||
{
|
||||
status = HAL_ERROR;
|
||||
|
@ -498,7 +498,7 @@ HAL_StatusTypeDef HAL_OPAMP_Stop(OPAMP_HandleTypeDef *hopamp)
|
|||
/* Check the OPAMP handle allocation */
|
||||
/* Check if OPAMP locked */
|
||||
/* Check if OPAMP calibration ongoing */
|
||||
if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED) \
|
||||
if((hopamp == HAL_NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED) \
|
||||
|| (hopamp->State == HAL_OPAMP_STATE_CALIBBUSY))
|
||||
{
|
||||
status = HAL_ERROR;
|
||||
|
@ -544,7 +544,7 @@ HAL_StatusTypeDef HAL_OPAMP_SelfCalibrate(OPAMP_HandleTypeDef *hopamp)
|
|||
|
||||
/* Check the OPAMP handle allocation */
|
||||
/* Check if OPAMP locked */
|
||||
if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED))
|
||||
if((hopamp == HAL_NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED))
|
||||
{
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
@ -739,7 +739,7 @@ HAL_StatusTypeDef HAL_OPAMP_Lock(OPAMP_HandleTypeDef *hopamp)
|
|||
/* Check if OPAMP locked */
|
||||
/* OPAMP can be locked when enabled and running in normal mode */
|
||||
/* It is meaningless otherwise */
|
||||
if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_RESET) \
|
||||
if((hopamp == HAL_NULL) || (hopamp->State == HAL_OPAMP_STATE_RESET) \
|
||||
|| (hopamp->State == HAL_OPAMP_STATE_READY) \
|
||||
|| (hopamp->State == HAL_OPAMP_STATE_CALIBBUSY)\
|
||||
|| (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED))
|
||||
|
@ -789,7 +789,7 @@ HAL_StatusTypeDef HAL_OPAMP_Lock(OPAMP_HandleTypeDef *hopamp)
|
|||
HAL_OPAMP_StateTypeDef HAL_OPAMP_GetState(OPAMP_HandleTypeDef *hopamp)
|
||||
{
|
||||
/* Check the OPAMP handle allocation */
|
||||
if(hopamp == NULL)
|
||||
if(hopamp == HAL_NULL)
|
||||
{
|
||||
return HAL_OPAMP_STATE_RESET;
|
||||
}
|
||||
|
@ -815,7 +815,7 @@ OPAMP_TrimmingValueTypeDef HAL_OPAMP_GetTrimOffset (OPAMP_HandleTypeDef *hopamp,
|
|||
|
||||
/* Check the OPAMP handle allocation */
|
||||
/* Value can be retrieved in HAL_OPAMP_STATE_READY state */
|
||||
if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_RESET) \
|
||||
if((hopamp == HAL_NULL) || (hopamp->State == HAL_OPAMP_STATE_RESET) \
|
||||
|| (hopamp->State == HAL_OPAMP_STATE_BUSY) \
|
||||
|| (hopamp->State == HAL_OPAMP_STATE_CALIBBUSY)\
|
||||
|| (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED))
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_opamp.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of OPAMP HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_opamp_ex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Extended OPAMP HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
|
@ -15,7 +15,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
@ -106,8 +106,8 @@ HAL_StatusTypeDef HAL_OPAMPEx_SelfCalibrateAll(OPAMP_HandleTypeDef *hopamp1, OPA
|
|||
|
||||
uint32_t delta;
|
||||
|
||||
if((hopamp1 == NULL) || (hopamp1->State == HAL_OPAMP_STATE_BUSYLOCKED) || \
|
||||
(hopamp2 == NULL) || (hopamp2->State == HAL_OPAMP_STATE_BUSYLOCKED))
|
||||
if((hopamp1 == HAL_NULL) || (hopamp1->State == HAL_OPAMP_STATE_BUSYLOCKED) || \
|
||||
(hopamp2 == HAL_NULL) || (hopamp2->State == HAL_OPAMP_STATE_BUSYLOCKED))
|
||||
{
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
@ -368,10 +368,10 @@ HAL_StatusTypeDef HAL_OPAMPEx_SelfCalibrateAll(OPAMP_HandleTypeDef *hopamp1, OPA
|
|||
|
||||
uint32_t delta;
|
||||
|
||||
if((hopamp1 == NULL) || (hopamp1->State == HAL_OPAMP_STATE_BUSYLOCKED) || \
|
||||
(hopamp2 == NULL) || (hopamp2->State == HAL_OPAMP_STATE_BUSYLOCKED) || \
|
||||
(hopamp3 == NULL) || (hopamp3->State == HAL_OPAMP_STATE_BUSYLOCKED) || \
|
||||
(hopamp4 == NULL) || (hopamp4->State == HAL_OPAMP_STATE_BUSYLOCKED))
|
||||
if((hopamp1 == HAL_NULL) || (hopamp1->State == HAL_OPAMP_STATE_BUSYLOCKED) || \
|
||||
(hopamp2 == HAL_NULL) || (hopamp2->State == HAL_OPAMP_STATE_BUSYLOCKED) || \
|
||||
(hopamp3 == HAL_NULL) || (hopamp3->State == HAL_OPAMP_STATE_BUSYLOCKED) || \
|
||||
(hopamp4 == HAL_NULL) || (hopamp4->State == HAL_OPAMP_STATE_BUSYLOCKED))
|
||||
{
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_opamp_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of OPAMP HAL Extended module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_pccard.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief PCCARD HAL module driver.
|
||||
* This file provides a generic firmware to drive PCCARD memories mounted
|
||||
* as external device.
|
||||
|
@ -47,7 +47,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
@ -126,7 +126,7 @@
|
|||
HAL_StatusTypeDef HAL_PCCARD_Init(PCCARD_HandleTypeDef *hpccard, FMC_NAND_PCC_TimingTypeDef *ComSpaceTiming, FMC_NAND_PCC_TimingTypeDef *AttSpaceTiming, FMC_NAND_PCC_TimingTypeDef *IOSpaceTiming)
|
||||
{
|
||||
/* Check the PCCARD controller state */
|
||||
if(hpccard == NULL)
|
||||
if(hpccard == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_pccard.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of PCCARD HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_pcd.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief PCD HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the USB Peripheral Controller:
|
||||
|
@ -44,7 +44,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
@ -143,7 +143,7 @@ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
|
|||
uint32_t wInterrupt_Mask = 0;
|
||||
|
||||
/* Check the PCD handle allocation */
|
||||
if(hpcd == NULL)
|
||||
if(hpcd == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -214,7 +214,7 @@ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
|
|||
HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd)
|
||||
{
|
||||
/* Check the PCD handle allocation */
|
||||
if(hpcd == NULL)
|
||||
if(hpcd == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_pcd.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of PCD HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_pcd_ex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Extended PCD HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the USB Peripheral Controller:
|
||||
|
@ -12,7 +12,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_pcd_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of PCD HAL Extended module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_pwr.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief PWR HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
|
@ -15,7 +15,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_pwr.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of PWR HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_pwr_ex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Extended PWR HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
|
@ -14,7 +14,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_pwr_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of PWR HAL Extended module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_rcc.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief RCC HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the Reset and Clock Control (RCC) peripheral:
|
||||
|
@ -37,7 +37,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
@ -282,7 +282,7 @@ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, ui
|
|||
uint32_t tickstart = 0;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(RCC_ClkInitStruct != NULL);
|
||||
assert_param(RCC_ClkInitStruct != HAL_NULL);
|
||||
assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType));
|
||||
assert_param(IS_FLASH_LATENCY(FLatency));
|
||||
|
||||
|
@ -669,8 +669,8 @@ __weak void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
|
|||
void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(RCC_ClkInitStruct != NULL);
|
||||
assert_param(pFLatency != NULL);
|
||||
assert_param(RCC_ClkInitStruct != HAL_NULL);
|
||||
assert_param(pFLatency != HAL_NULL);
|
||||
|
||||
/* Set all possible values for the Clock type parameter --------------------*/
|
||||
RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_rcc.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of RCC HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_rcc_ex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Extended RCC HAL module driver
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities RCC Extended peripheral:
|
||||
|
@ -12,7 +12,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
@ -777,7 +777,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
|
|||
uint32_t tickstart = 0;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(RCC_OscInitStruct != NULL);
|
||||
assert_param(RCC_OscInitStruct != HAL_NULL);
|
||||
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
|
||||
/*------------------------------- HSE Configuration ------------------------*/
|
||||
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
|
||||
|
@ -1130,7 +1130,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
|
|||
void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(RCC_OscInitStruct != NULL);
|
||||
assert_param(RCC_OscInitStruct != HAL_NULL);
|
||||
|
||||
/* Set all possible values for the Oscillator type parameter ---------------*/
|
||||
RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI;
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_rcc_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of RCC HAL Extended module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_rtc.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief RTC HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
|
@ -149,7 +149,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
@ -243,7 +243,7 @@
|
|||
HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc)
|
||||
{
|
||||
/* Check the RTC peripheral state */
|
||||
if(hrtc == NULL)
|
||||
if(hrtc == HAL_NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_rtc.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Header file of RTC HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_rtc_ex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.1
|
||||
* @date 19-June-2015
|
||||
* @version V1.1.0
|
||||
* @date 12-Sept-2014
|
||||
* @brief Extended RTC HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the Real Time Clock (RTC) Extended peripheral:
|
||||
|
@ -63,7 +63,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
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