diff --git a/libraries/mbed/api/mbed.h b/libraries/mbed/api/mbed.h
index b408c4d893..1201475a3f 100644
--- a/libraries/mbed/api/mbed.h
+++ b/libraries/mbed/api/mbed.h
@@ -16,7 +16,7 @@
#ifndef MBED_H
#define MBED_H
-#define MBED_LIBRARY_VERSION 106
+#define MBED_LIBRARY_VERSION 107
#include "platform.h"
diff --git a/libraries/mbed/targets/cmsis/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21/TARGET_SAMD21G18A/TOOLCHAIN_GCC_ARM/samd21g18a.ld b/libraries/mbed/targets/cmsis/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21/TARGET_SAMD21G18A/TOOLCHAIN_GCC_ARM/samd21g18a.ld
new file mode 100644
index 0000000000..218f7deedc
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21/TARGET_SAMD21G18A/TOOLCHAIN_GCC_ARM/samd21g18a.ld
@@ -0,0 +1,126 @@
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+ rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000
+ ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
+
+/* Section Definitions */
+SECTIONS
+{
+ .text :
+ {
+ . = ALIGN(4);
+ _sfixed = .;
+ KEEP(*(.vectors .vectors.*))
+ *(.text .text.* .gnu.linkonce.t.*)
+ *(.glue_7t) *(.glue_7)
+ *(.rodata .rodata* .gnu.linkonce.r.*)
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+ /* Support C constructors, and C destructors in both user code
+ and the C library. This also provides support for C++ code. */
+ . = ALIGN(4);
+ KEEP(*(.init))
+ . = ALIGN(4);
+ __preinit_array_start = .;
+ KEEP (*(.preinit_array))
+ __preinit_array_end = .;
+
+ . = ALIGN(4);
+ __init_array_start = .;
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array))
+ __init_array_end = .;
+
+ . = ALIGN(4);
+ KEEP (*crtbegin.o(.ctors))
+ KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*crtend.o(.ctors))
+
+ . = ALIGN(4);
+ KEEP(*(.fini))
+
+ . = ALIGN(4);
+ __fini_array_start = .;
+ KEEP (*(.fini_array))
+ KEEP (*(SORT(.fini_array.*)))
+ __fini_array_end = .;
+
+ KEEP (*crtbegin.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*crtend.o(.dtors))
+
+ . = ALIGN(4);
+ _efixed = .; /* End of text section */
+ } > rom
+
+ /* .ARM.exidx is sorted, so has to go in its own output section. */
+ PROVIDE_HIDDEN (__exidx_start = .);
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } > rom
+ PROVIDE_HIDDEN (__exidx_end = .);
+
+ . = ALIGN(4);
+ _etext = .;
+
+ .dvectors (NOLOAD) :
+ {
+ _sdvectors = .;
+ . = . + 0xB0;
+ _edvectors = .;
+ } > ram
+
+ .relocate : AT (_etext)
+ {
+ . = ALIGN(4);
+ _srelocate = .;
+ *(.ramfunc .ramfunc.*);
+ *(.data .data.*);
+ . = ALIGN(4);
+ _erelocate = .;
+ } > ram
+
+ /* .bss section which is used for uninitialized data */
+ .bss (NOLOAD) :
+ {
+ . = ALIGN(4);
+ _sbss = . ;
+ _szero = .;
+ *(.bss .bss.*)
+ *(COMMON)
+ . = ALIGN(4);
+ _ebss = . ;
+ _ezero = .;
+ } > ram
+
+ .heap (NOLOAD) :
+ {
+ . = ALIGN(4);
+ __end__ = . ;
+ . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE;
+ } > ram
+
+ /* stack section */
+ .stack (NOLOAD):
+ {
+ . = ALIGN(8);
+ _sstack = .;
+ . = . + STACK_SIZE;
+ . = ALIGN(8);
+ _estack = .;
+ } > ram
+
+ . = ALIGN(4);
+}
diff --git a/libraries/mbed/targets/cmsis/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21/TARGET_SAMD21G18A/TOOLCHAIN_GCC_ARM/startup_samd21.c b/libraries/mbed/targets/cmsis/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21/TARGET_SAMD21G18A/TOOLCHAIN_GCC_ARM/startup_samd21.c
new file mode 100644
index 0000000000..cb64012fe8
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21/TARGET_SAMD21G18A/TOOLCHAIN_GCC_ARM/startup_samd21.c
@@ -0,0 +1,158 @@
+#include "samd21.h"
+
+/* Initialize segments */
+extern uint32_t _sfixed;
+extern uint32_t _efixed;
+extern uint32_t _etext;
+extern uint32_t _srelocate;
+extern uint32_t _erelocate;
+extern uint32_t _szero;
+extern uint32_t _ezero;
+extern uint32_t _sstack;
+extern uint32_t _estack;
+
+/** \cond DOXYGEN_SHOULD_SKIP_THIS */
+int main(void);
+/** \endcond */
+
+void __libc_init_array(void);
+
+/* Default empty handler */
+void Dummy_Handler(void);
+
+/* Cortex-M0+ core handlers */
+void NMI_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void HardFault_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SVC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void PendSV_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SysTick_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+
+/* Peripherals handlers */
+void PM_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SYSCTRL_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void WDT_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void RTC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void EIC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void NVMCTRL_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void DMAC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void USB_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void EVSYS_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SERCOM0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SERCOM1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SERCOM2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SERCOM3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SERCOM4_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SERCOM5_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TCC0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TCC1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TCC2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TC3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TC4_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TC5_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TC6_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TC7_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void ADC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void AC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void DAC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void PTC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void I2S_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+
+/* Exception Table */
+__attribute__ ((section(".vectors")))
+const DeviceVectors exception_table = {
+
+ /* Configure Initial Stack Pointer, using linker-generated symbols */
+ (void*) (&_estack),
+
+ (void*) Reset_Handler,
+ (void*) NMI_Handler,
+ (void*) HardFault_Handler,
+ (void*) (0UL), /* Reserved */
+ (void*) (0UL), /* Reserved */
+ (void*) (0UL), /* Reserved */
+ (void*) (0UL), /* Reserved */
+ (void*) (0UL), /* Reserved */
+ (void*) (0UL), /* Reserved */
+ (void*) (0UL), /* Reserved */
+ (void*) SVC_Handler,
+ (void*) (0UL), /* Reserved */
+ (void*) (0UL), /* Reserved */
+ (void*) PendSV_Handler,
+ (void*) SysTick_Handler,
+
+ /* Configurable interrupts */
+ (void*) PM_Handler, /* 0 Power Manager */
+ (void*) SYSCTRL_Handler, /* 1 System Control */
+ (void*) WDT_Handler, /* 2 Watchdog Timer */
+ (void*) RTC_Handler, /* 3 Real-Time Counter */
+ (void*) EIC_Handler, /* 4 External Interrupt Controller */
+ (void*) NVMCTRL_Handler, /* 5 Non-Volatile Memory Controller */
+ (void*) DMAC_Handler, /* 6 Direct Memory Access Controller */
+ (void*) USB_Handler, /* 7 Universal Serial Bus */
+ (void*) EVSYS_Handler, /* 8 Event System Interface */
+ (void*) SERCOM0_Handler, /* 9 Serial Communication Interface 0 */
+ (void*) SERCOM1_Handler, /* 10 Serial Communication Interface 1 */
+ (void*) SERCOM2_Handler, /* 11 Serial Communication Interface 2 */
+ (void*) SERCOM3_Handler, /* 12 Serial Communication Interface 3 */
+ (void*) SERCOM4_Handler, /* 13 Serial Communication Interface 4 */
+ (void*) SERCOM5_Handler, /* 14 Serial Communication Interface 5 */
+ (void*) TCC0_Handler, /* 15 Timer Counter Control 0 */
+ (void*) TCC1_Handler, /* 16 Timer Counter Control 1 */
+ (void*) TCC2_Handler, /* 17 Timer Counter Control 2 */
+ (void*) TC3_Handler, /* 18 Basic Timer Counter 0 */
+ (void*) TC4_Handler, /* 19 Basic Timer Counter 1 */
+ (void*) TC5_Handler, /* 20 Basic Timer Counter 2 */
+ (void*) TC6_Handler, /* 21 Basic Timer Counter 3 */
+ (void*) TC7_Handler, /* 22 Basic Timer Counter 4 */
+ (void*) ADC_Handler, /* 23 Analog Digital Converter */
+ (void*) AC_Handler, /* 24 Analog Comparators */
+ (void*) DAC_Handler, /* 25 Digital Analog Converter */
+ (void*) PTC_Handler, /* 26 Peripheral Touch Controller */
+ (void*) I2S_Handler /* 27 Inter-IC Sound Interface */
+};
+
+/**
+ * \brief This is the code that gets called on processor reset.
+ * To initialize the device, and call the main() routine.
+ */
+void Reset_Handler(void)
+{
+ uint32_t *pSrc, *pDest;
+
+ /* Initialize the relocate segment */
+ pSrc = &_etext;
+ pDest = &_srelocate;
+
+ if (pSrc != pDest) {
+ for (; pDest < &_erelocate;) {
+ *pDest++ = *pSrc++;
+ }
+ }
+
+ /* Clear the zero segment */
+ for (pDest = &_szero; pDest < &_ezero;) {
+ *pDest++ = 0;
+ }
+
+ /* Set the vector table base address */
+ pSrc = (uint32_t *) & _sfixed;
+ SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);
+
+ /* Initialize the C library */
+ __libc_init_array();
+
+ /* Branch to main function */ // expected to be done by MBED OS
+ main();
+
+ /* Infinite loop */
+ while (1);
+}
+
+/**
+ * \brief Default interrupt handler for unused IRQs.
+ */
+void Dummy_Handler(void)
+{
+ while (1) {
+ }
+}
diff --git a/libraries/mbed/targets/cmsis/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21/TARGET_SAMD21G18A/TOOLCHAIN_IAR/startup_samd21.c b/libraries/mbed/targets/cmsis/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21/TARGET_SAMD21G18A/TOOLCHAIN_IAR/startup_samd21.c
new file mode 100644
index 0000000000..9476ec86ed
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21/TARGET_SAMD21G18A/TOOLCHAIN_IAR/startup_samd21.c
@@ -0,0 +1,173 @@
+#include "samd21.h"
+
+void __iar_program_start(void);
+int __low_level_init(void);
+
+void Dummy_Handler(void);
+void Reset_Handler(void);
+
+/**
+ * \brief Default interrupt handler for unused IRQs.
+ */
+void Dummy_Handler(void)
+{
+ while (1) {
+ }
+}
+
+/* Cortex-M0+ core handlers */
+void NMI_Handler ( void );
+void HardFault_Handler ( void );
+void SVC_Handler ( void );
+void PendSV_Handler ( void );
+void SysTick_Handler ( void );
+
+/* Peripherals handlers */
+void PM_Handler ( void );
+void SYSCTRL_Handler ( void );
+void WDT_Handler ( void );
+void RTC_Handler ( void );
+void EIC_Handler ( void );
+void NVMCTRL_Handler ( void );
+void DMAC_Handler ( void );
+void USB_Handler ( void );
+void EVSYS_Handler ( void );
+void SERCOM0_Handler ( void );
+void SERCOM1_Handler ( void );
+void SERCOM2_Handler ( void );
+void SERCOM3_Handler ( void );
+void SERCOM4_Handler ( void );
+void SERCOM5_Handler ( void );
+void TCC0_Handler ( void );
+void TCC1_Handler ( void );
+void TCC2_Handler ( void );
+void TC3_Handler ( void );
+void TC4_Handler ( void );
+void TC5_Handler ( void );
+void TC6_Handler ( void );
+void TC7_Handler ( void );
+void ADC_Handler ( void );
+void AC_Handler ( void );
+void DAC_Handler ( void );
+void PTC_Handler ( void );
+void I2S_Handler ( void );
+
+/* Cortex-M0+ core handlers */
+#pragma weak NMI_Handler = Dummy_Handler
+#pragma weak HardFault_Handler = Dummy_Handler
+#pragma weak SVC_Handler = Dummy_Handler
+#pragma weak PendSV_Handler = Dummy_Handler
+#pragma weak SysTick_Handler = Dummy_Handler
+
+/* Peripherals handlers */
+#pragma weak PM_Handler = Dummy_Handler
+#pragma weak SYSCTRL_Handler = Dummy_Handler
+#pragma weak WDT_Handler = Dummy_Handler
+#pragma weak RTC_Handler = Dummy_Handler
+#pragma weak EIC_Handler = Dummy_Handler
+#pragma weak NVMCTRL_Handler = Dummy_Handler
+#pragma weak DMAC_Handler = Dummy_Handler
+#pragma weak USB_Handler = Dummy_Handler
+#pragma weak EVSYS_Handler = Dummy_Handler
+#pragma weak SERCOM0_Handler = Dummy_Handler
+#pragma weak SERCOM1_Handler = Dummy_Handler
+#pragma weak SERCOM2_Handler = Dummy_Handler
+#pragma weak SERCOM3_Handler = Dummy_Handler
+#pragma weak SERCOM4_Handler = Dummy_Handler
+#pragma weak SERCOM5_Handler = Dummy_Handler
+#pragma weak TCC0_Handler = Dummy_Handler
+#pragma weak TCC1_Handler = Dummy_Handler
+#pragma weak TCC2_Handler = Dummy_Handler
+#pragma weak TC3_Handler = Dummy_Handler
+#pragma weak TC4_Handler = Dummy_Handler
+#pragma weak TC5_Handler = Dummy_Handler
+#pragma weak TC6_Handler = Dummy_Handler
+#pragma weak TC7_Handler = Dummy_Handler
+#pragma weak ADC_Handler = Dummy_Handler
+#pragma weak AC_Handler = Dummy_Handler
+#pragma weak DAC_Handler = Dummy_Handler
+#pragma weak PTC_Handler = Dummy_Handler
+#pragma weak I2S_Handler = Dummy_Handler
+
+/* Exception Table */
+#pragma language=extended
+#pragma segment="CSTACK"
+
+/* The name "__vector_table" has special meaning for C-SPY: */
+/* it is where the SP start value is found, and the NVIC vector */
+/* table register (VTOR) is initialized to this address if != 0 */
+
+#pragma section = ".intvec"
+#pragma location = ".intvec"
+//! [startup_vector_table]
+const DeviceVectors __vector_table[] = {
+ __sfe("CSTACK"),
+ (void*) __iar_program_start,
+ (void*) NMI_Handler,
+ (void*) HardFault_Handler,
+ (void*) (0UL), /* Reserved */
+ (void*) (0UL), /* Reserved */
+ (void*) (0UL), /* Reserved */
+ (void*) (0UL), /* Reserved */
+ (void*) (0UL), /* Reserved */
+ (void*) (0UL), /* Reserved */
+ (void*) (0UL), /* Reserved */
+ (void*) SVC_Handler,
+ (void*) (0UL), /* Reserved */
+ (void*) (0UL), /* Reserved */
+ (void*) PendSV_Handler,
+ (void*) SysTick_Handler,
+
+ /* Configurable interrupts */
+ (void*) PM_Handler, /* 0 Power Manager */
+ (void*) SYSCTRL_Handler, /* 1 System Control */
+ (void*) WDT_Handler, /* 2 Watchdog Timer */
+ (void*) RTC_Handler, /* 3 Real-Time Counter */
+ (void*) EIC_Handler, /* 4 External Interrupt Controller */
+ (void*) NVMCTRL_Handler, /* 5 Non-Volatile Memory Controller */
+ (void*) DMAC_Handler, /* 6 Direct Memory Access Controller */
+ (void*) USB_Handler, /* 7 Universal Serial Bus */
+ (void*) EVSYS_Handler, /* 8 Event System Interface */
+ (void*) SERCOM0_Handler, /* 9 Serial Communication Interface 0 */
+ (void*) SERCOM1_Handler, /* 10 Serial Communication Interface 1 */
+ (void*) SERCOM2_Handler, /* 11 Serial Communication Interface 2 */
+ (void*) SERCOM3_Handler, /* 12 Serial Communication Interface 3 */
+ (void*) SERCOM4_Handler, /* 13 Serial Communication Interface 4 */
+ (void*) SERCOM5_Handler, /* 14 Serial Communication Interface 5 */
+ (void*) TCC0_Handler, /* 15 Timer Counter Control 0 */
+ (void*) TCC1_Handler, /* 16 Timer Counter Control 1 */
+ (void*) TCC2_Handler, /* 17 Timer Counter Control 2 */
+ (void*) TC3_Handler, /* 18 Basic Timer Counter 0 */
+ (void*) TC4_Handler, /* 19 Basic Timer Counter 1 */
+ (void*) TC5_Handler, /* 20 Basic Timer Counter 2 */
+ (void*) TC6_Handler, /* 21 Basic Timer Counter 3 */
+ (void*) TC7_Handler, /* 22 Basic Timer Counter 4 */
+ (void*) ADC_Handler, /* 23 Analog Digital Converter */
+ (void*) AC_Handler, /* 24 Analog Comparators */
+ (void*) DAC_Handler, /* 25 Digital Analog Converter */
+ (void*) PTC_Handler, /* 26 Peripheral Touch Controller */
+ (void*) I2S_Handler /* 27 Inter-IC Sound Interface */
+};
+//! [startup_vector_table]
+
+/**------------------------------------------------------------------------------
+ * This is the code that gets called on processor reset. To initialize the
+ * device.
+ *------------------------------------------------------------------------------*/
+int __low_level_init(void)
+{
+ uint32_t *pSrc = __section_begin(".intvec");
+
+ SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);
+
+ return 1; /* if return 0, the data sections will not be initialized */
+}
+
+/**------------------------------------------------------------------------------
+ * This is the code that gets called on processor reset. To initialize the
+ * device.
+ *------------------------------------------------------------------------------*/
+void Reset_Handler(void)
+{
+ __iar_program_start();
+}
diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/system_MK20DX256.c b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/system_MK20DX256.c
index 4f34cc76c1..9b851b44df 100644
--- a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/system_MK20DX256.c
+++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/system_MK20DX256.c
@@ -42,22 +42,20 @@
#define DISABLE_WDOG 1
-#define CLOCK_SETUP 3
+#define CLOCK_SETUP 1
/* Predefined clock setups
0 ... Multipurpose Clock Generator (MCG) in FLL Engaged Internal (FEI) mode
Reference clock source for MCG module is the slow internal clock source 32.768kHz
Core clock = 41.94MHz, BusClock = 41.94MHz
- This works on Teensy3.1
+ Works on Teensy3.1 but no USB support
1 ... Multipurpose Clock Generator (MCG) in PLL Engaged External (PEE) mode
- Reference clock source for MCG module is an external crystal 8MHz
- Core clock = 48MHz, BusClock = 48MHz
- 2 ... Multipurpose Clock Generator (MCG) in Bypassed Low Power External (BLPE) mode
- Core clock/Bus clock derived directly from an external crystal 8MHz with no multiplication
- Core clock = 8MHz, BusClock = 8MHz
- 3 ... Multipurpose Clock Generator (MCG) in PLL Engaged External (PEE) mode
Reference clock source for MCG module is an external crystal 16MHz
- Core clock = 72MHz, BusClock = 48MHz
- This is the default Teensy3.1 72Mhz set up
+ Core clock = 96MHz, BusClock = 48MHz
+ Default high speed Teensy3.1 96Mhz set up
+ 2 ... Multipurpose Clock Generator (MCG) in PLL Engaged External (PEE) mode
+ Reference clock source for MCG module is an external crystal 16MHz
+ Core clock = 72MHz, BusClock = 36MHz
+ Alternative standard 'slower' Teensy3.1 72Mhz set up
*/
/*----------------------------------------------------------------------------
@@ -70,23 +68,17 @@
#define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
#define DEFAULT_SYSTEM_CLOCK 41943040u /* Default System clock value */
#elif (CLOCK_SETUP == 1)
- #define CPU_XTAL_CLK_HZ 8000000u /* Value of the external crystal or oscillator clock frequency in Hz */
- #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
- #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
- #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
- #define DEFAULT_SYSTEM_CLOCK 48000000u /* Default System clock value */
-#elif (CLOCK_SETUP == 2)
- #define CPU_XTAL_CLK_HZ 8000000u /* Value of the external crystal or oscillator clock frequency in Hz */
- #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
- #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
- #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
- #define DEFAULT_SYSTEM_CLOCK 8000000u /* Default System clock value */
-#elif (CLOCK_SETUP == 3)
#define CPU_XTAL_CLK_HZ 16000000u /* Value of the external crystal or oscillator clock frequency in Hz */
#define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
#define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
#define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
- #define DEFAULT_SYSTEM_CLOCK 72000000u /* Default System clock value */
+ #define DEFAULT_SYSTEM_CLOCK 96000000u /* Default System clock value */
+#elif (CLOCK_SETUP == 2)
+ #define CPU_XTAL_CLK_HZ 16000000u /* Value of the external crystal or oscillator clock frequency in Hz */
+ #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
+ #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
+ #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
+ #define DEFAULT_SYSTEM_CLOCK 72000000u /* Default System clock value */
#endif /* (CLOCK_SETUP == 2) */
@@ -130,65 +122,44 @@ void SystemInit (void) {
while((MCG->S & 0x0Cu) != 0x00u) { } /* Wait until output of the FLL is selected */
#elif (CLOCK_SETUP == 1)
- /* SIM->CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV4=1 Set Prescalers 48MHz cpu, 48MHz system, 24MHz flash*/
- SIM->CLKDIV1 = SIM_CLKDIV1_OUTDIV4(1);
+ /* SIM->CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV4=3 Set Prescalers 96MHz cpu, 48MHz bus, 24MHz flash*/
+ SIM->CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1) | SIM_CLKDIV1_OUTDIV4(3);
+ /* SIM->CLKDIV2: USBDIV=2, Divide 96MHz system clock for USB 48MHz */
+ SIM->CLKDIV2 = SIM_CLKDIV2_USBDIV(1);
+ /* OSC0->CR: ERCLKEN=0,EREFSTEN=0,SC2P=1,SC4P=0,SC8P=1,SC16P=0 10pF loading capacitors for 16MHz system oscillator*/
+ OSC0->CR = OSC_CR_SC8P_MASK | OSC_CR_SC2P_MASK;
/* Switch to FBE Mode */
- /* OSC0->CR: ERCLKEN=0,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
- OSC0->CR = (uint8_t)0x00u;
/* MCG->C7: OSCSEL=0 */
MCG->C7 = (uint8_t)0x00u;
/* MCG->C2: LOCKRE0=0,RANGE0=2,HGO=0,EREFS=1,LP=0,IRCS=0 */
- MCG->C2 = MCG_C2_RANGE0(2);
+ MCG->C2 = MCG_C2_RANGE0(2) | MCG_C2_EREFS0_MASK;
+ //MCG->C2 = (uint8_t)0x24u;
/* MCG->C1: CLKS=2,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
MCG->C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(3) | MCG_C1_IRCLKEN_MASK;
- /* MCG->C4: DMX32=0,DRST_DRS=0 */
- MCG->C4 &= (uint8_t)~(uint8_t)0xE0u;
- /* MCG->C5: PLLCLKEN=0,PLLSTEN=0,PRDIV0=3 */
- MCG->C5 = MCG_C5_PRDIV0(3);
+ /* MCG->C4: DMX32=0,DRST_DRS=0,FCTRIM=0,SCFTRIM=0 */
+ MCG->C4 &= (uint8_t)~(uint8_t)0xE0u;
+ /* MCG->C5: PLLCLKEN=0,PLLSTEN=0,PRDIV0=7 */
+ MCG->C5 = MCG_C5_PRDIV0(7);
/* MCG->C6: LOLIE=0,PLLS=0,CME=0,VDIV0=0 */
MCG->C6 = (uint8_t)0x00u;
while((MCG->S & MCG_S_OSCINIT0_MASK) == 0u) { } /* Check that the oscillator is running */
while((MCG->S & 0x0Cu) != 0x08u) { } /* Wait until external reference clock is selected as MCG output */
/* Switch to PBE Mode */
- /* MCG_C5: PLLCLKEN=0,PLLSTEN=0,PRDIV0=3 */
- MCG->C5 = MCG_C5_PRDIV0(3);
- /* MCG->C6: LOLIE=0,PLLS=1,CME=0,VDIV0=0 */
- MCG->C6 = MCG_C6_PLLS_MASK;
+ /* MCG_C5: PLLCLKEN=0,PLLSTEN=0,PRDIV0=5 */
+ MCG->C5 = MCG_C5_PRDIV0(3); // config PLL input for 16 MHz Crystal / 4 = 4 MHz
+ /* MCG->C6: LOLIE=0,PLLS=1,CME=0,VDIV0=3 */
+ MCG->C6 = MCG_C6_PLLS_MASK | MCG_C6_VDIV0(0);// config PLL for 96 MHz output
while((MCG->S & MCG_S_PLLST_MASK) == 0u) { } /* Wait until the source of the PLLS clock has switched to the PLL */
while((MCG->S & MCG_S_LOCK0_MASK) == 0u) { } /* Wait until locked */
/* Switch to PEE Mode */
- /* MCG->C1: CLKS=0,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
- MCG->C1 = MCG_C1_FRDIV(3) | MCG_C1_IRCLKEN_MASK;
+ /* MCG->C1: CLKS=0,FRDIV=2,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
+ MCG->C1 = MCG_C1_FRDIV(2) | MCG_C1_IRCLKEN_MASK;
while((MCG->S & 0x0Cu) != 0x0Cu) { } /* Wait until output of the PLL is selected */
- while((MCG->S & MCG_S_LOCK0_MASK) == 0u) { } /* Wait until locked */
+ while((MCG->S & MCG_S_LOCK0_MASK) == 0u) { } /* Wait until locked */
#elif (CLOCK_SETUP == 2)
- /* SIM->CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV4=1 Set Prescalers 8MHz cpu, 8MHz system, 8MHz flash*/
- SIM->CLKDIV1 = SIM_CLKDIV1_OUTDIV4(1);
- /* Switch to FBE Mode */
- /* OSC0->CR: ERCLKEN=0,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
- OSC0->CR = (uint8_t)0x00u;
- /* MCG->C7: OSCSEL=0 */
- MCG->C7 = (uint8_t)0x00u;
- /* MCG->C2: LOCKRE0=0,RANGE0=2,HGO=0,EREFS=1,LP=0,IRCS=0 */
- MCG->C2 = MCG_C2_RANGE0(2) | MCG_C2_EREFS0_MASK;
- /* MCG->C1: CLKS=2,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
- MCG->C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(3) | MCG_C1_IRCLKEN_MASK;
- /* MCG->C4: DMX32=0,DRST_DRS=0 */
- MCG->C4 &= (uint8_t)~(uint8_t)0xE0u;
- /* MCG->C5: PLLCLKEN=0,PLLSTEN=0,PRDIV0=0 */
- MCG->C5 = (uint8_t)0x00u;
- /* MCG->C6: LOLIE=0,PLLS=0,CME=0,VDIV0=0 */
- MCG->C6 = (uint8_t)0x00u;
- while((MCG->S & MCG_S_OSCINIT0_MASK) == 0u) { } /* Check that the oscillator is running */
- while((MCG->S & 0x0CU) != 0x08u) { } /* Wait until external reference clock is selected as MCG output */
- /* Switch to BLPE Mode */
- /* MCG->C2: LOCKRE0=0,RANGE0=2,HGO=0,EREFS=1,LP=0,IRCS=0 */
- MCG->C2 = MCG_C2_RANGE0(2) | MCG_C2_EREFS0_MASK;
-
-#elif (CLOCK_SETUP == 3)
- /* SIM->CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV4=1 Set Prescalers 72MHz cpu, 72MHz system, 36MHz flash*/
- SIM->CLKDIV1 = SIM_CLKDIV1_OUTDIV4(1);
+ /* SIM->CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV4=1 Set Prescalers 72MHz cpu, 36MHz bus, 24MHz flash*/
+ SIM->CLKDIV1 = SIM_CLKDIV1_OUTDIV2(1) | SIM_CLKDIV1_OUTDIV4(2);
/* SIM->CLKDIV2: USBDIV=2,USBFRAC=1 Divide 72MHz system clock for USB 48MHz */
SIM->CLKDIV2 = SIM_CLKDIV2_USBDIV(2) | SIM_CLKDIV2_USBFRAC_MASK;
/* OSC0->CR: ERCLKEN=0,EREFSTEN=0,SC2P=1,SC4P=0,SC8P=1,SC16P=0 10pF loading capacitors for 16MHz system oscillator*/
@@ -220,7 +191,7 @@ void SystemInit (void) {
/* MCG->C1: CLKS=0,FRDIV=2,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
MCG->C1 = MCG_C1_FRDIV(2) | MCG_C1_IRCLKEN_MASK;
while((MCG->S & 0x0Cu) != 0x0Cu) { } /* Wait until output of the PLL is selected */
- while((MCG->S & MCG_S_LOCK0_MASK) == 0u) { } /* Wait until locked */
+ while((MCG->S & MCG_S_LOCK0_MASK) == 0u) { } /* Wait until locked */
#endif /* (CLOCK_SETUP) */
}
@@ -306,4 +277,4 @@ void SystemCoreClockUpdate (void) {
return;
} /* (!((MCG->C1 & MCG_C1_CLKS_MASK) == 0x80u)) */
SystemCoreClock = (MCGOUTClock / (1u + ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT)));
-}
+}
\ No newline at end of file
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/Release_Notes_stm32f3xx_hal.html b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/Release_Notes_stm32f3xx_hal.html
index df3a64d7bd..0f40903ade 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/Release_Notes_stm32f3xx_hal.html
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/Release_Notes_stm32f3xx_hal.html
@@ -664,7 +664,7 @@ ul
Release
Notes for STM32F3xx HAL Drivers
Copyright
-2015 STMicroelectronics
+2014 STMicroelectronics
@@ -676,13 +676,7 @@ Notes for STM32F3xx HAL Drivers
Update History
-V1.1.1
-/ 19-June-2015 Main
-Changes
-
-
-
-Fixed compilation warnings reported by TrueSTUDIO and SW4STM32 toolchains. V1.1.0
+V1.1.0
/ 12-Sept-2014 Main
Changes
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_ARM_MICRO/startup_stm32f303x8.S b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_ARM_MICRO/startup_stm32f303x8.S
deleted file mode 100644
index 53ac9e71bc..0000000000
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_ARM_MICRO/startup_stm32f303x8.S
+++ /dev/null
@@ -1,342 +0,0 @@
-;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
-;* File Name : startup_stm32f303x8.s
-;* Author : MCD Application Team
-;* Version : V2.1.0
-;* Date : 12-Sept-2014
-;* Description : STM32F303x6/x8 devices vector table for MDK-ARM toolchain.
-;* This module performs:
-;* - Set the initial SP
-;* - Set the initial PC == Reset_Handler
-;* - Set the vector table entries with the exceptions ISR address
-;* - Branches to __main in the C library (which eventually
-;* calls main()).
-;* After Reset the CortexM4 processor is in Thread mode,
-;* priority is Privileged, and the Stack is set to Main.
-;* <<< Use Configuration Wizard in Context Menu >>>
-;*******************************************************************************
-;
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;* 1. Redistributions of source code must retain the above copyright notice,
-;* this list of conditions and the following disclaimer.
-;* 2. Redistributions in binary form must reproduce the above copyright notice,
-;* this list of conditions and the following disclaimer in the documentation
-;* and/or other materials provided with the distribution.
-;* 3. Neither the name of STMicroelectronics nor the names of its contributors
-;* may be used to endorse or promote products derived from this software
-;* without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;
-;*******************************************************************************
-
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-; Stack Configuration
-; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;
-
-Stack_Size EQU 0x00000400
-
- AREA STACK, NOINIT, READWRITE, ALIGN=3
- EXPORT __initial_sp
-
-Stack_Mem SPACE Stack_Size
-__initial_sp EQU 0x20003000 ; Top of RAM
-
-
-; Heap Configuration
-; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;
-
-Heap_Size EQU 0x00000200
-
- AREA HEAP, NOINIT, READWRITE, ALIGN=3
- EXPORT __heap_base
- EXPORT __heap_limit
-
-__heap_base
-Heap_Mem SPACE Heap_Size
-__heap_limit EQU (__initial_sp - Stack_Size)
-
- PRESERVE8
- THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
- AREA RESET, DATA, READONLY
- EXPORT __Vectors
- EXPORT __Vectors_End
- EXPORT __Vectors_Size
-
-__Vectors DCD __initial_sp ; Top of Stack
- DCD Reset_Handler ; Reset Handler
- DCD NMI_Handler ; NMI Handler
- DCD HardFault_Handler ; Hard Fault Handler
- DCD MemManage_Handler ; MPU Fault Handler
- DCD BusFault_Handler ; Bus Fault Handler
- DCD UsageFault_Handler ; Usage Fault Handler
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD SVC_Handler ; SVCall Handler
- DCD DebugMon_Handler ; Debug Monitor Handler
- DCD 0 ; Reserved
- DCD PendSV_Handler ; PendSV Handler
- DCD SysTick_Handler ; SysTick Handler
-
- ; External Interrupts
- DCD WWDG_IRQHandler ; Window WatchDog
- DCD PVD_IRQHandler ; PVD through EXTI Line detection
- DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
- DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
- DCD FLASH_IRQHandler ; FLASH
- DCD RCC_IRQHandler ; RCC
- DCD EXTI0_IRQHandler ; EXTI Line0
- DCD EXTI1_IRQHandler ; EXTI Line1
- DCD EXTI2_TSC_IRQHandler ; EXTI Line2 and Touch Sense controller
- DCD EXTI3_IRQHandler ; EXTI Line3
- DCD EXTI4_IRQHandler ; EXTI Line4
- DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
- DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
- DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
- DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
- DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
- DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
- DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
- DCD ADC1_2_IRQHandler ; ADC1 and ADC2
- DCD CAN_TX_IRQHandler ; CAN TX
- DCD CAN_RX0_IRQHandler ; CAN RX0
- DCD CAN_RX1_IRQHandler ; CAN RX1
- DCD CAN_SCE_IRQHandler ; CAN SCE
- DCD EXTI9_5_IRQHandler ; External Line[9:5]s
- DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
- DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
- DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17
- DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
- DCD TIM2_IRQHandler ; TIM2
- DCD TIM3_IRQHandler ; TIM3
- DCD 0 ; Reserved
- DCD I2C1_EV_IRQHandler ; I2C1 Event and EXTI Line 23
- DCD I2C1_ER_IRQHandler ; I2C1 Error
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD SPI1_IRQHandler ; SPI1
- DCD 0 ; Reserved
- DCD USART1_IRQHandler ; USART1 and EXTI Line 25
- DCD USART2_IRQHandler ; USART2 and EXTI Line 26
- DCD USART3_IRQHandler ; USART3 and EXTI Line 28
- DCD EXTI15_10_IRQHandler ; External Line[15:10]s
- DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD TIM6_DAC1_IRQHandler ; TIM6 and DAC1 underrun errors
- DCD TIM7_DAC2_IRQHandler ; TIM7 and DAC2 underrun errors
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD COMP2_IRQHandler ; COMP2
- DCD COMP4_6_IRQHandler ; COMP4 and COMP6
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD FPU_IRQHandler ; FPU
-
-__Vectors_End
-
-__Vectors_Size EQU __Vectors_End - __Vectors
-
- AREA |.text|, CODE, READONLY
-
-; Reset handler
-Reset_Handler PROC
- EXPORT Reset_Handler [WEAK]
- IMPORT SystemInit
- IMPORT __main
-
- LDR R0, =SystemInit
- BLX R0
- LDR R0, =__main
- BX R0
- ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler PROC
- EXPORT NMI_Handler [WEAK]
- B .
- ENDP
-HardFault_Handler\
- PROC
- EXPORT HardFault_Handler [WEAK]
- B .
- ENDP
-MemManage_Handler\
- PROC
- EXPORT MemManage_Handler [WEAK]
- B .
- ENDP
-BusFault_Handler\
- PROC
- EXPORT BusFault_Handler [WEAK]
- B .
- ENDP
-UsageFault_Handler\
- PROC
- EXPORT UsageFault_Handler [WEAK]
- B .
- ENDP
-SVC_Handler PROC
- EXPORT SVC_Handler [WEAK]
- B .
- ENDP
-DebugMon_Handler\
- PROC
- EXPORT DebugMon_Handler [WEAK]
- B .
- ENDP
-PendSV_Handler PROC
- EXPORT PendSV_Handler [WEAK]
- B .
- ENDP
-SysTick_Handler PROC
- EXPORT SysTick_Handler [WEAK]
- B .
- ENDP
-
-Default_Handler PROC
-
- EXPORT WWDG_IRQHandler [WEAK]
- EXPORT PVD_IRQHandler [WEAK]
- EXPORT TAMP_STAMP_IRQHandler [WEAK]
- EXPORT RTC_WKUP_IRQHandler [WEAK]
- EXPORT FLASH_IRQHandler [WEAK]
- EXPORT RCC_IRQHandler [WEAK]
- EXPORT EXTI0_IRQHandler [WEAK]
- EXPORT EXTI1_IRQHandler [WEAK]
- EXPORT EXTI2_TSC_IRQHandler [WEAK]
- EXPORT EXTI3_IRQHandler [WEAK]
- EXPORT EXTI4_IRQHandler [WEAK]
- EXPORT DMA1_Channel1_IRQHandler [WEAK]
- EXPORT DMA1_Channel2_IRQHandler [WEAK]
- EXPORT DMA1_Channel3_IRQHandler [WEAK]
- EXPORT DMA1_Channel4_IRQHandler [WEAK]
- EXPORT DMA1_Channel5_IRQHandler [WEAK]
- EXPORT DMA1_Channel6_IRQHandler [WEAK]
- EXPORT DMA1_Channel7_IRQHandler [WEAK]
- EXPORT ADC1_2_IRQHandler [WEAK]
- EXPORT CAN_TX_IRQHandler [WEAK]
- EXPORT CAN_RX0_IRQHandler [WEAK]
- EXPORT CAN_RX1_IRQHandler [WEAK]
- EXPORT CAN_SCE_IRQHandler [WEAK]
- EXPORT EXTI9_5_IRQHandler [WEAK]
- EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
- EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
- EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
- EXPORT TIM1_CC_IRQHandler [WEAK]
- EXPORT TIM2_IRQHandler [WEAK]
- EXPORT TIM3_IRQHandler [WEAK]
- EXPORT I2C1_EV_IRQHandler [WEAK]
- EXPORT I2C1_ER_IRQHandler [WEAK]
- EXPORT SPI1_IRQHandler [WEAK]
- EXPORT USART1_IRQHandler [WEAK]
- EXPORT USART2_IRQHandler [WEAK]
- EXPORT USART3_IRQHandler [WEAK]
- EXPORT EXTI15_10_IRQHandler [WEAK]
- EXPORT RTC_Alarm_IRQHandler [WEAK]
- EXPORT TIM6_DAC1_IRQHandler [WEAK]
- EXPORT TIM7_DAC2_IRQHandler [WEAK]
- EXPORT COMP2_IRQHandler [WEAK]
- EXPORT COMP4_6_IRQHandler [WEAK]
- EXPORT FPU_IRQHandler [WEAK]
-
-WWDG_IRQHandler
-PVD_IRQHandler
-TAMP_STAMP_IRQHandler
-RTC_WKUP_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_IRQHandler
-EXTI1_IRQHandler
-EXTI2_TSC_IRQHandler
-EXTI3_IRQHandler
-EXTI4_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_IRQHandler
-DMA1_Channel3_IRQHandler
-DMA1_Channel4_IRQHandler
-DMA1_Channel5_IRQHandler
-DMA1_Channel6_IRQHandler
-DMA1_Channel7_IRQHandler
-ADC1_2_IRQHandler
-CAN_TX_IRQHandler
-CAN_RX0_IRQHandler
-CAN_RX1_IRQHandler
-CAN_SCE_IRQHandler
-EXTI9_5_IRQHandler
-TIM1_BRK_TIM15_IRQHandler
-TIM1_UP_TIM16_IRQHandler
-TIM1_TRG_COM_TIM17_IRQHandler
-TIM1_CC_IRQHandler
-TIM2_IRQHandler
-TIM3_IRQHandler
-I2C1_EV_IRQHandler
-I2C1_ER_IRQHandler
-SPI1_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-USART3_IRQHandler
-EXTI15_10_IRQHandler
-RTC_Alarm_IRQHandler
-TIM6_DAC1_IRQHandler
-TIM7_DAC2_IRQHandler
-COMP2_IRQHandler
-COMP4_6_IRQHandler
-FPU_IRQHandler
-
- B .
-
- ENDP
-
- ALIGN
-
- END
-
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_ARM_MICRO/stm32f303x8.sct b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_ARM_MICRO/stm32f303x8.sct
deleted file mode 100644
index 64a32c381d..0000000000
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_ARM_MICRO/stm32f303x8.sct
+++ /dev/null
@@ -1,45 +0,0 @@
-; Scatter-Loading Description File
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; Copyright (c) 2014, STMicroelectronics
-; All rights reserved.
-;
-; Redistribution and use in source and binary forms, with or without
-; modification, are permitted provided that the following conditions are met:
-;
-; 1. Redistributions of source code must retain the above copyright notice,
-; this list of conditions and the following disclaimer.
-; 2. Redistributions in binary form must reproduce the above copyright notice,
-; this list of conditions and the following disclaimer in the documentation
-; and/or other materials provided with the distribution.
-; 3. Neither the name of STMicroelectronics nor the names of its contributors
-; may be used to endorse or promote products derived from this software
-; without specific prior written permission.
-;
-; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-; STM32F303K8: 64KB FLASH (0x10000) + 12KB SRAM (0x3000)
-LR_IROM1 0x08000000 0x10000 { ; load region size_region
-
- ER_IROM1 0x08000000 0x10000 { ; load address = execution address
- *.o (RESET, +First)
- *(InRoot$$Sections)
- .ANY (+RO)
- }
-
- ; 98 vectors = 392 bytes (0x188) to be reserved in RAM
- RW_IRAM1 (0x20000000+0x188) (0x3000-0x188) { ; RW data
- .ANY (+RW +ZI)
- }
-
-}
-
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_ARM_MICRO/sys.cpp b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_ARM_MICRO/sys.cpp
deleted file mode 100644
index bb665909b9..0000000000
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_ARM_MICRO/sys.cpp
+++ /dev/null
@@ -1,56 +0,0 @@
-/* mbed Microcontroller Library - stackheap
- * Setup a fixed single stack/heap memory model,
- * between the top of the RW/ZI region and the stackpointer
- *******************************************************************************
- * Copyright (c) 2014, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include
-#include
-
-extern char Image$$RW_IRAM1$$ZI$$Limit[];
-
-extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
- uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
- uint32_t sp_limit = __current_sp();
-
- zi_limit = (zi_limit + 7) & ~0x7; // ensure zi_limit is 8-byte aligned
-
- struct __initial_stackheap r;
- r.heap_base = zi_limit;
- r.heap_limit = sp_limit;
- return r;
-}
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_ARM_STD/startup_stm32f303x8.S b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_ARM_STD/startup_stm32f303x8.S
deleted file mode 100644
index b878001b17..0000000000
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_ARM_STD/startup_stm32f303x8.S
+++ /dev/null
@@ -1,315 +0,0 @@
-;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
-;* File Name : startup_stm32f303x8.s
-;* Author : MCD Application Team
-;* Version : V2.1.0
-;* Date : 12-Sept-2014
-;* Description : STM32F303x6/x8 devices vector table for MDK-ARM toolchain.
-;* This module performs:
-;* - Set the initial SP
-;* - Set the initial PC == Reset_Handler
-;* - Set the vector table entries with the exceptions ISR address
-;* - Branches to __main in the C library (which eventually
-;* calls main()).
-;* After Reset the CortexM4 processor is in Thread mode,
-;* priority is Privileged, and the Stack is set to Main.
-;* <<< Use Configuration Wizard in Context Menu >>>
-;*******************************************************************************
-;
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;* 1. Redistributions of source code must retain the above copyright notice,
-;* this list of conditions and the following disclaimer.
-;* 2. Redistributions in binary form must reproduce the above copyright notice,
-;* this list of conditions and the following disclaimer in the documentation
-;* and/or other materials provided with the distribution.
-;* 3. Neither the name of STMicroelectronics nor the names of its contributors
-;* may be used to endorse or promote products derived from this software
-;* without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;
-;*******************************************************************************
-
-__initial_sp EQU 0x20003000 ; Top of RAM
-
- PRESERVE8
- THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
- AREA RESET, DATA, READONLY
- EXPORT __Vectors
- EXPORT __Vectors_End
- EXPORT __Vectors_Size
-
-__Vectors DCD __initial_sp ; Top of Stack
- DCD Reset_Handler ; Reset Handler
- DCD NMI_Handler ; NMI Handler
- DCD HardFault_Handler ; Hard Fault Handler
- DCD MemManage_Handler ; MPU Fault Handler
- DCD BusFault_Handler ; Bus Fault Handler
- DCD UsageFault_Handler ; Usage Fault Handler
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD SVC_Handler ; SVCall Handler
- DCD DebugMon_Handler ; Debug Monitor Handler
- DCD 0 ; Reserved
- DCD PendSV_Handler ; PendSV Handler
- DCD SysTick_Handler ; SysTick Handler
-
- ; External Interrupts
- DCD WWDG_IRQHandler ; Window WatchDog
- DCD PVD_IRQHandler ; PVD through EXTI Line detection
- DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
- DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
- DCD FLASH_IRQHandler ; FLASH
- DCD RCC_IRQHandler ; RCC
- DCD EXTI0_IRQHandler ; EXTI Line0
- DCD EXTI1_IRQHandler ; EXTI Line1
- DCD EXTI2_TSC_IRQHandler ; EXTI Line2 and Touch Sense controller
- DCD EXTI3_IRQHandler ; EXTI Line3
- DCD EXTI4_IRQHandler ; EXTI Line4
- DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
- DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
- DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
- DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
- DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
- DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
- DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
- DCD ADC1_2_IRQHandler ; ADC1 and ADC2
- DCD CAN_TX_IRQHandler ; CAN TX
- DCD CAN_RX0_IRQHandler ; CAN RX0
- DCD CAN_RX1_IRQHandler ; CAN RX1
- DCD CAN_SCE_IRQHandler ; CAN SCE
- DCD EXTI9_5_IRQHandler ; External Line[9:5]s
- DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
- DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
- DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17
- DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
- DCD TIM2_IRQHandler ; TIM2
- DCD TIM3_IRQHandler ; TIM3
- DCD 0 ; Reserved
- DCD I2C1_EV_IRQHandler ; I2C1 Event and EXTI Line 23
- DCD I2C1_ER_IRQHandler ; I2C1 Error
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD SPI1_IRQHandler ; SPI1
- DCD 0 ; Reserved
- DCD USART1_IRQHandler ; USART1 and EXTI Line 25
- DCD USART2_IRQHandler ; USART2 and EXTI Line 26
- DCD USART3_IRQHandler ; USART3 and EXTI Line 28
- DCD EXTI15_10_IRQHandler ; External Line[15:10]s
- DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD TIM6_DAC1_IRQHandler ; TIM6 and DAC1 underrun errors
- DCD TIM7_DAC2_IRQHandler ; TIM7 and DAC2 underrun errors
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD COMP2_IRQHandler ; COMP2
- DCD COMP4_6_IRQHandler ; COMP4 and COMP6
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD FPU_IRQHandler ; FPU
-
-__Vectors_End
-
-__Vectors_Size EQU __Vectors_End - __Vectors
-
- AREA |.text|, CODE, READONLY
-
-; Reset handler
-Reset_Handler PROC
- EXPORT Reset_Handler [WEAK]
- IMPORT SystemInit
- IMPORT __main
-
- LDR R0, =SystemInit
- BLX R0
- LDR R0, =__main
- BX R0
- ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler PROC
- EXPORT NMI_Handler [WEAK]
- B .
- ENDP
-HardFault_Handler\
- PROC
- EXPORT HardFault_Handler [WEAK]
- B .
- ENDP
-MemManage_Handler\
- PROC
- EXPORT MemManage_Handler [WEAK]
- B .
- ENDP
-BusFault_Handler\
- PROC
- EXPORT BusFault_Handler [WEAK]
- B .
- ENDP
-UsageFault_Handler\
- PROC
- EXPORT UsageFault_Handler [WEAK]
- B .
- ENDP
-SVC_Handler PROC
- EXPORT SVC_Handler [WEAK]
- B .
- ENDP
-DebugMon_Handler\
- PROC
- EXPORT DebugMon_Handler [WEAK]
- B .
- ENDP
-PendSV_Handler PROC
- EXPORT PendSV_Handler [WEAK]
- B .
- ENDP
-SysTick_Handler PROC
- EXPORT SysTick_Handler [WEAK]
- B .
- ENDP
-
-Default_Handler PROC
-
- EXPORT WWDG_IRQHandler [WEAK]
- EXPORT PVD_IRQHandler [WEAK]
- EXPORT TAMP_STAMP_IRQHandler [WEAK]
- EXPORT RTC_WKUP_IRQHandler [WEAK]
- EXPORT FLASH_IRQHandler [WEAK]
- EXPORT RCC_IRQHandler [WEAK]
- EXPORT EXTI0_IRQHandler [WEAK]
- EXPORT EXTI1_IRQHandler [WEAK]
- EXPORT EXTI2_TSC_IRQHandler [WEAK]
- EXPORT EXTI3_IRQHandler [WEAK]
- EXPORT EXTI4_IRQHandler [WEAK]
- EXPORT DMA1_Channel1_IRQHandler [WEAK]
- EXPORT DMA1_Channel2_IRQHandler [WEAK]
- EXPORT DMA1_Channel3_IRQHandler [WEAK]
- EXPORT DMA1_Channel4_IRQHandler [WEAK]
- EXPORT DMA1_Channel5_IRQHandler [WEAK]
- EXPORT DMA1_Channel6_IRQHandler [WEAK]
- EXPORT DMA1_Channel7_IRQHandler [WEAK]
- EXPORT ADC1_2_IRQHandler [WEAK]
- EXPORT CAN_TX_IRQHandler [WEAK]
- EXPORT CAN_RX0_IRQHandler [WEAK]
- EXPORT CAN_RX1_IRQHandler [WEAK]
- EXPORT CAN_SCE_IRQHandler [WEAK]
- EXPORT EXTI9_5_IRQHandler [WEAK]
- EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
- EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
- EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
- EXPORT TIM1_CC_IRQHandler [WEAK]
- EXPORT TIM2_IRQHandler [WEAK]
- EXPORT TIM3_IRQHandler [WEAK]
- EXPORT I2C1_EV_IRQHandler [WEAK]
- EXPORT I2C1_ER_IRQHandler [WEAK]
- EXPORT SPI1_IRQHandler [WEAK]
- EXPORT USART1_IRQHandler [WEAK]
- EXPORT USART2_IRQHandler [WEAK]
- EXPORT USART3_IRQHandler [WEAK]
- EXPORT EXTI15_10_IRQHandler [WEAK]
- EXPORT RTC_Alarm_IRQHandler [WEAK]
- EXPORT TIM6_DAC1_IRQHandler [WEAK]
- EXPORT TIM7_DAC2_IRQHandler [WEAK]
- EXPORT COMP2_IRQHandler [WEAK]
- EXPORT COMP4_6_IRQHandler [WEAK]
- EXPORT FPU_IRQHandler [WEAK]
-
-WWDG_IRQHandler
-PVD_IRQHandler
-TAMP_STAMP_IRQHandler
-RTC_WKUP_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_IRQHandler
-EXTI1_IRQHandler
-EXTI2_TSC_IRQHandler
-EXTI3_IRQHandler
-EXTI4_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_IRQHandler
-DMA1_Channel3_IRQHandler
-DMA1_Channel4_IRQHandler
-DMA1_Channel5_IRQHandler
-DMA1_Channel6_IRQHandler
-DMA1_Channel7_IRQHandler
-ADC1_2_IRQHandler
-CAN_TX_IRQHandler
-CAN_RX0_IRQHandler
-CAN_RX1_IRQHandler
-CAN_SCE_IRQHandler
-EXTI9_5_IRQHandler
-TIM1_BRK_TIM15_IRQHandler
-TIM1_UP_TIM16_IRQHandler
-TIM1_TRG_COM_TIM17_IRQHandler
-TIM1_CC_IRQHandler
-TIM2_IRQHandler
-TIM3_IRQHandler
-I2C1_EV_IRQHandler
-I2C1_ER_IRQHandler
-SPI1_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-USART3_IRQHandler
-EXTI15_10_IRQHandler
-RTC_Alarm_IRQHandler
-TIM6_DAC1_IRQHandler
-TIM7_DAC2_IRQHandler
-COMP2_IRQHandler
-COMP4_6_IRQHandler
-FPU_IRQHandler
-
- B .
-
- ENDP
-
- ALIGN
-
- END
-
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_ARM_STD/stm32f303x8.sct b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_ARM_STD/stm32f303x8.sct
deleted file mode 100644
index 64a32c381d..0000000000
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_ARM_STD/stm32f303x8.sct
+++ /dev/null
@@ -1,45 +0,0 @@
-; Scatter-Loading Description File
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; Copyright (c) 2014, STMicroelectronics
-; All rights reserved.
-;
-; Redistribution and use in source and binary forms, with or without
-; modification, are permitted provided that the following conditions are met:
-;
-; 1. Redistributions of source code must retain the above copyright notice,
-; this list of conditions and the following disclaimer.
-; 2. Redistributions in binary form must reproduce the above copyright notice,
-; this list of conditions and the following disclaimer in the documentation
-; and/or other materials provided with the distribution.
-; 3. Neither the name of STMicroelectronics nor the names of its contributors
-; may be used to endorse or promote products derived from this software
-; without specific prior written permission.
-;
-; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-; STM32F303K8: 64KB FLASH (0x10000) + 12KB SRAM (0x3000)
-LR_IROM1 0x08000000 0x10000 { ; load region size_region
-
- ER_IROM1 0x08000000 0x10000 { ; load address = execution address
- *.o (RESET, +First)
- *(InRoot$$Sections)
- .ANY (+RO)
- }
-
- ; 98 vectors = 392 bytes (0x188) to be reserved in RAM
- RW_IRAM1 (0x20000000+0x188) (0x3000-0x188) { ; RW data
- .ANY (+RW +ZI)
- }
-
-}
-
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_ARM_STD/sys.cpp b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_ARM_STD/sys.cpp
deleted file mode 100644
index bb665909b9..0000000000
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_ARM_STD/sys.cpp
+++ /dev/null
@@ -1,56 +0,0 @@
-/* mbed Microcontroller Library - stackheap
- * Setup a fixed single stack/heap memory model,
- * between the top of the RW/ZI region and the stackpointer
- *******************************************************************************
- * Copyright (c) 2014, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include
-#include
-
-extern char Image$$RW_IRAM1$$ZI$$Limit[];
-
-extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
- uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
- uint32_t sp_limit = __current_sp();
-
- zi_limit = (zi_limit + 7) & ~0x7; // ensure zi_limit is 8-byte aligned
-
- struct __initial_stackheap r;
- r.heap_base = zi_limit;
- r.heap_limit = sp_limit;
- return r;
-}
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_GCC_ARM/STM32F303X8.ld b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_GCC_ARM/STM32F303X8.ld
deleted file mode 100644
index e1fb24442a..0000000000
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_GCC_ARM/STM32F303X8.ld
+++ /dev/null
@@ -1,155 +0,0 @@
-/* Linker script to configure memory regions. */
-MEMORY
-{
- FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 64K
- CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 4K
- RAM (rwx) : ORIGIN = 0x20000188, LENGTH = 12K - 0x188
-}
-
-/* Linker script to place sections and symbol values. Should be used together
- * with other linker script that defines memory regions FLASH and RAM.
- * It references following symbols, which must be defined in code:
- * Reset_Handler : Entry of reset handler
- *
- * It defines following symbols, which code can use without definition:
- * __exidx_start
- * __exidx_end
- * __etext
- * __data_start__
- * __preinit_array_start
- * __preinit_array_end
- * __init_array_start
- * __init_array_end
- * __fini_array_start
- * __fini_array_end
- * __data_end__
- * __bss_start__
- * __bss_end__
- * __end__
- * end
- * __HeapLimit
- * __StackLimit
- * __StackTop
- * __stack
- * _estack
- */
-ENTRY(Reset_Handler)
-
-SECTIONS
-{
- .text :
- {
- KEEP(*(.isr_vector))
- *(.text*)
- KEEP(*(.init))
- KEEP(*(.fini))
-
- /* .ctors */
- *crtbegin.o(.ctors)
- *crtbegin?.o(.ctors)
- *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
- *(SORT(.ctors.*))
- *(.ctors)
-
- /* .dtors */
- *crtbegin.o(.dtors)
- *crtbegin?.o(.dtors)
- *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
- *(SORT(.dtors.*))
- *(.dtors)
-
- *(.rodata*)
-
- KEEP(*(.eh_frame*))
- } > FLASH
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > FLASH
-
- __exidx_start = .;
- .ARM.exidx :
- {
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- } > FLASH
- __exidx_end = .;
-
- __etext = .;
- _sidata = .;
-
- .data : AT (__etext)
- {
- __data_start__ = .;
- _sdata = .;
- *(vtable)
- *(.data*)
-
- . = ALIGN(4);
- /* preinit data */
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP(*(.preinit_array))
- PROVIDE_HIDDEN (__preinit_array_end = .);
-
- . = ALIGN(4);
- /* init data */
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE_HIDDEN (__init_array_end = .);
-
-
- . = ALIGN(4);
- /* finit data */
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP(*(SORT(.fini_array.*)))
- KEEP(*(.fini_array))
- PROVIDE_HIDDEN (__fini_array_end = .);
-
- KEEP(*(.jcr*))
- . = ALIGN(4);
- /* All data end */
- __data_end__ = .;
- _edata = .;
-
- } > RAM
-
- .bss :
- {
- . = ALIGN(4);
- __bss_start__ = .;
- _sbss = .;
- *(.bss*)
- *(COMMON)
- . = ALIGN(4);
- __bss_end__ = .;
- _ebss = .;
- } > RAM
-
- .heap (COPY):
- {
- __end__ = .;
- end = __end__;
- *(.heap*)
- __HeapLimit = .;
- } > RAM
-
- /* .stack_dummy section doesn't contains any symbols. It is only
- * used for linker to calculate size of stack sections, and assign
- * values to stack symbols later */
- .stack_dummy (COPY):
- {
- *(.stack*)
- } > RAM
-
- /* Set stack top to end of RAM, and stack limit move down by
- * size of stack_dummy section */
- __StackTop = ORIGIN(RAM) + LENGTH(RAM);
- _estack = __StackTop;
- __StackLimit = __StackTop - SIZEOF(.stack_dummy);
- PROVIDE(__stack = __StackTop);
-
- /* Check if data + heap + stack exceeds RAM limit */
- ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
-}
-
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_GCC_ARM/startup_stm32f303x8.S b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_GCC_ARM/startup_stm32f303x8.S
deleted file mode 100644
index d31da878a3..0000000000
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_GCC_ARM/startup_stm32f303x8.S
+++ /dev/null
@@ -1,409 +0,0 @@
-/**
- ******************************************************************************
- * @file startup_stm32f303x8.s
- * @author MCD Application Team
- * @version
- * @date 12-Sept-2014
- * @brief STM32F303x6/STM32F303x8 devices vector table for
- * Atollic TrueSTUDIO toolchain.
- * This module performs:
- * - Set the initial SP
- * - Set the initial PC == Reset_Handler,
- * - Set the vector table entries with the exceptions ISR address,
- * - Configure the clock system
- * - Branches to main in the C library (which eventually
- * calls main()).
- * After Reset the Cortex-M4 processor is in Thread mode,
- * priority is Privileged, and the Stack is set to Main.
- ******************************************************************************
- * @attention
- *
- * © COPYRIGHT 2014 STMicroelectronics
- *
- * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
- * You may not use this file except in compliance with the License.
- * You may obtain a copy of the License at:
- *
- * http://www.st.com/software_license_agreement_liberty_v2
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- ******************************************************************************
- */
-
- .syntax unified
- .cpu cortex-m4
- .fpu softvfp
- .thumb
-
-.global g_pfnVectors
-.global Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word _sidata
-/* start address for the .data section. defined in linker script */
-.word _sdata
-/* end address for the .data section. defined in linker script */
-.word _edata
-/* start address for the .bss section. defined in linker script */
-.word _sbss
-/* end address for the .bss section. defined in linker script */
-.word _ebss
-
-.equ BootRAM, 0xF1E0F85F
-/**
- * @brief This is the code that gets called when the processor first
- * starts execution following a reset event. Only the absolutely
- * necessary set is performed, after which the application
- * supplied main() routine is called.
- * @param None
- * @retval : None
-*/
-
- .section .text.Reset_Handler
- .weak Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- ldr sp, =_estack /* Atollic update: set stack pointer */
-
-/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
- b LoopCopyDataInit
-
-CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
-
-LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
- bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
-/* Zero fill the bss segment. */
-FillZerobss:
- movs r3, #0
- str r3, [r2], #4
-
-LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
- bcc FillZerobss
-
-/* Call the clock system intitialization function.*/
- bl SystemInit
-/* Call static constructors */
- //bl __libc_init_array
-/* Call the application's entry point.*/
- //bl main
-/**
- * Calling the crt0 'cold-start' entry point. There __libc_init_array is called
- * and when existing hardware_init_hook() and software_init_hook() before
- * starting main(). software_init_hook() is available and has to be called due
- * to initializsation when using rtos.
-*/
- bl _start
-
-LoopForever:
- b LoopForever
-
-.size Reset_Handler, .-Reset_Handler
-
-/**
- * @brief This is the code that gets called when the processor receives an
- * unexpected interrupt. This simply enters an infinite loop, preserving
- * the system state for examination by a debugger.
- *
- * @param None
- * @retval : None
-*/
- .section .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
- b Infinite_Loop
- .size Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex-M4. Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
- .section .isr_vector,"a",%progbits
- .type g_pfnVectors, %object
- .size g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
- .word _estack
- .word Reset_Handler
- .word NMI_Handler
- .word HardFault_Handler
- .word MemManage_Handler
- .word BusFault_Handler
- .word UsageFault_Handler
- .word 0
- .word 0
- .word 0
- .word 0
- .word SVC_Handler
- .word DebugMon_Handler
- .word 0
- .word PendSV_Handler
- .word SysTick_Handler
- .word WWDG_IRQHandler
- .word PVD_IRQHandler
- .word TAMP_STAMP_IRQHandler
- .word RTC_WKUP_IRQHandler
- .word FLASH_IRQHandler
- .word RCC_IRQHandler
- .word EXTI0_IRQHandler
- .word EXTI1_IRQHandler
- .word EXTI2_TSC_IRQHandler
- .word EXTI3_IRQHandler
- .word EXTI4_IRQHandler
- .word DMA1_Channel1_IRQHandler
- .word DMA1_Channel2_IRQHandler
- .word DMA1_Channel3_IRQHandler
- .word DMA1_Channel4_IRQHandler
- .word DMA1_Channel5_IRQHandler
- .word DMA1_Channel6_IRQHandler
- .word DMA1_Channel7_IRQHandler
- .word ADC1_2_IRQHandler
- .word CAN_TX_IRQHandler
- .word CAN_RX0_IRQHandler
- .word CAN_RX1_IRQHandler
- .word CAN_SCE_IRQHandler
- .word EXTI9_5_IRQHandler
- .word TIM1_BRK_TIM15_IRQHandler
- .word TIM1_UP_TIM16_IRQHandler
- .word TIM1_TRG_COM_TIM17_IRQHandler
- .word TIM1_CC_IRQHandler
- .word TIM2_IRQHandler
- .word TIM3_IRQHandler
- .word 0
- .word I2C1_EV_IRQHandler
- .word I2C1_ER_IRQHandler
- .word 0
- .word 0
- .word SPI1_IRQHandler
- .word 0
- .word USART1_IRQHandler
- .word USART2_IRQHandler
- .word USART3_IRQHandler
- .word EXTI15_10_IRQHandler
- .word RTC_Alarm_IRQHandler
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word TIM6_DAC1_IRQHandler
- .word TIM7_DAC2_IRQHandler
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word COMP2_IRQHandler
- .word COMP4_6_IRQHandler
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word FPU_IRQHandler
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
- .weak NMI_Handler
- .thumb_set NMI_Handler,Default_Handler
-
- .weak HardFault_Handler
- .thumb_set HardFault_Handler,Default_Handler
-
- .weak MemManage_Handler
- .thumb_set MemManage_Handler,Default_Handler
-
- .weak BusFault_Handler
- .thumb_set BusFault_Handler,Default_Handler
-
- .weak UsageFault_Handler
- .thumb_set UsageFault_Handler,Default_Handler
-
- .weak SVC_Handler
- .thumb_set SVC_Handler,Default_Handler
-
- .weak DebugMon_Handler
- .thumb_set DebugMon_Handler,Default_Handler
-
- .weak PendSV_Handler
- .thumb_set PendSV_Handler,Default_Handler
-
- .weak SysTick_Handler
- .thumb_set SysTick_Handler,Default_Handler
-
- .weak WWDG_IRQHandler
- .thumb_set WWDG_IRQHandler,Default_Handler
-
- .weak PVD_IRQHandler
- .thumb_set PVD_IRQHandler,Default_Handler
-
- .weak TAMP_STAMP_IRQHandler
- .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
-
- .weak RTC_WKUP_IRQHandler
- .thumb_set RTC_WKUP_IRQHandler,Default_Handler
-
- .weak FLASH_IRQHandler
- .thumb_set FLASH_IRQHandler,Default_Handler
-
- .weak RCC_IRQHandler
- .thumb_set RCC_IRQHandler,Default_Handler
-
- .weak EXTI0_IRQHandler
- .thumb_set EXTI0_IRQHandler,Default_Handler
-
- .weak EXTI1_IRQHandler
- .thumb_set EXTI1_IRQHandler,Default_Handler
-
- .weak EXTI2_TSC_IRQHandler
- .thumb_set EXTI2_TSC_IRQHandler,Default_Handler
-
- .weak EXTI3_IRQHandler
- .thumb_set EXTI3_IRQHandler,Default_Handler
-
- .weak EXTI4_IRQHandler
- .thumb_set EXTI4_IRQHandler,Default_Handler
-
- .weak DMA1_Channel1_IRQHandler
- .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
- .weak DMA1_Channel2_IRQHandler
- .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
-
- .weak DMA1_Channel3_IRQHandler
- .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
-
- .weak DMA1_Channel4_IRQHandler
- .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
-
- .weak DMA1_Channel5_IRQHandler
- .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
-
- .weak DMA1_Channel6_IRQHandler
- .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
-
- .weak DMA1_Channel7_IRQHandler
- .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
-
- .weak ADC1_2_IRQHandler
- .thumb_set ADC1_2_IRQHandler,Default_Handler
-
- .weak CAN_TX_IRQHandler
- .thumb_set CAN_TX_IRQHandler,Default_Handler
-
- .weak CAN_RX0_IRQHandler
- .thumb_set CAN_RX0_IRQHandler,Default_Handler
-
- .weak CAN_RX1_IRQHandler
- .thumb_set CAN_RX1_IRQHandler,Default_Handler
-
- .weak CAN_SCE_IRQHandler
- .thumb_set CAN_SCE_IRQHandler,Default_Handler
-
- .weak EXTI9_5_IRQHandler
- .thumb_set EXTI9_5_IRQHandler,Default_Handler
-
- .weak TIM1_BRK_TIM15_IRQHandler
- .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
-
- .weak TIM1_UP_TIM16_IRQHandler
- .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
-
- .weak TIM1_TRG_COM_TIM17_IRQHandler
- .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
-
- .weak TIM1_CC_IRQHandler
- .thumb_set TIM1_CC_IRQHandler,Default_Handler
-
- .weak TIM2_IRQHandler
- .thumb_set TIM2_IRQHandler,Default_Handler
-
- .weak TIM3_IRQHandler
- .thumb_set TIM3_IRQHandler,Default_Handler
-
- .weak I2C1_EV_IRQHandler
- .thumb_set I2C1_EV_IRQHandler,Default_Handler
-
- .weak I2C1_ER_IRQHandler
- .thumb_set I2C1_ER_IRQHandler,Default_Handler
-
- .weak SPI1_IRQHandler
- .thumb_set SPI1_IRQHandler,Default_Handler
-
- .weak USART1_IRQHandler
- .thumb_set USART1_IRQHandler,Default_Handler
-
- .weak USART2_IRQHandler
- .thumb_set USART2_IRQHandler,Default_Handler
-
- .weak USART3_IRQHandler
- .thumb_set USART3_IRQHandler,Default_Handler
-
- .weak EXTI15_10_IRQHandler
- .thumb_set EXTI15_10_IRQHandler,Default_Handler
-
- .weak RTC_Alarm_IRQHandler
- .thumb_set RTC_Alarm_IRQHandler,Default_Handler
-
- .weak TIM6_DAC1_IRQHandler
- .thumb_set TIM6_DAC1_IRQHandler,Default_Handler
-
- .weak TIM7_DAC2_IRQHandler
- .thumb_set TIM7_DAC2_IRQHandler,Default_Handler
-
- .weak COMP2_IRQHandler
- .thumb_set COMP2_IRQHandler,Default_Handler
-
- .weak COMP4_6_IRQHandler
- .thumb_set COMP4_6_IRQHandler,Default_Handler
-
- .weak FPU_IRQHandler
- .thumb_set FPU_IRQHandler,Default_Handler
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_IAR/startup_stm32f303x8.S b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_IAR/startup_stm32f303x8.S
deleted file mode 100644
index 92e695fc3d..0000000000
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_IAR/startup_stm32f303x8.S
+++ /dev/null
@@ -1,450 +0,0 @@
-;/******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
-;* File Name : startup_stm32f303x8.s
-;* Author : MCD Application Team
-;* Version : V2.1.0
-;* Date : 12-Sept-2014
-;* Description : STM32F303x6/STM32F303x8 devices vector table for EWARM toolchain.
-;* This module performs:
-;* - Set the initial SP
-;* - Set the initial PC == _iar_program_start,
-;* - Set the vector table entries with the exceptions ISR
-;* address.
-;* - Branches to main in the C library (which eventually
-;* calls main()).
-;* After Reset the Cortex-M4 processor is in Thread mode,
-;* priority is Privileged, and the Stack is set to Main.
-;********************************************************************************
-;*
-;* © COPYRIGHT(c) 2014 STMicroelectronics
-;*
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;* 1. Redistributions of source code must retain the above copyright notice,
-;* this list of conditions and the following disclaimer.
-;* 2. Redistributions in binary form must reproduce the above copyright notice,
-;* this list of conditions and the following disclaimer in the documentation
-;* and/or other materials provided with the distribution.
-;* 3. Neither the name of STMicroelectronics nor the names of its contributors
-;* may be used to endorse or promote products derived from this software
-;* without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************
-;
-;
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-;
-; Cortex-M version
-;
-
- MODULE ?cstartup
-
- ;; Forward declaration of sections.
- SECTION CSTACK:DATA:NOROOT(3)
-
- SECTION .intvec:CODE:NOROOT(2)
-
- EXTERN __iar_program_start
- EXTERN SystemInit
- PUBLIC __vector_table
-
- DATA
-__vector_table
- DCD sfe(CSTACK)
- DCD Reset_Handler ; Reset Handler
-
- DCD NMI_Handler ; NMI Handler
- DCD HardFault_Handler ; Hard Fault Handler
- DCD MemManage_Handler ; MPU Fault Handler
- DCD BusFault_Handler ; Bus Fault Handler
- DCD UsageFault_Handler ; Usage Fault Handler
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD SVC_Handler ; SVCall Handler
- DCD DebugMon_Handler ; Debug Monitor Handler
- DCD 0 ; Reserved
- DCD PendSV_Handler ; PendSV Handler
- DCD SysTick_Handler ; SysTick Handler
-
- ; External Interrupts
- DCD WWDG_IRQHandler ; Window WatchDog
- DCD PVD_IRQHandler ; PVD through EXTI Line detection
- DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
- DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
- DCD FLASH_IRQHandler ; FLASH
- DCD RCC_IRQHandler ; RCC
- DCD EXTI0_IRQHandler ; EXTI Line0
- DCD EXTI1_IRQHandler ; EXTI Line1
- DCD EXTI2_TSC_IRQHandler ; EXTI Line2 and Touch Sense controller
- DCD EXTI3_IRQHandler ; EXTI Line3
- DCD EXTI4_IRQHandler ; EXTI Line4
- DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
- DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
- DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
- DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
- DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
- DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
- DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
- DCD ADC1_2_IRQHandler ; ADC1 and ADC2
- DCD CAN_TX_IRQHandler ; CAN TX
- DCD CAN_RX0_IRQHandler ; CAN RX0
- DCD CAN_RX1_IRQHandler ; CAN RX1
- DCD CAN_SCE_IRQHandler ; CAN SCE
- DCD EXTI9_5_IRQHandler ; External Line[9:5]s
- DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
- DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
- DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17
- DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
- DCD TIM2_IRQHandler ; TIM2
- DCD TIM3_IRQHandler ; TIM3
- DCD 0 ; Reserved
- DCD I2C1_EV_IRQHandler ; I2C1 Event
- DCD I2C1_ER_IRQHandler ; I2C1 Error
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD SPI1_IRQHandler ; SPI1
- DCD 0 ; Reserved
- DCD USART1_IRQHandler ; USART1
- DCD USART2_IRQHandler ; USART2
- DCD USART3_IRQHandler ; USART3
- DCD EXTI15_10_IRQHandler ; External Line[15:10]s
- DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD TIM6_DAC1_IRQHandler ; TIM6 and DAC1 underrun errors
- DCD TIM7_DAC2_IRQHandler ; TIM7 and DAC2 underrun errors
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD COMP2_IRQHandler ; COMP2
- DCD COMP4_6_IRQHandler ; COMP4 and COMP6
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD FPU_IRQHandler ; FPU
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
- THUMB
- PUBWEAK Reset_Handler
- SECTION .text:CODE:NOROOT:REORDER(2)
-Reset_Handler
-
- LDR R0, =SystemInit
- BLX R0
- LDR R0, =__iar_program_start
- BX R0
-
- PUBWEAK NMI_Handler
- SECTION .text:CODE:NOROOT:REORDER(1)
-NMI_Handler
- B NMI_Handler
-
- PUBWEAK HardFault_Handler
- SECTION .text:CODE:NOROOT:REORDER(1)
-HardFault_Handler
- B HardFault_Handler
-
- PUBWEAK MemManage_Handler
- SECTION .text:CODE:NOROOT:REORDER(1)
-MemManage_Handler
- B MemManage_Handler
-
- PUBWEAK BusFault_Handler
- SECTION .text:CODE:NOROOT:REORDER(1)
-BusFault_Handler
- B BusFault_Handler
-
- PUBWEAK UsageFault_Handler
- SECTION .text:CODE:NOROOT:REORDER(1)
-UsageFault_Handler
- B UsageFault_Handler
-
- PUBWEAK SVC_Handler
- SECTION .text:CODE:NOROOT:REORDER(1)
-SVC_Handler
- B SVC_Handler
-
- PUBWEAK DebugMon_Handler
- SECTION .text:CODE:NOROOT:REORDER(1)
-DebugMon_Handler
- B DebugMon_Handler
-
- PUBWEAK PendSV_Handler
- SECTION .text:CODE:NOROOT:REORDER(1)
-PendSV_Handler
- B PendSV_Handler
-
- PUBWEAK SysTick_Handler
- SECTION .text:CODE:NOROOT:REORDER(1)
-SysTick_Handler
- B SysTick_Handler
-
- PUBWEAK WWDG_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-WWDG_IRQHandler
- B WWDG_IRQHandler
-
- PUBWEAK PVD_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-PVD_IRQHandler
- B PVD_IRQHandler
-
- PUBWEAK TAMP_STAMP_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-TAMP_STAMP_IRQHandler
- B TAMP_STAMP_IRQHandler
-
- PUBWEAK RTC_WKUP_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-RTC_WKUP_IRQHandler
- B RTC_WKUP_IRQHandler
-
- PUBWEAK FLASH_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-FLASH_IRQHandler
- B FLASH_IRQHandler
-
- PUBWEAK RCC_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-RCC_IRQHandler
- B RCC_IRQHandler
-
- PUBWEAK EXTI0_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI0_IRQHandler
- B EXTI0_IRQHandler
-
- PUBWEAK EXTI1_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI1_IRQHandler
- B EXTI1_IRQHandler
-
- PUBWEAK EXTI2_TSC_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI2_TSC_IRQHandler
- B EXTI2_TSC_IRQHandler
-
- PUBWEAK EXTI3_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI3_IRQHandler
- B EXTI3_IRQHandler
-
- PUBWEAK EXTI4_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI4_IRQHandler
- B EXTI4_IRQHandler
-
- PUBWEAK DMA1_Channel1_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel1_IRQHandler
- B DMA1_Channel1_IRQHandler
-
- PUBWEAK DMA1_Channel2_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel2_IRQHandler
- B DMA1_Channel2_IRQHandler
-
- PUBWEAK DMA1_Channel3_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel3_IRQHandler
- B DMA1_Channel3_IRQHandler
-
- PUBWEAK DMA1_Channel4_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel4_IRQHandler
- B DMA1_Channel4_IRQHandler
-
- PUBWEAK DMA1_Channel5_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel5_IRQHandler
- B DMA1_Channel5_IRQHandler
-
- PUBWEAK DMA1_Channel6_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel6_IRQHandler
- B DMA1_Channel6_IRQHandler
-
- PUBWEAK DMA1_Channel7_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel7_IRQHandler
- B DMA1_Channel7_IRQHandler
-
- PUBWEAK ADC1_2_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-ADC1_2_IRQHandler
- B ADC1_2_IRQHandler
-
- PUBWEAK CAN_TX_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-CAN_TX_IRQHandler
- B CAN_TX_IRQHandler
-
- PUBWEAK CAN_RX0_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-CAN_RX0_IRQHandler
- B CAN_RX0_IRQHandler
-
- PUBWEAK CAN_RX1_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-CAN_RX1_IRQHandler
- B CAN_RX1_IRQHandler
-
- PUBWEAK CAN_SCE_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-CAN_SCE_IRQHandler
- B CAN_SCE_IRQHandler
-
- PUBWEAK EXTI9_5_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI9_5_IRQHandler
- B EXTI9_5_IRQHandler
-
- PUBWEAK TIM1_BRK_TIM15_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-TIM1_BRK_TIM15_IRQHandler
- B TIM1_BRK_TIM15_IRQHandler
-
- PUBWEAK TIM1_UP_TIM16_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-TIM1_UP_TIM16_IRQHandler
- B TIM1_UP_TIM16_IRQHandler
-
- PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-TIM1_TRG_COM_TIM17_IRQHandler
- B TIM1_TRG_COM_TIM17_IRQHandler
-
- PUBWEAK TIM1_CC_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-TIM1_CC_IRQHandler
- B TIM1_CC_IRQHandler
-
- PUBWEAK TIM2_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-TIM2_IRQHandler
- B TIM2_IRQHandler
-
- PUBWEAK TIM3_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-TIM3_IRQHandler
- B TIM3_IRQHandler
-
- PUBWEAK I2C1_EV_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-I2C1_EV_IRQHandler
- B I2C1_EV_IRQHandler
-
- PUBWEAK I2C1_ER_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-I2C1_ER_IRQHandler
- B I2C1_ER_IRQHandler
-
- PUBWEAK SPI1_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-SPI1_IRQHandler
- B SPI1_IRQHandler
-
- PUBWEAK USART1_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-USART1_IRQHandler
- B USART1_IRQHandler
-
- PUBWEAK USART2_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-USART2_IRQHandler
- B USART2_IRQHandler
-
- PUBWEAK USART3_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-USART3_IRQHandler
- B USART3_IRQHandler
-
- PUBWEAK EXTI15_10_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI15_10_IRQHandler
- B EXTI15_10_IRQHandler
-
- PUBWEAK RTC_Alarm_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-RTC_Alarm_IRQHandler
- B RTC_Alarm_IRQHandler
-
- PUBWEAK TIM6_DAC1_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-TIM6_DAC1_IRQHandler
- B TIM6_DAC1_IRQHandler
-
- PUBWEAK TIM7_DAC2_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-TIM7_DAC2_IRQHandler
- B TIM7_DAC2_IRQHandler
-
- PUBWEAK COMP2_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-COMP2_IRQHandler
- B COMP2_IRQHandler
-
- PUBWEAK COMP4_6_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-COMP4_6_IRQHandler
- B COMP4_6_IRQHandler
-
- PUBWEAK FPU_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
-FPU_IRQHandler
- B FPU_IRQHandler
-
- END
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_IAR/stm32f303x8.icf b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_IAR/stm32f303x8.icf
deleted file mode 100644
index 98af5cefcf..0000000000
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/TOOLCHAIN_IAR/stm32f303x8.icf
+++ /dev/null
@@ -1,35 +0,0 @@
-/* [ROM = 64kb = 0x10000] */
-define symbol __intvec_start__ = 0x08000000;
-define symbol __region_ROM_start__ = 0x08000000;
-define symbol __region_ROM_end__ = 0x0800FFFF;
-
-define symbol __region_CCMRAM_start__ = 0x10000000;
-define symbol __region_CCMRAM_end__ = 0x10000FFF;
-
-/* [RAM = 12kb = 0x3000] Vector table dynamic copy: 98 vectors = 392 bytes (0x188) to be reserved in RAM */
-define symbol __NVIC_start__ = 0x20000000;
-define symbol __NVIC_end__ = 0x20000187; /* No need to add 4 more bytes to be aligned on 8 bytes */
-define symbol __region_RAM_start__ = 0x20000188;
-define symbol __region_RAM_end__ = 0x20002FFF;
-
-/* Memory regions */
-define memory mem with size = 4G;
-define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
-define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
-define region CCMRAM_region = mem:[from __region_CCMRAM_start__ to __region_CCMRAM_end__];
-
-/* Stack and Heap */
-/*Heap 1/4 of ram and stack 1/8*/
-define symbol __size_cstack__ = 0x600;
-define symbol __size_heap__ = 0xC00;
-define block CSTACK with alignment = 8, size = __size_cstack__ { };
-define block HEAP with alignment = 8, size = __size_heap__ { };
-define block STACKHEAP with fixed order { block HEAP, block CSTACK };
-
-initialize by copy with packing = zeros { readwrite };
-do not initialize { section .noinit };
-
-place at address mem:__intvec_start__ { readonly section .intvec };
-
-place in ROM_region { readonly };
-place in RAM_region { readwrite, block STACKHEAP };
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/cmsis.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/cmsis.h
deleted file mode 100644
index 8b9ba0fc38..0000000000
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/cmsis.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/* mbed Microcontroller Library
- * A generic CMSIS include header
- *******************************************************************************
- * Copyright (c) 2014, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-
-#ifndef MBED_CMSIS_H
-#define MBED_CMSIS_H
-
-#include "stm32f3xx.h"
-#include "cmsis_nvic.h"
-
-#endif
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/cmsis_nvic.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/cmsis_nvic.c
deleted file mode 100644
index 2da63fc9af..0000000000
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/cmsis_nvic.c
+++ /dev/null
@@ -1,55 +0,0 @@
-/* mbed Microcontroller Library
- * CMSIS-style functionality to support dynamic vectors
- *******************************************************************************
- * Copyright (c) 2014, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#include "cmsis_nvic.h"
-
-#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
-#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash
-
-void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
- uint32_t *vectors = (uint32_t *)SCB->VTOR;
- uint32_t i;
-
- // Copy and switch to dynamic vectors if the first time called
- if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) {
- uint32_t *old_vectors = vectors;
- vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
- for (i=0; iVTOR = (uint32_t)NVIC_RAM_VECTOR_ADDRESS;
- }
- vectors[IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-}
-
-uint32_t NVIC_GetVector(IRQn_Type IRQn) {
- uint32_t *vectors = (uint32_t*)SCB->VTOR;
- return vectors[IRQn + NVIC_USER_IRQ_OFFSET];
-}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/cmsis_nvic.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/cmsis_nvic.h
deleted file mode 100644
index eb09b74d89..0000000000
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/cmsis_nvic.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/* mbed Microcontroller Library
- * CMSIS-style functionality to support dynamic vectors
- *******************************************************************************
- * Copyright (c) 2014, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-
-#ifndef MBED_CMSIS_NVIC_H
-#define MBED_CMSIS_NVIC_H
-
-// STM32F303RE
-// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
-// MCU Peripherals: 85 vectors = 340 bytes from 0x40 to 0x193
-// Total: 101 vectors = 404 bytes (0x194) to be reserved in RAM
-#define NVIC_NUM_VECTORS 101
-#define NVIC_USER_IRQ_OFFSET 16
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
-uint32_t NVIC_GetVector(IRQn_Type IRQn);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/hal_tick.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/hal_tick.c
deleted file mode 100644
index e326cdcecd..0000000000
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/hal_tick.c
+++ /dev/null
@@ -1,120 +0,0 @@
-/**
- ******************************************************************************
- * @file hal_tick.c
- * @author MCD Application Team
- * @brief Initialization of HAL tick
- ******************************************************************************
- * @attention
- *
- * © COPYRIGHT 2014 STMicroelectronics
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- */
-#include "hal_tick.h"
-
-TIM_HandleTypeDef TimMasterHandle;
-uint32_t PreviousVal = 0;
-
-void us_ticker_irq_handler(void);
-
-void timer_irq_handler(void) {
- // Channel 1 for mbed timeout
- if (__HAL_TIM_GET_ITSTATUS(&TimMasterHandle, TIM_IT_CC1) == SET) {
- __HAL_TIM_CLEAR_IT(&TimMasterHandle, TIM_IT_CC1);
- us_ticker_irq_handler();
- }
-
- // Channel 2 for HAL tick
- if (__HAL_TIM_GET_ITSTATUS(&TimMasterHandle, TIM_IT_CC2) == SET) {
- __HAL_TIM_CLEAR_IT(&TimMasterHandle, TIM_IT_CC2);
- uint32_t val = __HAL_TIM_GetCounter(&TimMasterHandle);
- if ((val - PreviousVal) >= HAL_TICK_DELAY) {
- // Increment HAL variable
- HAL_IncTick();
- // Prepare next interrupt
- __HAL_TIM_SetCompare(&TimMasterHandle, TIM_CHANNEL_2, val + HAL_TICK_DELAY);
- PreviousVal = val;
-#if 0 // For DEBUG only
- HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_6);
-#endif
- }
- }
-}
-
-// Reconfigure the HAL tick using a standard timer instead of systick.
-HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) {
- // Enable timer clock
- TIM_MST_RCC;
-
- // Reset timer
- TIM_MST_RESET_ON;
- TIM_MST_RESET_OFF;
-
- // Configure time base
- TimMasterHandle.Instance = TIM_MST;
- TimMasterHandle.Init.Period = 0xFFFFFFFF;
- TimMasterHandle.Init.Prescaler = (uint32_t)(SystemCoreClock / 1000000) - 1; // 1 us tick
- TimMasterHandle.Init.ClockDivision = 0;
- TimMasterHandle.Init.CounterMode = TIM_COUNTERMODE_UP;
- TimMasterHandle.Init.RepetitionCounter = 0;
- HAL_TIM_OC_Init(&TimMasterHandle);
-
- NVIC_SetVector(TIM_MST_IRQ, (uint32_t)timer_irq_handler);
- NVIC_EnableIRQ(TIM_MST_IRQ);
-
- // Channel 1 for mbed timeout
- HAL_TIM_OC_Start(&TimMasterHandle, TIM_CHANNEL_1);
-
- // Channel 2 for HAL tick
- HAL_TIM_OC_Start(&TimMasterHandle, TIM_CHANNEL_2);
- PreviousVal = __HAL_TIM_GetCounter(&TimMasterHandle);
- __HAL_TIM_SetCompare(&TimMasterHandle, TIM_CHANNEL_2, PreviousVal + HAL_TICK_DELAY);
- __HAL_TIM_ENABLE_IT(&TimMasterHandle, TIM_IT_CC2);
-
-#if 0 // For DEBUG only
- __GPIOB_CLK_ENABLE();
- GPIO_InitTypeDef GPIO_InitStruct;
- GPIO_InitStruct.Pin = GPIO_PIN_6;
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_PULLUP;
- GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
- HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-#endif
-
- return HAL_OK;
-}
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/hal_tick.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/hal_tick.h
deleted file mode 100644
index e8acd8c64b..0000000000
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/hal_tick.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/**
- ******************************************************************************
- * @file hal_tick.h
- * @author MCD Application Team
- * @brief Initialization of HAL tick
- ******************************************************************************
- * @attention
- *
- * © COPYRIGHT(c) 2014 STMicroelectronics
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- */
-#ifndef __HAL_TICK_H
-#define __HAL_TICK_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#include "stm32f3xx.h"
-#include "cmsis_nvic.h"
-
-#define TIM_MST TIM2
-#define TIM_MST_IRQ TIM2_IRQn
-#define TIM_MST_RCC __TIM2_CLK_ENABLE()
-
-#define TIM_MST_RESET_ON __TIM2_FORCE_RESET()
-#define TIM_MST_RESET_OFF __TIM2_RELEASE_RESET()
-
-#define HAL_TICK_DELAY (1000) // 1 ms
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __HAL_TICK_H
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/stm32f303x8.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/stm32f303x8.h
deleted file mode 100644
index 4a41089bd2..0000000000
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/stm32f303x8.h
+++ /dev/null
@@ -1,6265 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f303x8.h
- * @author MCD Application Team
- * @version $VERSION$
- * @date 12-Sept-2014
- * @brief CMSIS STM32F303x6/STM32F303x8 Devices Peripheral Access Layer Header File.
- *
- * This file contains:
- * - Data structures and the address mapping for all peripherals
- * - Peripheral's registers declarations and bits definition
- * - Macros to access peripheral’s registers hardware
- *
- ******************************************************************************
- * @attention
- *
- * © COPYRIGHT(c) 2014 STMicroelectronics
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- */
-
-/** @addtogroup CMSIS_Device
- * @{
- */
-
-/** @addtogroup stm32f303x8
- * @{
- */
-
-#ifndef __STM32F303x8_H
-#define __STM32F303x8_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif /* __cplusplus */
-
-/** @addtogroup Configuration_section_for_CMSIS
- * @{
- */
-
-/**
- * @brief Configuration of the Cortex-M4 Processor and Core Peripherals
- */
-#define __CM4_REV 0x0001 /*!< Core revision r0p1 */
-#define __MPU_PRESENT 0 /*!< STM32F303x6/STM32F303x8 devices do not provide an MPU */
-#define __NVIC_PRIO_BITS 4 /*!< STM32F303x6/STM32F303x8 devices use 4 Bits for the Priority Levels */
-#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
-#define __FPU_PRESENT 1 /*!< STM32F303x6/STM32F303x8 devices provide an FPU */
-
-/**
- * @}
- */
-
-/** @addtogroup Peripheral_interrupt_number_definition
- * @{
- */
-
-/**
- * @brief STM32F303x6/STM32F303x8 device Interrupt Number Definition, according to the selected device
- * in @ref Library_configuration_section
- */
-typedef enum
-{
-/****** Cortex-M4 Processor Exceptions Numbers ****************************************************************/
- NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
- MemoryManagement_IRQn = -12, /*!< 4 Cortex-M4 Memory Management Interrupt */
- BusFault_IRQn = -11, /*!< 5 Cortex-M4 Bus Fault Interrupt */
- UsageFault_IRQn = -10, /*!< 6 Cortex-M4 Usage Fault Interrupt */
- SVCall_IRQn = -5, /*!< 11 Cortex-M4 SV Call Interrupt */
- DebugMonitor_IRQn = -4, /*!< 12 Cortex-M4 Debug Monitor Interrupt */
- PendSV_IRQn = -2, /*!< 14 Cortex-M4 Pend SV Interrupt */
- SysTick_IRQn = -1, /*!< 15 Cortex-M4 System Tick Interrupt */
-/****** STM32 specific Interrupt Numbers **********************************************************************/
- WWDG_IRQn = 0, /*!< Window WatchDog Interrupt */
- PVD_IRQn = 1, /*!< PVD through EXTI Line detection Interrupt */
- TAMP_STAMP_IRQn = 2, /*!< Tamper and TimeStamp interrupts through the EXTI line 19 */
- RTC_WKUP_IRQn = 3, /*!< RTC Wakeup interrupt through the EXTI line 20 */
- FLASH_IRQn = 4, /*!< FLASH global Interrupt */
- RCC_IRQn = 5, /*!< RCC global Interrupt */
- EXTI0_IRQn = 6, /*!< EXTI Line0 Interrupt */
- EXTI1_IRQn = 7, /*!< EXTI Line1 Interrupt */
- EXTI2_TSC_IRQn = 8, /*!< EXTI Line2 Interrupt and Touch Sense Controller Interrupt */
- EXTI3_IRQn = 9, /*!< EXTI Line3 Interrupt */
- EXTI4_IRQn = 10, /*!< EXTI Line4 Interrupt */
- DMA1_Channel1_IRQn = 11, /*!< DMA1 Channel 1 Interrupt */
- DMA1_Channel2_IRQn = 12, /*!< DMA1 Channel 2 Interrupt */
- DMA1_Channel3_IRQn = 13, /*!< DMA1 Channel 3 Interrupt */
- DMA1_Channel4_IRQn = 14, /*!< DMA1 Channel 4 Interrupt */
- DMA1_Channel5_IRQn = 15, /*!< DMA1 Channel 5 Interrupt */
- DMA1_Channel6_IRQn = 16, /*!< DMA1 Channel 6 Interrupt */
- DMA1_Channel7_IRQn = 17, /*!< DMA1 Channel 7 Interrupt */
- ADC1_2_IRQn = 18, /*!< ADC1 & ADC2 Interrupts */
- CAN_TX_IRQn = 19, /*!< CAN TX Interrupts */
- CAN_RX0_IRQn = 20, /*!< CAN RX0 Interrupts */
- CAN_RX1_IRQn = 21, /*!< CAN RX1 Interrupt */
- CAN_SCE_IRQn = 22, /*!< CAN SCE Interrupt */
- EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */
- TIM1_BRK_TIM15_IRQn = 24, /*!< TIM1 Break and TIM15 Interrupts */
- TIM1_UP_TIM16_IRQn = 25, /*!< TIM1 Update and TIM16 Interrupts */
- TIM1_TRG_COM_TIM17_IRQn = 26, /*!< TIM1 Trigger and Commutation and TIM17 Interrupt */
- TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */
- TIM2_IRQn = 28, /*!< TIM2 global Interrupt */
- TIM3_IRQn = 29, /*!< TIM3 global Interrupt */
- I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt & EXTI Line23 Interrupt (I2C1 wakeup) */
- I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */
- SPI1_IRQn = 35, /*!< SPI1 global Interrupt */
- USART1_IRQn = 37, /*!< USART1 global Interrupt & EXTI Line25 Interrupt (USART1 wakeup) */
- USART2_IRQn = 38, /*!< USART2 global Interrupt & EXTI Line26 Interrupt (USART2 wakeup) */
- USART3_IRQn = 39, /*!< USART3 global Interrupt & EXTI Line28 Interrupt (USART3 wakeup) */
- EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
- RTC_Alarm_IRQn = 41, /*!< RTC Alarm (A and B) through EXTI Line 17 Interrupt */
- TIM6_DAC1_IRQn = 54, /*!< TIM6 global and DAC1 channel1 & 2 underrun error interrupts */
- TIM7_DAC2_IRQn = 55, /*!< TIM7 global and DAC2 channel1 underrun error Interrupt */
- COMP2_IRQn = 64, /*!< COMP2 global Interrupt via EXT Line22 */
- COMP4_6_IRQn = 65, /*!< COMP4 and COMP6 global Interrupt via EXT Line30 and 32 */
- FPU_IRQn = 81 /*!< Floating point Interrupt */
-} IRQn_Type;
-
-/**
- * @}
- */
-
-#include "core_cm4.h" /* Cortex-M4 processor and core peripherals */
-#include "system_stm32f3xx.h" /* STM32F3xx System Header */
-#include
-
-/** @addtogroup Peripheral_registers_structures
- * @{
- */
-
-/**
- * @brief Analog to Digital Converter
- */
-
-typedef struct
-{
- __IO uint32_t ISR; /*!< ADC Interrupt and Status Register, Address offset: 0x00 */
- __IO uint32_t IER; /*!< ADC Interrupt Enable Register, Address offset: 0x04 */
- __IO uint32_t CR; /*!< ADC control register, Address offset: 0x08 */
- __IO uint32_t CFGR; /*!< ADC Configuration register, Address offset: 0x0C */
- uint32_t RESERVED0; /*!< Reserved, 0x010 */
- __IO uint32_t SMPR1; /*!< ADC sample time register 1, Address offset: 0x14 */
- __IO uint32_t SMPR2; /*!< ADC sample time register 2, Address offset: 0x18 */
- uint32_t RESERVED1; /*!< Reserved, 0x01C */
- __IO uint32_t TR1; /*!< ADC watchdog threshold register 1, Address offset: 0x20 */
- __IO uint32_t TR2; /*!< ADC watchdog threshold register 2, Address offset: 0x24 */
- __IO uint32_t TR3; /*!< ADC watchdog threshold register 3, Address offset: 0x28 */
- uint32_t RESERVED2; /*!< Reserved, 0x02C */
- __IO uint32_t SQR1; /*!< ADC regular sequence register 1, Address offset: 0x30 */
- __IO uint32_t SQR2; /*!< ADC regular sequence register 2, Address offset: 0x34 */
- __IO uint32_t SQR3; /*!< ADC regular sequence register 3, Address offset: 0x38 */
- __IO uint32_t SQR4; /*!< ADC regular sequence register 4, Address offset: 0x3C */
- __IO uint32_t DR; /*!< ADC regular data register, Address offset: 0x40 */
- uint32_t RESERVED3; /*!< Reserved, 0x044 */
- uint32_t RESERVED4; /*!< Reserved, 0x048 */
- __IO uint32_t JSQR; /*!< ADC injected sequence register, Address offset: 0x4C */
- uint32_t RESERVED5[4]; /*!< Reserved, 0x050 - 0x05C */
- __IO uint32_t OFR1; /*!< ADC offset register 1, Address offset: 0x60 */
- __IO uint32_t OFR2; /*!< ADC offset register 2, Address offset: 0x64 */
- __IO uint32_t OFR3; /*!< ADC offset register 3, Address offset: 0x68 */
- __IO uint32_t OFR4; /*!< ADC offset register 4, Address offset: 0x6C */
- uint32_t RESERVED6[4]; /*!< Reserved, 0x070 - 0x07C */
- __IO uint32_t JDR1; /*!< ADC injected data register 1, Address offset: 0x80 */
- __IO uint32_t JDR2; /*!< ADC injected data register 2, Address offset: 0x84 */
- __IO uint32_t JDR3; /*!< ADC injected data register 3, Address offset: 0x88 */
- __IO uint32_t JDR4; /*!< ADC injected data register 4, Address offset: 0x8C */
- uint32_t RESERVED7[4]; /*!< Reserved, 0x090 - 0x09C */
- __IO uint32_t AWD2CR; /*!< ADC Analog Watchdog 2 Configuration Register, Address offset: 0xA0 */
- __IO uint32_t AWD3CR; /*!< ADC Analog Watchdog 3 Configuration Register, Address offset: 0xA4 */
- uint32_t RESERVED8; /*!< Reserved, 0x0A8 */
- uint32_t RESERVED9; /*!< Reserved, 0x0AC */
- __IO uint32_t DIFSEL; /*!< ADC Differential Mode Selection Register, Address offset: 0xB0 */
- __IO uint32_t CALFACT; /*!< ADC Calibration Factors, Address offset: 0xB4 */
-
-} ADC_TypeDef;
-
-typedef struct
-{
- __IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1/3 base address + 0x300 */
- uint32_t RESERVED; /*!< Reserved, ADC1/3 base address + 0x304 */
- __IO uint32_t CCR; /*!< ADC common control register, Address offset: ADC1/3 base address + 0x308 */
- __IO uint32_t CDR; /*!< ADC common regular data register for dual
- AND triple modes, Address offset: ADC1/3 base address + 0x30C */
-} ADC_Common_TypeDef;
-
-/**
- * @brief Controller Area Network TxMailBox
- */
-typedef struct
-{
- __IO uint32_t TIR; /*!< CAN TX mailbox identifier register */
- __IO uint32_t TDTR; /*!< CAN mailbox data length control and time stamp register */
- __IO uint32_t TDLR; /*!< CAN mailbox data low register */
- __IO uint32_t TDHR; /*!< CAN mailbox data high register */
-} CAN_TxMailBox_TypeDef;
-
-/**
- * @brief Controller Area Network FIFOMailBox
- */
-typedef struct
-{
- __IO uint32_t RIR; /*!< CAN receive FIFO mailbox identifier register */
- __IO uint32_t RDTR; /*!< CAN receive FIFO mailbox data length control and time stamp register */
- __IO uint32_t RDLR; /*!< CAN receive FIFO mailbox data low register */
- __IO uint32_t RDHR; /*!< CAN receive FIFO mailbox data high register */
-} CAN_FIFOMailBox_TypeDef;
-
-/**
- * @brief Controller Area Network FilterRegister
- */
-typedef struct
-{
- __IO uint32_t FR1; /*!< CAN Filter bank register 1 */
- __IO uint32_t FR2; /*!< CAN Filter bank register 1 */
-} CAN_FilterRegister_TypeDef;
-
-/**
- * @brief Controller Area Network
- */
-typedef struct
-{
- __IO uint32_t MCR; /*!< CAN master control register, Address offset: 0x00 */
- __IO uint32_t MSR; /*!< CAN master status register, Address offset: 0x04 */
- __IO uint32_t TSR; /*!< CAN transmit status register, Address offset: 0x08 */
- __IO uint32_t RF0R; /*!< CAN receive FIFO 0 register, Address offset: 0x0C */
- __IO uint32_t RF1R; /*!< CAN receive FIFO 1 register, Address offset: 0x10 */
- __IO uint32_t IER; /*!< CAN interrupt enable register, Address offset: 0x14 */
- __IO uint32_t ESR; /*!< CAN error status register, Address offset: 0x18 */
- __IO uint32_t BTR; /*!< CAN bit timing register, Address offset: 0x1C */
- uint32_t RESERVED0[88]; /*!< Reserved, 0x020 - 0x17F */
- CAN_TxMailBox_TypeDef sTxMailBox[3]; /*!< CAN Tx MailBox, Address offset: 0x180 - 0x1AC */
- CAN_FIFOMailBox_TypeDef sFIFOMailBox[2]; /*!< CAN FIFO MailBox, Address offset: 0x1B0 - 0x1CC */
- uint32_t RESERVED1[12]; /*!< Reserved, 0x1D0 - 0x1FF */
- __IO uint32_t FMR; /*!< CAN filter master register, Address offset: 0x200 */
- __IO uint32_t FM1R; /*!< CAN filter mode register, Address offset: 0x204 */
- uint32_t RESERVED2; /*!< Reserved, 0x208 */
- __IO uint32_t FS1R; /*!< CAN filter scale register, Address offset: 0x20C */
- uint32_t RESERVED3; /*!< Reserved, 0x210 */
- __IO uint32_t FFA1R; /*!< CAN filter FIFO assignment register, Address offset: 0x214 */
- uint32_t RESERVED4; /*!< Reserved, 0x218 */
- __IO uint32_t FA1R; /*!< CAN filter activation register, Address offset: 0x21C */
- uint32_t RESERVED5[8]; /*!< Reserved, 0x220-0x23F */
- CAN_FilterRegister_TypeDef sFilterRegister[28]; /*!< CAN Filter Register, Address offset: 0x240-0x31C */
-} CAN_TypeDef;
-
-/**
- * @brief Analog Comparators
- */
-
-typedef struct
-{
- __IO uint32_t CSR; /*!< Comparator control Status register, Address offset: 0x00 */
-} COMP_TypeDef;
-
-/**
- * @brief CRC calculation unit
- */
-
-typedef struct
-{
- __IO uint32_t DR; /*!< CRC Data register, Address offset: 0x00 */
- __IO uint8_t IDR; /*!< CRC Independent data register, Address offset: 0x04 */
- uint8_t RESERVED0; /*!< Reserved, 0x05 */
- uint16_t RESERVED1; /*!< Reserved, 0x06 */
- __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */
- uint32_t RESERVED2; /*!< Reserved, 0x0C */
- __IO uint32_t INIT; /*!< Initial CRC value register, Address offset: 0x10 */
- __IO uint32_t POL; /*!< CRC polynomial register, Address offset: 0x14 */
-} CRC_TypeDef;
-
-/**
- * @brief Digital to Analog Converter
- */
-
-typedef struct
-{
- __IO uint32_t CR; /*!< DAC control register, Address offset: 0x00 */
- __IO uint32_t SWTRIGR; /*!< DAC software trigger register, Address offset: 0x04 */
- __IO uint32_t DHR12R1; /*!< DAC channel1 12-bit right-aligned data holding register, Address offset: 0x08 */
- __IO uint32_t DHR12L1; /*!< DAC channel1 12-bit left aligned data holding register, Address offset: 0x0C */
- __IO uint32_t DHR8R1; /*!< DAC channel1 8-bit right aligned data holding register, Address offset: 0x10 */
- __IO uint32_t DHR12R2; /*!< DAC channel2 12-bit right aligned data holding register, Address offset: 0x14 */
- __IO uint32_t DHR12L2; /*!< DAC channel2 12-bit left aligned data holding register, Address offset: 0x18 */
- __IO uint32_t DHR8R2; /*!< DAC channel2 8-bit right-aligned data holding register, Address offset: 0x1C */
- __IO uint32_t DHR12RD; /*!< Dual DAC 12-bit right-aligned data holding register, Address offset: 0x20 */
- __IO uint32_t DHR12LD; /*!< DUAL DAC 12-bit left aligned data holding register, Address offset: 0x24 */
- __IO uint32_t DHR8RD; /*!< DUAL DAC 8-bit right aligned data holding register, Address offset: 0x28 */
- __IO uint32_t DOR1; /*!< DAC channel1 data output register, Address offset: 0x2C */
- __IO uint32_t DOR2; /*!< DAC channel2 data output register, Address offset: 0x30 */
- __IO uint32_t SR; /*!< DAC status register, Address offset: 0x34 */
-} DAC_TypeDef;
-
-/**
- * @brief Debug MCU
- */
-
-typedef struct
-{
- __IO uint32_t IDCODE; /*!< MCU device ID code, Address offset: 0x00 */
- __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */
- __IO uint32_t APB1FZ; /*!< Debug MCU APB1 freeze register, Address offset: 0x08 */
- __IO uint32_t APB2FZ; /*!< Debug MCU APB2 freeze register, Address offset: 0x0C */
-}DBGMCU_TypeDef;
-
-/**
- * @brief DMA Controller
- */
-
-typedef struct
-{
- __IO uint32_t CCR; /*!< DMA channel x configuration register */
- __IO uint32_t CNDTR; /*!< DMA channel x number of data register */
- __IO uint32_t CPAR; /*!< DMA channel x peripheral address register */
- __IO uint32_t CMAR; /*!< DMA channel x memory address register */
-} DMA_Channel_TypeDef;
-
-typedef struct
-{
- __IO uint32_t ISR; /*!< DMA interrupt status register, Address offset: 0x00 */
- __IO uint32_t IFCR; /*!< DMA interrupt clear flag register, Address offset: 0x04 */
-} DMA_TypeDef;
-
-/**
- * @brief External Interrupt/Event Controller
- */
-
-typedef struct
-{
- __IO uint32_t IMR; /*!< EXTI Interrupt mask register, Address offset: 0x00 */
- __IO uint32_t EMR; /*!< EXTI Event mask register, Address offset: 0x04 */
- __IO uint32_t RTSR; /*!< EXTI Rising trigger selection register, Address offset: 0x08 */
- __IO uint32_t FTSR; /*!< EXTI Falling trigger selection register, Address offset: 0x0C */
- __IO uint32_t SWIER; /*!< EXTI Software interrupt event register, Address offset: 0x10 */
- __IO uint32_t PR; /*!< EXTI Pending register, Address offset: 0x14 */
- uint32_t RESERVED1; /*!< Reserved, 0x18 */
- uint32_t RESERVED2; /*!< Reserved, 0x1C */
- __IO uint32_t IMR2; /*!< EXTI Interrupt mask register, Address offset: 0x20 */
- __IO uint32_t EMR2; /*!< EXTI Event mask register, Address offset: 0x24 */
- __IO uint32_t RTSR2; /*!< EXTI Rising trigger selection register, Address offset: 0x28 */
- __IO uint32_t FTSR2; /*!< EXTI Falling trigger selection register, Address offset: 0x2C */
- __IO uint32_t SWIER2; /*!< EXTI Software interrupt event register, Address offset: 0x30 */
- __IO uint32_t PR2; /*!< EXTI Pending register, Address offset: 0x34 */
-}EXTI_TypeDef;
-
-/**
- * @brief FLASH Registers
- */
-
-typedef struct
-{
- __IO uint32_t ACR; /*!< FLASH access control register, Address offset: 0x00 */
- __IO uint32_t KEYR; /*!< FLASH key register, Address offset: 0x04 */
- __IO uint32_t OPTKEYR; /*!< FLASH option key register, Address offset: 0x08 */
- __IO uint32_t SR; /*!< FLASH status register, Address offset: 0x0C */
- __IO uint32_t CR; /*!< FLASH control register, Address offset: 0x10 */
- __IO uint32_t AR; /*!< FLASH address register, Address offset: 0x14 */
- uint32_t RESERVED; /*!< Reserved, 0x18 */
- __IO uint32_t OBR; /*!< FLASH Option byte register, Address offset: 0x1C */
- __IO uint32_t WRPR; /*!< FLASH Write register, Address offset: 0x20 */
-
-} FLASH_TypeDef;
-
-/**
- * @brief Option Bytes Registers
- */
-typedef struct
-{
- __IO uint16_t RDP; /*!© COPYRIGHT(c) 2014 STMicroelectronics
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- */
-
-/** @addtogroup CMSIS
- * @{
- */
-
-/** @addtogroup stm32f3xx
- * @{
- */
-
-#ifndef __STM32F3xx_H
-#define __STM32F3xx_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif /* __cplusplus */
-
-/** @addtogroup Library_configuration_section
- * @{
- */
-
-/* Uncomment the line below according to the target STM32 device used in your
- application
- */
-
-#if !defined (STM32F301x8) && !defined (STM32F302x8) && !defined (STM32F318xx) && \
- !defined (STM32F302xC) && !defined (STM32F303xC) && !defined (STM32F358xx) && \
- !defined (STM32F303x8) && !defined (STM32F334x8) && !defined (STM32F328xx) && \
- !defined (STM32F302xE) && !defined (STM32F303xE) && !defined (STM32F398xx) && \
- !defined (STM32F373xC) && !defined (STM32F378xx)
-
- /* #define STM32F301x8 */ /*!< STM32F301K6, STM32F301K8, STM32F301C6, STM32F301C8,
- STM32F301R6 and STM32F301R8 Devices */
- /* #define STM32F302x8 */ /*!< STM32F302K6, STM32F302K8, STM32F302C6, STM32F302C8,
- STM32F302R6 and STM32F302R8 Devices */
- /* #define STM32F302xC */ /*!< STM32F302CB, STM32F302CC, STM32F302RB, STM32F302RC, STM32F302VB and STM32F302VC Devices */
- /* #define STM32F302xE */ /*!< STM32F302CE, STM32F302RE, and STM32F302VE Devices */
- #define STM32F303x8 /*!< STM32F303K6, STM32F303K8, STM32F303C6, STM32F303C8,
- STM32F303R6 and STM32F303R8 Devices */
- /* #define STM32F303xC */ /*!< STM32F303CB, STM32F303CC, STM32F303RB, STM32F303RC, STM32F303VB and STM32F303VC Devices */
- /* #define STM32F303xE */ /*!< STM32F303RE, STM32F303VE and STM32F303ZE Devices */
- /* #define STM32F373xC */ /*!< STM32F373C8, STM32F373CB, STM32F373CC, STM32F373R8, STM32F373RB, STM32F373RC,
- STM32F373V8, STM32F373VB and STM32F373VC Devices */
- /* #define STM32F334x8 */ /*!< STM32F334C4, STM32F334C6, STM32F334C8, STM32F334R4, STM32F334R6 and STM32F334R8 Devices */
- /* #define STM32F318xx */ /*!< STM32F318K8, STM32F318C8: STM32F301x8 with regulator off: STM32F318xx Devices */
- /* #define STM32F328xx */ /*!< STM32F328C8, STM32F328R8: STM32F334x8 with regulator off: STM32F328xx Devices */
- /* #define STM32F358xx */ /*!< STM32F358CC, STM32F358RC, STM32F358VC: STM32F303xC with regulator off: STM32F358xx Devices */
- /* #define STM32F378xx */ /*!< STM32F378CC, STM32F378RC, STM32F378VC: STM32F373xC with regulator off: STM32F378xx Devices */
- /* #define STM32F398xx */ /*!< STM32F398CE, STM32F398RE, STM32F398VE: STM32F303xE with regulator off: STM32F398xx Devices */
-#endif
-
-/* Tip: To avoid modifying this file each time you need to switch between these
- devices, you can define the device in your toolchain compiler preprocessor.
- */
-#if !defined (USE_HAL_DRIVER)
-/**
- * @brief Comment the line below if you will not use the peripherals drivers.
- In this case, these drivers will not be included and the application code will
- be based on direct access to peripherals registers
- */
-#define USE_HAL_DRIVER
-#endif /* USE_HAL_DRIVER */
-
-/**
- * @brief CMSIS Device version number V2.1.0
- */
-#define __STM32F3xx_CMSIS_DEVICE_VERSION_MAIN (0x02) /*!< [31:24] main version */
-#define __STM32F3xx_CMSIS_DEVICE_VERSION_SUB1 (0x01) /*!< [23:16] sub1 version */
-#define __STM32F3xx_CMSIS_DEVICE_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
-#define __STM32F3xx_CMSIS_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */
-#define __STM32F3xx_CMSIS_DEVICE_VERSION ((__CMSIS_DEVICE_VERSION_MAIN << 24)\
- |(__CMSIS_DEVICE_HAL_VERSION_SUB1 << 16)\
- |(__CMSIS_DEVICE_HAL_VERSION_SUB2 << 8 )\
- |(__CMSIS_DEVICE_HAL_VERSION_RC))
-
-/**
- * @}
- */
-
-/** @addtogroup Device_Included
- * @{
- */
-
-#if defined(STM32F301x8)
- #include "stm32f301x8.h"
-#elif defined(STM32F302x8)
- #include "stm32f302x8.h"
-#elif defined(STM32F302xC)
- #include "stm32f302xc.h"
-#elif defined(STM32F302xE)
- #include "stm32f302xe.h"
-#elif defined(STM32F303x8)
- #include "stm32f303x8.h"
-#elif defined(STM32F303xC)
- #include "stm32f303xc.h"
-#elif defined(STM32F303xE)
- #include "stm32f303xe.h"
-#elif defined(STM32F373xC)
- #include "stm32f373xc.h"
-#elif defined(STM32F334x8)
- #include "stm32f334x8.h"
-#elif defined(STM32F318xx)
- #include "stm32f318xx.h"
-#elif defined(STM32F328xx)
- #include "stm32f328xx.h"
-#elif defined(STM32F358xx)
- #include "stm32f358xx.h"
-#elif defined(STM32F378xx)
- #include "stm32f378xx.h"
-#elif defined(STM32F398xx)
- #include "stm32f398xx.h"
-#else
- #error "Please select first the target STM32F3xx device used in your application (in stm32f3xx.h file)"
-#endif
-
-/**
- * @}
- */
-
-/** @addtogroup Exported_types
- * @{
- */
-typedef enum
-{
- RESET = 0,
- SET = !RESET
-} FlagStatus, ITStatus;
-
-typedef enum
-{
- DISABLE = 0,
- ENABLE = !DISABLE
-} FunctionalState;
-#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
-
-typedef enum
-{
- ERROR = 0,
- SUCCESS = !ERROR
-} ErrorStatus;
-
-/**
- * @}
- */
-
-
-/** @addtogroup Exported_macros
- * @{
- */
-#define SET_BIT(REG, BIT) ((REG) |= (BIT))
-
-#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
-
-#define READ_BIT(REG, BIT) ((REG) & (BIT))
-
-#define CLEAR_REG(REG) ((REG) = (0x0))
-
-#define WRITE_REG(REG, VAL) ((REG) = (VAL))
-
-#define READ_REG(REG) ((REG))
-
-#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
-
-#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
-
-
-#if defined (USE_HAL_DRIVER)
- #include "stm32f3xx_hal.h"
-#endif /* USE_HAL_DRIVER */
-
-
-/**
- * @}
- */
-
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* __STM32F3xx_H */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/system_stm32f3xx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/system_stm32f3xx.c
deleted file mode 100644
index e1c77d52d7..0000000000
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/system_stm32f3xx.c
+++ /dev/null
@@ -1,456 +0,0 @@
-/**
- ******************************************************************************
- * @file system_stm32f3xx.c
- * @author MCD Application Team
- * @version V2.1.0
- * @date 12-Sept-2014
- * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
- *
- * 1. This file provides two functions and one global variable to be called from
- * user application:
- * - SystemInit(): This function is called at startup just after reset and
- * before branch to main program. This call is made inside
- * the "startup_stm32f3xx.s" file.
- *
- * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
- * by the user application to setup the SysTick
- * timer or configure other parameters.
- *
- * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
- * be called whenever the core clock is changed
- * during program execution.
- *
- * 2. After each device reset the HSI (8 MHz) is used as system clock source.
- * Then SystemInit() function is called, in "startup_stm32f3xx.s" file, to
- * configure the system clock before to branch to main program.
- *
- * 3. This file configures the system clock as follows:
- *-----------------------------------------------------------------------------
- * System clock source | 1- PLL_HSE_EXTC | 3- PLL_HSI
- * | (external 8 MHz clock) | (internal 8 MHz)
- * | 2- PLL_HSE_XTAL |
- * | (external 8 MHz xtal) |
- *-----------------------------------------------------------------------------
- * SYSCLK(MHz) | 72 | 64
- *-----------------------------------------------------------------------------
- * AHBCLK (MHz) | 72 | 64
- *-----------------------------------------------------------------------------
- * APB1CLK (MHz) | 36 | 32
- *-----------------------------------------------------------------------------
- * APB2CLK (MHz) | 72 | 64
- *-----------------------------------------------------------------------------
- * USB capable (48 MHz precise clock) | NO | NO
- *-----------------------------------------------------------------------------
- ******************************************************************************
- * @attention
- *
- * © COPYRIGHT(c) 2014 STMicroelectronics
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- */
-
-/** @addtogroup CMSIS
- * @{
- */
-
-/** @addtogroup stm32f3xx_system
- * @{
- */
-
-/** @addtogroup STM32F3xx_System_Private_Includes
- * @{
- */
-
-#include "stm32f3xx.h"
-#include "hal_tick.h"
-
-/**
- * @}
- */
-
-/** @addtogroup STM32F3xx_System_Private_TypesDefinitions
- * @{
- */
-
-/**
- * @}
- */
-
-/** @addtogroup STM32F3xx_System_Private_Defines
- * @{
- */
-#if !defined (HSE_VALUE)
- #define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz.
- This value can be provided and adapted by the user application. */
-#endif /* HSE_VALUE */
-
-#if !defined (HSI_VALUE)
- #define HSI_VALUE ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz.
- This value can be provided and adapted by the user application. */
-#endif /* HSI_VALUE */
-
-/*!< Uncomment the following line if you need to relocate your vector Table in
- Internal SRAM. */
-/* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field.
- This value must be a multiple of 0x200. */
-/**
- * @}
- */
-
-/** @addtogroup STM32F3xx_System_Private_Macros
- * @{
- */
-
-/* Select the clock sources (other than HSI) to start with (0=OFF, 1=ON) */
-#define USE_PLL_HSE_EXTC (1) /* Use external clock */
-#define USE_PLL_HSE_XTAL (1) /* Use external xtal */
-
-/**
- * @}
- */
-
-/** @addtogroup STM32F3xx_System_Private_Variables
- * @{
- */
- /* This variable is updated in three ways:
- 1) by calling CMSIS function SystemCoreClockUpdate()
- 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
- 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
- Note: If you use this function to configure the system clock there is no need to
- call the 2 first functions listed above, since SystemCoreClock variable is
- updated automatically.
- */
-uint32_t SystemCoreClock = 72000000;
-const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
-
-/**
- * @}
- */
-
-/** @addtogroup STM32F3xx_System_Private_FunctionPrototypes
- * @{
- */
-
-#if (USE_PLL_HSE_XTAL != 0) || (USE_PLL_HSE_EXTC != 0)
-uint8_t SetSysClock_PLL_HSE(uint8_t bypass);
-#endif
-
-uint8_t SetSysClock_PLL_HSI(void);
-
-/**
- * @}
- */
-
-/** @addtogroup STM32F3xx_System_Private_Functions
- * @{
- */
-
-/**
- * @brief Setup the microcontroller system
- * Initialize the FPU setting, vector table location and the PLL configuration is reset.
- * @param None
- * @retval None
- */
-void SystemInit(void)
-{
- /* FPU settings ------------------------------------------------------------*/
- #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
- SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
- #endif
-
- /* Reset the RCC clock configuration to the default reset state ------------*/
- /* Set HSION bit */
- RCC->CR |= (uint32_t)0x00000001;
-
- /* Reset CFGR register */
- RCC->CFGR &= 0xF87FC00C;
-
- /* Reset HSEON, CSSON and PLLON bits */
- RCC->CR &= (uint32_t)0xFEF6FFFF;
-
- /* Reset HSEBYP bit */
- RCC->CR &= (uint32_t)0xFFFBFFFF;
-
- /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE bits */
- RCC->CFGR &= (uint32_t)0xFF80FFFF;
-
- /* Reset PREDIV1[3:0] bits */
- RCC->CFGR2 &= (uint32_t)0xFFFFFFF0;
-
- /* Reset USARTSW[1:0], I2CSW and TIMs bits */
- RCC->CFGR3 &= (uint32_t)0xFF00FCCC;
-
- /* Disable all interrupts */
- RCC->CIR = 0x00000000;
-
-#ifdef VECT_TAB_SRAM
- SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
-#else
- SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
-#endif
-
- /* Configure the Cube driver */
- SystemCoreClock = 8000000; // At this stage the HSI is used as system clock
- HAL_Init();
-
- /* Configure the System clock source, PLL Multiplier and Divider factors,
- AHB/APBx prescalers and Flash settings */
- SetSysClock();
-
- /* Reset the timer to avoid issues after the RAM initialization */
- TIM_MST_RESET_ON;
- TIM_MST_RESET_OFF;
-}
-
-/**
- * @brief Update SystemCoreClock variable according to Clock Register Values.
- * The SystemCoreClock variable contains the core clock (HCLK), it can
- * be used by the user application to setup the SysTick timer or configure
- * other parameters.
- *
- * @note Each time the core clock (HCLK) changes, this function must be called
- * to update SystemCoreClock variable value. Otherwise, any configuration
- * based on this variable will be incorrect.
- *
- * @note - The system frequency computed by this function is not the real
- * frequency in the chip. It is calculated based on the predefined
- * constant and the selected clock source:
- *
- * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
- *
- * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
- *
- * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
- * or HSI_VALUE(*) multiplied/divided by the PLL factors.
- *
- * (*) HSI_VALUE is a constant defined in stm32f3xx_hal.h file (default value
- * 8 MHz) but the real value may vary depending on the variations
- * in voltage and temperature.
- *
- * (**) HSE_VALUE is a constant defined in stm32f3xx_hal.h file (default value
- * 8 MHz), user has to ensure that HSE_VALUE is same as the real
- * frequency of the crystal used. Otherwise, this function may
- * have wrong result.
- *
- * - The result of this function could be not correct when using fractional
- * value for HSE crystal.
- *
- * @param None
- * @retval None
- */
-void SystemCoreClockUpdate (void)
-{
- uint32_t tmp = 0, pllmull = 0, pllsource = 0, predivfactor = 0;
-
- /* Get SYSCLK source -------------------------------------------------------*/
- tmp = RCC->CFGR & RCC_CFGR_SWS;
-
- switch (tmp)
- {
- case RCC_CFGR_SWS_HSI: /* HSI used as system clock */
- SystemCoreClock = HSI_VALUE;
- break;
- case RCC_CFGR_SWS_HSE: /* HSE used as system clock */
- SystemCoreClock = HSE_VALUE;
- break;
- case RCC_CFGR_SWS_PLL: /* PLL used as system clock */
- /* Get PLL clock source and multiplication factor ----------------------*/
- pllmull = RCC->CFGR & RCC_CFGR_PLLMUL;
- pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
- pllmull = ( pllmull >> 18) + 2;
-
-#if defined (STM32F302xE) || defined (STM32F303xE) || defined (STM32F398xx)
- predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1;
- if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV)
- {
- /* HSE oscillator clock selected as PREDIV1 clock entry */
- SystemCoreClock = (HSE_VALUE / predivfactor) * pllmull;
- }
- else
- {
- /* HSI oscillator clock selected as PREDIV1 clock entry */
- SystemCoreClock = (HSI_VALUE / predivfactor) * pllmull;
- }
-#else
- if (pllsource == RCC_CFGR_PLLSRC_HSI_DIV2)
- {
- /* HSI oscillator clock divided by 2 selected as PLL clock entry */
- SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
- }
- else
- {
- predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1;
- /* HSE oscillator clock selected as PREDIV1 clock entry */
- SystemCoreClock = (HSE_VALUE / predivfactor) * pllmull;
- }
-#endif /* STM32F302xE || STM32F303xE || STM32F398xx */
- break;
- default: /* HSI used as system clock */
- SystemCoreClock = HSI_VALUE;
- break;
- }
- /* Compute HCLK clock frequency ----------------*/
- /* Get HCLK prescaler */
- tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
- /* HCLK clock frequency */
- SystemCoreClock >>= tmp;
-}
-
-/**
- * @brief Configures the System clock source, PLL Multiplier and Divider factors,
- * AHB/APBx prescalers and Flash settings
- * @note This function should be called only once the RCC clock configuration
- * is reset to the default reset state (done in SystemInit() function).
- * @param None
- * @retval None
- */
-void SetSysClock(void)
-{
- /* 1- Try to start with HSE and external clock */
-#if USE_PLL_HSE_EXTC != 0
- if (SetSysClock_PLL_HSE(1) == 0)
-#endif
- {
- /* 2- If fail try to start with HSE and external xtal */
- #if USE_PLL_HSE_XTAL != 0
- if (SetSysClock_PLL_HSE(0) == 0)
- #endif
- {
- /* 3- If fail start with HSI clock */
- if (SetSysClock_PLL_HSI() == 0)
- {
- while(1)
- {
- // [TODO] Put something here to tell the user that a problem occured...
- }
- }
- }
- }
-
- /* Output clock on MCO1 pin(PA8) for debugging purpose */
- //HAL_RCC_MCOConfig(RCC_MCO, RCC_MCOSOURCE_SYSCLK, RCC_MCO_DIV1); // 72 MHz or 64 MHz
-}
-
-#if (USE_PLL_HSE_XTAL != 0) || (USE_PLL_HSE_EXTC != 0)
-/******************************************************************************/
-/* PLL (clocked by HSE) used as System clock source */
-/******************************************************************************/
-uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
-{
- RCC_ClkInitTypeDef RCC_ClkInitStruct;
- RCC_OscInitTypeDef RCC_OscInitStruct;
-
- /* Enable HSE oscillator and activate PLL with HSE as source */
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
- if (bypass == 0)
- {
- RCC_OscInitStruct.HSEState = RCC_HSE_ON; /* External 8 MHz xtal on OSC_IN/OSC_OUT */
- }
- else
- {
- RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; /* External 8 MHz clock on OSC_IN */
- }
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
- RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
- RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; // 72 MHz (8 MHz * 9)
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
- {
- return 0; // FAIL
- }
-
- /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
- RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 72 MHz
- RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 72 MHz
- RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; // 36 MHz
- RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 72 MHz
- if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
- {
- return 0; // FAIL
- }
-
- /* Output clock on MCO1 pin(PA8) for debugging purpose */
- //if (bypass == 0)
- // HAL_RCC_MCOConfig(RCC_MCO, RCC_MCOSOURCE_HSE, RCC_MCO_DIV2); // 4 MHz with xtal
- //else
- // HAL_RCC_MCOConfig(RCC_MCO, RCC_MCOSOURCE_HSE, RCC_MCO_DIV1); // 8 MHz with ext clock
-
- return 1; // OK
-}
-#endif
-
-/******************************************************************************/
-/* PLL (clocked by HSI) used as System clock source */
-/******************************************************************************/
-uint8_t SetSysClock_PLL_HSI(void)
-{
- RCC_ClkInitTypeDef RCC_ClkInitStruct;
- RCC_OscInitTypeDef RCC_OscInitStruct;
-
- /* Enable HSI oscillator and activate PLL with HSI as source */
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
- RCC_OscInitStruct.HSIState = RCC_HSI_ON;
- RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
- RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
- RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
- RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16; // 64 MHz (8 MHz/2 * 16)
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
- {
- return 0; // FAIL
- }
-
- /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
- RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 64 MHz
- RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 64 MHz
- RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; // 32 MHz
- RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 64 MHz
- if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
- {
- return 0; // FAIL
- }
-
- /* Output clock on MCO1 pin(PA8) for debugging purpose */
- //HAL_RCC_MCOConfig(RCC_MCO, RCC_MCOSOURCE_HSI, RCC_MCO_DIV1); // 8 MHz
-
- return 1; // OK
-}
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/system_stm32f3xx.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/system_stm32f3xx.h
deleted file mode 100644
index d91ace096d..0000000000
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/system_stm32f3xx.h
+++ /dev/null
@@ -1,124 +0,0 @@
-/**
- ******************************************************************************
- * @file system_stm32f3xx.h
- * @author MCD Application Team
- * @version V2.1.0
- * @date 12-Sept-2014
- * @brief CMSIS Cortex-M4 Device System Source File for STM32F3xx devices.
- ******************************************************************************
- * @attention
- *
- * © COPYRIGHT(c) 2014 STMicroelectronics
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- */
-
-/** @addtogroup CMSIS
- * @{
- */
-
-/** @addtogroup stm32f3xx_system
- * @{
- */
-
-/**
- * @brief Define to prevent recursive inclusion
- */
-#ifndef __SYSTEM_STM32F3XX_H
-#define __SYSTEM_STM32F3XX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/** @addtogroup STM32F3xx_System_Includes
- * @{
- */
-
-/**
- * @}
- */
-
-
-/** @addtogroup STM32F3xx_System_Exported_types
- * @{
- */
- /* This variable is updated in three ways:
- 1) by calling CMSIS function SystemCoreClockUpdate()
- 3) by calling HAL API function HAL_RCC_GetHCLKFreq()
- 3) by calling HAL API function HAL_RCC_ClockConfig()
- Note: If you use this function to configure the system clock; then there
- is no need to call the 2 first functions listed above, since SystemCoreClock
- variable is updated automatically.
- */
-extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
-
-
-/**
- * @}
- */
-
-/** @addtogroup STM32F3xx_System_Exported_Constants
- * @{
- */
-
-/**
- * @}
- */
-
-/** @addtogroup STM32F3xx_System_Exported_Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/** @addtogroup STM32F3xx_System_Exported_Functions
- * @{
- */
-
-extern void SystemInit(void);
-extern void SystemCoreClockUpdate(void);
-extern void SetSysClock(void);
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /*__SYSTEM_STM32F3XX_H */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal.c
index d46efb1b67..eaf93c69c9 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief HAL module driver.
* This is the common part of the HAL initialization
*
@@ -23,7 +23,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -70,11 +70,11 @@
* @{
*/
/**
- * @brief STM32F3xx HAL Driver version number V1.1.1
+ * @brief STM32F3xx HAL Driver version number V1.1.0
*/
#define __STM32F3xx_HAL_VERSION_MAIN (0x01) /*!< [31:24] main version */
#define __STM32F3xx_HAL_VERSION_SUB1 (0x01) /*!< [23:16] sub1 version */
-#define __STM32F3xx_HAL_VERSION_SUB2 (0x01) /*!< [15:8] sub2 version */
+#define __STM32F3xx_HAL_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
#define __STM32F3xx_HAL_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32F3xx_HAL_VERSION ((__STM32F3xx_HAL_VERSION_MAIN << 24)\
|(__STM32F3xx_HAL_VERSION_SUB1 << 16)\
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal.h
index 2d4b84af2c..f6273046ad 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal.h
@@ -2,14 +2,14 @@
******************************************************************************
* @file stm32f3xx_hal.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief This file contains all the functions prototypes for the HAL
* module driver.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_adc.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_adc.c
index cecb0d80b5..ff2567c0d3 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_adc.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_adc.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_adc.c
* @author MCD Application conversion
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the Analog to Digital Convertor (ADC)
* peripheral:
@@ -158,7 +158,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_adc.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_adc.h
index 44e09c1938..bad3de0b0a 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_adc.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_adc.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_adc.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file containing functions prototypes of ADC HAL library.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_adc_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_adc_ex.c
index 0c90c8a7de..533014551a 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_adc_ex.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_adc_ex.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_adc_ex.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the Analog to Digital Convertor (ADC)
* peripheral:
@@ -164,7 +164,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -379,7 +379,7 @@ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
uint32_t WaitLoopIndex = 0;
/* Check ADC handle */
- if(hadc == NULL)
+ if(hadc == HAL_NULL)
{
return HAL_ERROR;
}
@@ -501,7 +501,7 @@ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
/* Parameters that can be updated only when ADC is disabled: */
/* - Multimode clock configuration */
if ((__HAL_ADC_IS_ENABLED(hadc) == RESET) &&
- ( (tmphadcSharingSameCommonRegister.Instance == NULL) ||
+ ( (tmphadcSharingSameCommonRegister.Instance == HAL_NULL) ||
(__HAL_ADC_IS_ENABLED(&tmphadcSharingSameCommonRegister) == RESET) ))
{
/* Reset configuration of ADC common register CCR: */
@@ -652,7 +652,7 @@ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
HAL_StatusTypeDef tmpHALStatus = HAL_OK;
/* Check ADC handle */
- if(hadc == NULL)
+ if(hadc == HAL_NULL)
{
return HAL_ERROR;
}
@@ -793,7 +793,7 @@ HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
ADC_HandleTypeDef tmphadcSharingSameCommonRegister;
/* Check ADC handle */
- if(hadc == NULL)
+ if(hadc == HAL_NULL)
{
return HAL_ERROR;
}
@@ -953,7 +953,7 @@ HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
/* Software is allowed to change common parameters only when all ADCs of */
/* the common group are disabled. */
if ((__HAL_ADC_IS_ENABLED(hadc) == RESET) &&
- ( (tmphadcSharingSameCommonRegister.Instance == NULL) ||
+ ( (tmphadcSharingSameCommonRegister.Instance == HAL_NULL) ||
(__HAL_ADC_IS_ENABLED(&tmphadcSharingSameCommonRegister) == RESET) ))
{
/* Reset configuration of ADC common register CCR:
@@ -1051,7 +1051,7 @@ HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
HAL_StatusTypeDef tmpHALStatus = HAL_OK;
/* Check ADC handle */
- if(hadc == NULL)
+ if(hadc == HAL_NULL)
{
return HAL_ERROR;
}
@@ -3875,7 +3875,7 @@ HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t
/* (Depending on STM32F3 product, there may be up to 2 ADC slaves) */
__HAL_ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
- if (tmphadcSlave.Instance == NULL)
+ if (tmphadcSlave.Instance == HAL_NULL)
{
/* Update ADC state machine to error */
hadc->State = HAL_ADC_STATE_ERROR;
@@ -3995,7 +3995,7 @@ HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc)
/* (Depending on STM32F3 product, there may be up to 2 ADC slaves) */
__HAL_ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
- if (tmphadcSlave.Instance == NULL)
+ if (tmphadcSlave.Instance == HAL_NULL)
{
/* Update ADC state machine to error */
hadc->State = HAL_ADC_STATE_ERROR;
@@ -4554,7 +4554,7 @@ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConf
/* Software is allowed to change common parameters only when all ADCs */
/* of the common group are disabled. */
if ((__HAL_ADC_IS_ENABLED(hadc) == RESET) &&
- ( (tmphadcSharingSameCommonRegister.Instance == NULL) ||
+ ( (tmphadcSharingSameCommonRegister.Instance == HAL_NULL) ||
(__HAL_ADC_IS_ENABLED(&tmphadcSharingSameCommonRegister) == RESET) ))
{
/* If Channel_16 is selected, enable Temp. sensor measurement path */
@@ -5205,7 +5205,7 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_I
/* Software is allowed to change common parameters only when all ADCs */
/* of the common group are disabled. */
if ((__HAL_ADC_IS_ENABLED(hadc) == RESET) &&
- ( (tmphadcSharingSameCommonRegister.Instance == NULL) ||
+ ( (tmphadcSharingSameCommonRegister.Instance == HAL_NULL) ||
(__HAL_ADC_IS_ENABLED(&tmphadcSharingSameCommonRegister) == RESET) ))
{
/* If Channel_16 is selected, enable Temp. sensor measurement path */
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_adc_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_adc_ex.h
index c3c5c3caa0..9fe9193604 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_adc_ex.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_adc_ex.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_adc_ex.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file containing functions prototypes of ADC HAL library.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -3300,7 +3300,7 @@ typedef struct
)? \
((__HANDLE_OTHER_ADC__)->Instance = ADC3) \
: \
- ((__HANDLE_OTHER_ADC__)->Instance = NULL) \
+ ((__HANDLE_OTHER_ADC__)->Instance = HAL_NULL) \
) \
) \
) \
@@ -3324,7 +3324,7 @@ typedef struct
#if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
#define __HAL_ADC_COMMON_ADC_OTHER(__HANDLE__, __HANDLE_OTHER_ADC__) \
- ((__HANDLE_OTHER_ADC__)->Instance = NULL)
+ ((__HANDLE_OTHER_ADC__)->Instance = HAL_NULL)
#endif /* STM32F301x8 || STM32F302x8 || STM32F318xx */
/**
@@ -3345,7 +3345,7 @@ typedef struct
)? \
((__HANDLE_SLAVE__)->Instance = ADC4) \
: \
- ((__HANDLE_SLAVE__)->Instance = NULL) \
+ ((__HANDLE_SLAVE__)->Instance = HAL_NULL) \
) \
)
#endif /* STM32F303xE || STM32F398xx || */
@@ -3359,7 +3359,7 @@ typedef struct
)? \
((__HANDLE_SLAVE__)->Instance = ADC2) \
: \
- ( NULL ) \
+ ( HAL_NULL ) \
)
#endif /* STM32F302xE || */
/* STM32F302xC || */
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_can.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_can.c
index 1bf54e15dc..c7a1b6ac32 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_can.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_can.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_can.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief CAN HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -73,7 +73,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -161,7 +161,7 @@ HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan)
uint32_t tickstart = 0;
/* Check CAN handle */
- if(hcan == NULL)
+ if(hcan == HAL_NULL)
{
return HAL_ERROR;
}
@@ -431,7 +431,7 @@ HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTy
HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan)
{
/* Check CAN handle */
- if(hcan == NULL)
+ if(hcan == HAL_NULL)
{
return HAL_ERROR;
}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_can.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_can.h
index 1111465329..4ba14a452e 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_can.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_can.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_can.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of CAN HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_cec.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_cec.c
index bdd82d6e34..68a4f15ff2 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_cec.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_cec.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_cec.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief CEC HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -49,7 +49,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -148,7 +148,7 @@ HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec)
uint32_t tmpreg = 0x0;
/* Check the CEC handle allocation */
- if(hcec == NULL)
+ if(hcec == HAL_NULL)
{
return HAL_ERROR;
}
@@ -209,7 +209,7 @@ HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec)
HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec)
{
/* Check the CEC handle allocation */
- if(hcec == NULL)
+ if(hcec == HAL_NULL)
{
return HAL_ERROR;
}
@@ -324,7 +324,7 @@ HAL_StatusTypeDef HAL_CEC_Transmit(CEC_HandleTypeDef *hcec, uint8_t DestinationA
if((hcec->State == HAL_CEC_STATE_READY) && (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) == RESET))
{
hcec->ErrorCode = HAL_CEC_ERROR_NONE;
- if((pData == NULL) && (Size > 0))
+ if((pData == HAL_NULL) && (Size > 0))
{
hcec->State = HAL_CEC_STATE_ERROR;
return HAL_ERROR;
@@ -472,7 +472,7 @@ HAL_StatusTypeDef HAL_CEC_Receive(CEC_HandleTypeDef *hcec, uint8_t *pData, uint3
if (hcec->State == HAL_CEC_STATE_READY)
{
hcec->ErrorCode = HAL_CEC_ERROR_NONE;
- if (pData == NULL)
+ if (pData == HAL_NULL)
{
hcec->State = HAL_CEC_STATE_ERROR;
return HAL_ERROR;
@@ -576,7 +576,7 @@ HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t Destinati
if (((hcec->State == HAL_CEC_STATE_READY) || (hcec->State == HAL_CEC_STATE_STANDBY_RX))
&& (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) == RESET))
{
- if((pData == NULL) && (Size > 0))
+ if((pData == HAL_NULL) && (Size > 0))
{
hcec->State = HAL_CEC_STATE_ERROR;
return HAL_ERROR;
@@ -706,7 +706,7 @@ HAL_StatusTypeDef HAL_CEC_Receive_IT(CEC_HandleTypeDef *hcec, uint8_t *pData)
{
if(hcec->State == HAL_CEC_STATE_READY)
{
- if(pData == NULL)
+ if(pData == HAL_NULL)
{
hcec->State = HAL_CEC_STATE_ERROR;
return HAL_ERROR;
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_cec.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_cec.h
index 912f6ce1b1..44a466485d 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_cec.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_cec.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_cec.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of CEC HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_comp.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_comp.c
index 88c60037b6..44be22d53e 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_comp.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_comp.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_comp.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief COMP HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -201,7 +201,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -279,7 +279,7 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
HAL_StatusTypeDef status = HAL_OK;
/* Check the COMP handle allocation and lock status */
- if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
+ if((hcomp == HAL_NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
{
status = HAL_ERROR;
}
@@ -342,7 +342,7 @@ HAL_StatusTypeDef HAL_COMP_DeInit(COMP_HandleTypeDef *hcomp)
HAL_StatusTypeDef status = HAL_OK;
/* Check the COMP handle allocation and lock status */
- if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
+ if((hcomp == HAL_NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
{
status = HAL_ERROR;
}
@@ -416,7 +416,7 @@ HAL_StatusTypeDef HAL_COMP_Start(COMP_HandleTypeDef *hcomp)
HAL_StatusTypeDef status = HAL_OK;
/* Check the COMP handle allocation and lock status */
- if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
+ if((hcomp == HAL_NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
{
status = HAL_ERROR;
}
@@ -451,7 +451,7 @@ HAL_StatusTypeDef HAL_COMP_Stop(COMP_HandleTypeDef *hcomp)
HAL_StatusTypeDef status = HAL_OK;
/* Check the COMP handle allocation and lock status */
- if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
+ if((hcomp == HAL_NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
{
status = HAL_ERROR;
}
@@ -587,7 +587,7 @@ HAL_StatusTypeDef HAL_COMP_Lock(COMP_HandleTypeDef *hcomp)
HAL_StatusTypeDef status = HAL_OK;
/* Check the COMP handle allocation and lock status */
- if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
+ if((hcomp == HAL_NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
{
status = HAL_ERROR;
}
@@ -679,7 +679,7 @@ __weak void HAL_COMP_TriggerCallback(COMP_HandleTypeDef *hcomp)
HAL_COMP_StateTypeDef HAL_COMP_GetState(COMP_HandleTypeDef *hcomp)
{
/* Check the COMP handle allocation */
- if(hcomp == NULL)
+ if(hcomp == HAL_NULL)
{
return HAL_COMP_STATE_RESET;
}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_comp.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_comp.h
index 0c8b3af029..9edfb0fea9 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_comp.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_comp.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_comp.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of COMP HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_comp_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_comp_ex.h
index 4abf2150ce..249b2dfe52 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_comp_ex.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_comp_ex.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_comp_ex.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of COMP HAL Extended module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_conf.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_conf.h
index ff58ca774b..af2ea7528c 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_conf.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_conf.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_conf.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief HAL configuration file.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_cortex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_cortex.c
index 1bf1f78692..329927d113 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_cortex.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_cortex.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_cortex.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief CORTEX HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -94,7 +94,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_cortex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_cortex.h
index c34640a613..5dc0d0c748 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_cortex.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_cortex.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_cortex.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of CORTEX HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_crc.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_crc.c
index bd4670926b..6ce77f57c4 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_crc.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_crc.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_crc.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief CRC HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -34,7 +34,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -115,7 +115,7 @@ static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint3
HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc)
{
/* Check the CRC handle allocation */
- if(hcrc == NULL)
+ if(hcrc == HAL_NULL)
{
return HAL_ERROR;
}
@@ -189,7 +189,7 @@ HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc)
HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc)
{
/* Check the CRC handle allocation */
- if(hcrc == NULL)
+ if(hcrc == HAL_NULL)
{
return HAL_ERROR;
}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_crc.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_crc.h
index 187e4d9b01..cd6a931d8a 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_crc.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_crc.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_crc.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of CRC HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_crc_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_crc_ex.c
index 75f17bb8c6..2f4b3bf73f 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_crc_ex.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_crc_ex.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_crc_ex.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Extended CRC HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -51,7 +51,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_crc_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_crc_ex.h
index 1de23e0aa5..586ae29834 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_crc_ex.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_crc_ex.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_crc_ex.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of CRC HAL Extended module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dac.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dac.c
index 3fa1f5b39e..c0c26a5b8e 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dac.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dac.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_dac.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the Digital-to-Analog Converter (DAC) peripheral:
* + DAC channels configuration: trigger, output buffer, data format
@@ -171,7 +171,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -249,7 +249,7 @@
HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac)
{
/* Check DAC handle */
- if(hdac == NULL)
+ if(hdac == HAL_NULL)
{
return HAL_ERROR;
}
@@ -284,7 +284,7 @@ HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac)
HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac)
{
/* Check DAC handle */
- if(hdac == NULL)
+ if(hdac == HAL_NULL)
{
return HAL_ERROR;
}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dac.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dac.h
index 00d7034248..1c6f3001ac 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dac.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dac.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_dac.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of DAC HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dac_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dac_ex.c
index 0e849d5f29..1404725582 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dac_ex.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dac_ex.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_dac_ex.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Extended DAC HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -16,7 +16,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dac_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dac_ex.h
index cd90ed01bb..cb46092afc 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dac_ex.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dac_ex.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_dac_ex.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of DAC HAL Extended module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_def.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_def.h
index c519ab8b28..8422c0b819 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_def.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_def.h
@@ -2,14 +2,14 @@
******************************************************************************
* @file stm32f3xx_hal_def.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief This file contains HAL common defines, enumeration, macros and
* structures definitions.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -70,8 +70,8 @@ typedef enum
} HAL_LockTypeDef;
/* Exported macro ------------------------------------------------------------*/
-#ifndef NULL
- #define NULL 0
+#ifndef HAL_NULL
+ #define HAL_NULL (void *) 0
#endif
#define HAL_MAX_DELAY 0xFFFFFFFF
@@ -85,8 +85,6 @@ typedef enum
(__DMA_HANDLE_).Parent = (__HANDLE__); \
} while(0)
-#define UNUSED(x) ((void)(x))
-
/** @brief Reset the Handle's State field.
* @param __HANDLE__: specifies the Peripheral Handle.
* @note This macro can be used for the following purpose:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dma.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dma.c
index 00aee36fe4..1427d566c5 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dma.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dma.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_dma.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief DMA HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -75,7 +75,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -173,7 +173,7 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
uint32_t tmp = 0;
/* Check the DMA handle allocation */
- if(hdma == NULL)
+ if(hdma == HAL_NULL)
{
return HAL_ERROR;
}
@@ -226,7 +226,7 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
{
/* Check the DMA handle allocation */
- if(hdma == NULL)
+ if(hdma == HAL_NULL)
{
return HAL_ERROR;
}
@@ -531,7 +531,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
/* Process Unlocked */
__HAL_UNLOCK(hdma);
- if (hdma->XferErrorCallback != NULL)
+ if (hdma->XferErrorCallback != HAL_NULL)
{
/* Transfer error callback */
hdma->XferErrorCallback(hdma);
@@ -556,7 +556,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_READY_HALF;
- if(hdma->XferHalfCpltCallback != NULL)
+ if(hdma->XferHalfCpltCallback != HAL_NULL)
{
/* Half transfer callback */
hdma->XferHalfCpltCallback(hdma);
@@ -586,7 +586,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
/* Process Unlocked */
__HAL_UNLOCK(hdma);
- if(hdma->XferCpltCallback != NULL)
+ if(hdma->XferCpltCallback != HAL_NULL)
{
/* Transfer complete callback */
hdma->XferCpltCallback(hdma);
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dma.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dma.h
index ec2926284b..182d9e093f 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dma.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dma.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_dma.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of DMA HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dma_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dma_ex.h
index 322fd56ca9..559fb0336a 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dma_ex.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_dma_ex.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_dma_ex.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of DMA HAL Extended module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_flash.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_flash.c
index 90365b8dac..0b4cf438ff 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_flash.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_flash.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_flash.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief FLASH HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -72,7 +72,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_flash.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_flash.h
index a6fd920a0b..01d87db439 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_flash.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_flash.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_flash.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of Flash HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_flash_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_flash_ex.c
index 3a6561b798..68b5b6bc8a 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_flash_ex.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_flash_ex.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_flash_ex.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Extended FLASH HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -31,7 +31,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_flash_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_flash_ex.h
index c92259a9aa..29451ea231 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_flash_ex.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_flash_ex.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_flash_ex.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of Flash HAL Extended module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_gpio.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_gpio.c
index 39836bc053..efc46d49b4 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_gpio.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_gpio.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_gpio.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief GPIO HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -101,7 +101,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_gpio.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_gpio.h
index b23f3167f2..302b0572e9 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_gpio.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_gpio.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_gpio.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of GPIO HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_gpio_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_gpio_ex.h
index 8ca892166c..2db4e6b79e 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_gpio_ex.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_gpio_ex.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_gpio_ex.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of GPIO HAL Extended module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_hrtim.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_hrtim.c
index cc36e81483..e4b5a46459 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_hrtim.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_hrtim.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_hrtim.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief TIM HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the High Resolution Timer (HRTIM) peripheral:
@@ -288,7 +288,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -481,7 +481,7 @@ HAL_StatusTypeDef HAL_HRTIM_Init(HRTIM_HandleTypeDef * hhrtim)
uint32_t hrtim_mcr;
/* Check the HRTIM handle allocation */
- if(hhrtim == NULL)
+ if(hhrtim == HAL_NULL)
{
return HAL_ERROR;
}
@@ -494,12 +494,12 @@ HAL_StatusTypeDef HAL_HRTIM_Init(HRTIM_HandleTypeDef * hhrtim)
hhrtim->State = HAL_HRTIM_STATE_BUSY;
/* Initialize the DMA handles */
- hhrtim->hdmaMaster = (DMA_HandleTypeDef *)NULL;
- hhrtim->hdmaTimerA = (DMA_HandleTypeDef *)NULL;
- hhrtim->hdmaTimerB = (DMA_HandleTypeDef *)NULL;
- hhrtim->hdmaTimerC = (DMA_HandleTypeDef *)NULL;
- hhrtim->hdmaTimerD = (DMA_HandleTypeDef *)NULL;
- hhrtim->hdmaTimerE = (DMA_HandleTypeDef *)NULL;
+ hhrtim->hdmaMaster = (DMA_HandleTypeDef *)HAL_NULL;
+ hhrtim->hdmaTimerA = (DMA_HandleTypeDef *)HAL_NULL;
+ hhrtim->hdmaTimerB = (DMA_HandleTypeDef *)HAL_NULL;
+ hhrtim->hdmaTimerC = (DMA_HandleTypeDef *)HAL_NULL;
+ hhrtim->hdmaTimerD = (DMA_HandleTypeDef *)HAL_NULL;
+ hhrtim->hdmaTimerE = (DMA_HandleTypeDef *)HAL_NULL;
/* HRTIM output synchronization configuration (if required) */
if ((hhrtim->Init.SyncOptions & HRTIM_SYNCOPTION_MASTER) != RESET)
@@ -580,7 +580,7 @@ HAL_StatusTypeDef HAL_HRTIM_Init(HRTIM_HandleTypeDef * hhrtim)
HAL_StatusTypeDef HAL_HRTIM_DeInit (HRTIM_HandleTypeDef * hhrtim)
{
/* Check the HRTIM handle allocation */
- if(hhrtim == NULL)
+ if(hhrtim == HAL_NULL)
{
return HAL_ERROR;
}
@@ -1215,8 +1215,8 @@ HAL_StatusTypeDef HAL_HRTIM_SimpleOCChannelConfig(HRTIM_HandleTypeDef * hhrtim,
HRTIM_SimpleOCChannelCfgTypeDef* pSimpleOCChannelCfg)
{
uint32_t CompareUnit = 0xFFFFFFFF;
- HRTIM_CompareCfgTypeDef CompareCfg = {0};
- HRTIM_OutputCfgTypeDef OutputCfg = {0};
+ HRTIM_CompareCfgTypeDef CompareCfg;
+ HRTIM_OutputCfgTypeDef OutputCfg;
/* Check parameters */
assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
@@ -7281,7 +7281,7 @@ static uint32_t HRTIM_GetDMAFromOCMode(HRTIM_HandleTypeDef * hhrtim,
static DMA_HandleTypeDef * HRTIM_GetDMAHandleFromTimerIdx(HRTIM_HandleTypeDef * hhrtim,
uint32_t TimerIdx)
{
- DMA_HandleTypeDef * hdma = (DMA_HandleTypeDef *)NULL;
+ DMA_HandleTypeDef * hdma = (DMA_HandleTypeDef *)HAL_NULL;
switch (TimerIdx)
{
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_hrtim.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_hrtim.h
index 9d38938395..27903d4371 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_hrtim.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_hrtim.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_hrtim.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of HRTIM HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2c.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2c.c
index 9f4f6be365..36ff6c2bb7 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2c.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2c.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_i2c.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief I2C HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -152,7 +152,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -295,7 +295,7 @@ static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, ui
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
{
/* Check the I2C handle allocation */
- if(hi2c == NULL)
+ if(hi2c == HAL_NULL)
{
return HAL_ERROR;
}
@@ -375,7 +375,7 @@ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
{
/* Check the I2C handle allocation */
- if(hi2c == NULL)
+ if(hi2c == HAL_NULL)
{
return HAL_ERROR;
}
@@ -509,7 +509,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevA
if(hi2c->State == HAL_I2C_STATE_READY)
{
- if((pData == NULL ) || (Size == 0))
+ if((pData == HAL_NULL ) || (Size == 0))
{
return HAL_ERROR;
}
@@ -629,7 +629,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAd
if(hi2c->State == HAL_I2C_STATE_READY)
{
- if((pData == NULL ) || (Size == 0))
+ if((pData == HAL_NULL ) || (Size == 0))
{
return HAL_ERROR;
}
@@ -740,7 +740,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData
{
if(hi2c->State == HAL_I2C_STATE_READY)
{
- if((pData == NULL ) || (Size == 0))
+ if((pData == HAL_NULL ) || (Size == 0))
{
return HAL_ERROR;
}
@@ -869,7 +869,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData,
{
if(hi2c->State == HAL_I2C_STATE_READY)
{
- if((pData == NULL ) || (Size == 0))
+ if((pData == HAL_NULL ) || (Size == 0))
{
return HAL_ERROR;
}
@@ -988,7 +988,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t D
{
if(hi2c->State == HAL_I2C_STATE_READY)
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -1060,7 +1060,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t De
{
if(hi2c->State == HAL_I2C_STATE_READY)
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -1130,7 +1130,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pD
{
if(hi2c->State == HAL_I2C_STATE_READY)
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -1180,7 +1180,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pDa
{
if(hi2c->State == HAL_I2C_STATE_READY)
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -1239,7 +1239,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t
{
if(hi2c->State == HAL_I2C_STATE_READY)
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -1330,7 +1330,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t D
{
if(hi2c->State == HAL_I2C_STATE_READY)
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -1410,7 +1410,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *p
{
if(hi2c->State == HAL_I2C_STATE_READY)
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -1496,7 +1496,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pD
{
if(hi2c->State == HAL_I2C_STATE_READY)
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -1584,7 +1584,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress
if(hi2c->State == HAL_I2C_STATE_READY)
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -1727,7 +1727,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress,
if(hi2c->State == HAL_I2C_STATE_READY)
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -1869,7 +1869,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddr
if(hi2c->State == HAL_I2C_STATE_READY)
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -1962,7 +1962,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddre
if(hi2c->State == HAL_I2C_STATE_READY)
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -2062,7 +2062,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAdd
if(hi2c->State == HAL_I2C_STATE_READY)
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -2171,7 +2171,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddr
if(hi2c->State == HAL_I2C_STATE_READY)
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2c.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2c.h
index 6f5da57ee1..3816e75d2f 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2c.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2c.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_i2c.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of I2C HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2c_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2c_ex.c
index b2729a5dac..6f9161579b 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2c_ex.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2c_ex.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_i2c_ex.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief I2C Extended HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of I2C Extended peripheral:
@@ -34,7 +34,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2c_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2c_ex.h
index a444913102..06c35b9c40 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2c_ex.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2c_ex.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_i2c_ex.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of I2C HAL Extended module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2s.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2s.c
index e0017fb061..e1dab761ea 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2s.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2s.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_i2s.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief I2S HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Integrated Interchip Sound (I2S) peripheral:
@@ -109,7 +109,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -236,7 +236,7 @@ __weak HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
{
/* Check the I2S handle allocation */
- if(hi2s == NULL)
+ if(hi2s == HAL_NULL)
{
return HAL_ERROR;
}
@@ -347,7 +347,7 @@ HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
*/
HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
{
- if((pData == NULL ) || (Size == 0))
+ if((pData == HAL_NULL ) || (Size == 0))
{
return HAL_ERROR;
}
@@ -450,7 +450,7 @@ HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uin
*/
HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
{
- if((pData == NULL ) || (Size == 0))
+ if((pData == HAL_NULL ) || (Size == 0))
{
return HAL_ERROR;
}
@@ -552,7 +552,7 @@ HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData,
{
if(hi2s->State == HAL_I2S_STATE_READY)
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -617,7 +617,7 @@ HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, u
{
if(hi2s->State == HAL_I2S_STATE_READY)
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -679,7 +679,7 @@ HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData,
{
uint32_t *tmp;
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -757,7 +757,7 @@ HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData,
{
uint32_t *tmp;
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2s.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2s.h
index 5f245c808d..b702d548e6 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2s.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2s.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_i2s.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of I2S HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2s_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2s_ex.c
index 87480285ee..1d3136c3bd 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2s_ex.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2s_ex.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_i2s_ex.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief I2S Extended HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of I2S Extended peripheral:
@@ -88,7 +88,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -228,7 +228,7 @@ HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
/* STM32F302xC || STM32F303xC || STM32F358xx */
/* Check the I2S handle allocation */
- if(hi2s == NULL)
+ if(hi2s == HAL_NULL)
{
return HAL_ERROR;
}
@@ -789,7 +789,7 @@ HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s)
*/
HAL_StatusTypeDef HAL_I2SEx_TransmitReceive(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData, uint16_t Size, uint32_t Timeout)
{
- if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
+ if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0))
{
return HAL_ERROR;
}
@@ -1028,7 +1028,7 @@ HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_IT(I2S_HandleTypeDef *hi2s, uint16_t
{
if(hi2s->State == HAL_I2S_STATE_READY)
{
- if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
+ if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0))
{
return HAL_ERROR;
}
@@ -1176,7 +1176,7 @@ HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_DMA(I2S_HandleTypeDef *hi2s, uint16_
{
uint32_t *tmp;
- if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
+ if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0))
{
return HAL_ERROR;
}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2s_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2s_ex.h
index 3e9c9dfcd3..d5ec08f95e 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2s_ex.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2s_ex.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_i2s_ex.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of I2S HAL Extended module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_irda.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_irda.c
index 4139dfbb95..e010e65697 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_irda.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_irda.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_irda.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief IRDA HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -57,7 +57,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -192,7 +192,7 @@ static HAL_StatusTypeDef IRDA_Receive_IT(IRDA_HandleTypeDef *hirda);
HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda)
{
/* Check the IRDA handle allocation */
- if(hirda == NULL)
+ if(hirda == HAL_NULL)
{
return HAL_ERROR;
}
@@ -241,7 +241,7 @@ HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda)
HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda)
{
/* Check the IRDA handle allocation */
- if(hirda == NULL)
+ if(hirda == HAL_NULL)
{
return HAL_ERROR;
}
@@ -354,7 +354,7 @@ HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, u
if ((hirda->State == HAL_IRDA_STATE_READY) || (hirda->State == HAL_IRDA_STATE_BUSY_RX))
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -434,7 +434,7 @@ HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, ui
if ((hirda->State == HAL_IRDA_STATE_READY) || (hirda->State == HAL_IRDA_STATE_BUSY_TX))
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -512,7 +512,7 @@ HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData
{
if ((hirda->State == HAL_IRDA_STATE_READY) || (hirda->State == HAL_IRDA_STATE_BUSY_RX))
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -562,7 +562,7 @@ HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData,
{
if ((hirda->State == HAL_IRDA_STATE_READY) || (hirda->State == HAL_IRDA_STATE_BUSY_TX))
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -621,7 +621,7 @@ HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pDat
if ((hirda->State == HAL_IRDA_STATE_READY) || (hirda->State == HAL_IRDA_STATE_BUSY_RX))
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -684,7 +684,7 @@ HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData
if ((hirda->State == HAL_IRDA_STATE_READY) || (hirda->State == HAL_IRDA_STATE_BUSY_TX))
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_irda.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_irda.h
index bd7c641273..5a1c55a4e5 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_irda.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_irda.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_irda.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of IRDA HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_irda_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_irda_ex.h
index 73b1ae03ce..5b7b8cf014 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_irda_ex.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_irda_ex.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_irda_ex.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of IRDA HAL Extended module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_iwdg.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_iwdg.c
index 6bf2c86143..e5e6fd645a 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_iwdg.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_iwdg.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_iwdg.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief IWDG HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -79,7 +79,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -169,7 +169,7 @@ HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
uint32_t tickstart = 0;
/* Check the IWDG handle allocation */
- if(hiwdg == NULL)
+ if(hiwdg == HAL_NULL)
{
return HAL_ERROR;
}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_iwdg.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_iwdg.h
index adaf2c20a8..7af24fb907 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_iwdg.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_iwdg.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_iwdg.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of IWDG HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_nand.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_nand.c
index ae567e7941..d1b06047cf 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_nand.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_nand.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_nand.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief NAND HAL module driver.
* This file provides a generic firmware to drive NAND memories mounted
* as external device.
@@ -55,7 +55,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -134,7 +134,7 @@
HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing)
{
/* Check the NAND handle state */
- if(hnand == NULL)
+ if(hnand == HAL_NULL)
{
return HAL_ERROR;
}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_nand.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_nand.h
index baae4abf6a..d475b2dcfb 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_nand.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_nand.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_nand.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of NAND HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_nor.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_nor.c
index 6d8a7feb08..38c9982214 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_nor.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_nor.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_nor.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief NOR HAL module driver.
* This file provides a generic firmware to drive NOR memories mounted
* as external device.
@@ -55,7 +55,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -141,7 +141,7 @@ static uint32_t uwNORMememoryDataWidth = NOR_MEMORY_8B;
HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming)
{
/* Check the NOR handle parameter */
- if(hnor == NULL)
+ if(hnor == HAL_NULL)
{
return HAL_ERROR;
}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_nor.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_nor.h
index 6778054eef..a512befe5b 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_nor.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_nor.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_nor.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of NOR HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_opamp.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_opamp.c
index 7d10e6e7ee..cf55ea1924 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_opamp.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_opamp.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_opamp.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief OPAMP HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -158,7 +158,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -252,7 +252,7 @@ HAL_StatusTypeDef HAL_OPAMP_Init(OPAMP_HandleTypeDef *hopamp)
/* Check the OPAMP handle allocation and lock status */
/* Init not allowed if calibration is ongoing */
- if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED) \
+ if((hopamp == HAL_NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED) \
|| (hopamp->State == HAL_OPAMP_STATE_CALIBBUSY))
{
return HAL_ERROR;
@@ -376,7 +376,7 @@ HAL_StatusTypeDef HAL_OPAMP_DeInit(OPAMP_HandleTypeDef *hopamp)
/* Check the OPAMP handle allocation */
/* Check if OPAMP locked */
/* DeInit not allowed if calibration is ongoing */
- if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED) \
+ if((hopamp == HAL_NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED) \
|| (hopamp->State == HAL_OPAMP_STATE_CALIBBUSY))
{
status = HAL_ERROR;
@@ -457,7 +457,7 @@ HAL_StatusTypeDef HAL_OPAMP_Start(OPAMP_HandleTypeDef *hopamp)
/* Check the OPAMP handle allocation */
/* Check if OPAMP locked */
- if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED))
+ if((hopamp == HAL_NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED))
{
status = HAL_ERROR;
@@ -498,7 +498,7 @@ HAL_StatusTypeDef HAL_OPAMP_Stop(OPAMP_HandleTypeDef *hopamp)
/* Check the OPAMP handle allocation */
/* Check if OPAMP locked */
/* Check if OPAMP calibration ongoing */
- if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED) \
+ if((hopamp == HAL_NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED) \
|| (hopamp->State == HAL_OPAMP_STATE_CALIBBUSY))
{
status = HAL_ERROR;
@@ -544,7 +544,7 @@ HAL_StatusTypeDef HAL_OPAMP_SelfCalibrate(OPAMP_HandleTypeDef *hopamp)
/* Check the OPAMP handle allocation */
/* Check if OPAMP locked */
- if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED))
+ if((hopamp == HAL_NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED))
{
status = HAL_ERROR;
}
@@ -739,7 +739,7 @@ HAL_StatusTypeDef HAL_OPAMP_Lock(OPAMP_HandleTypeDef *hopamp)
/* Check if OPAMP locked */
/* OPAMP can be locked when enabled and running in normal mode */
/* It is meaningless otherwise */
- if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_RESET) \
+ if((hopamp == HAL_NULL) || (hopamp->State == HAL_OPAMP_STATE_RESET) \
|| (hopamp->State == HAL_OPAMP_STATE_READY) \
|| (hopamp->State == HAL_OPAMP_STATE_CALIBBUSY)\
|| (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED))
@@ -789,7 +789,7 @@ HAL_StatusTypeDef HAL_OPAMP_Lock(OPAMP_HandleTypeDef *hopamp)
HAL_OPAMP_StateTypeDef HAL_OPAMP_GetState(OPAMP_HandleTypeDef *hopamp)
{
/* Check the OPAMP handle allocation */
- if(hopamp == NULL)
+ if(hopamp == HAL_NULL)
{
return HAL_OPAMP_STATE_RESET;
}
@@ -815,7 +815,7 @@ OPAMP_TrimmingValueTypeDef HAL_OPAMP_GetTrimOffset (OPAMP_HandleTypeDef *hopamp,
/* Check the OPAMP handle allocation */
/* Value can be retrieved in HAL_OPAMP_STATE_READY state */
- if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_RESET) \
+ if((hopamp == HAL_NULL) || (hopamp->State == HAL_OPAMP_STATE_RESET) \
|| (hopamp->State == HAL_OPAMP_STATE_BUSY) \
|| (hopamp->State == HAL_OPAMP_STATE_CALIBBUSY)\
|| (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED))
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_opamp.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_opamp.h
index faccf5b8b6..0246b763df 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_opamp.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_opamp.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_opamp.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of OPAMP HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_opamp_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_opamp_ex.c
index 33c114c002..83477cb1c4 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_opamp_ex.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_opamp_ex.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_opamp_ex.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Extended OPAMP HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -15,7 +15,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -106,8 +106,8 @@ HAL_StatusTypeDef HAL_OPAMPEx_SelfCalibrateAll(OPAMP_HandleTypeDef *hopamp1, OPA
uint32_t delta;
- if((hopamp1 == NULL) || (hopamp1->State == HAL_OPAMP_STATE_BUSYLOCKED) || \
- (hopamp2 == NULL) || (hopamp2->State == HAL_OPAMP_STATE_BUSYLOCKED))
+ if((hopamp1 == HAL_NULL) || (hopamp1->State == HAL_OPAMP_STATE_BUSYLOCKED) || \
+ (hopamp2 == HAL_NULL) || (hopamp2->State == HAL_OPAMP_STATE_BUSYLOCKED))
{
status = HAL_ERROR;
}
@@ -368,10 +368,10 @@ HAL_StatusTypeDef HAL_OPAMPEx_SelfCalibrateAll(OPAMP_HandleTypeDef *hopamp1, OPA
uint32_t delta;
- if((hopamp1 == NULL) || (hopamp1->State == HAL_OPAMP_STATE_BUSYLOCKED) || \
- (hopamp2 == NULL) || (hopamp2->State == HAL_OPAMP_STATE_BUSYLOCKED) || \
- (hopamp3 == NULL) || (hopamp3->State == HAL_OPAMP_STATE_BUSYLOCKED) || \
- (hopamp4 == NULL) || (hopamp4->State == HAL_OPAMP_STATE_BUSYLOCKED))
+ if((hopamp1 == HAL_NULL) || (hopamp1->State == HAL_OPAMP_STATE_BUSYLOCKED) || \
+ (hopamp2 == HAL_NULL) || (hopamp2->State == HAL_OPAMP_STATE_BUSYLOCKED) || \
+ (hopamp3 == HAL_NULL) || (hopamp3->State == HAL_OPAMP_STATE_BUSYLOCKED) || \
+ (hopamp4 == HAL_NULL) || (hopamp4->State == HAL_OPAMP_STATE_BUSYLOCKED))
{
status = HAL_ERROR;
}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_opamp_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_opamp_ex.h
index 0d50d54baa..0b622dc3ea 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_opamp_ex.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_opamp_ex.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_opamp_ex.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of OPAMP HAL Extended module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pccard.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pccard.c
index 603a58d8af..cf161139d2 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pccard.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pccard.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_pccard.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief PCCARD HAL module driver.
* This file provides a generic firmware to drive PCCARD memories mounted
* as external device.
@@ -47,7 +47,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -126,7 +126,7 @@
HAL_StatusTypeDef HAL_PCCARD_Init(PCCARD_HandleTypeDef *hpccard, FMC_NAND_PCC_TimingTypeDef *ComSpaceTiming, FMC_NAND_PCC_TimingTypeDef *AttSpaceTiming, FMC_NAND_PCC_TimingTypeDef *IOSpaceTiming)
{
/* Check the PCCARD controller state */
- if(hpccard == NULL)
+ if(hpccard == HAL_NULL)
{
return HAL_ERROR;
}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pccard.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pccard.h
index 43db8ed62c..f657eed68c 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pccard.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pccard.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_pccard.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of PCCARD HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pcd.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pcd.c
index 4d74df93a2..432ccc8555 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pcd.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pcd.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_pcd.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief PCD HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the USB Peripheral Controller:
@@ -44,7 +44,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -143,7 +143,7 @@ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
uint32_t wInterrupt_Mask = 0;
/* Check the PCD handle allocation */
- if(hpcd == NULL)
+ if(hpcd == HAL_NULL)
{
return HAL_ERROR;
}
@@ -214,7 +214,7 @@ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd)
{
/* Check the PCD handle allocation */
- if(hpcd == NULL)
+ if(hpcd == HAL_NULL)
{
return HAL_ERROR;
}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pcd.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pcd.h
index 59260a7b9a..27e2fb39ac 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pcd.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pcd.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_pcd.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of PCD HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pcd_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pcd_ex.c
index 96fea82d61..d56f1dc393 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pcd_ex.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pcd_ex.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_pcd_ex.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Extended PCD HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the USB Peripheral Controller:
@@ -12,7 +12,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pcd_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pcd_ex.h
index 8d224a0df1..73b606f0ca 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pcd_ex.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pcd_ex.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_pcd_ex.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of PCD HAL Extended module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pwr.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pwr.c
index 109f5b5b42..bb7f7f9dbd 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pwr.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pwr.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_pwr.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief PWR HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -15,7 +15,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pwr.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pwr.h
index 3ed930b985..70641c05f0 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pwr.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pwr.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_pwr.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of PWR HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pwr_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pwr_ex.c
index 7359a4900f..6e1d50e29c 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pwr_ex.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pwr_ex.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_pwr_ex.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Extended PWR HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -14,7 +14,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pwr_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pwr_ex.h
index 8314663788..58629c7273 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pwr_ex.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pwr_ex.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_pwr_ex.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of PWR HAL Extended module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rcc.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rcc.c
index 1bdd2d40bc..c8e308bbdb 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rcc.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rcc.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_rcc.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief RCC HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Reset and Clock Control (RCC) peripheral:
@@ -37,7 +37,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -282,7 +282,7 @@ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, ui
uint32_t tickstart = 0;
/* Check the parameters */
- assert_param(RCC_ClkInitStruct != NULL);
+ assert_param(RCC_ClkInitStruct != HAL_NULL);
assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType));
assert_param(IS_FLASH_LATENCY(FLatency));
@@ -669,8 +669,8 @@ __weak void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency)
{
/* Check the parameters */
- assert_param(RCC_ClkInitStruct != NULL);
- assert_param(pFLatency != NULL);
+ assert_param(RCC_ClkInitStruct != HAL_NULL);
+ assert_param(pFLatency != HAL_NULL);
/* Set all possible values for the Clock type parameter --------------------*/
RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rcc.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rcc.h
index f70079296d..2b0ac72d33 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rcc.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rcc.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_rcc.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of RCC HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rcc_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rcc_ex.c
index e7901b7b6d..a174d8e236 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rcc_ex.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rcc_ex.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_rcc_ex.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Extended RCC HAL module driver
* This file provides firmware functions to manage the following
* functionalities RCC Extended peripheral:
@@ -12,7 +12,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -777,7 +777,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
uint32_t tickstart = 0;
/* Check the parameters */
- assert_param(RCC_OscInitStruct != NULL);
+ assert_param(RCC_OscInitStruct != HAL_NULL);
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
@@ -1130,7 +1130,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
/* Check the parameters */
- assert_param(RCC_OscInitStruct != NULL);
+ assert_param(RCC_OscInitStruct != HAL_NULL);
/* Set all possible values for the Oscillator type parameter ---------------*/
RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI;
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rcc_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rcc_ex.h
index 5aa7f90416..1ee0212f85 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rcc_ex.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rcc_ex.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_rcc_ex.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of RCC HAL Extended module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rtc.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rtc.c
index 7b366ef19a..0ab63f0e97 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rtc.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rtc.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_rtc.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief RTC HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -149,7 +149,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -243,7 +243,7 @@
HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc)
{
/* Check the RTC peripheral state */
- if(hrtc == NULL)
+ if(hrtc == HAL_NULL)
{
return HAL_ERROR;
}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rtc.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rtc.h
index 9595cba6d0..278c82b741 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rtc.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rtc.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_rtc.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of RTC HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rtc_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rtc_ex.c
index 7efdf42180..3c89b89dec 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rtc_ex.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rtc_ex.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_rtc_ex.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Extended RTC HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Real Time Clock (RTC) Extended peripheral:
@@ -63,7 +63,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rtc_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rtc_ex.h
index e3f9074fc5..bbe75e2bb5 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rtc_ex.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rtc_ex.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_rtc_ex.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of RTC HAL Extended module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_sdadc.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_sdadc.c
index 81bbc8eea2..56cc997d88 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_sdadc.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_sdadc.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_sdadc.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the Sigma-Delta Analog to Digital Convertor
* (SDADC) peripherals:
@@ -163,7 +163,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -280,7 +280,7 @@ HAL_StatusTypeDef HAL_SDADC_Init(SDADC_HandleTypeDef* hsdadc)
assert_param(IS_SDADC_VREF(hsdadc->Init.ReferenceVoltage));
/* Check SDADC handle */
- if(hsdadc == NULL)
+ if(hsdadc == HAL_NULL)
{
return HAL_ERROR;
}
@@ -343,7 +343,7 @@ HAL_StatusTypeDef HAL_SDADC_DeInit(SDADC_HandleTypeDef* hsdadc)
assert_param(IS_SDADC_ALL_INSTANCE(hsdadc->Instance));
/* Check SDADC handle */
- if(hsdadc == NULL)
+ if(hsdadc == HAL_NULL)
{
return HAL_ERROR;
}
@@ -441,7 +441,7 @@ HAL_StatusTypeDef HAL_SDADC_PrepareChannelConfig(SDADC_HandleTypeDef *hsdadc,
/* Check parameters */
assert_param(IS_SDADC_ALL_INSTANCE(hsdadc->Instance));
assert_param(IS_SDADC_CONF_INDEX(ConfIndex));
- assert_param(ConfParamStruct != NULL);
+ assert_param(ConfParamStruct != HAL_NULL);
assert_param(IS_SDADC_INPUT_MODE(ConfParamStruct->InputMode));
assert_param(IS_SDADC_GAIN(ConfParamStruct->Gain));
assert_param(IS_SDADC_COMMON_MODE(ConfParamStruct->CommonMode));
@@ -1279,7 +1279,7 @@ HAL_StatusTypeDef HAL_SDADC_Start_DMA(SDADC_HandleTypeDef *hsdadc, uint32_t *pDa
/* Check parameters */
assert_param(IS_SDADC_ALL_INSTANCE(hsdadc->Instance));
- assert_param(pData != NULL);
+ assert_param(pData != HAL_NULL);
assert_param(Length != 0);
/* Check that DMA is not enabled for injected conversion */
@@ -1604,7 +1604,7 @@ HAL_StatusTypeDef HAL_SDADC_InjectedStart_DMA(SDADC_HandleTypeDef *hsdadc, uint3
/* Check parameters */
assert_param(IS_SDADC_ALL_INSTANCE(hsdadc->Instance));
- assert_param(pData != NULL);
+ assert_param(pData != HAL_NULL);
assert_param(Length != 0);
/* Check that DMA is not enabled for regular conversion */
@@ -1717,7 +1717,7 @@ uint32_t HAL_SDADC_InjectedGetValue(SDADC_HandleTypeDef *hsdadc, uint32_t* Chann
/* Check parameters */
assert_param(IS_SDADC_ALL_INSTANCE(hsdadc->Instance));
- assert_param(Channel != NULL);
+ assert_param(Channel != HAL_NULL);
/* Read SDADC_JDATAR register and extract channel and conversion value */
value = hsdadc->Instance->JDATAR;
@@ -1744,7 +1744,7 @@ HAL_StatusTypeDef HAL_SDADC_MultiModeStart_DMA(SDADC_HandleTypeDef* hsdadc, uint
/* Check parameters */
assert_param(IS_SDADC_ALL_INSTANCE(hsdadc->Instance));
- assert_param(pData != NULL);
+ assert_param(pData != HAL_NULL);
assert_param(Length != 0);
/* Check instance is SDADC1 */
@@ -1900,7 +1900,7 @@ HAL_StatusTypeDef HAL_SDADC_InjectedMultiModeStart_DMA(SDADC_HandleTypeDef* hsda
/* Check parameters */
assert_param(IS_SDADC_ALL_INSTANCE(hsdadc->Instance));
- assert_param(pData != NULL);
+ assert_param(pData != HAL_NULL);
assert_param(Length != 0);
/* Check instance is SDADC1 */
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_sdadc.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_sdadc.h
index 51b5dad2b8..a10306c8c8 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_sdadc.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_sdadc.h
@@ -2,14 +2,14 @@
******************************************************************************
* @file stm32f3xx_hal_sdadc.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief This file contains all the functions prototypes for the SDADC
* firmware library.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_smartcard.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_smartcard.c
index f46d012004..8cf49ba9a4 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_smartcard.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_smartcard.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_smartcard.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief SMARTCARD HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -60,7 +60,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -204,7 +204,7 @@ static HAL_StatusTypeDef SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsmartcar
HAL_StatusTypeDef HAL_SMARTCARD_Init(SMARTCARD_HandleTypeDef *hsmartcard)
{
/* Check the SMARTCARD handle allocation */
- if(hsmartcard == NULL)
+ if(hsmartcard == HAL_NULL)
{
return HAL_ERROR;
}
@@ -259,7 +259,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Init(SMARTCARD_HandleTypeDef *hsmartcard)
HAL_StatusTypeDef HAL_SMARTCARD_DeInit(SMARTCARD_HandleTypeDef *hsmartcard)
{
/* Check the SMARTCARD handle allocation */
- if(hsmartcard == NULL)
+ if(hsmartcard == HAL_NULL)
{
return HAL_ERROR;
}
@@ -374,7 +374,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Transmit(SMARTCARD_HandleTypeDef *hsmartcard, ui
{
if ((hsmartcard->State == HAL_SMARTCARD_STATE_READY) || (hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_RX))
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -440,7 +440,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Receive(SMARTCARD_HandleTypeDef *hsmartcard, uin
{
if ((hsmartcard->State == HAL_SMARTCARD_STATE_READY) || (hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_TX))
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -504,7 +504,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsmartcard,
{
if ((hsmartcard->State == HAL_SMARTCARD_STATE_READY) || (hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_RX))
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -555,7 +555,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsmartcard,
{
if ((hsmartcard->State == HAL_SMARTCARD_STATE_READY) || (hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_TX))
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -611,7 +611,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Transmit_DMA(SMARTCARD_HandleTypeDef *hsmartcard
if ((hsmartcard->State == HAL_SMARTCARD_STATE_READY) || (hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_RX))
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -674,7 +674,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Receive_DMA(SMARTCARD_HandleTypeDef *hsmartcard,
if ((hsmartcard->State == HAL_SMARTCARD_STATE_READY) || (hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_TX))
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_smartcard.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_smartcard.h
index a197f02897..9711e84edd 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_smartcard.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_smartcard.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_smartcard.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of SMARTCARD HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_smartcard_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_smartcard_ex.c
index 203476345e..4a89eeebec 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_smartcard_ex.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_smartcard_ex.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_smartcard_ex.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief SMARTCARD HAL module driver.
*
* This file provides extended firmware functions to manage the following
@@ -30,7 +30,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_smartcard_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_smartcard_ex.h
index 0f867974f0..650efc4029 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_smartcard_ex.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_smartcard_ex.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_smartcard_ex.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of SMARTCARD HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_smbus.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_smbus.c
index ec2e185bcf..9c2e2e4597 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_smbus.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_smbus.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_smbus.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief SMBUS HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -98,7 +98,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -237,7 +237,7 @@ static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddre
HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus)
{
/* Check the SMBUS handle allocation */
- if(hsmbus == NULL)
+ if(hsmbus == HAL_NULL)
{
return HAL_ERROR;
}
@@ -336,7 +336,7 @@ HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus)
HAL_StatusTypeDef HAL_SMBUS_DeInit(SMBUS_HandleTypeDef *hsmbus)
{
/* Check the SMBUS handle allocation */
- if(hsmbus == NULL)
+ if(hsmbus == HAL_NULL)
{
return HAL_ERROR;
}
@@ -468,7 +468,7 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint
/* In case of Quick command, remove autoend mode */
/* Manage the stop generation by software */
- if(hsmbus->pBuffPtr == NULL)
+ if(hsmbus->pBuffPtr == HAL_NULL)
{
hsmbus->XferOptions &= ~SMBUS_AUTOEND_MODE;
}
@@ -557,7 +557,7 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint1
/* In case of Quick command, remove autoend mode */
/* Manage the stop generation by software */
- if(hsmbus->pBuffPtr == NULL)
+ if(hsmbus->pBuffPtr == HAL_NULL)
{
hsmbus->XferOptions &= ~SMBUS_AUTOEND_MODE;
}
@@ -684,7 +684,7 @@ HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8
if(hsmbus->State == HAL_SMBUS_STATE_LISTEN)
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -775,7 +775,7 @@ HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_
if(hsmbus->State == HAL_SMBUS_STATE_LISTEN)
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -1484,7 +1484,7 @@ static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus)
if(hsmbus->XferCount == 0)
{
/* Specific use case for Quick command */
- if(hsmbus->pBuffPtr == NULL)
+ if(hsmbus->pBuffPtr == HAL_NULL)
{
/* Generate a Stop command */
hsmbus->Instance->CR2 |= I2C_CR2_STOP;
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_smbus.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_smbus.h
index 8333c45d61..7a23f16299 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_smbus.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_smbus.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_smbus.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of SMBUS HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_spi.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_spi.c
index 598cc563a2..24524e140f 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_spi.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_spi.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_spi.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief SPI HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -83,7 +83,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -219,7 +219,7 @@ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
uint32_t frxth;
/* Check the SPI handle allocation */
- if(hspi == NULL)
+ if(hspi == HAL_NULL)
{
return HAL_ERROR;
}
@@ -314,7 +314,7 @@ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
{
/* Check the SPI handle allocation */
- if(hspi == NULL)
+ if(hspi == HAL_NULL)
{
return HAL_ERROR;
}
@@ -434,7 +434,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint
return HAL_BUSY;
}
- if((pData == NULL ) || (Size == 0))
+ if((pData == HAL_NULL ) || (Size == 0))
{
return HAL_ERROR;
}
@@ -448,7 +448,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint
hspi->pTxBuffPtr = pData;
hspi->TxXferSize = Size;
hspi->TxXferCount = Size;
- hspi->pRxBuffPtr = NULL;
+ hspi->pRxBuffPtr = HAL_NULL;
hspi->RxXferSize = 0;
hspi->RxXferCount = 0;
@@ -565,7 +565,7 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1
return HAL_BUSY;
}
- if((pData == NULL ) || (Size == 0))
+ if((pData == HAL_NULL ) || (Size == 0))
{
return HAL_ERROR;
}
@@ -585,7 +585,7 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1
hspi->pRxBuffPtr = pData;
hspi->RxXferSize = Size;
hspi->RxXferCount = Size;
- hspi->pTxBuffPtr = NULL;
+ hspi->pTxBuffPtr = HAL_NULL;
hspi->TxXferSize = 0;
hspi->TxXferCount = 0;
@@ -686,13 +686,10 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1
if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
{
tmpreg = hspi->Instance->DR;
- UNUSED(tmpreg); /* To avoid GCC warning */
}
else
{
tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
- UNUSED(tmpreg); /* To avoid GCC warning */
-
if((hspi->Init.DataSize == SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT))
{
if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout) != HAL_OK)
@@ -701,7 +698,6 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1
hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
}
tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
- UNUSED(tmpreg); /* To avoid GCC warning */
}
}
}
@@ -759,7 +755,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD
return HAL_BUSY;
}
- if((pTxData == NULL) || (pRxData == NULL) || (Size == 0))
+ if((pTxData == HAL_NULL) || (pRxData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -912,13 +908,10 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD
if(hspi->Init.DataSize == SPI_DATASIZE_16BIT)
{
tmpreg = hspi->Instance->DR;
- UNUSED(tmpreg); /* To avoid GCC warning */
}
else
{
tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
- UNUSED(tmpreg); /* To avoid GCC warning */
-
if(hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT)
{
if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout) != HAL_OK)
@@ -927,7 +920,6 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD
hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
}
tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
- UNUSED(tmpreg); /* To avoid GCC warning */
}
}
}
@@ -979,7 +971,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, u
if(hspi->State == HAL_SPI_STATE_READY)
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -992,19 +984,19 @@ HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, u
hspi->pTxBuffPtr = pData;
hspi->TxXferSize = Size;
hspi->TxXferCount = Size;
- hspi->pRxBuffPtr = NULL;
+ hspi->pRxBuffPtr = HAL_NULL;
hspi->RxXferSize = 0;
hspi->RxXferCount = 0;
/* Set the function for IT treatement */
if(hspi->Init.DataSize > SPI_DATASIZE_8BIT )
{
- hspi->RxISR = NULL;
+ hspi->RxISR = HAL_NULL;
hspi->TxISR = SPI_TxISR_16BIT;
}
else
{
- hspi->RxISR = NULL;
+ hspi->RxISR = HAL_NULL;
hspi->TxISR = SPI_TxISR_8BIT;
}
@@ -1056,7 +1048,7 @@ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, ui
{
if(hspi->State == HAL_SPI_STATE_READY)
{
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -1070,7 +1062,7 @@ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, ui
hspi->pRxBuffPtr = pData;
hspi->RxXferSize = Size;
hspi->RxXferCount = Size;
- hspi->pTxBuffPtr = NULL;
+ hspi->pTxBuffPtr = HAL_NULL;
hspi->TxXferSize = 0;
hspi->TxXferCount = 0;
@@ -1102,14 +1094,14 @@ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, ui
/* set fiforxthresold according the reception data lenght: 16 bit */
CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
hspi->RxISR = SPI_RxISR_16BIT;
- hspi->TxISR = NULL;
+ hspi->TxISR = HAL_NULL;
}
else
{
/* set fiforxthresold according the reception data lenght: 8 bit */
SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
hspi->RxISR = SPI_RxISR_8BIT;
- hspi->TxISR = NULL;
+ hspi->TxISR = HAL_NULL;
}
/* Configure communication direction : 1Line */
@@ -1164,7 +1156,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *p
if((hspi->State == HAL_SPI_STATE_READY) || \
((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX)))
{
- if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
+ if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0))
{
return HAL_ERROR;
}
@@ -1262,7 +1254,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData,
return HAL_BUSY;
}
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -1275,7 +1267,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData,
hspi->pTxBuffPtr = pData;
hspi->TxXferSize = Size;
hspi->TxXferCount = Size;
- hspi->pRxBuffPtr = NULL;
+ hspi->pRxBuffPtr = HAL_NULL;
hspi->RxXferSize = 0;
hspi->RxXferCount = 0;
@@ -1347,7 +1339,7 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u
return HAL_BUSY;
}
- if((pData == NULL) || (Size == 0))
+ if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -1360,7 +1352,7 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u
hspi->pRxBuffPtr = pData;
hspi->RxXferSize = Size;
hspi->RxXferCount = Size;
- hspi->pTxBuffPtr = NULL;
+ hspi->pTxBuffPtr = HAL_NULL;
hspi->TxXferSize = 0;
hspi->TxXferCount = 0;
@@ -1446,7 +1438,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *
if((hspi->State == HAL_SPI_STATE_READY) ||
((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX)))
{
- if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
+ if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0))
{
return HAL_ERROR;
}
@@ -1541,9 +1533,9 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *
/* Enable the Rx DMA channel */
HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t) hspi->pRxBuffPtr, hspi->RxXferCount);
- /* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing
+ /* Set the SPI Tx DMA transfer complete callback as HAL_NULL because the communication closing
is performed in DMA reception complete callback */
- hspi->hdmatx->XferCpltCallback = NULL;
+ hspi->hdmatx->XferCpltCallback = HAL_NULL;
/* Set the DMA error callback */
hspi->hdmatx->XferErrorCallback = SPI_DMAError;
@@ -1699,13 +1691,10 @@ static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
{
tmpreg = hspi->Instance->DR;
- UNUSED(tmpreg); /* To avoid GCC warning */
}
else
{
tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
- UNUSED(tmpreg); /* To avoid GCC warning */
-
if(hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT)
{
if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, SPI_DEFAULT_TIMEOUT) != HAL_OK)
@@ -1714,7 +1703,6 @@ static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
}
tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
- UNUSED(tmpreg); /* To avoid GCC warning */
}
}
}
@@ -1772,7 +1760,6 @@ static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
}
tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
- UNUSED(tmpreg); /* To avoid GCC warning */
}
else
{
@@ -1782,7 +1769,6 @@ static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
}
tmpreg = hspi->Instance->DR;
- UNUSED(tmpreg); /* To avoid GCC warning */
}
}
@@ -1977,8 +1963,6 @@ static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
__IO uint8_t tmpreg;
tmpreg = *((__IO uint8_t *)&hspi->Instance->DR);
- UNUSED(tmpreg); /* To avoid GCC warning */
-
hspi->CRCSize--;
/* check end of the reception */
@@ -2069,7 +2053,6 @@ static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi)
__IO uint16_t tmpreg;
/* Receive data in 16 Bit mode */
tmpreg = hspi->Instance->DR;
- UNUSED(tmpreg); /* To avoid GCC warning */
/* Disable RXNE interrupt */
__HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
@@ -2113,8 +2096,6 @@ static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
{
__IO uint8_t tmpreg;
tmpreg = *((__IO uint8_t*)&hspi->Instance->DR);
- UNUSED(tmpreg); /* To avoid GCC warning */
-
hspi->CRCSize--;
if(hspi->CRCSize == 0)
@@ -2158,7 +2139,6 @@ static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi)
__IO uint16_t tmpreg;
tmpreg = hspi->Instance->DR;
- UNUSED(tmpreg); /* To avoid GCC warning */
/* Disable RXNE and ERR interrupt */
__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
@@ -2303,7 +2283,6 @@ static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi,
if((Flag == SPI_SR_FRLVL) && (State == SPI_FRLVL_EMPTY))
{
tmpreg = *((__IO uint8_t*)&hspi->Instance->DR);
- UNUSED(tmpreg); /* To avoid GCC warning */
}
if(Timeout != HAL_MAX_DELAY)
{
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_spi.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_spi.h
index 3e05baf379..d178cc6882 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_spi.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_spi.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_spi.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of SPI HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_sram.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_sram.c
index 1306981652..0efa2af7d9 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_sram.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_sram.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_sram.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief SRAM HAL module driver.
* This file provides a generic firmware to drive SRAM memories
* mounted as external device.
@@ -64,7 +64,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -142,7 +142,7 @@
HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming)
{
/* Check the SRAM handle parameter */
- if(hsram == NULL)
+ if(hsram == HAL_NULL)
{
return HAL_ERROR;
}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_sram.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_sram.h
index 2e9edeaf44..902d6fb07e 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_sram.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_sram.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_sram.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of SRAM HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tim.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tim.c
index 4b3a4bfa96..08303b2780 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tim.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tim.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_tim.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief TIM HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Timer (TIM) peripheral:
@@ -98,7 +98,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -191,7 +191,7 @@ static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
/* Check the TIM handle allocation */
- if(htim == NULL)
+ if(htim == HAL_NULL)
{
return HAL_ERROR;
}
@@ -459,7 +459,7 @@ HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim)
HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef* htim)
{
/* Check the TIM handle allocation */
- if(htim == NULL)
+ if(htim == HAL_NULL)
{
return HAL_ERROR;
}
@@ -956,7 +956,7 @@ HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
{
/* Check the TIM handle allocation */
- if(htim == NULL)
+ if(htim == HAL_NULL)
{
return HAL_ERROR;
}
@@ -1456,7 +1456,7 @@ HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim)
{
/* Check the TIM handle allocation */
- if(htim == NULL)
+ if(htim == HAL_NULL)
{
return HAL_ERROR;
}
@@ -1922,7 +1922,7 @@ HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode)
{
/* Check the TIM handle allocation */
- if(htim == NULL)
+ if(htim == HAL_NULL)
{
return HAL_ERROR;
}
@@ -2189,7 +2189,7 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_Ini
uint32_t tmpccer = 0;
/* Check the TIM handle allocation */
- if(htim == NULL)
+ if(htim == HAL_NULL)
{
return HAL_ERROR;
}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tim.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tim.h
index d42de37da3..801703a94b 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tim.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tim.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_tim.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of TIM HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tim_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tim_ex.c
index 8c9a844568..6f92b76c1b 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tim_ex.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tim_ex.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_tim_ex.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief TIM HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Timer Extended peripheral:
@@ -71,7 +71,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -297,7 +297,7 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSen
TIM_OC_InitTypeDef OC_Config;
/* Check the TIM handle allocation */
- if(htim == NULL)
+ if(htim == HAL_NULL)
{
return HAL_ERROR;
}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tim_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tim_ex.h
index 8e419dc0a3..155de50880 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tim_ex.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tim_ex.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_tim_ex.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of TIM HAL Extended module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tsc.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tsc.c
index 0553031184..24c2473afc 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tsc.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tsc.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_tsc.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the Touch Sensing Controller (TSC) peripheral:
* + Initialization and DeInitialization
@@ -81,7 +81,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -157,7 +157,7 @@ static uint32_t TSC_extract_groups(uint32_t iomask);
HAL_StatusTypeDef HAL_TSC_Init(TSC_HandleTypeDef* htsc)
{
/* Check TSC handle allocation */
- if (htsc == NULL)
+ if (htsc == HAL_NULL)
{
return HAL_ERROR;
}
@@ -240,7 +240,7 @@ HAL_StatusTypeDef HAL_TSC_Init(TSC_HandleTypeDef* htsc)
HAL_StatusTypeDef HAL_TSC_DeInit(TSC_HandleTypeDef* htsc)
{
/* Check TSC handle allocation */
- if (htsc == NULL)
+ if (htsc == HAL_NULL)
{
return HAL_ERROR;
}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tsc.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tsc.h
index a16cfc90f1..0aafa9842e 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tsc.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tsc.h
@@ -2,14 +2,14 @@
******************************************************************************
* @file stm32f3xx_hal_tsc.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief This file contains all the functions prototypes for the TSC firmware
* library.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_uart.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_uart.c
index cbe3e85728..3140397593 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_uart.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_uart.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_uart.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief UART HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -71,7 +71,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -206,7 +206,7 @@ static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart);
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
{
/* Check the UART handle allocation */
- if(huart == NULL)
+ if(huart == HAL_NULL)
{
return HAL_ERROR;
}
@@ -266,7 +266,7 @@ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
{
/* Check the UART handle allocation */
- if(huart == NULL)
+ if(huart == HAL_NULL)
{
return HAL_ERROR;
}
@@ -326,7 +326,7 @@ HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
{
/* Check the UART handle allocation */
- if(huart == NULL)
+ if(huart == HAL_NULL)
{
return HAL_ERROR;
}
@@ -406,7 +406,7 @@ HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLe
HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
{
/* Check the UART handle allocation */
- if(huart == NULL)
+ if(huart == HAL_NULL)
{
return HAL_ERROR;
}
@@ -469,7 +469,7 @@ HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Add
HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
{
/* Check the UART handle allocation */
- if(huart == NULL)
+ if(huart == HAL_NULL)
{
return HAL_ERROR;
}
@@ -594,7 +594,7 @@ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, u
if((huart->State == HAL_UART_STATE_READY) || (huart->State == HAL_UART_STATE_BUSY_RX))
{
- if((pData == NULL ) || (Size == 0))
+ if((pData == HAL_NULL ) || (Size == 0))
{
return HAL_ERROR;
}
@@ -673,7 +673,7 @@ HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, ui
if((huart->State == HAL_UART_STATE_READY) || (huart->State == HAL_UART_STATE_BUSY_TX))
{
- if((pData == NULL ) || (Size == 0))
+ if((pData == HAL_NULL ) || (Size == 0))
{
return HAL_ERROR;
}
@@ -750,7 +750,7 @@ HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData
{
if((huart->State == HAL_UART_STATE_READY) || (huart->State == HAL_UART_STATE_BUSY_RX))
{
- if((pData == NULL ) || (Size == 0))
+ if((pData == HAL_NULL ) || (Size == 0))
{
return HAL_ERROR;
}
@@ -801,7 +801,7 @@ HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData,
{
if((huart->State == HAL_UART_STATE_READY) || (huart->State == HAL_UART_STATE_BUSY_TX))
{
- if((pData == NULL ) || (Size == 0))
+ if((pData == HAL_NULL ) || (Size == 0))
{
return HAL_ERROR;
}
@@ -860,7 +860,7 @@ HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pDat
if((huart->State == HAL_UART_STATE_READY) || (huart->State == HAL_UART_STATE_BUSY_RX))
{
- if((pData == NULL ) || (Size == 0))
+ if((pData == HAL_NULL ) || (Size == 0))
{
return HAL_ERROR;
}
@@ -926,7 +926,7 @@ HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData
if((huart->State == HAL_UART_STATE_READY) || (huart->State == HAL_UART_STATE_BUSY_TX))
{
- if((pData == NULL ) || (Size == 0))
+ if((pData == HAL_NULL ) || (Size == 0))
{
return HAL_ERROR;
}
@@ -1064,12 +1064,12 @@ HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
huart->Instance->CR3 &= ~USART_CR3_DMAR;
/* Abort the UART DMA tx channel */
- if(huart->hdmatx != NULL)
+ if(huart->hdmatx != HAL_NULL)
{
HAL_DMA_Abort(huart->hdmatx);
}
/* Abort the UART DMA rx channel */
- if(huart->hdmarx != NULL)
+ if(huart->hdmarx != HAL_NULL)
{
HAL_DMA_Abort(huart->hdmarx);
}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_uart.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_uart.h
index ac41511597..482557e049 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_uart.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_uart.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_uart.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of UART HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_uart_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_uart_ex.c
index 6500751e66..3fa38fa57b 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_uart_ex.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_uart_ex.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_uart_ex.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Extended UART HAL module driver.
*
* This file provides firmware functions to manage the following extended
@@ -29,7 +29,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -161,7 +161,7 @@ HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t UART_DEPo
uint32_t temp = 0x0;
/* Check the UART handle allocation */
- if(huart == NULL)
+ if(huart == HAL_NULL)
{
return HAL_ERROR;
}
@@ -260,7 +260,7 @@ HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t UART_DEPo
HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength)
{
/* Check the UART handle allocation */
- if(huart == NULL)
+ if(huart == HAL_NULL)
{
return HAL_ERROR;
}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_uart_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_uart_ex.h
index 049c0c47be..5ed2f2c0b0 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_uart_ex.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_uart_ex.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_uart_ex.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of UART HAL Extended module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_usart.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_usart.c
index 0733ba159d..e650f8f2e1 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_usart.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_usart.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_usart.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief USART HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -53,7 +53,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -188,7 +188,7 @@ static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart);
HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart)
{
/* Check the USART handle allocation */
- if(husart == NULL)
+ if(husart == HAL_NULL)
{
return HAL_ERROR;
}
@@ -234,7 +234,7 @@ HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart)
HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart)
{
/* Check the USART handle allocation */
- if(husart == NULL)
+ if(husart == HAL_NULL)
{
return HAL_ERROR;
}
@@ -359,7 +359,7 @@ HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxDa
if(husart->State == HAL_USART_STATE_READY)
{
- if((pTxData == NULL) || (Size == 0))
+ if((pTxData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -427,7 +427,7 @@ HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxDat
if(husart->State == HAL_USART_STATE_READY)
{
- if((pRxData == NULL) || (Size == 0))
+ if((pRxData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -506,7 +506,7 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t
if(husart->State == HAL_USART_STATE_READY)
{
- if((pTxData == NULL) || (pRxData == NULL) || (Size == 0))
+ if((pTxData == HAL_NULL) || (pRxData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -589,7 +589,7 @@ HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pT
{
if(husart->State == HAL_USART_STATE_READY)
{
- if((pTxData == NULL) || (Size == 0))
+ if((pTxData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -636,7 +636,7 @@ HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRx
{
if(husart->State == HAL_USART_STATE_READY)
{
- if((pRxData == NULL) || (Size == 0))
+ if((pRxData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -696,7 +696,7 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint
if(husart->State == HAL_USART_STATE_READY)
{
- if((pTxData == NULL) || (pRxData == NULL) || (Size == 0))
+ if((pTxData == HAL_NULL) || (pRxData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -753,7 +753,7 @@ HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *p
if(husart->State == HAL_USART_STATE_READY)
{
- if((pTxData == NULL) || (Size == 0))
+ if((pTxData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -811,7 +811,7 @@ HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pR
if(husart->State == HAL_USART_STATE_READY)
{
- if((pRxData == NULL) || (Size == 0))
+ if((pRxData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -880,7 +880,7 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uin
if(husart->State == HAL_USART_STATE_READY)
{
- if((pTxData == NULL) || (pRxData == NULL) || (Size == 0))
+ if((pTxData == HAL_NULL) || (pRxData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@@ -1030,12 +1030,12 @@ HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart)
husart->Instance->CR3 &= ~USART_CR3_DMAR;
/* Abort the USART DMA tx channel */
- if(husart->hdmatx != NULL)
+ if(husart->hdmatx != HAL_NULL)
{
HAL_DMA_Abort(husart->hdmatx);
}
/* Abort the USART DMA rx channel */
- if(husart->hdmarx != NULL)
+ if(husart->hdmarx != HAL_NULL)
{
HAL_DMA_Abort(husart->hdmarx);
}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_usart.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_usart.h
index 866ea43a1a..e9cb04f645 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_usart.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_usart.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_usart.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of USART HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_usart_ex.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_usart_ex.h
index ef41321209..8320685ba1 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_usart_ex.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_usart_ex.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_usart_ex.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of USART HAL Extended module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_wwdg.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_wwdg.c
index 7c0b981e46..8b4a96055d 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_wwdg.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_wwdg.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_wwdg.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief WWDG HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -55,7 +55,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -134,7 +134,7 @@
HAL_StatusTypeDef HAL_WWDG_Init(WWDG_HandleTypeDef *hwwdg)
{
/* Check the WWDG handle allocation */
- if(hwwdg == NULL)
+ if(hwwdg == HAL_NULL)
{
return HAL_ERROR;
}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_wwdg.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_wwdg.h
index 9b17c84539..9bd535da21 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_wwdg.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_wwdg.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_hal_wwdg.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of WWDG HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_ll_fmc.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_ll_fmc.c
index 58583bfd86..0a2de960d5 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_ll_fmc.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_ll_fmc.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_ll_fmc.c
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief FMC Low Layer HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -44,7 +44,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_ll_fmc.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_ll_fmc.h
index 343fd984ed..445b1535a5 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_ll_fmc.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_ll_fmc.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f3xx_ll_fmc.h
* @author MCD Application Team
- * @version V1.1.1
- * @date 19-June-2015
+ * @version V1.1.0
+ * @date 12-Sept-2014
* @brief Header file of FMC HAL module.
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2015 STMicroelectronics
+ * © COPYRIGHT(c) 2014 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/PeripheralNames.h b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/PeripheralNames.h
new file mode 100644
index 0000000000..ce3155f226
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/PeripheralNames.h
@@ -0,0 +1,150 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_PERIPHERALNAMES_H
+#define MBED_PERIPHERALNAMES_H
+
+#include
+#include "cmsis.h"
+#include "PinNames.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define _SERCOM_SPI_NAME(n, unused) \
+ SPI##n,
+
+#define _SERCOM_PAD_NAME(n, pad) \
+ SERCOM##n##_PAD##pad = ((n & 0xF) | ((pad & 0xF) << 4)),
+
+#define _SERCOM_I2C_NAME(n, unused) \
+ I2C##n,
+
+
+
+typedef enum {
+ UART_0 = (int)0x42000800UL, // Base address of SERCOM0
+ UART_1 = (int)0x42000C00UL, // Base address of SERCOM1
+ UART_2 = (int)0x42001000UL, // Base address of SERCOM2
+ UART_3 = (int)0x42001400UL, // Base address of SERCOM3
+ UART_4 = (int)0x42001800UL, // Base address of SERCOM4
+ UART_5 = (int)0x42001C00UL // Base address of SERCOM5
+} UARTName;
+
+typedef enum {
+ ADC_0 = 0x0ul,
+ ADC_1 = 0x1ul,
+ ADC_2 = 0x2ul,
+ ADC_3 = 0x3ul,
+ ADC_4 = 0x4ul,
+ ADC_5 = 0x5ul,
+ ADC_6 = 0x6ul,
+ ADC_7 = 0x7ul,
+ ADC_10 = 0xAul,
+ ADC_11 = 0xBul,
+ ADC_16 = 0x10ul,
+ ADC_17 = 0x11ul,
+ ADC_18 = 0x12ul,
+ ADC_19 = 0x13ul
+} ADCName;
+
+typedef enum {
+ DAC_0 = 0x42004800UL
+} DACName;
+
+typedef enum { // for each channel
+ EXTINT_0 = 0,
+ EXTINT_1,
+ EXTINT_2,
+ EXTINT_3,
+ EXTINT_4,
+ EXTINT_5,
+ EXTINT_6,
+ EXTINT_7,
+ EXTINT_8,
+ EXTINT_9,
+ EXTINT_10,
+ EXTINT_11,
+ EXTINT_12,
+ EXTINT_13,
+ EXTINT_14,
+ EXTINT_15
+} EXTINTName;
+
+typedef enum {
+ MREPEAT(SERCOM_INST_NUM, _SERCOM_SPI_NAME, ~)
+} SPIName;
+
+typedef enum {
+ MREPEAT(SERCOM_INST_NUM, _SERCOM_I2C_NAME, ~)
+} I2CName;
+
+typedef enum {
+ /* Pad 0 definitions */
+ MREPEAT(SERCOM_INST_NUM, _SERCOM_PAD_NAME, 0)
+
+ /* Pad 1 definitions */
+ MREPEAT(SERCOM_INST_NUM, _SERCOM_PAD_NAME, 1)
+
+ /* Pad 2 definitions */
+ MREPEAT(SERCOM_INST_NUM, _SERCOM_PAD_NAME, 2)
+
+ /* Pad 3 definitions */
+ MREPEAT(SERCOM_INST_NUM, _SERCOM_PAD_NAME, 3)
+} SercomPadName;
+
+typedef enum {
+ PWM_0 = (0x42002000UL), /**< \brief (TCC0) APB Base Address */
+ PWM_1 = (0x42002400UL), /**< \brief (TCC1) APB Base Address */
+ PWM_2 = (0x42002800UL), /**< \brief (TCC2) APB Base Address */
+} PWMName;
+
+struct pwm_pin_channel {
+ PinName pin;
+ PWMName pwm;
+ uint8_t channel_index;
+};
+
+#define STDIO_UART_TX USBTX
+#define STDIO_UART_RX USBRX
+#define STDIO_UART UART_3
+
+// Default peripherals
+#define MBED_SPI0 PA18, PA16, PA19, PA17
+
+#define MBED_UART0 PA04, PA05
+#define MBED_UARTUSB USBTX, USBRX
+
+#define MBED_I2C0 PA08, PA09
+
+#define MBED_ANALOGOUT0 PA02
+
+#define MBED_ANALOGIN0 PA03
+#define MBED_ANALOGIN1 PA08
+#define MBED_ANALOGIN2 PB09
+#define MBED_ANALOGIN3 PA04
+#define MBED_ANALOGIN4 PA05
+#define MBED_ANALOGIN5 PA06
+#define MBED_ANALOGIN7 PA07
+
+#define MBED_PWMOUT0 PA18
+#define MBED_PWMOUT1 PA19
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/PeripheralPins.c b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/PeripheralPins.c
new file mode 100644
index 0000000000..140211b3a7
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/PeripheralPins.c
@@ -0,0 +1,244 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "PeripheralPins.h"
+
+/************ADC***************/
+const PinMap PinMap_ADC[] = {
+ {PA02, ADC_0, 1},
+ {PA03, ADC_1, 1},
+ {PB08, ADC_2, 1},
+ {PB09, ADC_3, 1},
+ {PA04, ADC_4, 1},
+ {PA05, ADC_5, 1},
+ {PA06, ADC_6, 1},
+ {PA07, ADC_7, 1},
+ {PB02, ADC_10, 1},
+ {PB03, ADC_11, 1},
+ {PA08, ADC_16, 1},
+ {PA09, ADC_17, 1},
+ {PA10, ADC_18, 1},
+ {PA11, ADC_19, 1},
+
+ /* Not connected */
+ {NC , NC , NC}
+};
+
+/************DAC***************/
+const PinMap PinMap_DAC[] = {
+ {PA02, DAC_0, 1},
+
+ /* Not connected */
+ {NC , NC , NC}
+};
+
+/************SERCOM Pins***********/
+const PinMap PinMap_SERCOM_PAD[] = {
+ {PA00, SERCOM1_PAD0, 3},
+ {PA01, SERCOM1_PAD1, 3},
+ {PA04, SERCOM0_PAD0, 3},
+ {PA05, SERCOM0_PAD1, 3},
+ {PA06, SERCOM0_PAD2, 3},
+ {PA07, SERCOM0_PAD3, 3},
+ {PA08, SERCOM0_PAD0, 2},
+ {PA09, SERCOM0_PAD1, 2},
+ {PA10, SERCOM0_PAD2, 2},
+ {PA11, SERCOM0_PAD3, 2},
+ {PA12, SERCOM2_PAD0, 2},
+ {PA13, SERCOM2_PAD1, 2},
+ {PA14, SERCOM2_PAD2, 2},
+ {PA15, SERCOM2_PAD3, 2},
+ {PA16, SERCOM1_PAD0, 2},
+ {PA17, SERCOM1_PAD1, 2},
+ {PA18, SERCOM1_PAD2, 2},
+ {PA19, SERCOM1_PAD3, 2},
+ {PA20, SERCOM3_PAD2, 3},
+ {PA21, SERCOM3_PAD3, 3},
+ {PA22, SERCOM3_PAD0, 2},
+ {PA23, SERCOM3_PAD1, 2},
+ {PA24, SERCOM3_PAD2, 2},
+ {PA25, SERCOM3_PAD3, 2},
+ {PA30, SERCOM1_PAD2, 3},
+ {PA31, SERCOM1_PAD3, 3},
+ {PB02, SERCOM5_PAD0, 3},
+ {PB03, SERCOM5_PAD1, 3},
+ {PB08, SERCOM4_PAD0, 3},
+ {PB09, SERCOM4_PAD1, 3},
+ {PB10, SERCOM4_PAD2, 3},
+ {PB11, SERCOM4_PAD3, 3},
+ {PB22, SERCOM5_PAD2, 3},
+ {PB23, SERCOM5_PAD3, 3},
+
+ /* Not connected */
+ {NC , NC , NC}
+};
+
+/*******SERCOM Pins extended*******/
+const PinMap PinMap_SERCOM_PADEx[] = {
+ {PA08, SERCOM2_PAD0, 3},
+ {PA09, SERCOM2_PAD1, 3},
+ {PA10, SERCOM2_PAD2, 3},
+ {PA11, SERCOM2_PAD3, 3},
+ {PA12, SERCOM4_PAD0, 3},
+ {PA13, SERCOM4_PAD1, 3},
+ {PA14, SERCOM4_PAD2, 3},
+ {PA15, SERCOM4_PAD3, 3},
+ {PA16, SERCOM3_PAD0, 3},
+ {PA17, SERCOM3_PAD1, 3},
+ {PA18, SERCOM3_PAD2, 3},
+ {PA19, SERCOM3_PAD3, 3},
+ {PA20, SERCOM5_PAD2, 2},
+ {PA21, SERCOM5_PAD3, 2},
+ {PA22, SERCOM5_PAD0, 3},
+ {PA23, SERCOM5_PAD1, 3},
+ {PA24, SERCOM5_PAD2, 3},
+ {PA25, SERCOM5_PAD3, 3},
+
+ /* Not connected */
+ {NC , NC , NC}
+};
+
+
+/************PWM***************/
+const PinMap PinMap_PWM[] = {
+ {PA00, PWM_2, 4},
+ {PA01, PWM_2, 4},
+ {PA04, PWM_0, 4},
+ {PA05, PWM_0, 4},
+ {PA06, PWM_1, 4},
+ {PA07, PWM_1, 4},
+ {PA08, PWM_1, 5},
+ {PA09, PWM_1, 5},
+ {PA10, PWM_1, 4},
+ {PA11, PWM_1, 4},
+ {PA12, PWM_2, 4},
+ {PA13, PWM_2, 4},
+ {PA14, PWM_0, 5},
+ {PA15, PWM_0, 5},
+ {PA16, PWM_2, 4},
+ {PA17, PWM_2, 4},
+ {PA18, PWM_0, 5},
+ {PA19, PWM_0, 5},
+ {PA20, PWM_0, 5},
+ {PA21, PWM_0, 5},
+ {PA22, PWM_0, 5},
+ {PA23, PWM_0, 5},
+ {PA24, PWM_1, 5},
+ {PA25, PWM_1, 5},
+ {PA30, PWM_1, 4},
+ {PA31, PWM_1, 4},
+ {PB10, PWM_0, 5},
+ {PB11, PWM_0, 5},
+
+ /* Not connected */
+ {NC , NC , NC}
+};
+
+/**********EXTINT*************/
+const PinMap PinMap_EXTINT[] = {
+ {PA16, EXTINT_0, 0},
+ {PA00, EXTINT_0, 0},
+
+ {PA17, EXTINT_1, 0},
+ {PA01, EXTINT_1, 0},
+
+ {PA18, EXTINT_2, 0},
+ {PA02, EXTINT_2, 0},
+ {PB02, EXTINT_2, 0},
+
+ {PA03, EXTINT_3, 0},
+ {PA19, EXTINT_3, 0},
+ {PB03, EXTINT_3, 0},
+
+ {PA04, EXTINT_4, 0},
+ {PA20, EXTINT_4, 0},
+
+ {PA05, EXTINT_5, 0},
+ {PA21, EXTINT_5, 0},
+
+ {PA06, EXTINT_6, 0},
+ {PA22, EXTINT_6, 0},
+ {PB22, EXTINT_6, 0},
+
+ {PA07, EXTINT_7, 0},
+ {PA23, EXTINT_7, 0},
+ {PB23, EXTINT_7, 0},
+
+ {PA28, EXTINT_8, 0},
+ {PB08, EXTINT_8, 0},
+
+ {PA09, EXTINT_9, 0},
+ {PB09, EXTINT_9, 0},
+
+ {PA10, EXTINT_10, 0},
+ {PA30, EXTINT_10, 0},
+ {PB10, EXTINT_10, 0},
+
+ {PA11, EXTINT_11, 0},
+ {PA31, EXTINT_11, 0},
+ {PB11, EXTINT_11, 0},
+
+ {PA12, EXTINT_12, 0},
+ {PA24, EXTINT_12, 0},
+
+ {PA13, EXTINT_13, 0},
+ {PA25, EXTINT_13, 0},
+
+ {PA14, EXTINT_14, 0},
+
+ {PA15, EXTINT_15, 0},
+ {PA27, EXTINT_15, 0},
+
+ /* Not connected */
+ {NC , NC , NC}
+};
+
+const struct pwm_pin_channel pwn_pins[] = {
+ {PA00, PWM_2, 0},
+ {PA01, PWM_2, 1},
+ {PA04, PWM_0, 0},
+ {PA05, PWM_0, 1},
+ {PA06, PWM_1, 0},
+ {PA07, PWM_1, 1},
+ {PA08, PWM_1, 2},
+ {PA09, PWM_1, 3},
+ {PA10, PWM_1, 0},
+ {PA11, PWM_1, 1},
+ {PA12, PWM_2, 0},
+ {PA13, PWM_2, 1},
+ {PA14, PWM_0, 4},
+ {PA15, PWM_0, 5},
+ {PA16, PWM_2, 0},
+ {PA17, PWM_2, 1},
+ {PA18, PWM_0, 2},
+ {PA19, PWM_0, 3},
+ {PA20, PWM_0, 6},
+ {PA21, PWM_0, 7},
+ {PA22, PWM_0, 4},
+ {PA23, PWM_0, 5},
+ {PA24, PWM_1, 2},
+ {PA25, PWM_1, 3},
+ {PA30, PWM_1, 0},
+ {PA31, PWM_1, 1},
+ {PB10, PWM_0, 4},
+ {PB11, PWM_0, 5},
+
+ /* Not connected */
+ {NC , NC , NC}
+};
+
+
+
diff --git a/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/PeripheralPins.h b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/PeripheralPins.h
new file mode 100644
index 0000000000..9c66f5587a
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/PeripheralPins.h
@@ -0,0 +1,40 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef MBED_PERIPHERALPINS_H
+#define MBED_PERIPHERALPINS_H
+
+#include "pinmap.h"
+#include "PeripheralNames.h"
+
+/************ADC***************/
+extern const PinMap PinMap_ADC[];
+
+/************DAC***************/
+extern const PinMap PinMap_DAC[];
+
+/*********SERCOM*************/
+extern const PinMap PinMap_SERCOM_PAD[];
+extern const PinMap PinMap_SERCOM_PADEx[];
+
+/************PWM***************/
+extern const PinMap PinMap_PWM[];
+
+/**********EXTINT*************/
+extern const PinMap PinMap_EXTINT[];
+
+
+#endif
diff --git a/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/PinNames.h b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/PinNames.h
new file mode 100644
index 0000000000..5e957e4ef8
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/PinNames.h
@@ -0,0 +1,95 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2013 Nordic Semiconductor
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_PINNAMES_H
+#define MBED_PINNAMES_H
+
+#include "cmsis.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+ PIN_INPUT,
+ PIN_OUTPUT,
+ PIN_INPUT_OUTPUT //pin state can be set and read back
+} PinDirection;
+
+typedef enum {
+ PA00 = 0,
+ PA01 = 1,
+ PA02 = 2,
+ PA03 = 3,
+ PA04 = 4,
+ PA05 = 5,
+ PA06 = 6,
+ PA07 = 7,
+ PA08 = 8,
+ PA09 = 9,
+ PA10 = 10,
+ PA11 = 11,
+ PA12 = 12,
+ PA13 = 13,
+ PA14 = 14,
+ PA15 = 15,
+ PA16 = 16,
+ PA17 = 17,
+ PA18 = 18,
+ PA19 = 19,
+ PA20 = 20,
+ PA21 = 21,
+ PA22 = 22,
+ PA23 = 23,
+ PA24 = 24,
+ PA25 = 25,
+ PA27 = 27,
+ PA28 = 28,
+ PA30 = 30,
+ PA31 = 31,
+
+ PB02 = 34,
+ PB03 = 35,
+ PB08 = 40,
+ PB09 = 41,
+ PB10 = 42,
+ PB11 = 43,
+ PB22 = 54,
+ PB23 = 55,
+
+ USBTX = PB10,
+ USBRX = PB11,
+
+ LED1 = PA23,
+ LED2 = PA23,
+ LED3 = PA23,
+ LED4 = PA23,
+
+ // Not connected
+ NC = (int)0xFFFFFFFF
+} PinName;
+
+typedef enum {
+ PullNone = 0,
+ PullUp = 1,
+ PullDown = 2,
+ PullDefault = PullUp
+} PinMode;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/SAMW25_XPLAINED_PRO/mbed_overrides.c b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/SAMW25_XPLAINED_PRO/mbed_overrides.c
new file mode 100644
index 0000000000..73e8d6009b
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/SAMW25_XPLAINED_PRO/mbed_overrides.c
@@ -0,0 +1,32 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "mbed_assert.h"
+#include "compiler.h"
+#include "system.h"
+
+uint8_t g_sys_init = 0;
+
+//called before main - implement here if board needs it ortherwise, let
+// the application override this if necessary
+//TODO: To be implemented by adding system init and board init
+void mbed_sdk_init()
+{
+ if(g_sys_init == 0) {
+ g_sys_init = 1;
+ system_init();
+ }
+}
+/***************************************************************/
diff --git a/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/SAMW25_XPLAINED_PRO/samw25_xplained_pro.h b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/SAMW25_XPLAINED_PRO/samw25_xplained_pro.h
new file mode 100644
index 0000000000..bb677c618a
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/SAMW25_XPLAINED_PRO/samw25_xplained_pro.h
@@ -0,0 +1,530 @@
+/**
+ * \file
+ *
+ * \brief SAM W25 Xplained Pro board definition
+ *
+ * Copyright (c) 2015 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ * Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef SAMW25_XPLAINED_PRO_H_INCLUDED
+#define SAMW25_XPLAINED_PRO_H_INCLUDED
+
+#include
+#include
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \ingroup group_common_boards
+ * \defgroup samd21_xplained_pro_group SAM D21 Xplained Pro board
+ *
+ * @{
+ */
+
+void system_board_init(void);
+
+/**
+ * \defgroup samd21_xplained_pro_features_group Features
+ *
+ * Symbols that describe features and capabilities of the board.
+ *
+ * @{
+ */
+
+/** Name string macro */
+#define BOARD_NAME "SAMW25_XPLAINED_PRO"
+
+/** \name Resonator definitions
+ * @{ */
+#define BOARD_FREQ_SLCK_XTAL (32768U)
+#define BOARD_FREQ_SLCK_BYPASS (32768U)
+#define BOARD_FREQ_MAINCK_XTAL 0 /* Not Mounted */
+#define BOARD_FREQ_MAINCK_BYPASS 0 /* Not Mounted */
+#define BOARD_MCK CHIP_FREQ_CPU_MAX
+#define BOARD_OSC_STARTUP_US 15625
+/** @} */
+
+/** \name LED0 definitions
+ * @{ */
+#define LED0_PIN PIN_PA23
+#define LED0_ACTIVE false
+#define LED0_INACTIVE !LED0_ACTIVE
+/** @} */
+
+/** \name SW0 definitions
+ * @{ */
+#define SW0_PIN PIN_PB23
+#define SW0_ACTIVE false
+#define SW0_INACTIVE !SW0_ACTIVE
+#define SW0_EIC_PIN PIN_PB23A_EIC_EXTINT7
+#define SW0_EIC_MUX MUX_PA23A_EIC_EXTINT7
+#define SW0_EIC_PINMUX PINMUX_PA23A_EIC_EXTINT7
+#define SW0_EIC_LINE 7
+/** @} */
+
+/**
+ * \name LED #0 definitions
+ *
+ * Wrapper macros for LED0, to ensure common naming across all Xplained Pro
+ * boards.
+ *
+ * @{ */
+#define LED_0_NAME "LED0 (yellow)"
+#define LED_0_PIN LED0_PIN
+#define LED_0_ACTIVE LED0_ACTIVE
+#define LED_0_INACTIVE LED0_INACTIVE
+#define LED0_GPIO LED0_PIN
+#define LED0 LED0_PIN
+
+#define LED_0_PWM_MODULE TCC0
+#define LED_0_PWM_CHANNEL 0
+#define LED_0_PWM_OUTPUT 0
+#define LED_0_PWM_PIN PIN_PA23F_TCC0_WO5
+#define LED_0_PWM_MUX MUX_PA23F_TCC0_WO5
+#define LED_0_PWM_PINMUX PINMUX_PA23F_TCC0_WO5
+/** @} */
+
+/** Number of on-board LEDs */
+#define LED_COUNT 1
+
+
+/**
+ * \name Button #0 definitions
+ *
+ * Wrapper macros for SW0, to ensure common naming across all Xplained Pro
+ * boards.
+ *
+ * @{ */
+#define BUTTON_0_NAME "SW0"
+#define BUTTON_0_PIN SW0_PIN
+#define BUTTON_0_ACTIVE SW0_ACTIVE
+#define BUTTON_0_INACTIVE SW0_INACTIVE
+#define BUTTON_0_EIC_PIN SW0_EIC_PIN
+#define BUTTON_0_EIC_MUX SW0_EIC_MUX
+#define BUTTON_0_EIC_PINMUX SW0_EIC_PINMUX
+#define BUTTON_0_EIC_LINE SW0_EIC_LINE
+/** @} */
+
+/** Number of on-board buttons */
+#define BUTTON_COUNT 1
+
+/** \name Extension header #1 pin definitions
+ * @{
+ */
+#define EXT1_PIN_3 PIN_PA02
+#define EXT1_PIN_4 PIN_PA03
+#define EXT1_PIN_5 PIN_PB02
+#define EXT1_PIN_6 PIN_PB03
+#define EXT1_PIN_7 PIN_PA10
+#define EXT1_PIN_8 PIN_PA11
+#define EXT1_PIN_9 PIN_PA20
+#define EXT1_PIN_10 PIN_PA21
+#define EXT1_PIN_11 PIN_PA08
+#define EXT1_PIN_12 PIN_PA09
+#define EXT1_PIN_13 PIN_PB11
+#define EXT1_PIN_14 PIN_PB10
+#define EXT1_PIN_15 PIN_PA17
+#define EXT1_PIN_16 PIN_PA18
+#define EXT1_PIN_17 PIN_PA16
+#define EXT1_PIN_18 PIN_PA19
+/** @} */
+
+/** \name Extension header #1 pin definitions by function
+ * @{
+ */
+#define EXT1_PIN_ADC_0 EXT1_PIN_3
+#define EXT1_PIN_ADC_1 EXT1_PIN_4
+#define EXT1_PIN_GPIO_0 EXT1_PIN_5
+#define EXT1_PIN_GPIO_1 EXT1_PIN_6
+#define EXT1_PIN_PWM_0 EXT1_PIN_7
+#define EXT1_PIN_PWM_1 EXT1_PIN_8
+#define EXT1_PIN_IRQ EXT1_PIN_9
+#define EXT1_PIN_I2C_SDA EXT1_PIN_11
+#define EXT1_PIN_I2C_SCL EXT1_PIN_12
+#define EXT1_PIN_UART_RX EXT1_PIN_13
+#define EXT1_PIN_UART_TX EXT1_PIN_14
+#define EXT1_PIN_SPI_SS_1 EXT1_PIN_10
+#define EXT1_PIN_SPI_SS_0 EXT1_PIN_15
+#define EXT1_PIN_SPI_MOSI EXT1_PIN_16
+#define EXT1_PIN_SPI_MISO EXT1_PIN_17
+#define EXT1_PIN_SPI_SCK EXT1_PIN_18
+/** @} */
+
+/** \name Extension header #1 ADC definitions
+ * @{
+ */
+#define EXT1_ADC_MODULE ADC
+#define EXT1_ADC_0_CHANNEL 0
+#define EXT1_ADC_0_PIN PIN_PA02B_ADC_AIN0
+#define EXT1_ADC_0_MUX MUX_PA02B_ADC_AIN0
+#define EXT1_ADC_0_PINMUX PINMUX_PA02B_ADC_AIN0
+#define EXT1_ADC_1_CHANNEL 1
+#define EXT1_ADC_1_PIN PIN_PA03B_ADC_AIN1
+#define EXT1_ADC_1_MUX MUX_PA03B_ADC_AIN1
+#define EXT1_ADC_1_PINMUX PINMUX_PA03B_ADC_AIN1
+/** @} */
+
+/** \name Extension header #1 PWM definitions
+ * @{
+ */
+#define EXT1_PWM_MODULE TCC0
+#define EXT1_PWM_0_CHANNEL 2
+#define EXT1_PWM_0_PIN PIN_PA10F_TCC0_WO2
+#define EXT1_PWM_0_MUX MUX_PA10F_TCC0_WO2
+#define EXT1_PWM_0_PINMUX PINMUX_PA10F_TCC0_WO2
+#define EXT1_PWM_1_CHANNEL 3
+#define EXT1_PWM_1_PIN PIN_PA11F_TCC0_WO3
+#define EXT1_PWM_1_MUX MUX_PA11F_TCC0_WO3
+#define EXT1_PWM_1_PINMUX PINMUX_PA11F_TCC0_WO3
+/** @} */
+
+/** \name Extension header #1 IRQ/External interrupt definitions
+ * @{
+ */
+#define EXT1_IRQ_MODULE EIC
+#define EXT1_IRQ_INPUT 4
+#define EXT1_IRQ_PIN PIN_PA20A_EIC_EXTINT4
+#define EXT1_IRQ_MUX MUX_PA20A_EIC_EXTINT4
+#define EXT1_IRQ_PINMUX PINMUX_PA20A_EIC_EXTINT4
+/** @} */
+
+/** \name Extension header #1 I2C definitions
+ * @{
+ */
+#define EXT1_I2C_MODULE SERCOM0
+#define EXT1_I2C_SERCOM_PINMUX_PAD0 PINMUX_PA08C_SERCOM0_PAD0
+#define EXT1_I2C_SERCOM_PINMUX_PAD1 PINMUX_PA09C_SERCOM0_PAD1
+/** @} */
+
+/** \name Extension header #1 UART definitions
+ * @{
+ */
+#define EXT1_UART_MODULE SERCOM4
+#define EXT1_UART_SERCOM_MUX_SETTING USART_RX_3_TX_2_XCK_3
+#define EXT1_UART_SERCOM_PINMUX_PAD0 PINMUX_UNUSED
+#define EXT1_UART_SERCOM_PINMUX_PAD1 PINMUX_UNUSED
+#define EXT1_UART_SERCOM_PINMUX_PAD2 PINMUX_PB10D_SERCOM4_PAD2
+#define EXT1_UART_SERCOM_PINMUX_PAD3 PINMUX_PB11D_SERCOM4_PAD3
+/** @} */
+
+/** \name Extension header #1 SPI definitions
+ * @{
+ */
+#define EXT1_SPI_MODULE SERCOM1
+#define EXT1_SPI_SERCOM_MUX_SETTING SPI_SIGNAL_MUX_SETTING_E
+#define EXT1_SPI_SERCOM_PINMUX_PAD0 PINMUX_PA16C_SERCOM1_PAD0
+#define EXT1_SPI_SERCOM_PINMUX_PAD1 PINMUX_PA17C_SERCOM1_PAD1
+#define EXT1_SPI_SERCOM_PINMUX_PAD2 PINMUX_PA18C_SERCOM1_PAD2
+#define EXT1_SPI_SERCOM_PINMUX_PAD3 PINMUX_PA19C_SERCOM1_PAD3
+
+/** \name Extension header #3 pin definitions
+ * @{
+ */
+#define EXT3_PIN_3 PIN_PA04
+#define EXT3_PIN_4 PIN_PA05
+#define EXT3_PIN_5 PIN_PB22
+#define EXT3_PIN_6 PIN_PB23
+#define EXT3_PIN_7 PIN_PA22
+#define EXT3_PIN_8 PIN_PA23
+#define EXT3_PIN_9 PIN_PA06
+#define EXT3_PIN_10 0
+#define EXT3_PIN_11 PIN_PA08
+#define EXT3_PIN_12 PIN_PA09
+#define EXT3_PIN_13 PIN_PA01
+#define EXT3_PIN_14 PIN_PA00
+#define EXT3_PIN_15 PIN_PA07
+#define EXT3_PIN_16 PIN_PA18
+#define EXT3_PIN_17 PIN_PA16
+#define EXT3_PIN_18 PIN_PA19
+/** @} */
+
+/** \name Extension header #3 pin definitions by function
+ * @{
+ */
+#define EXT3_PIN_ADC_0 EXT3_PIN_3
+#define EXT3_PIN_ADC_1 EXT3_PIN_4
+#define EXT3_PIN_GPIO_0 EXT3_PIN_5
+#define EXT3_PIN_GPIO_1 EXT3_PIN_6
+#define EXT3_PIN_PWM_0 EXT3_PIN_7
+#define EXT3_PIN_PWM_1 EXT3_PIN_8
+#define EXT3_PIN_IRQ EXT3_PIN_9
+#define EXT3_PIN_I2C_SDA EXT3_PIN_11
+#define EXT3_PIN_I2C_SCL EXT3_PIN_12
+#define EXT3_PIN_UART_RX EXT3_PIN_13
+#define EXT3_PIN_UART_TX EXT3_PIN_14
+#define EXT3_PIN_SPI_SS_0 EXT3_PIN_15
+#define EXT3_PIN_SPI_MOSI EXT3_PIN_16
+#define EXT3_PIN_SPI_MISO EXT3_PIN_17
+#define EXT3_PIN_SPI_SCK EXT3_PIN_18
+/** @} */
+
+/** \name Extension header #3 ADC definitions
+ * @{
+ */
+#define EXT3_ADC_MODULE ADC
+#define EXT3_ADC_0_CHANNEL 4
+#define EXT3_ADC_0_PIN PIN_PA04B_ADC_AIN4
+#define EXT3_ADC_0_MUX MUX_PA04B_ADC_AIN4
+#define EXT3_ADC_0_PINMUX PINMUX_PA04B_ADC_AIN4
+#define EXT3_ADC_1_CHANNEL 5
+#define EXT3_ADC_1_PIN PIN_PA05B_ADC_AIN5
+#define EXT3_ADC_1_MUX MUX_PA05B_ADC_AIN5
+#define EXT3_ADC_1_PINMUX PINMUX_PA05B_ADC_AIN5
+/** @} */
+
+/** \name Extension header #3 PWM definitions
+ * @{
+ */
+#define EXT3_PWM_MODULE TC4
+#define EXT3_PWM_0_CHANNEL 0
+#define EXT3_PWM_0_PIN PIN_PA22E_TC4_WO0
+#define EXT3_PWM_0_MUX MUX_PA22E_TC4_WO0
+#define EXT3_PWM_0_PINMUX PINMUX_PA22E_TC4_WO0
+#define EXT3_PWM_1_CHANNEL 1
+#define EXT3_PWM_1_PIN PIN_PA23E_TC4_WO1
+#define EXT3_PWM_1_MUX MUX_PA23E_TC4_WO1
+#define EXT3_PWM_1_PINMUX PINMUX_PA23E_TC4_WO1
+/** @} */
+
+/** \name Extension header #3 IRQ/External interrupt definitions
+ * @{
+ */
+#define EXT3_IRQ_MODULE EIC
+#define EXT3_IRQ_INPUT 6
+#define EXT3_IRQ_PIN PIN_PA06A_EIC_EXTINT6
+#define EXT3_IRQ_MUX MUX_PA06A_EIC_EXTINT6
+#define EXT3_IRQ_PINMUX PINMUX_PA06A_EIC_EXTINT6
+/** @} */
+
+/** \name Extension header #3 I2C definitions
+ * @{
+ */
+#define EXT3_I2C_MODULE SERCOM0
+#define EXT3_I2C_SERCOM_PINMUX_PAD0 PINMUX_PA08C_SERCOM0_PAD0
+#define EXT3_I2C_SERCOM_PINMUX_PAD1 PINMUX_PA09C_SERCOM0_PAD1
+/** @} */
+
+/** \name Extension header #3 UART definitions
+ * @{
+ */
+#define EXT3_UART_MODULE SERCOM1
+#define EXT3_UART_SERCOM_MUX_SETTING USART_RX_1_TX_0_XCK_1
+#define EXT3_UART_SERCOM_PINMUX_PAD0 PINMUX_PA00D_SERCOM1_PAD0
+#define EXT3_UART_SERCOM_PINMUX_PAD1 PINMUX_PA01D_SERCOM1_PAD1
+#define EXT3_UART_SERCOM_PINMUX_PAD2 PINMUX_UNUSED
+#define EXT3_UART_SERCOM_PINMUX_PAD3 PINMUX_UNUSED
+/** @} */
+
+/** \name Extension header #3 SPI definitions
+ * @{
+ */
+#define EXT3_SPI_MODULE SERCOM1
+#define EXT3_SPI_SERCOM_MUX_SETTING SPI_SIGNAL_MUX_SETTING_E
+#define EXT3_SPI_SERCOM_PINMUX_PAD0 PINMUX_PA16C_SERCOM1_PAD0
+#define EXT3_SPI_SERCOM_PINMUX_PAD1 PINMUX_UNUSED /* PA07 */
+#define EXT3_SPI_SERCOM_PINMUX_PAD2 PINMUX_PA18C_SERCOM1_PAD2
+#define EXT3_SPI_SERCOM_PINMUX_PAD3 PINMUX_PA19C_SERCOM1_PAD3
+/** @} */
+
+/** \name Extension header #3 Dataflash
+ * @{
+ */
+#define EXT3_DATAFLASH_SPI_MODULE EXT3_SPI_MODULE
+#define EXT3_DATAFLASH_SPI_MUX_SETTING EXT3_SPI_SERCOM_MUX_SETTING
+#define EXT3_DATAFLASH_SPI_PINMUX_PAD0 EXT3_SPI_SERCOM_PINMUX_PAD0
+#define EXT3_DATAFLASH_SPI_PINMUX_PAD1 EXT3_SPI_SERCOM_PINMUX_PAD1
+#define EXT3_DATAFLASH_SPI_PINMUX_PAD2 EXT3_SPI_SERCOM_PINMUX_PAD2
+#define EXT3_DATAFLASH_SPI_PINMUX_PAD3 EXT3_SPI_SERCOM_PINMUX_PAD3
+/** @} */
+
+/** \name USB definitions
+ * @{
+ */
+#define USB_ID
+#define USB_TARGET_DP_PIN PIN_PA25G_USB_DP
+#define USB_TARGET_DP_MUX MUX_PA25G_USB_DP
+#define USB_TARGET_DP_PINMUX PINMUX_PA25G_USB_DP
+#define USB_TARGET_DM_PIN PIN_PA24G_USB_DM
+#define USB_TARGET_DM_MUX MUX_PA24G_USB_DM
+#define USB_TARGET_DM_PINMUX PINMUX_PA24G_USB_DM
+#define USB_VBUS_PIN PIN_PA05
+#define USB_VBUS_EIC_LINE 5
+#define USB_VBUS_EIC_MUX MUX_PA05A_EIC_EXTINT5
+#define USB_VBUS_EIC_PINMUX PINMUX_PA05A_EIC_EXTINT5
+#define USB_ID_PIN PIN_PA04
+#define USB_ID_EIC_LINE 4
+#define USB_ID_EIC_MUX MUX_PA04A_EIC_EXTINT4
+#define USB_ID_EIC_PINMUX PINMUX_PA04A_EIC_EXTINT4
+/** @} */
+
+/** \name Embedded debugger GPIO interface definitions
+ * @{
+ */
+#define EDBG_GPIO0_PIN PIN_PB22
+#define EDBG_GPIO1_PIN PIN_PB23
+#define EDBG_GPIO2_PIN PIN_PA22
+#define EDBG_GPIO3_PIN PIN_PA24
+/** @} */
+
+/** \name Embedded debugger USART interface definitions
+ * @{
+ */
+#define EDBG_UART_MODULE -1 /* Not available on this board */
+#define EDBG_UART_RX_PIN -1 /* Not available on this board */
+#define EDBG_UART_RX_MUX -1 /* Not available on this board */
+#define EDBG_UART_RX_PINMUX -1 /* Not available on this board */
+#define EDBG_UART_RX_SERCOM_PAD -1 /* Not available on this board */
+#define EDBG_UART_TX_PIN -1 /* Not available on this board */
+#define EDBG_UART_TX_MUX -1 /* Not available on this board */
+#define EDBG_UART_TX_PINMUX -1 /* Not available on this board */
+#define EDBG_UART_TX_SERCOM_PAD -1 /* Not available on this board */
+/** @} */
+
+/** \name Embedded debugger I2C interface definitions
+ * @{
+ */
+#define EDBG_I2C_MODULE SERCOM0
+#define EDBG_I2C_SERCOM_PINMUX_PAD0 PINMUX_PA08C_SERCOM0_PAD0
+#define EDBG_I2C_SERCOM_PINMUX_PAD1 PINMUX_PA09C_SERCOM0_PAD1
+/** @} */
+
+/** \name Embedded debugger SPI interface definitions
+ * @{
+ */
+#define EDBG_SPI_MODULE SERCOM1
+#define EDBG_SPI_SERCOM_MUX_SETTING SPI_SIGNAL_MUX_SETTING_E
+#define EDBG_SPI_SERCOM_PINMUX_PAD0 PINMUX_PA16C_SERCOM1_PAD0
+#define EDBG_SPI_SERCOM_PINMUX_PAD1 PINMUX_UNUSED /* PA_06 */
+#define EDBG_SPI_SERCOM_PINMUX_PAD2 PINMUX_PA18C_SERCOM1_PAD2
+#define EDBG_SPI_SERCOM_PINMUX_PAD3 PINMUX_PA19C_SERCOM1_PAD3
+/** @} */
+
+/** \name Embedded debugger CDC Gateway USART interface definitions
+ * @{
+ */
+#define EDBG_CDC_MODULE SERCOM4
+#define EDBG_CDC_SERCOM_MUX_SETTING USART_RX_3_TX_2_XCK_3
+#define EDBG_CDC_SERCOM_PINMUX_PAD0 PINMUX_UNUSED
+#define EDBG_CDC_SERCOM_PINMUX_PAD1 PINMUX_UNUSED
+#define EDBG_CDC_SERCOM_PINMUX_PAD2 PINMUX_PB10D_SERCOM4_PAD2
+#define EDBG_CDC_SERCOM_PINMUX_PAD3 PINMUX_PB11D_SERCOM4_PAD3
+/** @} */
+
+/** @} */
+
+/** \name 802.15.4 TRX Interface definitions
+ * @{
+ */
+
+#define AT86RFX_SPI EXT1_SPI_MODULE
+#define AT86RFX_RST_PIN EXT1_PIN_7
+#define AT86RFX_MISC_PIN EXT1_PIN_12
+#define AT86RFX_IRQ_PIN EXT1_PIN_9
+#define AT86RFX_SLP_PIN EXT1_PIN_10
+#define AT86RFX_SPI_CS EXT1_PIN_15
+#define AT86RFX_SPI_MOSI EXT1_PIN_16
+#define AT86RFX_SPI_MISO EXT1_PIN_17
+#define AT86RFX_SPI_SCK EXT1_PIN_18
+#define AT86RFX_CSD EXT1_PIN_5
+#define AT86RFX_CPS EXT1_PIN_8
+
+#define AT86RFX_SPI_SERCOM_MUX_SETTING EXT1_SPI_SERCOM_MUX_SETTING
+#define AT86RFX_SPI_SERCOM_PINMUX_PAD0 EXT1_SPI_SERCOM_PINMUX_PAD0
+#define AT86RFX_SPI_SERCOM_PINMUX_PAD1 PINMUX_UNUSED
+#define AT86RFX_SPI_SERCOM_PINMUX_PAD2 EXT1_SPI_SERCOM_PINMUX_PAD2
+#define AT86RFX_SPI_SERCOM_PINMUX_PAD3 EXT1_SPI_SERCOM_PINMUX_PAD3
+
+#define AT86RFX_IRQ_CHAN EXT1_IRQ_INPUT
+#define AT86RFX_IRQ_PINMUX EXT1_IRQ_PINMUX
+
+
+/** Enables the transceiver main interrupt. */
+#define ENABLE_TRX_IRQ()
+
+/** Disables the transceiver main interrupt. */
+#define DISABLE_TRX_IRQ()
+
+/** Clears the transceiver main interrupt. */
+#define CLEAR_TRX_IRQ()
+
+/*
+ * This macro saves the trx interrupt status and disables the trx interrupt.
+ */
+#define ENTER_TRX_REGION()
+
+/*
+ * This macro restores the transceiver interrupt status
+ */
+#define LEAVE_TRX_REGION()
+
+/** @} */
+
+/**
+ * \brief Turns off the specified LEDs.
+ *
+ * \param led_gpio LED to turn off (LEDx_GPIO).
+ *
+ * \note The pins of the specified LEDs are set to GPIO output mode.
+ */
+#define LED_Off(led_gpio) port_pin_set_output_level(led_gpio,true)
+
+/**
+ * \brief Turns on the specified LEDs.
+ *
+ * \param led_gpio LED to turn on (LEDx_GPIO).
+ *
+ * \note The pins of the specified LEDs are set to GPIO output mode.
+ */
+#define LED_On(led_gpio) port_pin_set_output_level(led_gpio,false)
+
+/**
+ * \brief Toggles the specified LEDs.
+ *
+ * \param led_gpio LED to toggle (LEDx_GPIO).
+ *
+ * \note The pins of the specified LEDs are set to GPIO output mode.
+ */
+#define LED_Toggle(led_gpio) port_pin_toggle_output_level(led_gpio)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SAMW25_XPLAINED_PRO_H_INCLUDED */
diff --git a/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/analogout_api.c b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/analogout_api.c
new file mode 100644
index 0000000000..a63233dbeb
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/analogout_api.c
@@ -0,0 +1,110 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "mbed_assert.h"
+#include "analogout_api.h"
+
+#include "cmsis.h"
+#include "pinmap.h"
+#include "PeripheralPins.h"
+#include "dac.h"
+
+struct dac_module dac_instance;
+extern uint8_t g_sys_init;
+
+#define MAX_VAL_10BIT 0x03FF
+
+void analogout_init(dac_t *obj, PinName pin)
+{
+ MBED_ASSERT(obj);
+ if (g_sys_init == 0) {
+ system_init();
+ g_sys_init = 1;
+ }
+
+ struct dac_config config_dac;
+ struct dac_chan_config config_dac_chan;
+ uint32_t pos_input;
+ pos_input = pinmap_find_peripheral(pin, PinMap_DAC);
+ MBED_ASSERT(pos_input != NC);
+
+ obj->dac = DAC_0;
+
+ dac_get_config_defaults(&config_dac);
+ dac_init(&dac_instance, (Dac *)DAC_0, &config_dac);
+
+ dac_chan_get_config_defaults(&config_dac_chan);
+ dac_chan_set_config(&dac_instance, DAC_CHANNEL_0, &config_dac_chan);
+ dac_chan_enable(&dac_instance, DAC_CHANNEL_0);
+
+ dac_enable(&dac_instance);
+}
+
+void analogout_free(dac_t *obj)
+{
+ MBED_ASSERT(obj);
+ struct system_pinmux_config pin_conf;
+
+ dac_disable(&dac_instance);
+ pin_conf.direction = SYSTEM_PINMUX_PIN_DIR_INPUT;
+ pin_conf.input_pull = SYSTEM_PINMUX_PIN_PULL_UP;
+ pin_conf.powersave = false;
+ pin_conf.mux_position = SYSTEM_PINMUX_GPIO;
+ system_pinmux_pin_set_config(PA02, &pin_conf); /*PA02 is the only DAC pin available*/
+}
+
+void analogout_write(dac_t *obj, float value)
+{
+ MBED_ASSERT(obj);
+ uint16_t count_val = 0;
+ if (value < 0.0f) {
+ count_val = 0;
+ } else if (value > 1.0f) {
+ count_val = MAX_VAL_10BIT;
+ } else {
+ count_val = (uint16_t)(value * (float)MAX_VAL_10BIT);
+ }
+ dac_chan_write(&dac_instance, DAC_CHANNEL_0, count_val);
+
+}
+
+void analogout_write_u16(dac_t *obj, uint16_t value)
+{
+ MBED_ASSERT(obj);
+ uint16_t count_val;
+ count_val = (uint16_t)((value * (float)MAX_VAL_10BIT) / 0xFFFF); /*Normalization to the value 0xFFFF*/
+ dac_chan_write(&dac_instance, DAC_CHANNEL_0, count_val);
+
+}
+
+static uint32_t data_reg_read(dac_t *obj)
+{
+ Dac *const dac_module = (Dac *)obj->dac;
+ return (uint32_t)dac_module->DATA.reg;
+}
+
+float analogout_read(dac_t *obj)
+{
+ MBED_ASSERT(obj);
+ uint32_t data_val = data_reg_read(obj);
+ return data_val/(float)MAX_VAL_10BIT;
+}
+
+uint16_t analogout_read_u16(dac_t *obj)
+{
+ MBED_ASSERT(obj);
+ uint32_t data_val = data_reg_read(obj);
+ return (uint16_t)((data_val / (float)MAX_VAL_10BIT) * 0xFFFF); /*Normalization to the value 0xFFFF*/
+}
diff --git a/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/device.h b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/device.h
new file mode 100644
index 0000000000..36c0913eb3
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/device.h
@@ -0,0 +1,63 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_DEVICE_H
+#define MBED_DEVICE_H
+
+#define DEVICE_PORTIN 1
+#define DEVICE_PORTOUT 1
+#define DEVICE_PORTINOUT 1
+
+#define DEVICE_INTERRUPTIN 1
+
+#define DEVICE_ANALOGIN 1
+#define DEVICE_ANALOGOUT 1
+
+#define DEVICE_SERIAL 1
+#define DEVICE_SERIAL_FC 1
+#define DEVICE_SERIAL_ASYNCH 1
+
+#define DEVICE_I2C 1
+#define DEVICE_I2CSLAVE 1
+#define DEVICE_I2C_ASYNCH 1
+
+#define DEVICE_SPI 1
+#define DEVICE_SPISLAVE 1
+#define DEVICE_SPI_ASYNCH 1
+
+#define DEVICE_CAN 0
+
+#define DEVICE_RTC 1
+
+#define DEVICE_ETHERNET 0
+
+#define DEVICE_PWMOUT 1
+
+#define DEVICE_SEMIHOST 0
+#define DEVICE_LOCALFILESYSTEM 0
+#define DEVICE_ID_LENGTH 0
+#define DEVICE_MAC_OFFSET 0
+
+#define DEVICE_SLEEP 1
+
+#define DEVICE_DEBUG_AWARENESS 0
+
+#define DEVICE_STDIO_MESSAGES 0
+
+#define DEVICE_ERROR_PATTERN 0
+
+#include "objects.h"
+
+#endif
diff --git a/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/port_api.c b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/port_api.c
index c6061f38f6..072680c744 100644
--- a/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/port_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/port_api.c
@@ -25,6 +25,10 @@
#elif defined(TARGET_SAMD21J18A)
#define PORTA_MASK 0xDBFFFFFF // mask for available pins in Port A
#define PORTB_MASK 0xC0C3FFFF // mask for available pins in Port B
+#elif defined(TARGET_SAMD21G18A)
+#define PORTA_MASK 0xDBFFFFFF // mask for available pins in Port A
+#define PORTB_MASK 0x00C00F0C // mask for available pins in Port B
+#else
#endif
uint32_t start_pin(PortName port)
diff --git a/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/pwmout_api.c b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/pwmout_api.c
index 1b6e76797f..6206c894af 100644
--- a/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/pwmout_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/pwmout_api.c
@@ -20,9 +20,6 @@
#include "pinmap_function.h"
-/* Compare Channel used for PWM in TCC Modules */
-#define PWMOUT_CTRL_CHANNEL 0
-
/* Prescaler values for TCC Module */
const uint32_t tcc_prescaler[] = {
TCC_CLOCK_PRESCALER_DIV1,
@@ -89,6 +86,7 @@ bool pwmout_init_hw(pwmout_t* obj)
PinName pin;
uint32_t ch_index = NC;
struct tcc_config config_tcc;
+ uint32_t tcc_channel = NC;
/* Sanity check arguments */
MBED_ASSERT(obj);
@@ -103,6 +101,15 @@ bool pwmout_init_hw(pwmout_t* obj)
/* Pin not supported */
return 0;
}
+ if ((ch_index == 0) || (ch_index == 4)) {
+ tcc_channel = 0;
+ } else if ((ch_index == 1) || (ch_index == 5)) {
+ tcc_channel = 1;
+ } else if ((ch_index == 2) || (ch_index == 6)) {
+ tcc_channel = 2;
+ } else if ((ch_index == 3) || (ch_index == 7)) {
+ tcc_channel = 3;
+ }
tcc_get_config_defaults(&config_tcc, (Tcc*)pwm);
@@ -111,7 +118,7 @@ bool pwmout_init_hw(pwmout_t* obj)
config_tcc.counter.period = obj->period;
config_tcc.compare.wave_generation = TCC_WAVE_GENERATION_SINGLE_SLOPE_PWM;
- config_tcc.compare.match[PWMOUT_CTRL_CHANNEL] = obj->period * obj->duty_cycle;
+ config_tcc.compare.match[tcc_channel] = obj->period * obj->duty_cycle;
config_tcc.pins.enable_wave_out_pin[ch_index] = true;
config_tcc.pins.wave_out_pin[ch_index] = pin;
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/PeripheralNames.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/PeripheralNames.h
deleted file mode 100644
index 8dabf2d47b..0000000000
--- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/PeripheralNames.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_PERIPHERALNAMES_H
-#define MBED_PERIPHERALNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
- ADC_1 = (int)ADC1_BASE,
- ADC_2 = (int)ADC2_BASE
-} ADCName;
-
-typedef enum {
- DAC_1 = (int)DAC1_BASE,
- DAC_2 = (int)DAC2_BASE
-} DACName;
-
-typedef enum {
- UART_1 = (int)USART1_BASE,
- UART_2 = (int)USART2_BASE
-} UARTName;
-
-#define STDIO_UART_TX PA_2
-#define STDIO_UART_RX PA_15
-#define STDIO_UART UART_2
-
-typedef enum {
- SPI_1 = (int)SPI1_BASE
-} SPIName;
-
-typedef enum {
- I2C_1 = (int)I2C1_BASE
-} I2CName;
-
-typedef enum {
- PWM_1 = (int)TIM1_BASE,
- PWM_2 = (int)TIM2_BASE,
- PWM_3 = (int)TIM3_BASE,
- PWM_15 = (int)TIM15_BASE,
- PWM_16 = (int)TIM16_BASE,
- PWM_17 = (int)TIM17_BASE
-} PWMName;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/PeripheralPins.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/PeripheralPins.c
deleted file mode 100644
index 5ef3a7eb2a..0000000000
--- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/PeripheralPins.c
+++ /dev/null
@@ -1,171 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-
-#include "PeripheralPins.h"
-
-// =====
-// Note: Commented lines are alternative possibilities which are not used per default.
-// If you change them, you will have also to modify the corresponding xxx_api.c file
-// for pwmout, analogin, analogout, ...
-// =====
-
-//*** ADC ***
-
-const PinMap PinMap_ADC[] = {
- {PA_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 - ARDUINO A0
- {PA_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 - ARDUINO A1
- {PA_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3
- {PA_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 - ARDUINO A2
- {PA_4, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 - ARDUINO A3
- {PA_5, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 - ARDUINO A4
- {PA_6, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 - ARDUINO A5
- {PA_7, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 - ARDUINO A7
-
- {PB_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 - ARDUINO D3
- {PB_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 - ARDUINO D6
- {NC, NC, 0}
-};
-
-//*** DAC ***
-
-const PinMap PinMap_DAC[] = {
- {PA_4, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1 - ARDUINO A3
- {PA_5, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2 - ARDUINO A4
- {PA_6, DAC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC2_OUT1 - ARDUINO A5
- {NC, NC, 0}
-};
-
-//*** I2C ***
-
-const PinMap PinMap_I2C_SDA[] = {
- {PA_14, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
- {PB_7, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
- {NC, NC, 0}
-};
-
-const PinMap PinMap_I2C_SCL[] = {
- {PA_15, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
- {PB_6, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
- {NC, NC, 0}
-};
-
-//*** PWM ***
-
-// TIM2 cannot be used because already used by the us_ticker
-const PinMap PinMap_PWM[] = {
-// {PA_0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
-// {PA_1, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
- {PA_1, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM15, 1, 1)}, // TIM15_CH1N
-// {PA_2, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 3, 0)}, // TIM2_CH3
- {PA_2, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM15, 1, 0)}, // TIM15_CH1
-// {PA_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 4, 0)}, // TIM2_CH4
- {PA_3, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM15, 2, 0)}, // TIM15_CH2
- {PA_4, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
-// {PA_5, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
- {PA_6, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1
-// {PA_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
- {PA_7, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1
-// {PA_7, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
-// {PA_7, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 1, 1)}, // TIM1_CH1N
- {PA_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 1, 0)}, // TIM1_CH1
- {PA_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 2, 0)}, // TIM1_CH2
-// {PA_9, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM2, 3, 0)}, // TIM2_CH3
- {PA_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 3, 0)}, // TIM1_CH3
-// {PA_10, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM2, 4, 0)}, // TIM2_CH4
- {PA_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_TIM1, 4, 0)}, // TIM1_CH4
-// {PA_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 1, 1)}, // TIM1_CH1N
- {PA_12, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1
-// {PA_12, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 2, 1)}, // TIM1_CH2N
- {PA_13, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N
-// {PA_15, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
-
-// {PB_0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
- {PB_0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 2, 1)}, // TIM1_CH2N
-// {PB_1, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
- {PB_1, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 3, 1)}, // TIM1_CH3N
-// {PB_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
- {PB_4, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1
-// {PB_4, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
-// {PB_5, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
- {PB_5, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM17, 1, 0)},// TIM17_CH1
- {PB_6, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N - ARDUINO
- {PB_7, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 1)}, // TIM17_CH1N
-// {PB_7, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM3, 4, 0)}, // TIM3_CH4
-
- {PF_0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 3, 1)}, // TIM1_CH3N
-
- {NC, NC, 0}
-};
-
-//*** SERIAL ***
-
-const PinMap PinMap_UART_TX[] = {
- {PA_2, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
- {PA_9, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
- {PA_14, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
- {PB_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
- {PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
- {NC, NC, 0}
-};
-
-const PinMap PinMap_UART_RX[] = {
- {PA_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
- {PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
- {PA_15, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
- {PB_4, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
- {PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
- {NC, NC, 0}
-};
-
-//*** SPI ***
-
-const PinMap PinMap_SPI_MOSI[] = {
- {PA_7, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
- {PB_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
- {NC, NC, 0}
-};
-
-const PinMap PinMap_SPI_MISO[] = {
- {PA_6, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
- {PB_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
- {NC, NC, 0}
-};
-
-const PinMap PinMap_SPI_SCLK[] = {
- {PA_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
- {PB_3, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, // Warning: LED1 is connected on this pin
- {NC, NC, 0}
-};
-
-const PinMap PinMap_SPI_SSEL[] = {
- {PA_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
- {PA_15, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
- {NC, NC, 0}
-};
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/PinNames.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/PinNames.h
deleted file mode 100644
index 3e21b16b63..0000000000
--- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/PinNames.h
+++ /dev/null
@@ -1,164 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_PINNAMES_H
-#define MBED_PINNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#define STM_PIN_DATA(MODE, PUPD, AFNUM) ((int)(((MODE & 0x0F) << 0) |\
- ((PUPD & 0x07) << 4) |\
- ((AFNUM & 0x0F) << 7)))
-
-#define STM_PIN_DATA_EXT(MODE, PUPD, AFNUM, CHANNEL, INVERTED) ((int)(((MODE & 0x0F) << 0) |\
- ((PUPD & 0x07) << 4) |\
- ((AFNUM & 0x0F) << 7) |\
- ((CHANNEL & 0x0F) << 11) |\
- ((INVERTED & 0x01) << 15)))
-
-#define STM_PIN_MODE(X) (((X) >> 0) & 0x0F)
-#define STM_PIN_PUPD(X) (((X) >> 4) & 0x07)
-#define STM_PIN_AFNUM(X) (((X) >> 7) & 0x0F)
-#define STM_PIN_CHANNEL(X) (((X) >> 11) & 0x0F)
-#define STM_PIN_INVERTED(X) (((X) >> 15) & 0x01)
-
-#define STM_MODE_INPUT (0)
-#define STM_MODE_OUTPUT_PP (1)
-#define STM_MODE_OUTPUT_OD (2)
-#define STM_MODE_AF_PP (3)
-#define STM_MODE_AF_OD (4)
-#define STM_MODE_ANALOG (5)
-#define STM_MODE_IT_RISING (6)
-#define STM_MODE_IT_FALLING (7)
-#define STM_MODE_IT_RISING_FALLING (8)
-#define STM_MODE_EVT_RISING (9)
-#define STM_MODE_EVT_FALLING (10)
-#define STM_MODE_EVT_RISING_FALLING (11)
-#define STM_MODE_IT_EVT_RESET (12)
-
-// High nibble = port number (0=A, 1=B, 2=C, 3=D, 4=E, 5=F, 6=G, 7=H)
-// Low nibble = pin number
-#define STM_PORT(X) (((uint32_t)(X) >> 4) & 0xF)
-#define STM_PIN(X) ((uint32_t)(X) & 0xF)
-
-typedef enum {
- PIN_INPUT,
- PIN_OUTPUT
-} PinDirection;
-
-typedef enum {
- PA_0 = 0x00,
- PA_1 = 0x01,
- PA_2 = 0x02,
- PA_3 = 0x03,
- PA_4 = 0x04,
- PA_5 = 0x05,
- PA_6 = 0x06,
- PA_7 = 0x07,
- PA_8 = 0x08,
- PA_9 = 0x09,
- PA_10 = 0x0A,
- PA_11 = 0x0B,
- PA_12 = 0x0C,
- PA_13 = 0x0D,
- PA_14 = 0x0E,
- PA_15 = 0x0F,
-
- PB_0 = 0x10,
- PB_1 = 0x11,
- PB_3 = 0x13,
- PB_4 = 0x14,
- PB_5 = 0x15,
- PB_6 = 0x16,
- PB_7 = 0x17,
-
- PF_0 = 0x50,
- PF_1 = 0x51,
-
- // Arduino connector namings
- A0 = PA_0,
- A1 = PA_1,
- A2 = PA_3,
- A3 = PA_4,
- A4 = PA_5,
- A5 = PA_6,
- D0 = PA_10,
- D1 = PA_9,
- D2 = PA_12,
- D3 = PB_0,
- D4 = PB_7,
- D5 = PB_6,
- D6 = PB_1,
- D7 = PF_0,
- D8 = PF_1,
- D9 = PA_8,
- D10 = PA_11,
- D11 = PB_5,
- D12 = PB_4,
- D13 = PB_3,
-
- // Generic signals namings
- LED1 = PB_3,
- LED2 = PB_3,
- LED3 = PB_3,
- LED4 = PB_3,
- USER_BUTTON = 0x20, // no user button on the board
- SERIAL_TX = PA_2,
- SERIAL_RX = PA_15,
- USBTX = PA_2,
- USBRX = PA_15,
- I2C_SCL = PB_6,
- I2C_SDA = PB_7,
- SPI_MOSI = PB_5,
- SPI_MISO = PB_4,
- SPI_SCK = PB_3,
- SPI_CS = PA_11,
- PWM_OUT = PA_8,
-
- // Not connected
- NC = (int)0xFFFFFFFF
-} PinName;
-
-typedef enum {
- PullNone = 0,
- PullUp = 1,
- PullDown = 2,
- OpenDrain = 3,
- PullDefault = PullNone
-} PinMode;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/PortNames.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/PortNames.h
deleted file mode 100644
index 026326171c..0000000000
--- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/PortNames.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_PORTNAMES_H
-#define MBED_PORTNAMES_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
- PortA = 0,
- PortB = 1,
- PortC = 2,
- PortD = 3,
- PortE = 4,
- PortF = 5
-} PortName;
-
-#ifdef __cplusplus
-}
-#endif
-#endif
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/device.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/device.h
deleted file mode 100644
index f842633cf8..0000000000
--- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/device.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_DEVICE_H
-#define MBED_DEVICE_H
-
-#define DEVICE_PORTIN 1
-#define DEVICE_PORTOUT 1
-#define DEVICE_PORTINOUT 1
-
-#define DEVICE_INTERRUPTIN 1
-
-#define DEVICE_ANALOGIN 1
-#define DEVICE_ANALOGOUT 1
-
-#define DEVICE_SERIAL 1
-
-#define DEVICE_I2C 1
-#define DEVICE_I2CSLAVE 1
-
-#define DEVICE_SPI 1
-#define DEVICE_SPISLAVE 1
-
-#define DEVICE_RTC 1
-
-#define DEVICE_PWMOUT 1
-
-#define DEVICE_SLEEP 1
-
-//=======================================
-
-#define DEVICE_SEMIHOST 0
-#define DEVICE_LOCALFILESYSTEM 0
-#define DEVICE_ID_LENGTH 24
-
-#define DEVICE_DEBUG_AWARENESS 0
-
-#define DEVICE_STDIO_MESSAGES 1
-
-#define DEVICE_ERROR_RED 0
-
-#include "objects.h"
-
-#endif
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/objects.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/objects.h
deleted file mode 100644
index 974f6a8066..0000000000
--- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/objects.h
+++ /dev/null
@@ -1,114 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_OBJECTS_H
-#define MBED_OBJECTS_H
-
-#include "cmsis.h"
-#include "PortNames.h"
-#include "PeripheralNames.h"
-#include "PinNames.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-struct gpio_irq_s {
- IRQn_Type irq_n;
- uint32_t irq_index;
- uint32_t event;
- PinName pin;
-};
-
-struct port_s {
- PortName port;
- uint32_t mask;
- PinDirection direction;
- __IO uint32_t *reg_in;
- __IO uint32_t *reg_out;
-};
-
-struct analogin_s {
- ADCName adc;
- PinName pin;
- uint32_t channel;
-};
-
-struct dac_s {
- DACName dac;
- PinName pin;
- uint32_t channel;
-};
-
-struct serial_s {
- UARTName uart;
- int index; // Used by irq
- uint32_t baudrate;
- uint32_t databits;
- uint32_t stopbits;
- uint32_t parity;
- PinName pin_tx;
- PinName pin_rx;
-};
-
-struct spi_s {
- SPIName spi;
- uint32_t bits;
- uint32_t cpol;
- uint32_t cpha;
- uint32_t mode;
- uint32_t nss;
- uint32_t br_presc;
- PinName pin_miso;
- PinName pin_mosi;
- PinName pin_sclk;
- PinName pin_ssel;
-};
-
-struct i2c_s {
- I2CName i2c;
- uint32_t slave;
-};
-
-struct pwmout_s {
- PWMName pwm;
- PinName pin;
- uint32_t period;
- uint32_t pulse;
- uint32_t channel;
- uint32_t inverted;
-};
-
-#include "gpio_object.h"
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F3/serial_api.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F3/serial_api.c
index 59bf574a43..9c3b5a6b88 100644
--- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F3/serial_api.c
+++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F3/serial_api.c
@@ -94,13 +94,11 @@ void serial_init(serial_t *obj, PinName tx, PinName rx)
__HAL_RCC_USART2_CONFIG(RCC_USART2CLKSOURCE_SYSCLK);
obj->index = 1;
}
-#if defined(UART3_BASE)
if (obj->uart == UART_3) {
__USART3_CLK_ENABLE();
__HAL_RCC_USART3_CONFIG(RCC_USART3CLKSOURCE_SYSCLK);
obj->index = 2;
}
-#endif
#if defined(UART4_BASE)
if (obj->uart == UART_4) {
__UART4_CLK_ENABLE();
@@ -157,13 +155,11 @@ void serial_free(serial_t *obj)
__USART2_RELEASE_RESET();
__USART2_CLK_DISABLE();
}
-#if defined(UART3_BASE)
if (obj->uart == UART_3) {
__USART3_FORCE_RESET();
__USART3_RELEASE_RESET();
__USART3_CLK_DISABLE();
}
-#endif
#if defined(UART4_BASE)
if (obj->uart == UART_4) {
__UART4_FORCE_RESET();
@@ -252,12 +248,10 @@ static void uart2_irq(void)
uart_irq(UART_2, 1);
}
-#if defined(UART3_BASE)
static void uart3_irq(void)
{
uart_irq(UART_3, 2);
}
-#endif
#if defined(UART4_BASE)
static void uart4_irq(void)
@@ -296,12 +290,10 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
vector = (uint32_t)&uart2_irq;
}
-#if defined(UART3_BASE)
if (obj->uart == UART_3) {
irq_n = USART3_IRQn;
vector = (uint32_t)&uart3_irq;
}
-#endif
#if defined(UART4_BASE)
if (obj->uart == UART_4) {
diff --git a/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h b/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h
index c7fd3c9c05..85533053c9 100755
--- a/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h
+++ b/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h
@@ -304,9 +304,6 @@ osThreadDef_t os_thread_def_main = {(os_pthread)main, osPriorityNormal, 0, NULL}
#elif defined(TARGET_STM32F303RE)
#define INITIAL_SP (0x20010000UL)
-#elif defined(TARGET_STM32F303K8)
-#define INITIAL_SP (0x20003000UL)
-
#elif defined(TARGET_MAX32610) || defined(TARGET_MAX32600)
#define INITIAL_SP (0x20008000UL)
diff --git a/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c b/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c
index 7fe39622e9..039225cf1a 100755
--- a/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c
+++ b/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c
@@ -54,7 +54,7 @@
|| defined(TARGET_STM32F411RE) || defined(TARGET_STM32F405RG) || defined(TARGET_K22F) || defined(TARGET_STM32F429ZI) || defined(TARGET_STM32F401VC) || defined(TARGET_MAX32610) || defined(TARGET_MAX32600) || defined(TARGET_TEENSY3_1) \
|| defined(TARGET_STM32L152RE) || defined(TARGET_STM32F446RE) || defined(TARGET_STM32L476VG) || defined(TARGET_STM32L476RG)
# define OS_TASKCNT 14
-# elif defined(TARGET_LPC11U24) || defined(TARGET_STM32F303RE) || defined(TARGET_STM32F303K8) || defined(TARGET_LPC11U35_401) || defined(TARGET_LPC11U35_501) || defined(TARGET_LPCCAPPUCCINO) || defined(TARGET_LPC1114) \
+# elif defined(TARGET_LPC11U24) || defined(TARGET_STM32F303RE) || defined(TARGET_LPC11U35_401) || defined(TARGET_LPC11U35_501) || defined(TARGET_LPCCAPPUCCINO) || defined(TARGET_LPC1114) \
|| defined(TARGET_LPC812) || defined(TARGET_KL25Z) || defined(TARGET_KL26Z) || defined(TARGET_KL05Z) || defined(TARGET_STM32F100RB) || defined(TARGET_STM32F051R8) \
|| defined(TARGET_STM32F103RB) || defined(TARGET_LPC824) || defined(TARGET_STM32F302R8) || defined(TARGET_STM32F334R8) || defined(TARGET_STM32F334C8) \
|| defined(TARGET_STM32L053R8) || defined(TARGET_STM32L053C8) || defined(TARGET_STM32F072RB) || defined(TARGET_STM32F091RC) || defined(TARGET_NZ32SC151) \
@@ -77,7 +77,7 @@
|| defined(TARGET_STM32F103RB) || defined(TARGET_LPC824) || defined(TARGET_STM32F302R8) || defined(TARGET_STM32F072RB) || defined(TARGET_STM32F091RC) || defined(TARGET_NZ32SC151) \
|| defined(TARGET_SSCI824) || defined(TARGET_STM32F030R8) || defined(TARGET_STM32F070RB)
# define OS_SCHEDULERSTKSIZE 128
-# elif defined(TARGET_STM32F334R8) || defined(TARGET_STM32F303RE) || defined(TARGET_STM32F303K8) || defined(TARGET_STM32F334C8) || defined(TARGET_STM32L053R8) || defined(TARGET_STM32L053C8)
+# elif defined(TARGET_STM32F334R8) || defined(TARGET_STM32F303RE) || defined(TARGET_STM32F334C8) || defined(TARGET_STM32L053R8) || defined(TARGET_STM32L053C8)
# define OS_SCHEDULERSTKSIZE 112
# else
# error "no target defined"
@@ -126,9 +126,6 @@
# elif defined(TARGET_LPC1347) || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_STM32F334R8) || defined(TARGET_STM32F334C8) || defined(TARGET_STM32F303RE) || defined(TARGET_TEENSY3_1)
# define OS_CLOCK 72000000
-# elif defined(TARGET_STM32F303K8)
-# define OS_CLOCK 64000000
-
# elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11U35_401) || defined(TARGET_LPC11U35_501) || defined(TARGET_LPCCAPPUCCINO) || defined(TARGET_LPC1114) || defined(TARGET_KL25Z) \
|| defined(TARGET_KL26Z) || defined(TARGET_KL05Z) || defined(TARGET_KL46Z) || defined(TARGET_KL43Z) || defined(TARGET_STM32F051R8) || defined(TARGET_LPC11U68) || defined(TARGET_STM32F072RB) || defined(TARGET_STM32F091RC)
# define OS_CLOCK 48000000
diff --git a/libraries/tests/mbed/analog/main.cpp b/libraries/tests/mbed/analog/main.cpp
index 454e84b25c..9e4302b9c5 100644
--- a/libraries/tests/mbed/analog/main.cpp
+++ b/libraries/tests/mbed/analog/main.cpp
@@ -58,6 +58,10 @@ AnalogOut out(AOUT_DO);
AnalogIn in(PA04);
AnalogOut out(PA02);
+#elif defined(TARGET_SAMD21J18A)
+AnalogIn in(PB02);
+AnalogOut out(PA02);
+
#else
AnalogIn in(p17);
AnalogOut out(p18);
diff --git a/libraries/tests/mbed/bus/main.cpp b/libraries/tests/mbed/bus/main.cpp
index 49e16be9c2..49df93adff 100644
--- a/libraries/tests/mbed/bus/main.cpp
+++ b/libraries/tests/mbed/bus/main.cpp
@@ -5,7 +5,7 @@
BusOut bus1(PA06, PA07, PA13, PA28, PA18, PA19, PA22, PA23, PA16, PA17, PA05, PA04);
BusOut bus2(PB03, PB22, PB02, PB23);
-#elif defined(TARGET_SAMD21J18A)
+#elif defined(TARGET_SAMD21J18A) || defined(TARGET_SAMD21G18A)
BusOut bus1(PA06, PA07, PA13, PA28, PA18, PA19, PA22, PA23, PA16, PA17, PA05, PA04);
BusOut bus2(PB03, PB22, PB02, PB23);
diff --git a/libraries/tests/mbed/digitalin_digitalout/main.cpp b/libraries/tests/mbed/digitalin_digitalout/main.cpp
index 92a03c5fb5..cee81f76ab 100644
--- a/libraries/tests/mbed/digitalin_digitalout/main.cpp
+++ b/libraries/tests/mbed/digitalin_digitalout/main.cpp
@@ -63,9 +63,9 @@ DigitalIn in(PC1);
DigitalOut out(PE10);
DigitalIn in(PC1);
-#elif defined(TARGET_SAMR21G18A) || defined(TARGET_SAMD21J18A)
-DigitalOut out(PA06);
-DigitalIn in(PA07);
+#elif defined(TARGET_SAMR21G18A) || defined(TARGET_SAMD21J18A) || defined(TARGET_SAMD21G18A)
+DigitalOut out(PB02);
+DigitalIn in(PB03);
#else
DigitalOut out(p5);
diff --git a/libraries/tests/mbed/digitalinout/main.cpp b/libraries/tests/mbed/digitalinout/main.cpp
index 225dea4a03..c8d96876ae 100644
--- a/libraries/tests/mbed/digitalinout/main.cpp
+++ b/libraries/tests/mbed/digitalinout/main.cpp
@@ -63,9 +63,9 @@ DigitalInOut d2(PC1);
DigitalInOut d1(PE10);
DigitalInOut d2(PC1);
-#elif defined(TARGET_SAMR21G18A) || defined(TARGET_SAMD21J18A)
-DigitalInOut d1(PA06);
-DigitalInOut d2(PA07);
+#elif defined(TARGET_SAMR21G18A) || defined(TARGET_SAMD21J18A) || defined(TARGET_SAMD21G18A)
+DigitalInOut d1(PB02);
+DigitalInOut d2(PB03);
#else
DigitalInOut d1(p5);
diff --git a/libraries/tests/mbed/echo_flow_control/main.cpp b/libraries/tests/mbed/echo_flow_control/main.cpp
index 468d5d5795..4f3dc60507 100644
--- a/libraries/tests/mbed/echo_flow_control/main.cpp
+++ b/libraries/tests/mbed/echo_flow_control/main.cpp
@@ -14,13 +14,20 @@
#define FLOW_CONTROL_CTS PA07
#define RTS_CHECK_PIN PB03
-#elif defined(TARGET_SAMD21J18A)
-#define UART_TX PA22
-#define UART_RX PA23
+#elif defined(TARGET_SAMD21J18A) /*USB debug port is not having RTS and CTS pins in expansion connectors in D21 Xplained Pro Board*/
+#define UART_TX PA22 /* Short this pin to PA04 */
+#define UART_RX PA23 /* Short this pin to PA05 */
#define FLOW_CONTROL_RTS PA24
#define FLOW_CONTROL_CTS PA25
#define RTS_CHECK_PIN PB03
+#elif defined(TARGET_SAMD21G18A) /*USB debug port is not having RTS and CTS pins in expansion connectors in W25 Xplained Pro Board*/
+#define UART_TX PA16 /* Short this pin to PB10 */
+#define UART_RX PA17 /* Short this pin to PB11 */
+#define FLOW_CONTROL_RTS PA18
+#define FLOW_CONTROL_CTS PA19
+#define RTS_CHECK_PIN PB03
+
#else
#error This test is not supported on this target
#endif
diff --git a/libraries/tests/mbed/i2c_master/main.cpp b/libraries/tests/mbed/i2c_master/main.cpp
index 917b0ca56a..6af43ee58b 100644
--- a/libraries/tests/mbed/i2c_master/main.cpp
+++ b/libraries/tests/mbed/i2c_master/main.cpp
@@ -26,7 +26,7 @@ I2C i2c(TEST_SDA_PIN, TEST_SCL_PIN);
#define TEST_SDA_PIN PA16
#define TEST_SCL_PIN PA17
I2C i2c(TEST_SDA_PIN, TEST_SCL_PIN);
-#elif defined(TARGET_SAMD21J18A)
+#elif defined(TARGET_SAMD21J18A) || defined(TARGET_SAMD21G18A)
#define TEST_SDA_PIN PA08
#define TEST_SCL_PIN PA09
I2C i2c(TEST_SDA_PIN, TEST_SCL_PIN);
diff --git a/libraries/tests/mbed/i2c_slave/main.cpp b/libraries/tests/mbed/i2c_slave/main.cpp
index eb3bd60cf5..ff262f735b 100644
--- a/libraries/tests/mbed/i2c_slave/main.cpp
+++ b/libraries/tests/mbed/i2c_slave/main.cpp
@@ -10,7 +10,7 @@ I2CSlave slave(PTE0, PTE1);
I2CSlave slave(p9, p10);
#elif defined(TARGET_SAMR21G18A)
I2CSlave slave(PA16, PA17);
-#elif defined(TARGET_SAMD21J18A)
+#elif defined(TARGET_SAMD21J18A) || defined(TARGET_SAMD21G18A)
I2CSlave slave(PA08, PA09);
#else
I2CSlave slave(p28, p27);
diff --git a/libraries/tests/mbed/interrupt_chaining/main.cpp b/libraries/tests/mbed/interrupt_chaining/main.cpp
index 890f884267..be78e83c4d 100644
--- a/libraries/tests/mbed/interrupt_chaining/main.cpp
+++ b/libraries/tests/mbed/interrupt_chaining/main.cpp
@@ -11,7 +11,7 @@
#define TIMER_IRQ LPTimer_IRQn
#elif defined(TARGET_LPC2368) || defined(TARGET_LPC2460)
#define TIMER_IRQ TIMER3_IRQn
-#elif defined(TARGET_SAMR21G18A) || defined(TARGET_SAMD21J18A)
+#elif defined(TARGET_SAMR21G18A) || defined(TARGET_SAMD21J18A) || defined(TARGET_SAMD21G18A)
#define TIMER_IRQ TC4_IRQn
#else
#error This test can't run on this target.
@@ -46,6 +46,8 @@ Sender s2(pc, '2');
# define LED_NAME LED2
#elif defined(TARGET_KL05Z)
# define LED_NAME LED2
+#elif defined(TARGET_SAMR21G18A) || defined(TARGET_SAMD21J18A) || defined(TARGET_SAMD21G18A) /*to avoid build errors*/
+# define LED_NAME LED2 /*Only 1 LED available*/
#else
# define LED_NAME PTE31
#endif
diff --git a/libraries/tests/mbed/interruptin/main.cpp b/libraries/tests/mbed/interruptin/main.cpp
index 993171be26..74ef0738fe 100644
--- a/libraries/tests/mbed/interruptin/main.cpp
+++ b/libraries/tests/mbed/interruptin/main.cpp
@@ -92,9 +92,9 @@ void in_handler() {
#define PIN_OUT PE10
#define PIN_IN PC1
-#elif defined(TARGET_SAMR21G18A) || defined(TARGET_SAMD21J18A)
-#define PIN_OUT PA06
-#define PIN_IN PA07
+#elif defined(TARGET_SAMR21G18A) || defined(TARGET_SAMD21J18A) || defined(TARGET_SAMD21G18A)
+#define PIN_OUT PB02
+#define PIN_IN PB03
#else
#define PIN_IN (p5)
diff --git a/libraries/tests/mbed/interruptin_2/main.cpp b/libraries/tests/mbed/interruptin_2/main.cpp
index add888af85..b9d0c8f721 100644
--- a/libraries/tests/mbed/interruptin_2/main.cpp
+++ b/libraries/tests/mbed/interruptin_2/main.cpp
@@ -56,6 +56,20 @@ InterruptIn button9(PA28);
DigitalOut led(LED1);
DigitalOut flash(PA27); /*1 LED Available*/
+#elif defined(TARGET_SAMD21G18A)
+InterruptIn button (PB23); /*SW0*/
+InterruptIn button1(PA02);
+InterruptIn button2(PA03);
+InterruptIn button3(PA10);
+InterruptIn button4(PA11);
+InterruptIn button5(PA20);
+InterruptIn button6(PA21);
+InterruptIn button7(PA09);
+InterruptIn button8(PA16);
+InterruptIn button9(PA17);
+DigitalOut led(LED1);
+DigitalOut flash(PA19); /*1 LED Available*/
+
#else
InterruptIn button(p30);
InterruptIn button1(p29);
diff --git a/libraries/tests/mbed/pin_toggling/main.cpp b/libraries/tests/mbed/pin_toggling/main.cpp
index 83b04a96be..3cdcd9915e 100644
--- a/libraries/tests/mbed/pin_toggling/main.cpp
+++ b/libraries/tests/mbed/pin_toggling/main.cpp
@@ -1,7 +1,7 @@
#include "mbed.h"
-#if defined(TARGET_SAMR21G18A) || defined(TARGET_SAMD21J18A)
-DigitalOut out(PA06);
+#if defined(TARGET_SAMR21G18A) || defined(TARGET_SAMD21J18A) || defined(TARGET_SAMD21G18A)
+DigitalOut out(PB02);
#else
DigitalOut out(p5);
#endif
diff --git a/libraries/tests/mbed/portinout/main.cpp b/libraries/tests/mbed/portinout/main.cpp
index fb7fca20f3..01f9b44c0d 100644
--- a/libraries/tests/mbed/portinout/main.cpp
+++ b/libraries/tests/mbed/portinout/main.cpp
@@ -138,6 +138,15 @@
#define P2_2 (1 << 3) /*PB03*/
#define PORT_2 PortB
+#elif defined(TARGET_SAMD21G18A)
+#define P1_1 (1 << 2) /*PA02*/
+#define P1_2 (1 << 3) /*PA03*/
+#define PORT_1 PortA
+
+#define P2_1 (1 << 2) /*PB02*/
+#define P2_2 (1 << 3) /*PB03*/
+#define PORT_2 PortB
+
#endif
#define MASK_1 (P1_1 | P1_2)
diff --git a/libraries/tests/mbed/portout/main.cpp b/libraries/tests/mbed/portout/main.cpp
index 11e288ccb6..3bf8a03a8d 100644
--- a/libraries/tests/mbed/portout/main.cpp
+++ b/libraries/tests/mbed/portout/main.cpp
@@ -36,8 +36,15 @@
# define LED2 0
# define LED3 0
# define LED4 0
+# elif defined(TARGET_SAMD21G18A)
+# define LED_PORT PortA
+# define LED1 (1 << 23) /*PA23*/
+# define LED2 0
+# define LED3 0
+# define LED4 0
# endif
+
#define LED_MASK (LED1|LED2|LED3|LED4)
int mask[4] = {
diff --git a/libraries/tests/mbed/portout_portin/main.cpp b/libraries/tests/mbed/portout_portin/main.cpp
index dc5929f942..6226ae51cc 100644
--- a/libraries/tests/mbed/portout_portin/main.cpp
+++ b/libraries/tests/mbed/portout_portin/main.cpp
@@ -138,6 +138,15 @@
#define P2_2 (1 << 3) /*PB03*/
#define PORT_2 PortB
+#elif defined(TARGET_SAMD21G18A)
+#define P1_1 (1 << 2) /*PA02*/
+#define P1_2 (1 << 3) /*PA03*/
+#define PORT_1 PortA
+
+#define P2_1 (1 << 2) /*PB02*/
+#define P2_2 (1 << 3) /*PB03*/
+#define PORT_2 PortB
+
#endif
#define MASK_1 (P1_1 | P1_2)
diff --git a/libraries/tests/mbed/pwm/main.cpp b/libraries/tests/mbed/pwm/main.cpp
index bb023cb7cf..196c21a1af 100644
--- a/libraries/tests/mbed/pwm/main.cpp
+++ b/libraries/tests/mbed/pwm/main.cpp
@@ -166,7 +166,7 @@ int main() {
printf("Initialize PWM on pin P1.2 with duty cycle: %.2f\n", pwm_1.read());
printf("Initialize PWM on pin P1.3 with duty cycle: %.2f\n", pwm_2.read());
-#elif defined(TARGET_SAMR21G18A) || defined(TARGET_SAMD21J18A)
+#elif defined(TARGET_SAMR21G18A) || defined(TARGET_SAMD21J18A) || defined(TARGET_SAMD21G18A)
PwmOut pwm(LED1);
pwm.period_ms(1000);
diff --git a/libraries/tests/mbed/pwm_led/pwm.cpp b/libraries/tests/mbed/pwm_led/pwm.cpp
index 7b8978946b..6121a33e91 100644
--- a/libraries/tests/mbed/pwm_led/pwm.cpp
+++ b/libraries/tests/mbed/pwm_led/pwm.cpp
@@ -28,7 +28,7 @@
#elif defined (TARGET_DISCO_F407VG)
#define TEST_LED LED1
-#elif defined(TARGET_SAMR21G18A) || defined(TARGET_SAMD21J18A)
+#elif defined(TARGET_SAMR21G18A) || defined(TARGET_SAMD21J18A) || defined(TARGET_SAMD21G18A)
#define TEST_LED LED1
#else
diff --git a/libraries/tests/mbed/serial_interrupt_2/main.cpp b/libraries/tests/mbed/serial_interrupt_2/main.cpp
index 98c55fd144..edbbc11f28 100644
--- a/libraries/tests/mbed/serial_interrupt_2/main.cpp
+++ b/libraries/tests/mbed/serial_interrupt_2/main.cpp
@@ -6,7 +6,7 @@ Serial pc(USBTX, USBRX);
Serial uart(P4_22, P4_23);
#elif defined(TARGET_MAXWSNENV)
Serial uart(P0_1, P0_0);
-#elif defined(TARGET_SAMR21G18A) || defined(TARGET_SAMD21J18A)
+#elif defined(TARGET_SAMR21G18A) || defined(TARGET_SAMD21J18A) || defined(TARGET_SAMD21G18A)
Serial uart(PA16, PA17);
#else
Serial uart(p9, p10);
diff --git a/libraries/tests/mbed/sleep/main.cpp b/libraries/tests/mbed/sleep/main.cpp
index 39537bdcf2..7f863b2b1c 100644
--- a/libraries/tests/mbed/sleep/main.cpp
+++ b/libraries/tests/mbed/sleep/main.cpp
@@ -10,6 +10,8 @@ InterruptIn wkp(P0_16);
InterruptIn wkp(PA28);
#elif defined(TARGET_SAMD21J18A)
InterruptIn wkp(PA15);
+#elif defined(TARGET_SAMD21G18A)
+InterruptIn wkp(PB23);
#else
InterruptIn wkp(p14);
#endif
diff --git a/libraries/tests/mbed/spi/main.cpp b/libraries/tests/mbed/spi/main.cpp
index 69b92c5e4b..d9cbf6e3c6 100644
--- a/libraries/tests/mbed/spi/main.cpp
+++ b/libraries/tests/mbed/spi/main.cpp
@@ -3,7 +3,7 @@
#if defined(TARGET_SAMR21G18A)
SPI spi(PB22, PB02, PB23); // mosi, miso, sclk
DigitalOut latchpin(PB03);
-#elif defined(TARGET_SAMD21J18A)
+#elif defined(TARGET_SAMD21J18A) || defined(TARGET_SAMD21G18A)
SPI spi(PA18, PA16, PA19); // mosi, miso, sclk
DigitalOut latchpin(PA17);
#else
diff --git a/libraries/tests/mbed/spi_master/main.cpp b/libraries/tests/mbed/spi_master/main.cpp
index 88e8371e91..467965fb65 100644
--- a/libraries/tests/mbed/spi_master/main.cpp
+++ b/libraries/tests/mbed/spi_master/main.cpp
@@ -28,7 +28,7 @@ DigitalOut cs(PE13);
#elif defined(TARGET_SAMR21G18A)
SPI spi(PB22, PB02, PB23); // mosi, miso, sclk
DigitalOut cs(PB03);
-#elif defined(TARGET_SAMD21J18A)
+#elif defined(TARGET_SAMD21J18A) || defined(TARGET_SAMD21G18A)
SPI spi(PA18, PA16, PA19); // mosi, miso, sclk
DigitalOut cs(PA17);
#else
diff --git a/libraries/tests/mbed/spi_slave/main.cpp b/libraries/tests/mbed/spi_slave/main.cpp
index 32f7fae6e3..be81056708 100644
--- a/libraries/tests/mbed/spi_slave/main.cpp
+++ b/libraries/tests/mbed/spi_slave/main.cpp
@@ -12,7 +12,7 @@ SPISlave device(D11, D12, D13, D10); // mosi, miso, sclk, ssel
SPISlave device(dp2, dp1, dp6, dp25); // mosi, miso, sclk, ssel
#elif defined(TARGET_SAMR21G18A)
SPISlave device(PB22, PB02, PB23, PB03); // mosi, miso, sclk, ssel
-#elif defined(TARGET_SAMD21J18A)
+#elif defined(TARGET_SAMD21J18A) || defined(TARGET_SAMD21G18A)
SPISlave device(PA18, PA16, PA19, PA17); // mosi, miso, sclk, ssel
#else
SPISlave device(p5, p6, p7, p8); // mosi, miso, sclk, ssel
diff --git a/libraries/tests/mbed/vtor_reloc/main.cpp b/libraries/tests/mbed/vtor_reloc/main.cpp
index 07f6728a29..7de267aa33 100644
--- a/libraries/tests/mbed/vtor_reloc/main.cpp
+++ b/libraries/tests/mbed/vtor_reloc/main.cpp
@@ -6,9 +6,9 @@
#include "cmsis_nvic.h"
#include
-#if defined(TARGET_SAMR21G18A) || defined(TARGET_SAMD21J18A)
-#define PIN_IN (PA06)
-#define PIN_OUT (PA07)
+#if defined(TARGET_SAMR21G18A) || defined(TARGET_SAMD21J18A) || defined(TARGET_SAMD21G18A)
+#define PIN_IN (PB02)
+#define PIN_OUT (PB03)
#define NUM_VECTORS (16+28)
#else
diff --git a/libraries/tests/rtos/mbed/mutex/main.cpp b/libraries/tests/rtos/mbed/mutex/main.cpp
index 17d99867ce..f32f4eb0a3 100644
--- a/libraries/tests/rtos/mbed/mutex/main.cpp
+++ b/libraries/tests/rtos/mbed/mutex/main.cpp
@@ -24,8 +24,6 @@
#define STACK_SIZE DEFAULT_STACK_SIZE/2
#elif defined(TARGET_STM32F302R8) && defined(TOOLCHAIN_IAR)
#define STACK_SIZE DEFAULT_STACK_SIZE/2
-#elif defined(TARGET_STM32F303K8) && defined(TOOLCHAIN_IAR)
- #define STACK_SIZE DEFAULT_STACK_SIZE/2
#else
#define STACK_SIZE DEFAULT_STACK_SIZE
#endif
diff --git a/libraries/tests/rtos/mbed/semaphore/main.cpp b/libraries/tests/rtos/mbed/semaphore/main.cpp
index 51534c7bbd..37218c3d00 100644
--- a/libraries/tests/rtos/mbed/semaphore/main.cpp
+++ b/libraries/tests/rtos/mbed/semaphore/main.cpp
@@ -27,8 +27,6 @@
#define STACK_SIZE DEFAULT_STACK_SIZE/2
#elif defined(TARGET_STM32F302R8) && defined(TOOLCHAIN_IAR)
#define STACK_SIZE DEFAULT_STACK_SIZE/2
-#elif defined(TARGET_STM32F303K8) && defined(TOOLCHAIN_IAR)
- #define STACK_SIZE DEFAULT_STACK_SIZE/4
#else
#define STACK_SIZE DEFAULT_STACK_SIZE
#endif
diff --git a/requirements.txt b/requirements.txt
index 09f78ec5ab..9facf86158 100644
--- a/requirements.txt
+++ b/requirements.txt
@@ -2,4 +2,5 @@ colorama
pyserial
prettytable
Jinja2
-IntelHex
\ No newline at end of file
+IntelHex
+mbed-ls
\ No newline at end of file
diff --git a/workspace_tools/build.py b/workspace_tools/build.py
index 98d2fd52df..969ca03b6b 100755
--- a/workspace_tools/build.py
+++ b/workspace_tools/build.py
@@ -77,7 +77,7 @@ if __name__ == '__main__':
action="store_true",
dest="fat",
default=False,
- help="Compile FS ad SD card file system library")
+ help="Compile FS and SD card file system library")
parser.add_option("-b", "--ublox",
action="store_true",
diff --git a/workspace_tools/build_release.py b/workspace_tools/build_release.py
index ba50b3ea4f..6fee023abd 100644
--- a/workspace_tools/build_release.py
+++ b/workspace_tools/build_release.py
@@ -67,7 +67,6 @@ OFFICIAL_MBED_LIBRARY_BUILD = (
('NUCLEO_F091RC', ('ARM', 'uARM', 'IAR', 'GCC_ARM')),
('NUCLEO_F103RB', ('ARM', 'uARM', 'IAR', 'GCC_ARM')),
('NUCLEO_F302R8', ('ARM', 'uARM', 'IAR', 'GCC_ARM')),
- ('NUCLEO_F303K8', ('ARM', 'uARM', 'IAR', 'GCC_ARM')),
('NUCLEO_F303RE', ('ARM', 'uARM', 'IAR')),
('NUCLEO_F334R8', ('ARM', 'uARM', 'IAR', 'GCC_ARM')),
('NUCLEO_F401RE', ('ARM', 'uARM', 'IAR', 'GCC_ARM')),
@@ -81,7 +80,9 @@ OFFICIAL_MBED_LIBRARY_BUILD = (
('MTS_DRAGONFLY_F411RE', ('ARM', 'uARM', 'IAR', 'GCC_ARM')),
('DISCO_L053C8', ('ARM', 'uARM', 'IAR', 'GCC_ARM')),
('DISCO_F334C8', ('ARM', 'uARM', 'IAR', 'GCC_ARM')),
-# ('DISCO_F746NG', ('ARM', 'uARM', 'IAR')),
+ ('DISCO_F746NG', ('ARM', 'uARM')),
+ ('DISCO_L476VG', ('ARM', 'uARM', 'IAR', 'GCC_ARM')),
+ ('NUCLEO_L476RG', ('ARM', 'uARM', 'IAR', 'GCC_ARM')),
('ARCH_MAX', ('ARM', 'GCC_ARM')),
diff --git a/workspace_tools/build_travis.py b/workspace_tools/build_travis.py
index c5863877e9..ca3a5d3885 100644
--- a/workspace_tools/build_travis.py
+++ b/workspace_tools/build_travis.py
@@ -44,7 +44,6 @@ build_list = (
{ "target": "NUCLEO_F091RC", "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
{ "target": "NUCLEO_F103RB", "toolchains": "GCC_ARM", "libs": ["rtos", "fat"] },
{ "target": "NUCLEO_F302R8", "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
- { "target": "NUCLEO_F303K8", "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
{ "target": "NUCLEO_F303RE", "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
{ "target": "NUCLEO_F334R8", "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
{ "target": "NUCLEO_F401RE", "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
diff --git a/workspace_tools/export/coide.py b/workspace_tools/export/coide.py
index ce7c96cccf..4bfb00c7ed 100755
--- a/workspace_tools/export/coide.py
+++ b/workspace_tools/export/coide.py
@@ -38,7 +38,6 @@ class CoIDE(Exporter):
'NUCLEO_F091RC',
'NUCLEO_F103RB',
'NUCLEO_F302R8',
- 'NUCLEO_F303K8',
'NUCLEO_F303RE',
'NUCLEO_F334R8',
'NUCLEO_F401RE',
diff --git a/workspace_tools/export/gcc_arm_nucleo_f303k8.tmpl b/workspace_tools/export/gcc_arm_nucleo_f303k8.tmpl
deleted file mode 100644
index 6e616cc884..0000000000
--- a/workspace_tools/export/gcc_arm_nucleo_f303k8.tmpl
+++ /dev/null
@@ -1 +0,0 @@
-{% extends "gcc_arm_common.tmpl" %}
diff --git a/workspace_tools/export/gcc_arm_samd21g18a.tmpl b/workspace_tools/export/gcc_arm_samd21g18a.tmpl
new file mode 100644
index 0000000000..09f43e63f0
--- /dev/null
+++ b/workspace_tools/export/gcc_arm_samd21g18a.tmpl
@@ -0,0 +1,72 @@
+# This file was automagically generated by mbed.org. For more information,
+# see http://mbed.org/handbook/Exporting-to-GCC-ARM-Embedded
+
+GCC_BIN =
+PROJECT = {{name}}
+OBJECTS = {% for f in to_be_compiled %}{{f}} {% endfor %}
+SYS_OBJECTS = {% for f in object_files %}{{f}} {% endfor %}
+INCLUDE_PATHS = {% for p in include_paths %}-I{{p}} {% endfor %}
+LIBRARY_PATHS = {% for p in library_paths %}-L{{p}} {% endfor %}
+LIBRARIES = {% for lib in libraries %}-l{{lib}} {% endfor %}
+LINKER_SCRIPT = {{linker_script}}
+
+###############################################################################
+AS = $(GCC_BIN)arm-none-eabi-as
+CC = $(GCC_BIN)arm-none-eabi-gcc
+CPP = $(GCC_BIN)arm-none-eabi-g++
+LD = $(GCC_BIN)arm-none-eabi-gcc
+OBJCOPY = $(GCC_BIN)arm-none-eabi-objcopy
+OBJDUMP = $(GCC_BIN)arm-none-eabi-objdump
+SIZE = $(GCC_BIN)arm-none-eabi-size
+
+CPU = -mcpu=cortex-m0plus -mthumb
+CC_FLAGS = $(CPU) -c -g -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections -fomit-frame-pointer
+CC_FLAGS += -MMD -MP
+CC_SYMBOLS = {% for s in symbols %}-D{{s}} {% endfor %}
+
+LD_FLAGS = $(CPU) -Wl,--gc-sections --specs=nano.specs -u _printf_float -u _scanf_float -Wl,--wrap,main
+LD_FLAGS += -Wl,-Map=$(PROJECT).map,--cref
+LD_SYS_LIBS = -lstdc++ -lsupc++ -lm -lc -lgcc -lnosys
+
+ifeq ($(DEBUG), 1)
+ CC_FLAGS += -DDEBUG -O0
+else
+ CC_FLAGS += -DNDEBUG -Os
+endif
+
+all: $(PROJECT).bin $(PROJECT).hex
+
+clean:
+ rm -f $(PROJECT).bin $(PROJECT).elf $(PROJECT).hex $(PROJECT).map $(PROJECT).lst $(OBJECTS) $(DEPS)
+
+.s.o:
+ $(AS) $(CPU) -o $@ $<
+
+.c.o:
+ $(CC) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu99 $(INCLUDE_PATHS) -o $@ $<
+
+.cpp.o:
+ $(CPP) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu++98 -fno-rtti $(INCLUDE_PATHS) -o $@ $<
+
+
+$(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS)
+ $(LD) $(LD_FLAGS) -T$(LINKER_SCRIPT) $(LIBRARY_PATHS) -o $@ $^ $(LIBRARIES) $(LD_SYS_LIBS) $(LIBRARIES) $(LD_SYS_LIBS)
+ $(SIZE) $@
+
+$(PROJECT).bin: $(PROJECT).elf
+ @$(OBJCOPY) -O binary $< $@
+
+$(PROJECT).hex: $(PROJECT).elf
+ @$(OBJCOPY) -O ihex $< $@
+
+$(PROJECT).lst: $(PROJECT).elf
+ @$(OBJDUMP) -Sdh $< > $@
+
+lst: $(PROJECT).lst
+
+size:
+ $(SIZE) $(PROJECT).elf
+
+DEPS = $(OBJECTS:.o=.d) $(SYS_OBJECTS:.o=.d)
+-include $(DEPS)
+
diff --git a/workspace_tools/export/gccarm.py b/workspace_tools/export/gccarm.py
index 61976be6ba..2cbfec75e0 100755
--- a/workspace_tools/export/gccarm.py
+++ b/workspace_tools/export/gccarm.py
@@ -75,7 +75,6 @@ class GccArm(Exporter):
'NUCLEO_F091RC',
'NUCLEO_F103RB',
'NUCLEO_F302R8',
- 'NUCLEO_F303K8',
'NUCLEO_F303RE',
'NUCLEO_F334R8',
'DISCO_L053C8',
@@ -104,6 +103,7 @@ class GccArm(Exporter):
'SAMR21G18A',
'TEENSY3_1',
'SAMD21J18A',
+ 'SAMD21G18A',
]
DOT_IN_RELATIVE_PATH = True
diff --git a/workspace_tools/export/iar.py b/workspace_tools/export/iar.py
index 6a9ef63593..b463a49266 100755
--- a/workspace_tools/export/iar.py
+++ b/workspace_tools/export/iar.py
@@ -54,7 +54,6 @@ class IAREmbeddedWorkbench(Exporter):
'NUCLEO_F091RC',
'NUCLEO_F103RB',
'NUCLEO_F302R8',
- 'NUCLEO_F303K8',
'NUCLEO_F303RE',
'NUCLEO_F334R8',
'NUCLEO_F401RE',
diff --git a/workspace_tools/export/iar_nucleo_f303k8.ewd.tmpl b/workspace_tools/export/iar_nucleo_f303k8.ewd.tmpl
deleted file mode 100644
index 3c6396c651..0000000000
--- a/workspace_tools/export/iar_nucleo_f303k8.ewd.tmpl
+++ /dev/null
@@ -1,2977 +0,0 @@
-
-
-
- 2
-
- Debug
-
- ARM
-
- 1
-
- C-SPY
- 2
-
- 26
- 1
- 1
-
- CInput
- 1
-
-
- CEndian
- 1
-
-
- CProcessor
- 1
-
-
- OCVariant
- 0
-
-
- MacOverride
- 0
-
-
- MacFile
-
-
-
- MemOverride
- 0
-
-
- MemFile
- $TOOLKIT_DIR$\CONFIG\debugger\ST\STM32F303x8.ddf
-
-
- RunToEnable
- 1
-
-
- RunToName
- main
-
-
- CExtraOptionsCheck
- 0
-
-
- CExtraOptions
-
-
-
- CFpuProcessor
- 1
-
-
- OCDDFArgumentProducer
-
-
-
- OCDownloadSuppressDownload
- 0
-
-
- OCDownloadVerifyAll
- 1
-
-
- OCProductVersion
- 7.30.4.8186
-
-
- OCDynDriverList
- STLINK_ID
-
-
- OCLastSavedByProductVersion
- 7.40.3.8937
-
-
- OCDownloadAttachToProgram
- 0
-
-
- UseFlashLoader
- 1
-
-
- CLowLevel
- 1
-
-
- OCBE8Slave
- 1
-
-
- MacFile2
-
-
-
- CDevice
- 1
-
-
- FlashLoadersV3
- $TOOLKIT_DIR$\config\flashloader\ST\FlashSTM32F303x8.board
-
-
- OCImagesSuppressCheck1
- 0
-
-
- OCImagesPath1
-
-
-
- OCImagesSuppressCheck2
- 0
-
-
- OCImagesPath2
-
-
-
- OCImagesSuppressCheck3
- 0
-
-
- OCImagesPath3
-
-
-
- OverrideDefFlashBoard
- 0
-
-
- OCImagesOffset1
-
-
-
- OCImagesOffset2
-
-
-
- OCImagesOffset3
-
-
-
- OCImagesUse1
- 0
-
-
- OCImagesUse2
- 0
-
-
- OCImagesUse3
- 0
-
-
- OCDeviceConfigMacroFile
- 1
-
-
- OCDebuggerExtraOption
- 1
-
-
- OCAllMTBOptions
- 1
-
-
- OCMulticoreNrOfCores
- 1
-
-
- OCMulticoreMaster
- 0
-
-
- OCMulticorePort
- 53461
-
-
- OCMulticoreWorkspace
-
-
-
- OCMulticoreSlaveProject
-
-
-
- OCMulticoreSlaveConfiguration
-
-
-
-
-
- ARMSIM_ID
- 2
-
- 1
- 1
- 1
-
- OCSimDriverInfo
- 1
-
-
- OCSimEnablePSP
- 0
-
-
- OCSimPspOverrideConfig
- 0
-
-
- OCSimPspConfigFile
-
-
-
-
-
- ANGEL_ID
- 2
-
- 0
- 1
- 1
-
- CCAngelHeartbeat
- 1
-
-
- CAngelCommunication
- 1
-
-
- CAngelCommBaud
- 0
- 3
-
-
- CAngelCommPort
- 0
- 0
-
-
- ANGELTCPIP
- aaa.bbb.ccc.ddd
-
-
- DoAngelLogfile
- 0
-
-
- AngelLogFile
- $PROJ_DIR$\cspycomm.log
-
-
- OCDriverInfo
- 1
-
-
-
-
- CMSISDAP_ID
- 2
-
- 2
- 1
- 1
-
- OCDriverInfo
- 1
-
-
- CMSISDAPAttachSlave
- 1
-
-
- OCIarProbeScriptFile
- 1
-
-
- CMSISDAPResetList
- 1
- 10
-
-
- CMSISDAPHWResetDuration
- 300
-
-
- CMSISDAPHWResetDelay
- 200
-
-
- CMSISDAPDoLogfile
- 0
-
-
- CMSISDAPLogFile
- $PROJ_DIR$\cspycomm.log
-
-
- CMSISDAPInterfaceRadio
- 0
-
-
- CMSISDAPInterfaceCmdLine
- 0
-
-
- CMSISDAPMultiTargetEnable
- 0
-
-
- CMSISDAPMultiTarget
- 0
-
-
- CMSISDAPJtagSpeedList
- 0
- 0
-
-
- CMSISDAPBreakpointRadio
- 0
-
-
- CMSISDAPRestoreBreakpointsCheck
- 0
-
-
- CMSISDAPUpdateBreakpointsEdit
- _call_main
-
-
- RDICatchReset
- 0
-
-
- RDICatchUndef
- 1
-
-
- RDICatchSWI
- 0
-
-
- RDICatchData
- 1
-
-
- RDICatchPrefetch
- 1
-
-
- RDICatchIRQ
- 0
-
-
- RDICatchFIQ
- 0
-
-
- CatchCORERESET
- 0
-
-
- CatchMMERR
- 1
-
-
- CatchNOCPERR
- 1
-
-
- CatchCHKERR
- 1
-
-
- CatchSTATERR
- 1
-
-
- CatchBUSERR
- 1
-
-
- CatchINTERR
- 1
-
-
- CatchHARDERR
- 1
-
-
- CatchDummy
- 0
-
-
- CMSISDAPMultiCPUEnable
- 0
-
-
- CMSISDAPMultiCPUNumber
- 0
-
-
- OCProbeCfgOverride
- 0
-
-
- OCProbeConfig
-
-
-
- CMSISDAPProbeConfigRadio
- 0
-
-
- CMSISDAPSelectedCPUBehaviour
- 0
-
-
- ICpuName
-
-
-
- OCJetEmuParams
- 1
-
-
-
-
- GDBSERVER_ID
- 2
-
- 0
- 1
- 1
-
- OCDriverInfo
- 1
-
-
- TCPIP
- aaa.bbb.ccc.ddd
-
-
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-
-
- LogFile
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-
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- 1
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-
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- $PROJ_DIR$\cspycomm.log
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-
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-
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-
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- 300
-
-
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- 200
-
-
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- 72.0
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-
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- 1
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- 1000
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-
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- aaa.bbb.ccc.ddd
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-
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- 6
- 5
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- 1
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-
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-
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-
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- 0
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-
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- 72.0
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-
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- 2000
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-
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-
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- 2
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- 2
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- 1
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- $PROJ_DIR$\cspycomm.log
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-
- 3
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- LogFile
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- 0@ARM7TDMI
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- 0
- 4
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- 0
-
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- jtago
- 0
- 0
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-
- OCDriverInfo
- 1
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-
- UnusedAddr
- 0x00800000
-
-
- CCMacraigorHWResetDelay
-
-
-
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- 0
-
-
- CCJTagDoUpdateBreakpoints
- 0
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-
- CCJTagUpdateBreakpoints
- _call_main
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- 0
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-
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- 0
-
-
-
-
- PEMICRO_ID
- 2
-
- 1
- 1
- 1
-
- OCDriverInfo
- 1
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-
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- 1
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-
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- 0
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-
- CCPEMicroResetDelay
-
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-
- CCPEMicroJtagSpeed
- #UNINITIALIZED#
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-
- DoLogfile
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-
- LogFile
- $PROJ_DIR$\cspycomm.log
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-
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- 0
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- 0
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- 1
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-
- CCPEMicroTCPIP
- 10.0.0.1
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-
- CCPEMicroCommCmdLineProducer
- 0
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-
- CCSTLinkInterfaceRadio
- 0
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-
- CCSTLinkInterfaceCmdLine
- 0
-
-
-
-
- RDI_ID
- 2
-
- 2
- 1
- 1
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- CRDIDriverDll
- ###Uninitialized###
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-
- CRDILogFileCheck
- 0
-
-
- CRDILogFileEdit
- $PROJ_DIR$\cspycomm.log
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-
- CCRDIHWReset
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- CCRDICatchSWI
- 0
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-
- CCRDICatchData
- 0
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- 0
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- CCRDICatchIRQ
- 0
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-
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- 0
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- 1
-
-
-
-
- STLINK_ID
- 2
-
- 2
- 1
- 1
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- 1
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- 1
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-
- CCSTLinkInterfaceCmdLine
- 0
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-
- CCSTLinkResetList
- 1
- 0
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- CCCpuClockEdit
- 72.0
-
-
- CCSwoClockAuto
- 1
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-
- CCSwoClockEdit
- 2000
-
-
-
-
- THIRDPARTY_ID
- 2
-
- 0
- 1
- 1
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- ###Uninitialized###
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-
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- 0
-
-
- CThirdPartyLogFileEditB
- $PROJ_DIR$\cspycomm.log
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-
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- 1
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- 4
- 1
- 1
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- OCDriverInfo
- 1
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-
- OCXDS100AttachSlave
- 1
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-
- TIPackageOverride
- 0
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- TIPackage
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-
- BoardFile
-
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-
- DoLogfile
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- LogFile
- $PROJ_DIR$\cspycomm.log
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- 0
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- CCXds100UpdateBreakpoints
- _call_main
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- 0
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- CCXds100CatchHARDERR
- 0
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-
- CCXds100CatchDummy
- 0
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-
- CCXds100CpuClockEdit
- 72.0
-
-
- CCXds100SwoClockAuto
- 0
-
-
- CCXds100SwoClockEdit
- 1000
-
-
- CCXds100HWResetDelay
- 0
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-
- CCXds100ResetList
- 0
- 0
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-
- CCXds100UsbSerialNo
-
-
-
- CCXds100UsbSerialNoSelect
- 0
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-
- CCXds100JtagSpeedList
- 0
- 0
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-
- CCXds100InterfaceRadio
- 0
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- $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
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- $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
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- Release
-
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-
- 0
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- 53461
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- OCMulticoreWorkspace
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- 1
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-
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- OCIarProbeScriptFile
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- 10
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-
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- 0
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-
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-
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-
-
- CMSISDAPUpdateBreakpointsEdit
- _call_main
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-
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- 0
-
-
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- 1
-
-
- RDICatchSWI
- 0
-
-
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- 1
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-
- RDICatchPrefetch
- 1
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-
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-
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-
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-
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- 1
-
-
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-
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-
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-
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-
-
- CatchINTERR
- 1
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-
- CatchHARDERR
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-
- CatchDummy
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-
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-
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-
-
- OCProbeCfgOverride
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-
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-
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-
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-
- ICpuName
-
-
-
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-
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-
-
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- 1
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- TCPIP
- aaa.bbb.ccc.ddd
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- LogFile
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-
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-
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-
-
-
-
- IARROM_ID
- 2
-
- 1
- 1
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- 0
-
-
- CRomLogFileEditB
- $PROJ_DIR$\cspycomm.log
-
-
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- 0
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-
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- 7
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-
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- 1
-
-
-
-
- IJET_ID
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-
- 6
- 1
- 0
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-
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-
-
- OCIarProbeScriptFile
- 1
-
-
- IjetResetList
- 1
- 10
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-
- IjetHWResetDuration
- 300
-
-
- IjetHWResetDelay
- 200
-
-
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-
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-
-
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-
-
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-
-
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-
-
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-
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-
-
- IjetScanChainNonARMDevices
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-
-
- IjetIRLength
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-
-
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- 0
-
-
- IjetProtocolRadio
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-
-
- IjetSwoPin
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-
-
- IjetCpuClockEdit
- 72.0
-
-
- IjetSwoPrescalerList
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- 0
-
-
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-
-
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-
- IjetUpdateBreakpointsEdit
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-
-
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- 0
-
-
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-
-
- RDICatchSWI
- 0
-
-
- RDICatchData
- 1
-
-
- RDICatchPrefetch
- 1
-
-
- RDICatchIRQ
- 0
-
-
- RDICatchFIQ
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-
-
- CatchCORERESET
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-
-
- CatchMMERR
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-
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diff --git a/workspace_tools/export/iar_nucleo_f303k8.ewp.tmpl b/workspace_tools/export/iar_nucleo_f303k8.ewp.tmpl
deleted file mode 100644
index 79d4e4a708..0000000000
--- a/workspace_tools/export/iar_nucleo_f303k8.ewp.tmpl
+++ /dev/null
@@ -1,1871 +0,0 @@
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diff --git a/workspace_tools/export/uvision4.py b/workspace_tools/export/uvision4.py
index 789dfe0f86..bcc1fde869 100644
--- a/workspace_tools/export/uvision4.py
+++ b/workspace_tools/export/uvision4.py
@@ -48,7 +48,6 @@ class Uvision4(Exporter):
'NUCLEO_F091RC',
'NUCLEO_F103RB',
'NUCLEO_F302R8',
- 'NUCLEO_F303K8',
'NUCLEO_F303RE',
'NUCLEO_F334R8',
'NUCLEO_F401RE',
@@ -100,7 +99,6 @@ class Uvision4(Exporter):
'NUCLEO_F091RC',
'NUCLEO_F103RB',
'NUCLEO_F302R8',
- 'NUCLEO_F303K8',
'NUCLEO_F303RE',
'NUCLEO_F334R8',
'NUCLEO_F401RE',
diff --git a/workspace_tools/export/uvision4_nucleo_f303k8.uvopt.tmpl b/workspace_tools/export/uvision4_nucleo_f303k8.uvopt.tmpl
deleted file mode 100644
index 21ff215a70..0000000000
--- a/workspace_tools/export/uvision4_nucleo_f303k8.uvopt.tmpl
+++ /dev/null
@@ -1,213 +0,0 @@
-
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diff --git a/workspace_tools/export/uvision4_nucleo_f303k8.uvproj.tmpl b/workspace_tools/export/uvision4_nucleo_f303k8.uvproj.tmpl
deleted file mode 100644
index 8278b3e204..0000000000
--- a/workspace_tools/export/uvision4_nucleo_f303k8.uvproj.tmpl
+++ /dev/null
@@ -1,438 +0,0 @@
-
-
-
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-
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- 0x0
- 0x0
-
-
-
-
-
- 1
- 1
- 0
- 0
- 0
- 0
- 0
- 0
- 0
- 0
- 0
- 0
- 0
-
- {% for flag in flags %}{{flag}} {% endfor %}
- {% for s in symbols %} {{s}}, {% endfor %}
-
- {% for path in include_paths %} {{path}}; {% endfor %}
-
-
-
- 1
- 0
- 0
- 0
- 0
- 0
- 0
- 0
-
-
-
-
-
-
-
-
- 0
- 0
- 0
- 0
- 1
- 0
- 0x08000000
- 0x20000000
- {{scatter_file}}
-
-
-
- {% for file in object_files %}
- {{file}}
- {% endfor %}
-
-
-
-
-
-
-
- {% for group,files in source_files %}
-
- {{group}}
-
- {% for file in files %}
-
- {{file.name}}
- {{file.type}}
- {{file.path}}
-
-
- 2
- 0
- 0
- 0
- 0
- 1
- 0
- 0
- 0
- 0
- 3
-
-
-
-
-
-
- {% endfor %}
-
-
- {% endfor %}
-
-
-
-
-
diff --git a/workspace_tools/export_test.py b/workspace_tools/export_test.py
index 5cef4e02c6..02e13a36b0 100644
--- a/workspace_tools/export_test.py
+++ b/workspace_tools/export_test.py
@@ -127,7 +127,6 @@ if __name__ == '__main__':
('uvision', 'NUCLEO_F091RC'),
('uvision', 'NUCLEO_F103RB'),
('uvision', 'NUCLEO_F302R8'),
- ('uvision', 'NUCLEO_F303K8'),
('uvision', 'NUCLEO_F303RE'),
('uvision', 'NUCLEO_F334R8'),
('uvision', 'NUCLEO_F401RE'),
@@ -227,7 +226,6 @@ if __name__ == '__main__':
('iar', 'NUCLEO_F072RB'),
('iar', 'NUCLEO_F091RC'),
('iar', 'NUCLEO_F302R8'),
- ('iar', 'NUCLEO_F303K8'),
('iar', 'NUCLEO_F303RE'),
('iar', 'NUCLEO_F334R8'),
('iar', 'NUCLEO_F401RE'),
diff --git a/workspace_tools/host_tests/host_tests_plugins/__init__.py b/workspace_tools/host_tests/host_tests_plugins/__init__.py
index 521ba7138b..c05241ae08 100644
--- a/workspace_tools/host_tests/host_tests_plugins/__init__.py
+++ b/workspace_tools/host_tests/host_tests_plugins/__init__.py
@@ -21,6 +21,12 @@ import host_test_registry
import module_copy_mbed
import module_copy_shell
import module_copy_silabs
+
+try:
+ import module_copy_smart
+except:
+ pass
+
#import module_copy_firefox
import module_copy_mps2
@@ -37,6 +43,12 @@ HOST_TEST_PLUGIN_REGISTRY = host_test_registry.HostTestRegistry()
# Some plugins are commented out if they are not stable or not commonly used
HOST_TEST_PLUGIN_REGISTRY.register_plugin(module_copy_mbed.load_plugin())
HOST_TEST_PLUGIN_REGISTRY.register_plugin(module_copy_shell.load_plugin())
+
+try:
+ HOST_TEST_PLUGIN_REGISTRY.register_plugin(module_copy_smart.load_plugin())
+except:
+ pass
+
HOST_TEST_PLUGIN_REGISTRY.register_plugin(module_reset_mbed.load_plugin())
#HOST_TEST_PLUGIN_REGISTRY.register_plugin(module_copy_firefox.load_plugin())
diff --git a/workspace_tools/host_tests/host_tests_plugins/module_copy_mbed.py b/workspace_tools/host_tests/host_tests_plugins/module_copy_mbed.py
index 2b9527e95f..913ff3c425 100644
--- a/workspace_tools/host_tests/host_tests_plugins/module_copy_mbed.py
+++ b/workspace_tools/host_tests/host_tests_plugins/module_copy_mbed.py
@@ -17,6 +17,7 @@ limitations under the License.
from shutil import copy
from host_test_plugins import HostTestPluginBase
+from time import sleep
class HostTestPluginCopyMethod_Mbed(HostTestPluginBase):
@@ -42,7 +43,7 @@ class HostTestPluginCopyMethod_Mbed(HostTestPluginBase):
type = 'CopyMethod'
stable = True
capabilities = ['shutil', 'default']
- required_parameters = ['image_path', 'destination_disk']
+ required_parameters = ['image_path', 'destination_disk', 'program_cycle_s']
def setup(self, *args, **kwargs):
""" Configure plugin, this function should be called before plugin execute() method is used.
@@ -60,9 +61,14 @@ class HostTestPluginCopyMethod_Mbed(HostTestPluginBase):
if capability == 'shutil':
image_path = kwargs['image_path']
destination_disk = kwargs['destination_disk']
+ program_cycle_s = kwargs['program_cycle_s']
# Wait for mount point to be ready
self.check_mount_point_ready(destination_disk) # Blocking
result = self.generic_mbed_copy(image_path, destination_disk)
+
+ # Allow mbed to cycle
+ sleep(program_cycle_s)
+
return result
diff --git a/workspace_tools/host_tests/host_tests_plugins/module_copy_shell.py b/workspace_tools/host_tests/host_tests_plugins/module_copy_shell.py
index dbbc7365c0..18ca062a23 100644
--- a/workspace_tools/host_tests/host_tests_plugins/module_copy_shell.py
+++ b/workspace_tools/host_tests/host_tests_plugins/module_copy_shell.py
@@ -18,6 +18,7 @@ limitations under the License.
import os
from os.path import join, basename
from host_test_plugins import HostTestPluginBase
+from time import sleep
class HostTestPluginCopyMethod_Shell(HostTestPluginBase):
@@ -27,7 +28,7 @@ class HostTestPluginCopyMethod_Shell(HostTestPluginBase):
type = 'CopyMethod'
stable = True
capabilities = ['shell', 'cp', 'copy', 'xcopy']
- required_parameters = ['image_path', 'destination_disk']
+ required_parameters = ['image_path', 'destination_disk', 'program_cycle_s']
def setup(self, *args, **kwargs):
""" Configure plugin, this function should be called before plugin execute() method is used.
@@ -43,6 +44,7 @@ class HostTestPluginCopyMethod_Shell(HostTestPluginBase):
if self.check_parameters(capability, *args, **kwargs) is True:
image_path = kwargs['image_path']
destination_disk = kwargs['destination_disk']
+ program_cycle_s = kwargs['program_cycle_s']
# Wait for mount point to be ready
self.check_mount_point_ready(destination_disk) # Blocking
# Prepare correct command line parameter values
@@ -59,6 +61,10 @@ class HostTestPluginCopyMethod_Shell(HostTestPluginBase):
result = self.run_command(["sync"])
else:
result = self.run_command(cmd)
+
+ # Allow mbed to cycle
+ sleep(program_cycle_s)
+
return result
diff --git a/workspace_tools/host_tests/host_tests_plugins/module_copy_silabs.py b/workspace_tools/host_tests/host_tests_plugins/module_copy_silabs.py
index 1572bbc6ee..494bcf494e 100644
--- a/workspace_tools/host_tests/host_tests_plugins/module_copy_silabs.py
+++ b/workspace_tools/host_tests/host_tests_plugins/module_copy_silabs.py
@@ -16,6 +16,7 @@ limitations under the License.
"""
from host_test_plugins import HostTestPluginBase
+from time import sleep
class HostTestPluginCopyMethod_Silabs(HostTestPluginBase):
@@ -24,7 +25,7 @@ class HostTestPluginCopyMethod_Silabs(HostTestPluginBase):
name = 'HostTestPluginCopyMethod_Silabs'
type = 'CopyMethod'
capabilities = ['eACommander', 'eACommander-usb']
- required_parameters = ['image_path', 'destination_disk']
+ required_parameters = ['image_path', 'destination_disk', 'program_cycle_s']
def setup(self, *args, **kwargs):
""" Configure plugin, this function should be called before plugin execute() method is used.
@@ -41,6 +42,7 @@ class HostTestPluginCopyMethod_Silabs(HostTestPluginBase):
if self.check_parameters(capabilitity, *args, **kwargs) is True:
image_path = kwargs['image_path']
destination_disk = kwargs['destination_disk']
+ program_cycle_s = kwargs['program_cycle_s']
if capabilitity == 'eACommander':
cmd = [self.EACOMMANDER_CMD,
'--serialno', destination_disk,
@@ -52,6 +54,10 @@ class HostTestPluginCopyMethod_Silabs(HostTestPluginBase):
'--usb', destination_disk,
'--flash', image_path]
result = self.run_command(cmd)
+
+ # Allow mbed to cycle
+ sleep(program_cycle_s)
+
return result
diff --git a/workspace_tools/host_tests/host_tests_plugins/module_copy_smart.py b/workspace_tools/host_tests/host_tests_plugins/module_copy_smart.py
new file mode 100644
index 0000000000..9fb5970d46
--- /dev/null
+++ b/workspace_tools/host_tests/host_tests_plugins/module_copy_smart.py
@@ -0,0 +1,118 @@
+"""
+mbed SDK
+Copyright (c) 2011-2013 ARM Limited
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+"""
+
+import os
+import sys
+from os.path import join, basename, exists, abspath, dirname
+from time import sleep
+from host_test_plugins import HostTestPluginBase
+
+sys.path.append(abspath(join(dirname(__file__), "../../../")))
+from workspace_tools.test_api import get_autodetected_MUTS_list
+
+class HostTestPluginCopyMethod_Smart(HostTestPluginBase):
+
+ # Plugin interface
+ name = 'HostTestPluginCopyMethod_Smart'
+ type = 'CopyMethod'
+ stable = True
+ capabilities = ['smart']
+ required_parameters = ['image_path', 'destination_disk', 'target_mcu']
+
+ def setup(self, *args, **kwargs):
+ """ Configure plugin, this function should be called before plugin execute() method is used.
+ """
+ return True
+
+ def execute(self, capability, *args, **kwargs):
+ """ Executes capability by name.
+ Each capability may directly just call some command line
+ program or execute building pythonic function
+ """
+ result = False
+ if self.check_parameters(capability, *args, **kwargs) is True:
+ image_path = kwargs['image_path']
+ destination_disk = kwargs['destination_disk']
+ target_mcu = kwargs['target_mcu']
+ # Wait for mount point to be ready
+ self.check_mount_point_ready(destination_disk) # Blocking
+ # Prepare correct command line parameter values
+ image_base_name = basename(image_path)
+ destination_path = join(destination_disk, image_base_name)
+ if capability == 'smart':
+ if os.name == 'posix':
+ cmd = ['cp', image_path, destination_path]
+ result = self.run_command(cmd, shell=False)
+
+ cmd = ['sync']
+ result = self.run_command(cmd, shell=False)
+ elif os.name == 'nt':
+ cmd = ['copy', image_path, destination_path]
+ result = self.run_command(cmd, shell=True)
+
+ # Give the OS and filesystem time to settle down
+ sleep(3)
+
+ platform_name_filter = [target_mcu]
+ muts_list = {}
+
+ remount_complete = False
+
+ for i in range(0, 60):
+ print('Looking for %s with MBEDLS' % target_mcu)
+ muts_list = get_autodetected_MUTS_list(platform_name_filter=platform_name_filter)
+
+ if 1 in muts_list:
+ mut = muts_list[1]
+ destination_disk = mut['disk']
+ destination_path = join(destination_disk, image_base_name)
+
+ if mut['mcu'] == 'LPC1768' or mut['mcu'] == 'LPC11U24':
+ if exists(destination_disk) and exists(destination_path):
+ remount_complete = True
+ break;
+ else:
+ if exists(destination_disk) and not exists(destination_path):
+ remount_complete = True
+ break;
+
+ sleep(1)
+
+ if remount_complete:
+ print('Remount complete')
+ else:
+ print('Remount FAILED')
+
+ if exists(destination_disk):
+ print('Disk exists')
+ else:
+ print('Disk does not exist')
+
+ if exists(destination_path):
+ print('Image exists')
+ else:
+ print('Image does not exist')
+
+ result = None
+
+
+ return result
+
+def load_plugin():
+ """ Returns plugin available in this module
+ """
+ return HostTestPluginCopyMethod_Smart()
diff --git a/workspace_tools/targets.py b/workspace_tools/targets.py
index 4cf11a2db5..6e3cc12e81 100755
--- a/workspace_tools/targets.py
+++ b/workspace_tools/targets.py
@@ -632,17 +632,6 @@ class NUCLEO_F302R8(Target):
self.supported_form_factors = ["ARDUINO", "MORPHO"]
self.detect_code = ["0705"]
-class NUCLEO_F303K8(Target):
- def __init__(self):
- Target.__init__(self)
- self.core = "Cortex-M4F"
- self.extra_labels = ['STM', 'STM32F3', 'STM32F303K8']
- self.supported_toolchains = ["ARM", "uARM", "IAR", "GCC_ARM"]
- self.default_toolchain = "uARM"
- self.supported_form_factors = ["ARDUINO"]
- self.detect_code = ["0775"]
-
-
class NUCLEO_F303RE(Target):
def __init__(self):
Target.__init__(self)
@@ -1358,7 +1347,7 @@ class NRF51_DK(MCU_NRF51_32K):
class NRF51_DK_BOOT(MCU_NRF51_32K_BOOT):
def __init__(self):
MCU_NRF51_32K_BOOT.__init__(self)
- self.extra_labels = ['NRF51_DK']
+ self.extra_labels += ['NRF51_DK']
self.macros += ['TARGET_NRF51_DK']
self.supported_toolchains = ["ARM", "GCC_ARM"]
self.supported_form_factors = ["ARDUINO"]
@@ -1366,7 +1355,7 @@ class NRF51_DK_BOOT(MCU_NRF51_32K_BOOT):
class NRF51_DK_OTA(MCU_NRF51_32K_OTA):
def __init__(self):
MCU_NRF51_32K_OTA.__init__(self)
- self.extra_labels = ['NRF51_DK']
+ self.extra_labels += ['NRF51_DK']
self.macros += ['TARGET_NRF51_DK']
self.supported_toolchains = ["ARM", "GCC_ARM"]
self.supported_form_factors = ["ARDUINO"]
@@ -1378,13 +1367,13 @@ class NRF51_DONGLE(MCU_NRF51_32K):
class NRF51_DONGLE_BOOT(MCU_NRF51_32K_BOOT):
def __init__(self):
MCU_NRF51_32K_BOOT.__init__(self)
- self.extra_labels = ['NRF51_DONGLE']
+ self.extra_labels += ['NRF51_DONGLE']
self.macros += ['TARGET_NRF51_DONGLE']
class NRF51_DONGLE_OTA(MCU_NRF51_32K_OTA):
def __init__(self):
MCU_NRF51_32K_OTA.__init__(self)
- self.extra_labels = ['NRF51_DONGLE']
+ self.extra_labels += ['NRF51_DONGLE']
self.macros += ['TARGET_NRF51_DONGLE']
class NRF51_MICROBIT(MCU_NRF51_16K_S110):
@@ -1622,7 +1611,7 @@ class SAMR21G18A(Target):
self.extra_labels = ['Atmel', 'SAM_CortexM0+', 'SAMR21']
self.macros = ['__SAMR21G18A__', 'I2C_MASTER_CALLBACK_MODE=true', 'EXTINT_CALLBACK_MODE=true', 'USART_CALLBACK_MODE=true', 'TC_ASYNC=true']
self.supported_toolchains = ["GCC_ARM"]
- self.default_toolchain = "GCC_ARM"
+ self.default_toolchain = "ARM"
class SAMD21J18A(Target):
def __init__(self):
@@ -1631,7 +1620,17 @@ class SAMD21J18A(Target):
self.extra_labels = ['Atmel', 'SAM_CortexM0+', 'SAMD21']
self.macros = ['__SAMD21J18A__', 'I2C_MASTER_CALLBACK_MODE=true', 'EXTINT_CALLBACK_MODE=true', 'USART_CALLBACK_MODE=true', 'TC_ASYNC=true']
self.supported_toolchains = ["GCC_ARM"]
- self.default_toolchain = "GCC_ARM"
+ self.default_toolchain = "ARM"
+
+class SAMD21G18A(Target):
+ def __init__(self):
+ Target.__init__(self)
+ self.core = "Cortex-M0+"
+ self.extra_labels = ['Atmel', 'SAM_CortexM0+', 'SAMD21']
+ self.macros = ['__SAMD21G18A__', 'I2C_MASTER_CALLBACK_MODE=true', 'EXTINT_CALLBACK_MODE=true', 'USART_CALLBACK_MODE=true', 'TC_ASYNC=true']
+ self.supported_toolchains = ["GCC_ARM"]
+ self.default_toolchain = "ARM"
+
# Get a single instance for each target
TARGETS = [
@@ -1693,7 +1692,6 @@ TARGETS = [
NUCLEO_F091RC(),
NUCLEO_F103RB(),
NUCLEO_F302R8(),
- NUCLEO_F303K8(),
NUCLEO_F303RE(),
NUCLEO_F334R8(),
NUCLEO_F401RE(),
@@ -1798,6 +1796,7 @@ TARGETS = [
### Atmel ###
SAMR21G18A(),
SAMD21J18A(),
+ SAMD21G18A(),
]
# Map each target name to its unique instance
diff --git a/workspace_tools/tests.py b/workspace_tools/tests.py
index ecd4c1c5a7..003d372312 100644
--- a/workspace_tools/tests.py
+++ b/workspace_tools/tests.py
@@ -144,7 +144,7 @@ TESTS = [
"automated": True,
"peripherals": ["analog_loop"],
"mcu": ["LPC1768", "LPC2368", "LPC2460", "KL25Z", "K64F", "K22F", "LPC4088", "LPC1549",
- "NUCLEO_F072RB", "NUCLEO_F091RC", "NUCLEO_F302R8", "NUCLEO_F303K8", "NUCLEO_F303RE",
+ "NUCLEO_F072RB", "NUCLEO_F091RC", "NUCLEO_F302R8", "NUCLEO_F303RE",
"NUCLEO_F334R8", "NUCLEO_L053R8", "NUCLEO_L073RZ", "NUCLEO_L152RE",
"NUCLEO_F411RE", "NUCLEO_F446RE", "DISCO_F407VG", "DISCO_F746NG", "ARCH_MAX", "MAX32600MBED"]
},
@@ -657,7 +657,7 @@ TESTS = [
"RZ_A1H", "DISCO_F407VG", "DISCO_F429ZI", "NUCLEO_F411RE",
"NUCLEO_F401RE", "NUCLEO_F334R8", "DISCO_F334C8", "NUCLEO_F302R8", "NUCLEO_F030R8", "NUCLEO_F070RB",
"NUCLEO_L053R8", "DISCO_L053C8", "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC", "DISCO_L476VG", "NUCLEO_L476RG",
- "DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG"],
+ "DISCO_F401VC", "NUCLEO_F303RE", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG"],
},
{
"id": "RTOS_2", "description": "Mutex resource lock",
@@ -670,7 +670,7 @@ TESTS = [
"RZ_A1H", "DISCO_F407VG", "DISCO_F429ZI", "NUCLEO_F411RE",
"NUCLEO_F401RE", "NUCLEO_F334R8", "DISCO_F334C8", "NUCLEO_F302R8", "NUCLEO_F030R8", "NUCLEO_F070RB",
"NUCLEO_L053R8", "DISCO_L053C8", "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC", "DISCO_L476VG", "NUCLEO_L476RG",
- "DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG"],
+ "DISCO_F401VC", "NUCLEO_F303RE", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG"],
},
{
"id": "RTOS_3", "description": "Semaphore resource lock",
@@ -683,7 +683,7 @@ TESTS = [
"RZ_A1H", "DISCO_F407VG", "DISCO_F429ZI", "NUCLEO_F411RE",
"NUCLEO_F401RE", "NUCLEO_F334R8", "DISCO_F334C8", "NUCLEO_F302R8", "NUCLEO_F030R8", "NUCLEO_F070RB",
"NUCLEO_L053R8", "DISCO_L053C8", "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC", "DISCO_L476VG", "NUCLEO_L476RG",
- "DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG"],
+ "DISCO_F401VC", "NUCLEO_F303RE", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG"],
},
{
"id": "RTOS_4", "description": "Signals messaging",
@@ -695,7 +695,7 @@ TESTS = [
"RZ_A1H", "DISCO_F407VG", "DISCO_F429ZI", "NUCLEO_F411RE",
"NUCLEO_F401RE", "NUCLEO_F334R8", "DISCO_F334C8", "NUCLEO_F302R8", "NUCLEO_F030R8", "NUCLEO_F070RB",
"NUCLEO_L053R8", "DISCO_L053C8", "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC", "DISCO_L476VG", "NUCLEO_L476RG",
- "DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG"],
+ "DISCO_F401VC", "NUCLEO_F303RE", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG"],
},
{
"id": "RTOS_5", "description": "Queue messaging",
@@ -707,7 +707,7 @@ TESTS = [
"RZ_A1H", "DISCO_F407VG", "DISCO_F429ZI", "NUCLEO_F411RE",
"NUCLEO_F401RE", "NUCLEO_F334R8", "DISCO_F334C8", "NUCLEO_F302R8", "NUCLEO_F030R8", "NUCLEO_F070RB",
"NUCLEO_L053R8", "DISCO_L053C8", "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC", "DISCO_L476VG", "NUCLEO_L476RG",
- "DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG"],
+ "DISCO_F401VC", "NUCLEO_F303RE", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG"],
},
{
"id": "RTOS_6", "description": "Mail messaging",
@@ -719,7 +719,7 @@ TESTS = [
"RZ_A1H", "DISCO_F407VG", "DISCO_F429ZI", "NUCLEO_F411RE",
"NUCLEO_F401RE", "NUCLEO_F334R8", "DISCO_F334C8", "NUCLEO_F302R8", "NUCLEO_F030R8", "NUCLEO_F070RB",
"NUCLEO_L053R8", "DISCO_L053C8", "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC", "DISCO_L476VG", "NUCLEO_L476RG",
- "DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG"],
+ "DISCO_F401VC", "NUCLEO_F303RE", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG"],
},
{
"id": "RTOS_7", "description": "Timer",
@@ -733,7 +733,7 @@ TESTS = [
"RZ_A1H", "DISCO_F407VG", "DISCO_F429ZI", "NUCLEO_F411RE",
"NUCLEO_F401RE", "NUCLEO_F334R8", "DISCO_F334C8", "NUCLEO_F302R8", "NUCLEO_F030R8", "NUCLEO_F070RB",
"NUCLEO_L053R8", "DISCO_L053C8", "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC", "DISCO_L476VG", "NUCLEO_L476RG",
- "DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG"],
+ "DISCO_F401VC", "NUCLEO_F303RE", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG"],
},
{
"id": "RTOS_8", "description": "ISR (Queue)",
@@ -745,7 +745,7 @@ TESTS = [
"RZ_A1H", "DISCO_F407VG", "DISCO_F429ZI", "NUCLEO_F411RE",
"NUCLEO_F401RE", "NUCLEO_F334R8", "DISCO_F334C8", "NUCLEO_F302R8", "NUCLEO_F030R8", "NUCLEO_F070RB",
"NUCLEO_L053R8", "DISCO_L053C8", "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC", "DISCO_L476VG", "NUCLEO_L476RG",
- "DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG"],
+ "DISCO_F401VC", "NUCLEO_F303RE", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG"],
},
{
"id": "RTOS_9", "description": "SD File write-read",