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Modify to support GCC. (mbed HAL driver)

pull/933/head
Masao Hamanaka 2015-02-26 16:33:01 +09:00
parent c46f5b894b
commit ed293575cf
5 changed files with 9 additions and 10 deletions
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2
libraries/mbed/targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/device.h
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@ -19,7 +19,7 @@
/* ->Take measures about optimization problems of web compiler */
/* Web compiler has problem that inlining code may not be generated correctly */
/* when "-O3 -Otime" was specified. */
#if defined(__arm__) && (__ARMCC_VERSION <= 5040027)
#if defined(__CC_ARM) && (__ARMCC_VERSION <= 5040027)
#pragma Ospace
#endif
/* <-Take measures about optimization problems of web compiler */

8
libraries/mbed/targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/ethernet_api.c
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@ -27,7 +27,6 @@
#define NUM_OF_RX_DESCRIPTOR (16)
#define SIZE_OF_BUFFER (1600) /* Must be an integral multiple of 32 */
#define MAX_SEND_SIZE (1514)
#define BUFF_BOUNDARY_MSK (0x0000000F)
/* Ethernet Descriptor Value Define */
#define TD0_TFP_TOP_BOTTOM (0x30000000)
#define TD0_TACT (0x80000000)
@ -105,14 +104,13 @@ typedef struct tag_edmac_recv_desc {
} edmac_recv_desc_t;
/* memory */
#pragma arm section zidata="NC_BSS"
/* The whole transmit/receive descriptors (must be allocated in 16-byte boundaries) */
/* Transmit/receive buffers (must be allocated in 16-byte boundaries) */
static uint8_t ehernet_nc_memory[(sizeof(edmac_send_desc_t) * NUM_OF_TX_DESCRIPTOR) +
(sizeof(edmac_recv_desc_t) * NUM_OF_RX_DESCRIPTOR) +
(NUM_OF_TX_DESCRIPTOR * SIZE_OF_BUFFER) +
(NUM_OF_RX_DESCRIPTOR * SIZE_OF_BUFFER) + BUFF_BOUNDARY_MSK];
#pragma arm section zidata
(NUM_OF_RX_DESCRIPTOR * SIZE_OF_BUFFER)]
__attribute((section("NC_BSS"),aligned(16))); //16 bytes aligned!
static int32_t rx_read_offset; /* read offset */
static int32_t tx_wite_offset; /* write offset */
static uint32_t send_top_index;
@ -489,7 +487,7 @@ static void lan_desc_create(void) {
uint8_t *p_memory_top;
(void)memset((void *)ehernet_nc_memory, 0, sizeof(ehernet_nc_memory));
p_memory_top = (uint8_t *)(((uint32_t)ehernet_nc_memory + BUFF_BOUNDARY_MSK) & ~BUFF_BOUNDARY_MSK);
p_memory_top = ehernet_nc_memory;
/* Descriptor area configuration */
p_eth_desc_dsend = (edmac_send_desc_t *)p_memory_top;

2
libraries/mbed/targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/ethernetext_api.h
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@ -17,4 +17,4 @@ typedef struct tag_ethernet_cfg {
extern int ethernetext_init(ethernet_cfg_t *p_ethcfg);
extern void ethernetext_start_stop(int32_t mode);
extern int ethernetext_chk_link_mode(void);
extern void ethernetext_set_link_mode(int link);
extern void ethernetext_set_link_mode(int32_t link);

5
libraries/mbed/targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/gpio_irq_api.c
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@ -199,12 +199,13 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
GIC_DisableIRQ((IRQn_Type)(nIRQn_h+obj->ch));
/* Clear Interrupt flags */
INTCIRQRR &= ~(1 << obj->ch);
INTCICR1 = work_icr_val;
} else if (obj->int_enable == 1) {
INTCICR1 = work_icr_val;
GIC_EnableIRQ((IRQn_Type)(nIRQn_h + obj->ch));
} else {
/* Do Nothing */
INTCICR1 = work_icr_val;
}
INTCICR1 = work_icr_val;
}
void gpio_irq_enable(gpio_irq_t *obj) {

2
libraries/mbed/targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/i2c_api.c
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@ -247,7 +247,7 @@ inline int i2c_start(i2c_t *obj) {
return 0;
}
inline int i2c_restart(i2c_t *obj) {
static inline int i2c_restart(i2c_t *obj) {
/* SR2.START = 0 */
REG(SR2.UINT32) &= ~SR2_START;
/* ReStart condition */