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remove duplicate LSEDRIVE_CONFIG

pull/13797/head
JojoS62 2020-10-22 11:24:51 +02:00
parent a209d44a07
commit e7f1430d37
2 changed files with 0 additions and 2 deletions
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1
targets/TARGET_STM/TARGET_STM32L5/system_clock.c
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@ -134,7 +134,6 @@ uint8_t SetSysClock_PLL_MSI(void)
__HAL_RCC_RTCAPB_CLK_ENABLE(); __HAL_RCC_RTCAPB_CLK_ENABLE();
#if MBED_CONF_TARGET_LSE_AVAILABLE #if MBED_CONF_TARGET_LSE_AVAILABLE
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE; RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
RCC_OscInitStruct.LSEState = RCC_LSE_ON; // External 32.768 kHz clock on OSC_IN/OSC_OUT RCC_OscInitStruct.LSEState = RCC_LSE_ON; // External 32.768 kHz clock on OSC_IN/OSC_OUT

1
targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xx/TARGET_NUCLEO_WB55RG/system_clock.c
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@ -72,7 +72,6 @@ void SetSysClock(void)
Config_HSE(); Config_HSE();
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
/* This prevents the CPU2 (M0+) to disable the HSI48 oscillator */ /* This prevents the CPU2 (M0+) to disable the HSI48 oscillator */