mirror of https://github.com/ARMmbed/mbed-os.git
STM32L4S5xI: B_L4S5I_IOT01A new target
jeromecoutant
parent
c65ad59ccd
commit
d804167816
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/* mbed Microcontroller Library
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* SPDX-License-Identifier: BSD-3-Clause
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******************************************************************************
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*
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* Copyright (c) 2016-2020 STMicroelectronics.
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*
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*
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*/
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#ifndef MBED_PERIPHERALNAMES_H
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#define MBED_PERIPHERALNAMES_H
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#include "cmsis.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum {
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ADC_1 = (int)ADC1_BASE
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} ADCName;
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typedef enum {
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DAC_1 = (int)DAC_BASE
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} DACName;
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typedef enum {
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UART_1 = (int)USART1_BASE,
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UART_2 = (int)USART2_BASE,
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UART_3 = (int)USART3_BASE,
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UART_4 = (int)UART4_BASE,
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UART_5 = (int)UART5_BASE,
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LPUART_1 = (int)LPUART1_BASE
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} UARTName;
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#define DEVICE_SPI_COUNT 3
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typedef enum {
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SPI_1 = (int)SPI1_BASE,
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SPI_2 = (int)SPI2_BASE,
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SPI_3 = (int)SPI3_BASE
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} SPIName;
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typedef enum {
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I2C_1 = (int)I2C1_BASE,
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I2C_2 = (int)I2C2_BASE,
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I2C_3 = (int)I2C3_BASE,
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I2C_4 = (int)I2C4_BASE
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} I2CName;
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typedef enum {
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PWM_1 = (int)TIM1_BASE,
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PWM_2 = (int)TIM2_BASE,
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PWM_3 = (int)TIM3_BASE,
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PWM_4 = (int)TIM4_BASE,
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PWM_5 = (int)TIM5_BASE,
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PWM_8 = (int)TIM8_BASE,
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PWM_15 = (int)TIM15_BASE,
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PWM_16 = (int)TIM16_BASE,
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PWM_17 = (int)TIM17_BASE
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} PWMName;
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typedef enum {
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CAN_1 = (int)CAN1_BASE
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} CANName;
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typedef enum {
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QSPI_1 = (int)OCTOSPI1_R_BASE,
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QSPI_2 = (int)OCTOSPI2_R_BASE
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} QSPIName;
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typedef enum {
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USB_FS = (int)USB_OTG_FS_PERIPH_BASE,
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} USBName;
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#ifdef __cplusplus
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}
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#endif
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#endif
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@ -0,0 +1,389 @@
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/* mbed Microcontroller Library
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* SPDX-License-Identifier: BSD-3-Clause
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******************************************************************************
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*
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* Copyright (c) 2016-2020 STMicroelectronics.
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*
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*
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*/
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#include "PeripheralPins.h"
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#include "mbed_toolchain.h"
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//==============================================================================
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// Notes
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//
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// - The pins mentioned Px_y_ALTz are alternative possibilities which use other
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// HW peripheral instances. You can use them the same way as any other "normal"
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// pin (i.e. PwmOut pwm(PA_7_ALT0);). These pins are not displayed on the board
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// pinout image on mbed.org.
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//
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// - The pins which are connected to other components present on the board have
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// the comment "Connected to xxx". The pin function may not work properly in this
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// case. These pins may not be displayed on the board pinout image on mbed.org.
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// Please read the board reference manual and schematic for more information.
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//
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// - Warning: pins connected to the default STDIO_UART_TX and STDIO_UART_RX pins are commented
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// See https://os.mbed.com/teams/ST/wiki/STDIO for more information.
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//
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//==============================================================================
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//*** ADC ***
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MBED_WEAK const PinMap PinMap_ADC[] = {
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{PA_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
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{PA_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
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{PA_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
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{PA_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8
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{PA_4, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
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{PA_5, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10
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{PA_6, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11
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{PA_7, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12
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{PB_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15
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{PB_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16
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{PC_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
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{PC_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2
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{PC_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3
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{PC_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
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{PC_4, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13
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{PC_5, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14
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{NC, NC, 0}
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};
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MBED_WEAK const PinMap PinMap_ADC_Internal[] = {
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{ADC_TEMP, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)},
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{ADC_VREF, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)},
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{ADC_VBAT, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)},
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{NC, NC, 0}
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};
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//*** DAC ***
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MBED_WEAK const PinMap PinMap_DAC[] = {
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{PA_4, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1
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{PA_5, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2
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{NC, NC, 0}
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};
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//*** I2C ***
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MBED_WEAK const PinMap PinMap_I2C_SDA[] = {
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{PB_4, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
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{PB_7, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
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{PB_7_ALT0, I2C_4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)},
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{PB_9, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
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{PB_11, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
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{PB_11_ALT0, I2C_4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C4)},
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{PB_14, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
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{PC_1, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
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{PC_9, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C3)},
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{PD_13, I2C_4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)},
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{NC, NC, 0}
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};
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MBED_WEAK const PinMap PinMap_I2C_SCL[] = {
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{PA_7, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
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{PB_6, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
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{PB_6_ALT0, I2C_4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)},
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{PB_8, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
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{PB_10, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
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{PB_10_ALT0, I2C_4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C4)},
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{PB_13, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
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{PC_0, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
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{PD_12, I2C_4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)},
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{NC, NC, 0}
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};
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//*** PWM ***
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// TIM5 cannot be used because already used by the us_ticker
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MBED_WEAK const PinMap PinMap_PWM[] = {
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{PA_0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
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// {PA_0, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
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{PA_1, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
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// {PA_1, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
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{PA_1_ALT0, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N
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{PA_2, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
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// {PA_2, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3
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{PA_2_ALT0, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1
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{PA_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
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// {PA_3, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4
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{PA_3_ALT0, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2
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{PA_5, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
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{PA_5_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
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{PA_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
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{PA_6_ALT0, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1
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{PA_7, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
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{PA_7_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
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{PA_7_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
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{PA_7_ALT2, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1
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{PA_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
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{PA_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
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{PA_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
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{PA_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
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{PA_15, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
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{PB_0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
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{PB_0_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
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{PB_0_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
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{PB_1, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
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{PB_1_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
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{PB_1_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
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{PB_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
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{PB_4, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
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{PB_5, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
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{PB_6, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
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{PB_6_ALT0, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N
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{PB_7, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
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{PB_7_ALT0, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N
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{PB_8, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
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{PB_8_ALT0, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1
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{PB_9, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
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{PB_9_ALT0, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1
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{PB_10, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
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{PB_11, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
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{PB_13, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
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{PB_13_ALT0, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N
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{PB_14, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
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{PB_14_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
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{PB_14_ALT1, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1
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{PB_15, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
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{PB_15_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
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{PB_15_ALT1, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2
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{PC_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
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{PC_6_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1
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{PC_7, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
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{PC_7_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2
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{PC_8, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
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{PC_8_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3
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{PC_9, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
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{PC_9_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4
|
||||
{PD_12, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
|
||||
{PD_13, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
|
||||
{PD_14, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
|
||||
{PD_15, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
|
||||
{PE_0, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1
|
||||
{PE_1, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1
|
||||
{PE_3, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
||||
{PE_4, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
||||
{PE_5, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
|
||||
{PE_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
|
||||
{PE_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
|
||||
{PE_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
|
||||
{PE_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
|
||||
{PE_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
|
||||
{PE_12, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
||||
{PE_13, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
|
||||
{PE_14, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
//*** SERIAL ***
|
||||
|
||||
MBED_WEAK const PinMap PinMap_UART_TX[] = {
|
||||
{PA_0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PA_2, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PA_2_ALT0, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
|
||||
{PA_9, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PB_10, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PB_11, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
|
||||
{PC_1, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
|
||||
{PC_4, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PC_10, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PC_10_ALT0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PC_12, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||
{PD_5, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PD_8, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_UART_RX[] = {
|
||||
{PA_1, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PA_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PA_3_ALT0, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
|
||||
{PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PA_15, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)},
|
||||
{PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PB_10, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
|
||||
{PB_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PC_0, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
|
||||
{PC_5, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PC_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PC_11_ALT0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PD_2, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||
{PD_6, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PD_9, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_UART_RTS[] = {
|
||||
{PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PA_15, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PA_15_ALT0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PB_1, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PB_1_ALT0, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
|
||||
{PB_3, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PB_4, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||
{PB_12, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
|
||||
{PB_14, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PD_2, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PD_4, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PD_12, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_UART_CTS[] = {
|
||||
{PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PA_6, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PA_6_ALT0, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
|
||||
{PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PB_4, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PB_5, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||
{PB_7, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PB_13, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PB_13_ALT0, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
|
||||
{PD_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PD_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
//*** SPI ***
|
||||
|
||||
MBED_WEAK const PinMap PinMap_SPI_MOSI[] = {
|
||||
{PA_7, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||
{PA_12, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||
{PB_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||
{PB_5_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
|
||||
{PB_15, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||
{PC_1, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_SPI2)},
|
||||
{PC_3, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||
{PC_12, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
|
||||
{PD_4, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||
{PD_6, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI3)},
|
||||
{PE_15, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_SPI_MISO[] = {
|
||||
{PA_6, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||
{PA_11, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||
{PB_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||
{PB_4_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
|
||||
{PB_14, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||
{PC_2, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||
{PC_11, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
|
||||
{PD_3, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||
{PE_14, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_SPI_SCLK[] = {
|
||||
{PA_1, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||
{PA_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||
{PA_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_SPI2)},
|
||||
{PB_3, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||
{PB_3_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
|
||||
{PB_10, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||
{PB_13, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||
{PC_10, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
|
||||
{PD_1, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||
{PD_3, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_SPI2)},
|
||||
{PE_13, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_SPI_SSEL[] = {
|
||||
{PA_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||
{PA_4_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
|
||||
{PA_15, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||
{PA_15_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
|
||||
{PB_0, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||
{PB_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||
{PB_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||
{PD_0, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||
{PE_12, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
//*** CAN ***
|
||||
|
||||
MBED_WEAK const PinMap PinMap_CAN_RD[] = {
|
||||
{PA_11, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
|
||||
{PB_8, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
|
||||
{PD_0, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_CAN_TD[] = {
|
||||
{PA_12, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
|
||||
{PB_9, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
|
||||
{PD_1, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
//*** QUADSPI ***
|
||||
|
||||
MBED_WEAK const PinMap PinMap_QSPI_DATA0[] = {
|
||||
{PB_1, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PE_12, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_QSPI_DATA1[] = {
|
||||
{PB_0, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1
|
||||
{PE_13, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_QSPI_DATA2[] = {
|
||||
{PA_7, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{PE_14, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_QSPI_DATA3[] = {
|
||||
{PA_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3
|
||||
{PE_15, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_QSPI_SCLK[] = {
|
||||
{PA_3, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK
|
||||
{PB_10, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK
|
||||
{PE_10, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = {
|
||||
{PA_2, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PA_4, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PB_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PC_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PD_3, QSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P2)}, // OCTOSPIM_P2_NCS
|
||||
{PE_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
//*** USBDEVICE ***
|
||||
|
||||
MBED_WEAK const PinMap PinMap_USB_FS[] = {
|
||||
// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF
|
||||
{PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS
|
||||
{PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID
|
||||
{PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM
|
||||
{PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP
|
||||
// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE
|
||||
// {PA_14, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF
|
||||
// {PC_9, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
|
@ -0,0 +1,274 @@
|
|||
/* mbed Microcontroller Library
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
******************************************************************************
|
||||
*
|
||||
* Copyright (c) 2016-2020 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef MBED_PINNAMES_H
|
||||
#define MBED_PINNAMES_H
|
||||
|
||||
|
||||
#include "cmsis.h"
|
||||
#include "PinNamesTypes.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef enum {
|
||||
ALT0 = 0x100,
|
||||
ALT1 = 0x200,
|
||||
ALT2 = 0x300,
|
||||
ALT3 = 0x400
|
||||
} ALTx;
|
||||
|
||||
typedef enum {
|
||||
|
||||
PA_0 = 0x00,
|
||||
PA_1 = 0x01,
|
||||
PA_1_ALT0 = PA_1 | ALT0, // same pin used for alternate HW
|
||||
PA_2 = 0x02,
|
||||
PA_2_ALT0 = PA_2 | ALT0, // same pin used for alternate HW
|
||||
PA_3 = 0x03,
|
||||
PA_3_ALT0 = PA_3 | ALT0, // same pin used for alternate HW
|
||||
PA_4 = 0x04,
|
||||
PA_4_ALT0 = PA_4 | ALT0, // same pin used for alternate HW
|
||||
PA_5 = 0x05,
|
||||
PA_5_ALT0 = PA_5 | ALT0, // same pin used for alternate HW
|
||||
PA_6 = 0x06,
|
||||
PA_6_ALT0 = PA_6 | ALT0, // same pin used for alternate HW
|
||||
PA_7 = 0x07,
|
||||
PA_7_ALT0 = PA_7 | ALT0, // same pin used for alternate HW
|
||||
PA_7_ALT1 = PA_7 | ALT1, // same pin used for alternate HW
|
||||
PA_7_ALT2 = PA_7 | ALT2, // same pin used for alternate HW
|
||||
PA_8 = 0x08,
|
||||
PA_9 = 0x09,
|
||||
PA_10 = 0x0A,
|
||||
PA_11 = 0x0B,
|
||||
PA_12 = 0x0C,
|
||||
PA_13 = 0x0D,
|
||||
PA_14 = 0x0E,
|
||||
PA_15 = 0x0F,
|
||||
PA_15_ALT0 = PA_15 | ALT0, // same pin used for alternate HW
|
||||
PB_0 = 0x10,
|
||||
PB_0_ALT0 = PB_0 | ALT0, // same pin used for alternate HW
|
||||
PB_0_ALT1 = PB_0 | ALT1, // same pin used for alternate HW
|
||||
PB_1 = 0x11,
|
||||
PB_1_ALT0 = PB_1 | ALT0, // same pin used for alternate HW
|
||||
PB_1_ALT1 = PB_1 | ALT1, // same pin used for alternate HW
|
||||
PB_2 = 0x12,
|
||||
PB_3 = 0x13,
|
||||
PB_3_ALT0 = PB_3 | ALT0, // same pin used for alternate HW
|
||||
PB_4 = 0x14,
|
||||
PB_4_ALT0 = PB_4 | ALT0, // same pin used for alternate HW
|
||||
PB_5 = 0x15,
|
||||
PB_5_ALT0 = PB_5 | ALT0, // same pin used for alternate HW
|
||||
PB_6 = 0x16,
|
||||
PB_6_ALT0 = PB_6 | ALT0, // same pin used for alternate HW
|
||||
PB_7 = 0x17,
|
||||
PB_7_ALT0 = PB_7 | ALT0, // same pin used for alternate HW
|
||||
PB_8 = 0x18,
|
||||
PB_8_ALT0 = PB_8 | ALT0, // same pin used for alternate HW
|
||||
PB_9 = 0x19,
|
||||
PB_9_ALT0 = PB_9 | ALT0, // same pin used for alternate HW
|
||||
PB_10 = 0x1A,
|
||||
PB_10_ALT0 = PB_10 | ALT0, // same pin used for alternate HW
|
||||
PB_11 = 0x1B,
|
||||
PB_11_ALT0 = PB_11 | ALT0, // same pin used for alternate HW
|
||||
PB_12 = 0x1C,
|
||||
PB_13 = 0x1D,
|
||||
PB_13_ALT0 = PB_13 | ALT0, // same pin used for alternate HW
|
||||
PB_14 = 0x1E,
|
||||
PB_14_ALT0 = PB_14 | ALT0, // same pin used for alternate HW
|
||||
PB_14_ALT1 = PB_14 | ALT1, // same pin used for alternate HW
|
||||
PB_15 = 0x1F,
|
||||
PB_15_ALT0 = PB_15 | ALT0, // same pin used for alternate HW
|
||||
PB_15_ALT1 = PB_15 | ALT1, // same pin used for alternate HW
|
||||
PC_0 = 0x20,
|
||||
PC_1 = 0x21,
|
||||
PC_2 = 0x22,
|
||||
PC_3 = 0x23,
|
||||
PC_4 = 0x24,
|
||||
PC_5 = 0x25,
|
||||
PC_6 = 0x26,
|
||||
PC_6_ALT0 = PC_6 | ALT0, // same pin used for alternate HW
|
||||
PC_7 = 0x27,
|
||||
PC_7_ALT0 = PC_7 | ALT0, // same pin used for alternate HW
|
||||
PC_8 = 0x28,
|
||||
PC_8_ALT0 = PC_8 | ALT0, // same pin used for alternate HW
|
||||
PC_9 = 0x29,
|
||||
PC_9_ALT0 = PC_9 | ALT0, // same pin used for alternate HW
|
||||
PC_10 = 0x2A,
|
||||
PC_10_ALT0 = PC_10 | ALT0, // same pin used for alternate HW
|
||||
PC_11 = 0x2B,
|
||||
PC_11_ALT0 = PC_11 | ALT0, // same pin used for alternate HW
|
||||
PC_12 = 0x2C,
|
||||
PC_13 = 0x2D,
|
||||
PC_14 = 0x2E,
|
||||
PC_15 = 0x2F,
|
||||
PD_0 = 0x30,
|
||||
PD_1 = 0x31,
|
||||
PD_2 = 0x32,
|
||||
PD_3 = 0x33,
|
||||
PD_4 = 0x34,
|
||||
PD_5 = 0x35,
|
||||
PD_6 = 0x36,
|
||||
PD_7 = 0x37,
|
||||
PD_8 = 0x38,
|
||||
PD_9 = 0x39,
|
||||
PD_10 = 0x3A,
|
||||
PD_11 = 0x3B,
|
||||
PD_12 = 0x3C,
|
||||
PD_13 = 0x3D,
|
||||
PD_14 = 0x3E,
|
||||
PD_15 = 0x3F,
|
||||
PE_0 = 0x40,
|
||||
PE_1 = 0x41,
|
||||
PE_2 = 0x42,
|
||||
PE_3 = 0x43,
|
||||
PE_4 = 0x44,
|
||||
PE_5 = 0x45,
|
||||
PE_6 = 0x46,
|
||||
PE_7 = 0x47,
|
||||
PE_8 = 0x48,
|
||||
PE_9 = 0x49,
|
||||
PE_10 = 0x4A,
|
||||
PE_11 = 0x4B,
|
||||
PE_12 = 0x4C,
|
||||
PE_13 = 0x4D,
|
||||
PE_14 = 0x4E,
|
||||
PE_15 = 0x4F,
|
||||
PH_0 = 0x70,
|
||||
PH_1 = 0x71,
|
||||
PH_3 = 0x73,
|
||||
|
||||
/**** ADC internal channels ****/
|
||||
|
||||
ADC_TEMP = 0xF0, // Internal pin virtual value
|
||||
ADC_VREF = 0xF1, // Internal pin virtual value
|
||||
ADC_VBAT = 0xF2, // Internal pin virtual value
|
||||
|
||||
// Arduino Uno(Rev3) Header pin connection naming
|
||||
A0 = PC_5,
|
||||
A1 = PC_4,
|
||||
A2 = PC_3,
|
||||
A3 = PC_2,
|
||||
A4 = PC_1,
|
||||
A5 = PC_0,
|
||||
D0 = PA_1,
|
||||
D1 = PA_0,
|
||||
D2 = PD_14,
|
||||
D3 = PB_0,
|
||||
D4 = PA_3,
|
||||
D5 = PB_4,
|
||||
D6 = PB_1,
|
||||
D7 = PA_4,
|
||||
D8 = PB_2,
|
||||
D9 = PA_15,
|
||||
D10= PA_2,
|
||||
D11= PA_7,
|
||||
D12= PA_6,
|
||||
D13= PA_5,
|
||||
D14= PB_9,
|
||||
D15= PB_8,
|
||||
|
||||
// STDIO for console print
|
||||
#ifdef MBED_CONF_TARGET_STDIO_UART_TX
|
||||
STDIO_UART_TX = MBED_CONF_TARGET_STDIO_UART_TX,
|
||||
#else
|
||||
STDIO_UART_TX = PB_6,
|
||||
#endif
|
||||
#ifdef MBED_CONF_TARGET_STDIO_UART_RX
|
||||
STDIO_UART_RX = MBED_CONF_TARGET_STDIO_UART_RX,
|
||||
#else
|
||||
STDIO_UART_RX = PB_7,
|
||||
#endif
|
||||
|
||||
USBTX = STDIO_UART_TX, // used for greentea tests
|
||||
USBRX = STDIO_UART_RX, // used for greentea tests
|
||||
|
||||
// I2C signals aliases
|
||||
I2C_SDA = D14,
|
||||
I2C_SCL = D15,
|
||||
|
||||
// SPI signals aliases
|
||||
SPI_CS = D10,
|
||||
SPI_MOSI = D11,
|
||||
SPI_MISO = D12,
|
||||
SPI_SCK = D13,
|
||||
|
||||
// Standardized LED and button names
|
||||
LED1 = PA_5,
|
||||
LED2 = LED1,
|
||||
BUTTON1 = PB_1, /* RESET STATE */
|
||||
|
||||
// Backward legacy names
|
||||
USER_BUTTON = BUTTON1,
|
||||
PWM_OUT = D3,
|
||||
|
||||
/**** USB FS pins ****/
|
||||
USB_OTG_FS_DM = PA_11,
|
||||
USB_OTG_FS_DP = PA_12,
|
||||
USB_OTG_FS_ID = PA_10,
|
||||
USB_OTG_FS_NOE = PA_13,
|
||||
USB_OTG_FS_NOE_ALT0 = PC_9,
|
||||
USB_OTG_FS_SOF = PA_8,
|
||||
USB_OTG_FS_SOF_ALT0 = PA_14,
|
||||
USB_OTG_FS_VBUS = PA_9,
|
||||
|
||||
/**** OSCILLATOR pins ****/
|
||||
RCC_OSC32_IN = PC_14,
|
||||
RCC_OSC32_OUT = PC_15,
|
||||
RCC_OSC_IN = PH_0,
|
||||
RCC_OSC_OUT = PH_1,
|
||||
|
||||
/**** DEBUG pins ****/
|
||||
SYS_JTCK_SWCLK = PA_14,
|
||||
SYS_JTDI = PA_15,
|
||||
SYS_JTDO_SWO = PB_3,
|
||||
SYS_JTMS_SWDIO = PA_13,
|
||||
SYS_JTRST = PB_4,
|
||||
SYS_PVD_IN = PB_7,
|
||||
SYS_TRACECLK = PE_2,
|
||||
SYS_TRACED0 = PE_3,
|
||||
SYS_TRACED0_ALT0 = PC_1,
|
||||
SYS_TRACED0_ALT1 = PC_9,
|
||||
SYS_TRACED1 = PE_4,
|
||||
SYS_TRACED1_ALT0 = PC_10,
|
||||
SYS_TRACED2 = PE_5,
|
||||
SYS_TRACED2_ALT0 = PD_2,
|
||||
SYS_TRACED3 = PE_6,
|
||||
SYS_TRACED3_ALT0 = PC_12,
|
||||
SYS_WKUP1 = PA_0,
|
||||
SYS_WKUP2 = PC_13,
|
||||
SYS_WKUP3 = PE_6,
|
||||
SYS_WKUP4 = PA_2,
|
||||
SYS_WKUP5 = PC_5,
|
||||
|
||||
/**** QSPI FLASH pins ****/
|
||||
QSPI_FLASH1_IO0 = PE_12,
|
||||
QSPI_FLASH1_IO1 = PE_13,
|
||||
QSPI_FLASH1_IO2 = PE_14,
|
||||
QSPI_FLASH1_IO3 = PE_15,
|
||||
QSPI_FLASH1_SCK = PE_10,
|
||||
QSPI_FLASH1_CSN = PE_11,
|
||||
|
||||
// Not connected
|
||||
NC = (int)0xFFFFFFFF
|
||||
} PinName;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,293 @@
|
|||
/* mbed Microcontroller Library
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
******************************************************************************
|
||||
*
|
||||
* Copyright (c) 2016-2020 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* This file configures the system clock as follows:
|
||||
*-----------------------------------------------------------------------------
|
||||
* System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock)
|
||||
* | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal)
|
||||
* | 3- USE_PLL_HSI (internal 16 MHz)
|
||||
* | 4- USE_PLL_MSI (internal 100kHz to 48 MHz)
|
||||
*-----------------------------------------------------------------------------
|
||||
* SYSCLK(MHz) | 120
|
||||
* AHBCLK (MHz) | 120
|
||||
* APB1CLK (MHz) | 120
|
||||
* APB2CLK (MHz) | 120
|
||||
* USB capable | YES
|
||||
*-----------------------------------------------------------------------------
|
||||
**/
|
||||
|
||||
#include "stm32l4xx.h"
|
||||
#include "mbed_assert.h"
|
||||
|
||||
// clock source is selected with CLOCK_SOURCE in json config
|
||||
#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO - not enabled by default)
|
||||
#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default)
|
||||
#define USE_PLL_HSI 0x2 // Use HSI internal clock
|
||||
#define USE_PLL_MSI 0x1 // Use MSI internal clock
|
||||
|
||||
#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
|
||||
uint8_t SetSysClock_PLL_HSE(uint8_t bypass);
|
||||
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
|
||||
|
||||
#if ((CLOCK_SOURCE) & USE_PLL_HSI)
|
||||
uint8_t SetSysClock_PLL_HSI(void);
|
||||
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
|
||||
|
||||
#if ((CLOCK_SOURCE) & USE_PLL_MSI)
|
||||
uint8_t SetSysClock_PLL_MSI(void);
|
||||
#endif /* ((CLOCK_SOURCE) & USE_PLL_MSI) */
|
||||
|
||||
|
||||
/**
|
||||
* @brief Configures the System clock source, PLL Multiplier and Divider factors,
|
||||
* AHB/APBx prescalers and Flash settings
|
||||
* @note This function is called in mbed_sdk_init() and hal_deepsleep() functions
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
|
||||
void SetSysClock(void)
|
||||
{
|
||||
#if ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC)
|
||||
/* 1- Try to start with HSE and external clock */
|
||||
if (SetSysClock_PLL_HSE(1) == 0)
|
||||
#endif
|
||||
{
|
||||
#if ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL)
|
||||
/* 2- If fail try to start with HSE and external xtal */
|
||||
if (SetSysClock_PLL_HSE(0) == 0)
|
||||
#endif
|
||||
{
|
||||
#if ((CLOCK_SOURCE) & USE_PLL_HSI)
|
||||
/* 3- If fail start with HSI clock */
|
||||
if (SetSysClock_PLL_HSI() == 0)
|
||||
#endif
|
||||
{
|
||||
#if ((CLOCK_SOURCE) & USE_PLL_MSI)
|
||||
/* 4- If fail start with MSI clock */
|
||||
if (SetSysClock_PLL_MSI() == 0)
|
||||
#endif
|
||||
{
|
||||
while (1) {
|
||||
MBED_ASSERT(1);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
|
||||
/******************************************************************************/
|
||||
/* PLL (clocked by HSE) used as System clock source */
|
||||
/******************************************************************************/
|
||||
uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
|
||||
{
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||
RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
|
||||
|
||||
// Used to gain time after DeepSleep in case HSI is used
|
||||
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
// Select MSI as system clock source to allow modification of the PLL configuration
|
||||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
|
||||
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
|
||||
|
||||
// Enable HSE oscillator and activate PLL with HSE as source
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI;
|
||||
if (bypass == 0) {
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
|
||||
} else {
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
|
||||
}
|
||||
RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; // 8 MHz
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLM = 1; // VCO input clock = 8 MHz (8 MHz / 1)
|
||||
RCC_OscInitStruct.PLL.PLLN = 30; // VCO output clock = 240 MHz (8 MHz * 30)
|
||||
RCC_OscInitStruct.PLL.PLLP = 7;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 2;
|
||||
RCC_OscInitStruct.PLL.PLLR = 2; // PLL clock = 120 MHz (240 MHz / 2)
|
||||
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
||||
return 0; // FAIL
|
||||
}
|
||||
|
||||
// Select PLL clock as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
|
||||
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 120 MHz
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 120 MHz
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; // 120 MHz
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 120 MHz
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
|
||||
return 0; // FAIL
|
||||
}
|
||||
|
||||
#if DEVICE_USBDEVICE
|
||||
RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
|
||||
RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
|
||||
RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSE;
|
||||
RCC_PeriphClkInit.PLLSAI1.PLLSAI1M = 1;
|
||||
RCC_PeriphClkInit.PLLSAI1.PLLSAI1N = 12; // 96 MHz
|
||||
RCC_PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV7;
|
||||
RCC_PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2; // 48 MHz
|
||||
RCC_PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2;
|
||||
RCC_PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_48M2CLK;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
|
||||
return 0; // FAIL
|
||||
}
|
||||
#endif /* DEVICE_USBDEVICE */
|
||||
|
||||
// Disable MSI Oscillator
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
|
||||
RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
|
||||
HAL_RCC_OscConfig(&RCC_OscInitStruct);
|
||||
|
||||
return 1; // OK
|
||||
}
|
||||
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
|
||||
|
||||
#if ((CLOCK_SOURCE) & USE_PLL_HSI)
|
||||
/******************************************************************************/
|
||||
/* PLL (clocked by HSI) used as System clock source */
|
||||
/******************************************************************************/
|
||||
uint8_t SetSysClock_PLL_HSI(void)
|
||||
{
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||
RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
|
||||
|
||||
// Select MSI as system clock source to allow modification of the PLL configuration
|
||||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
|
||||
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
|
||||
|
||||
// Enable HSI oscillator and activate PLL with HSI as source
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
|
||||
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
||||
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; // 16 MHz
|
||||
RCC_OscInitStruct.PLL.PLLM = 2; // VCO input clock = 8 MHz (16 MHz / 2)
|
||||
RCC_OscInitStruct.PLL.PLLN = 30; // VCO output clock = 240 MHz (8 MHz * 30)
|
||||
RCC_OscInitStruct.PLL.PLLP = 7;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 2;
|
||||
RCC_OscInitStruct.PLL.PLLR = 2; // PLL clock = 120 MHz (240 MHz / 2)
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
||||
return 0; // FAIL
|
||||
}
|
||||
|
||||
// Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
|
||||
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 120 MHz
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 120 MHz
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; // 120 MHz
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 120 MHz
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
|
||||
return 0; // FAIL
|
||||
}
|
||||
|
||||
#if DEVICE_USBDEVICE
|
||||
RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
|
||||
RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
|
||||
RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSI;
|
||||
RCC_PeriphClkInit.PLLSAI1.PLLSAI1M = 2;
|
||||
RCC_PeriphClkInit.PLLSAI1.PLLSAI1N = 12;
|
||||
RCC_PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV7;
|
||||
RCC_PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2;
|
||||
RCC_PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2;
|
||||
RCC_PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_48M2CLK;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
|
||||
return 0; // FAIL
|
||||
}
|
||||
#endif /* DEVICE_USBDEVICE */
|
||||
|
||||
// Disable MSI Oscillator
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
|
||||
RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
|
||||
HAL_RCC_OscConfig(&RCC_OscInitStruct);
|
||||
|
||||
return 1; // OK
|
||||
}
|
||||
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
|
||||
|
||||
#if ((CLOCK_SOURCE) & USE_PLL_MSI)
|
||||
/******************************************************************************/
|
||||
/* PLL (clocked by MSI) used as System clock source */
|
||||
/******************************************************************************/
|
||||
uint8_t SetSysClock_PLL_MSI(void)
|
||||
{
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
||||
|
||||
// Enable LSE Oscillator to automatically calibrate the MSI clock
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
|
||||
RCC_OscInitStruct.LSEState = RCC_LSE_ON; // External 32.768 kHz clock on OSC_IN/OSC_OUT
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
|
||||
RCC->CR |= RCC_CR_MSIPLLEN; // Enable MSI PLL-mode
|
||||
}
|
||||
|
||||
HAL_RCCEx_DisableLSECSS();
|
||||
/* Enable MSI Oscillator and activate PLL with MSI as source */
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
|
||||
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
|
||||
RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
|
||||
RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
|
||||
RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11; /* 48 MHz */
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
|
||||
RCC_OscInitStruct.PLL.PLLM = 6; /* 8 MHz */
|
||||
RCC_OscInitStruct.PLL.PLLN = 30; /* 240 MHz */
|
||||
RCC_OscInitStruct.PLL.PLLP = 5; /* 48 MHz */
|
||||
RCC_OscInitStruct.PLL.PLLQ = 2; /* 120 MHz */
|
||||
RCC_OscInitStruct.PLL.PLLR = 2; /* 120 MHz */
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
||||
return 0; // FAIL
|
||||
}
|
||||
/* Enable MSI Auto-calibration through LSE */
|
||||
HAL_RCCEx_EnableMSIPLLMode();
|
||||
|
||||
#if DEVICE_USBDEVICE
|
||||
/* Select MSI output as USB clock source */
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
|
||||
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */
|
||||
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
|
||||
#endif /* DEVICE_USBDEVICE */
|
||||
|
||||
// Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
|
||||
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; /* 120 MHz */
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; /* 120 MHz */
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; /* 120 MHz */
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; /* 120 MHz */
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
|
||||
return 0; // FAIL
|
||||
}
|
||||
|
||||
return 1; // OK
|
||||
}
|
||||
#endif /* ((CLOCK_SOURCE) & USE_PLL_MSI) */
|
||||
|
|
@ -3333,6 +3333,35 @@
|
|||
"mbed_ram_start": "0x20000000",
|
||||
"mbed_ram_size": "0x40000"
|
||||
},
|
||||
"B_L4S5I_IOT01A": {
|
||||
"inherits": [
|
||||
"MCU_STM32L4"
|
||||
],
|
||||
"components_add": [
|
||||
"QSPIF",
|
||||
"FLASHIAP"
|
||||
],
|
||||
"supported_form_factors": [
|
||||
"ARDUINO",
|
||||
"PMOD"
|
||||
],
|
||||
"extra_labels_add": [
|
||||
"MX25R6435F",
|
||||
"STM32L4S5xI"
|
||||
],
|
||||
"macros_add": [
|
||||
"HSE_VALUE=8000000",
|
||||
"STM32L4S5xx"
|
||||
],
|
||||
"detect_code": [
|
||||
"0885"
|
||||
],
|
||||
"device_has_add": [
|
||||
"USBDEVICE",
|
||||
"QSPI"
|
||||
],
|
||||
"device_name": "STM32L4S5VITx"
|
||||
},
|
||||
"MCU_STM32L5": {
|
||||
"inherits": [
|
||||
"MCU_STM32"
|
||||
|
|
|
|||
Loading…
Reference in New Issue