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[NUCLEO_L152RE] Cleanup in available ports/pins

pull/150/head
bcostm 2014-01-13 10:27:47 +01:00
parent bef6fdf339
commit cbfdc4e26d
5 changed files with 26 additions and 141 deletions
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67
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/PinNames.h
View File

@ -106,77 +106,10 @@ typedef enum {
PC_14 = 0x2E,
PC_15 = 0x2F,
PD_0 = 0x30,
PD_1 = 0x31,
PD_2 = 0x32,
PD_3 = 0x33,
PD_4 = 0x34,
PD_5 = 0x35,
PD_6 = 0x36,
PD_7 = 0x37,
PD_8 = 0x38,
PD_9 = 0x39,
PD_10 = 0x3A,
PD_11 = 0x3B,
PD_12 = 0x3C,
PD_13 = 0x3D,
PD_14 = 0x3E,
PD_15 = 0x3F,
PE_0 = 0x40,
PE_1 = 0x41,
PE_2 = 0x42,
PE_3 = 0x43,
PE_4 = 0x44,
PE_5 = 0x45,
PE_6 = 0x46,
PE_7 = 0x47,
PE_8 = 0x48,
PE_9 = 0x49,
PE_10 = 0x4A,
PE_11 = 0x4B,
PE_12 = 0x4C,
PE_13 = 0x4D,
PE_14 = 0x4E,
PE_15 = 0x4F,
PF_0 = 0x50,
PF_1 = 0x51,
PF_2 = 0x52,
PF_3 = 0x53,
PF_4 = 0x54,
PF_5 = 0x55,
PF_6 = 0x56,
PF_7 = 0x57,
PF_8 = 0x58,
PF_9 = 0x59,
PF_10 = 0x5A,
PF_11 = 0x5B,
PF_12 = 0x5C,
PF_13 = 0x5D,
PF_14 = 0x5E,
PF_15 = 0x5F,
PG_0 = 0x60,
PG_1 = 0x61,
PG_2 = 0x62,
PG_3 = 0x63,
PG_4 = 0x64,
PG_5 = 0x65,
PG_6 = 0x66,
PG_7 = 0x67,
PG_8 = 0x68,
PG_9 = 0x69,
PG_10 = 0x6A,
PG_11 = 0x6B,
PG_12 = 0x6C,
PG_13 = 0x6D,
PG_14 = 0x6E,
PG_15 = 0x6F,
PH_0 = 0x70,
PH_1 = 0x71,
PH_2 = 0x72,
// Arduino connector namings
A0 = PA_0,

3
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/PortNames.h
View File

@ -39,9 +39,6 @@ typedef enum {
PortB = 1,
PortC = 2,
PortD = 3,
PortE = 4,
PortF = 5,
PortG = 6,
PortH = 7
} PortName;

21
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/gpio_api.c
View File

@ -44,33 +44,24 @@ void gpio_init(gpio_t *obj, PinName pin, PinDirection direction) {
if (pin == NC) return;
// Get GPIO structure base address
uint32_t pin_number = (uint32_t)pin;
uint32_t port_index = (pin_number >> 4);
// Get GPIO structure base address
switch (port_index) {
case 0:
case PortA:
gpio = (GPIO_TypeDef *)GPIOA_BASE;
break;
case 1:
case PortB:
gpio = (GPIO_TypeDef *)GPIOB_BASE;
break;
case 2:
case PortC:
gpio = (GPIO_TypeDef *)GPIOC_BASE;
break;
case 3:
case PortD:
gpio = (GPIO_TypeDef *)GPIOD_BASE;
break;
case 4:
gpio = (GPIO_TypeDef *)GPIOE_BASE;
break;
case 5:
gpio = (GPIO_TypeDef *)GPIOF_BASE;
break;
case 6:
gpio = (GPIO_TypeDef *)GPIOG_BASE;
break;
case 7:
case PortH:
gpio = (GPIO_TypeDef *)GPIOH_BASE;
break;
default:

54
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/pinmap.c
View File

@ -45,41 +45,29 @@ void pin_function(PinName pin, int data) {
uint32_t pupd = STM_PIN_PUPD(data);
uint32_t afnum = STM_PIN_AFNUM(data);
// Get GPIO structure base address and enable clock
uint32_t pin_number = (uint32_t)pin;
uint32_t pin_index = (pin_number & 0xF);
uint32_t port_index = (pin_number >> 4);
// Get GPIO structure base address and enable clock
switch (port_index) {
case 0:
case PortA:
gpio = (GPIO_TypeDef *)GPIOA_BASE;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
break;
case 1:
case PortB:
gpio = (GPIO_TypeDef *)GPIOB_BASE;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);
break;
case 2:
case PortC:
gpio = (GPIO_TypeDef *)GPIOC_BASE;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOC, ENABLE);
break;
case 3:
case PortD:
gpio = (GPIO_TypeDef *)GPIOD_BASE;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOD, ENABLE);
break;
case 4:
gpio = (GPIO_TypeDef *)GPIOE_BASE;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOE, ENABLE);
break;
case 5:
gpio = (GPIO_TypeDef *)GPIOF_BASE;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOF, ENABLE);
break;
case 6:
gpio = (GPIO_TypeDef *)GPIOG_BASE;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOG, ENABLE);
break;
case 7:
case PortH:
gpio = (GPIO_TypeDef *)GPIOH_BASE;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOH, ENABLE);
break;
@ -120,42 +108,30 @@ void pin_mode(PinName pin, PinMode mode) {
if (pin == NC) return;
// Get GPIO structure base address and enable clock
uint32_t pin_number = (uint32_t)pin;
uint32_t port_index = (pin_number >> 4);
// Get GPIO structure base address and enable clock
switch (port_index) {
case 0:
case PortA:
gpio = (GPIO_TypeDef *)GPIOA_BASE;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
break;
case 1:
case PortB:
gpio = (GPIO_TypeDef *)GPIOB_BASE;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);
break;
case 2:
case PortC:
gpio = (GPIO_TypeDef *)GPIOC_BASE;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOC, ENABLE);
break;
case 3:
case PortD:
gpio = (GPIO_TypeDef *)GPIOD_BASE;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOD, ENABLE);
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOD, ENABLE);
break;
case 4:
gpio = (GPIO_TypeDef *)GPIOE_BASE;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOE, ENABLE);
break;
case 5:
gpio = (GPIO_TypeDef *)GPIOF_BASE;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOF, ENABLE);
break;
case 6:
gpio = (GPIO_TypeDef *)GPIOG_BASE;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOG, ENABLE);
break;
case 7:
case PortH:
gpio = (GPIO_TypeDef *)GPIOH_BASE;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOH, ENABLE);
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOH, ENABLE);
break;
default:
error("GPIO port number is not correct.");

22
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/port_api.c
View File

@ -47,35 +47,23 @@ void port_init(port_t *obj, PortName port, int mask, PinDirection dir) {
// Get GPIO structure base address and enable clock
switch (port_index) {
case 0:
case PortA:
gpio = (GPIO_TypeDef *)GPIOA_BASE;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
break;
case 1:
case PortB:
gpio = (GPIO_TypeDef *)GPIOB_BASE;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);
break;
case 2:
case PortC:
gpio = (GPIO_TypeDef *)GPIOC_BASE;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOC, ENABLE);
break;
case 3:
case PortD:
gpio = (GPIO_TypeDef *)GPIOD_BASE;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOD, ENABLE);
break;
case 4:
gpio = (GPIO_TypeDef *)GPIOE_BASE;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOE, ENABLE);
break;
case 5:
gpio = (GPIO_TypeDef *)GPIOF_BASE;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOF, ENABLE);
break;
case 6:
gpio = (GPIO_TypeDef *)GPIOG_BASE;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOG, ENABLE);
break;
case 7:
case PortH:
gpio = (GPIO_TypeDef *)GPIOH_BASE;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOH, ENABLE);
break;