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MXRT1050: Update Flexspi driver to move functions to RAM 

These functions are used to READ/WRITE to the Flexspi NOR

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
pull/14326/head
Mahesh Mahadevan 2019-10-28 11:26:16 -05:00 committed by Arto Kinnunen
parent aa05cf81d2
commit c55096e167
2 changed files with 25 additions and 17 deletions
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14
targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_flexspi.c
View File

@ -78,7 +78,7 @@ uint32_t FLEXSPI_GetInstance(FLEXSPI_Type *base);
* @param base FLEXSPI base pointer. * @param base FLEXSPI base pointer.
* @param config Flash configuration parameters. * @param config Flash configuration parameters.
*/ */
static uint32_t FLEXSPI_ConfigureDll(FLEXSPI_Type *base, flexspi_device_config_t *config); AT_QUICKACCESS_SECTION_CODE(static uint32_t FLEXSPI_ConfigureDll(FLEXSPI_Type *base, flexspi_device_config_t *config));
/*! /*!
* @brief Check and clear IP command execution errors. * @brief Check and clear IP command execution errors.
@ -86,7 +86,7 @@ static uint32_t FLEXSPI_ConfigureDll(FLEXSPI_Type *base, flexspi_device_config_t
* @param base FLEXSPI base pointer. * @param base FLEXSPI base pointer.
* @param status interrupt status. * @param status interrupt status.
*/ */
status_t FLEXSPI_CheckAndClearError(FLEXSPI_Type *base, uint32_t status); AT_QUICKACCESS_SECTION_CODE(status_t FLEXSPI_CheckAndClearError(FLEXSPI_Type *base, uint32_t status));
/******************************************************************************* /*******************************************************************************
* Variables * Variables
@ -164,7 +164,7 @@ static uint32_t FLEXSPI_ConfigureDll(FLEXSPI_Type *base, flexspi_device_config_t
} }
break; break;
default: default:
assert(false); //assert(false);
break; break;
} }
@ -216,7 +216,7 @@ status_t FLEXSPI_CheckAndClearError(FLEXSPI_Type *base, uint32_t status)
} }
else else
{ {
assert(false); //assert(false);
} }
/* Clear the flags. */ /* Clear the flags. */
@ -246,7 +246,9 @@ void FLEXSPI_Init(FLEXSPI_Type *base, const flexspi_config_t *config)
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
/* Enable the flexspi clock */ /* Enable the flexspi clock */
CLOCK_EnableClock(s_flexspiClock[FLEXSPI_GetInstance(base)]); //CLOCK_EnableClock(s_flexspiClock[FLEXSPI_GetInstance(base)]);
/* Access the register directly to avoid warnings accessing non ran functions */
CCM->CCGR6 |= CCM_CCGR6_CG5_MASK;
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */ #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
#if defined(FSL_FEATURE_FLEXSPI_HAS_RESET) && FSL_FEATURE_FLEXSPI_HAS_RESET #if defined(FSL_FEATURE_FLEXSPI_HAS_RESET) && FSL_FEATURE_FLEXSPI_HAS_RESET
@ -497,7 +499,7 @@ void FLEXSPI_SetFlashConfig(FLEXSPI_Type *base, flexspi_device_config_t *config,
*/ */
void FLEXSPI_UpdateLUT(FLEXSPI_Type *base, uint32_t index, const uint32_t *cmd, uint32_t count) void FLEXSPI_UpdateLUT(FLEXSPI_Type *base, uint32_t index, const uint32_t *cmd, uint32_t count)
{ {
assert(index < 64U); //assert(index < 64U);
uint8_t i = 0; uint8_t i = 0;
volatile uint32_t *lutBase; volatile uint32_t *lutBase;

28
targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_flexspi.h
View File

@ -346,14 +346,14 @@ extern "C" {
* @param base FLEXSPI peripheral base address. * @param base FLEXSPI peripheral base address.
* @param config FLEXSPI configure structure. * @param config FLEXSPI configure structure.
*/ */
void FLEXSPI_Init(FLEXSPI_Type *base, const flexspi_config_t *config); AT_QUICKACCESS_SECTION_CODE(void FLEXSPI_Init(FLEXSPI_Type *base, const flexspi_config_t *config));
/*! /*!
* @brief Gets default settings for FLEXSPI. * @brief Gets default settings for FLEXSPI.
* *
* @param config FLEXSPI configuration structure. * @param config FLEXSPI configuration structure.
*/ */
void FLEXSPI_GetDefaultConfig(flexspi_config_t *config); AT_QUICKACCESS_SECTION_CODE(void FLEXSPI_GetDefaultConfig(flexspi_config_t *config));
/*! /*!
* @brief Deinitializes the FLEXSPI module. * @brief Deinitializes the FLEXSPI module.
@ -374,7 +374,9 @@ void FLEXSPI_Deinit(FLEXSPI_Type *base);
* @param config Flash configuration parameters. * @param config Flash configuration parameters.
* @param port FLEXSPI Operation port. * @param port FLEXSPI Operation port.
*/ */
void FLEXSPI_SetFlashConfig(FLEXSPI_Type *base, flexspi_device_config_t *config, flexspi_port_t port); AT_QUICKACCESS_SECTION_CODE(void FLEXSPI_SetFlashConfig(FLEXSPI_Type *base,
flexspi_device_config_t *config,
flexspi_port_t port));
/*! /*!
* @brief Software reset for the FLEXSPI logic. * @brief Software reset for the FLEXSPI logic.
@ -384,7 +386,7 @@ void FLEXSPI_SetFlashConfig(FLEXSPI_Type *base, flexspi_device_config_t *config,
* *
* @param base FLEXSPI peripheral base address. * @param base FLEXSPI peripheral base address.
*/ */
static inline void FLEXSPI_SoftwareReset(FLEXSPI_Type *base) AT_QUICKACCESS_SECTION_CODE(static inline void FLEXSPI_SoftwareReset(FLEXSPI_Type *base))
{ {
base->MCR0 |= FLEXSPI_MCR0_SWRESET_MASK; base->MCR0 |= FLEXSPI_MCR0_SWRESET_MASK;
while (0U != (base->MCR0 & FLEXSPI_MCR0_SWRESET_MASK)) while (0U != (base->MCR0 & FLEXSPI_MCR0_SWRESET_MASK))
@ -398,7 +400,7 @@ static inline void FLEXSPI_SoftwareReset(FLEXSPI_Type *base)
* @param base FLEXSPI peripheral base address. * @param base FLEXSPI peripheral base address.
* @param enable True means enable FLEXSPI, false means disable. * @param enable True means enable FLEXSPI, false means disable.
*/ */
static inline void FLEXSPI_Enable(FLEXSPI_Type *base, bool enable) AT_QUICKACCESS_SECTION_CODE(static inline void FLEXSPI_Enable(FLEXSPI_Type *base, bool enable))
{ {
if (enable) if (enable)
{ {
@ -568,7 +570,7 @@ static inline uint32_t FLEXSPI_GetInterruptStatusFlags(FLEXSPI_Type *base)
* @param base FLEXSPI peripheral base address. * @param base FLEXSPI peripheral base address.
* @param interrupt status flag. * @param interrupt status flag.
*/ */
static inline void FLEXSPI_ClearInterruptStatusFlags(FLEXSPI_Type *base, uint32_t mask) AT_QUICKACCESS_SECTION_CODE(static inline void FLEXSPI_ClearInterruptStatusFlags(FLEXSPI_Type *base, uint32_t mask))
{ {
base->INTR |= mask; base->INTR |= mask;
} }
@ -637,7 +639,7 @@ static inline flexspi_ahb_error_code_t FLEXSPI_GetAHBCommandErrorCode(FLEXSPI_Ty
* @retval true Bus is idle. * @retval true Bus is idle.
* @retval false Bus is busy. * @retval false Bus is busy.
*/ */
static inline bool FLEXSPI_GetBusIdleStatus(FLEXSPI_Type *base) AT_QUICKACCESS_SECTION_CODE(static inline bool FLEXSPI_GetBusIdleStatus(FLEXSPI_Type *base))
{ {
return (0U != (base->STS0 & FLEXSPI_STS0_ARBIDLE_MASK)) && (0U != (base->STS0 & FLEXSPI_STS0_SEQIDLE_MASK)); return (0U != (base->STS0 & FLEXSPI_STS0_ARBIDLE_MASK)) && (0U != (base->STS0 & FLEXSPI_STS0_SEQIDLE_MASK));
} }
@ -698,7 +700,8 @@ static inline void FLEXSPI_EnableAHBParallelMode(FLEXSPI_Type *base, bool enable
* @param cmd Command sequence array. * @param cmd Command sequence array.
* @param count Number of sequences. * @param count Number of sequences.
*/ */
void FLEXSPI_UpdateLUT(FLEXSPI_Type *base, uint32_t index, const uint32_t *cmd, uint32_t count); AT_QUICKACCESS_SECTION_CODE(void FLEXSPI_UpdateLUT(FLEXSPI_Type *base, uint32_t index,
const uint32_t *cmd, uint32_t count));
/*! /*!
* @brief Writes data into FIFO. * @brief Writes data into FIFO.
@ -735,7 +738,8 @@ static inline uint32_t FLEXSPI_ReadData(FLEXSPI_Type *base, uint8_t fifoIndex)
* @retval kStatus_FLEXSPI_IpCommandSequenceError IP command sequence error detected * @retval kStatus_FLEXSPI_IpCommandSequenceError IP command sequence error detected
* @retval kStatus_FLEXSPI_IpCommandGrantTimeout IP command grant timeout detected * @retval kStatus_FLEXSPI_IpCommandGrantTimeout IP command grant timeout detected
*/ */
status_t FLEXSPI_WriteBlocking(FLEXSPI_Type *base, uint32_t *buffer, size_t size); AT_QUICKACCESS_SECTION_CODE(status_t FLEXSPI_WriteBlocking(FLEXSPI_Type *base,
uint32_t *buffer, size_t size));
/*! /*!
* @brief Receives a buffer of data bytes using a blocking method. * @brief Receives a buffer of data bytes using a blocking method.
@ -748,7 +752,8 @@ status_t FLEXSPI_WriteBlocking(FLEXSPI_Type *base, uint32_t *buffer, size_t size
* @retval kStatus_FLEXSPI_IpCommandSequenceError IP command sequencen error detected * @retval kStatus_FLEXSPI_IpCommandSequenceError IP command sequencen error detected
* @retval kStatus_FLEXSPI_IpCommandGrantTimeout IP command grant timeout detected * @retval kStatus_FLEXSPI_IpCommandGrantTimeout IP command grant timeout detected
*/ */
status_t FLEXSPI_ReadBlocking(FLEXSPI_Type *base, uint32_t *buffer, size_t size); AT_QUICKACCESS_SECTION_CODE(status_t FLEXSPI_ReadBlocking(FLEXSPI_Type *base,
uint32_t *buffer, size_t size));
/*! /*!
* @brief Execute command to transfer a buffer data bytes using a blocking method. * @brief Execute command to transfer a buffer data bytes using a blocking method.
@ -759,7 +764,8 @@ status_t FLEXSPI_ReadBlocking(FLEXSPI_Type *base, uint32_t *buffer, size_t size)
* @retval kStatus_FLEXSPI_IpCommandSequenceError IP command sequence error detected * @retval kStatus_FLEXSPI_IpCommandSequenceError IP command sequence error detected
* @retval kStatus_FLEXSPI_IpCommandGrantTimeout IP command grant timeout detected * @retval kStatus_FLEXSPI_IpCommandGrantTimeout IP command grant timeout detected
*/ */
status_t FLEXSPI_TransferBlocking(FLEXSPI_Type *base, flexspi_transfer_t *xfer); AT_QUICKACCESS_SECTION_CODE(status_t FLEXSPI_TransferBlocking(FLEXSPI_Type *base,
flexspi_transfer_t *xfer));
/*! @} */ /*! @} */
/*! /*!