From c55096e1674cbd42b7564bb2d3f8b759774aac07 Mon Sep 17 00:00:00 2001 From: Mahesh Mahadevan Date: Mon, 28 Oct 2019 11:26:16 -0500 Subject: [PATCH] MXRT1050: Update Flexspi driver to move functions to RAM These functions are used to READ/WRITE to the Flexspi NOR Signed-off-by: Mahesh Mahadevan --- .../TARGET_MIMXRT1050/drivers/fsl_flexspi.c | 14 ++++++---- .../TARGET_MIMXRT1050/drivers/fsl_flexspi.h | 28 +++++++++++-------- 2 files changed, 25 insertions(+), 17 deletions(-) diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_flexspi.c b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_flexspi.c index 2080e6e574..c925526dc4 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_flexspi.c +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_flexspi.c @@ -78,7 +78,7 @@ uint32_t FLEXSPI_GetInstance(FLEXSPI_Type *base); * @param base FLEXSPI base pointer. * @param config Flash configuration parameters. */ -static uint32_t FLEXSPI_ConfigureDll(FLEXSPI_Type *base, flexspi_device_config_t *config); +AT_QUICKACCESS_SECTION_CODE(static uint32_t FLEXSPI_ConfigureDll(FLEXSPI_Type *base, flexspi_device_config_t *config)); /*! * @brief Check and clear IP command execution errors. @@ -86,7 +86,7 @@ static uint32_t FLEXSPI_ConfigureDll(FLEXSPI_Type *base, flexspi_device_config_t * @param base FLEXSPI base pointer. * @param status interrupt status. */ -status_t FLEXSPI_CheckAndClearError(FLEXSPI_Type *base, uint32_t status); +AT_QUICKACCESS_SECTION_CODE(status_t FLEXSPI_CheckAndClearError(FLEXSPI_Type *base, uint32_t status)); /******************************************************************************* * Variables @@ -164,7 +164,7 @@ static uint32_t FLEXSPI_ConfigureDll(FLEXSPI_Type *base, flexspi_device_config_t } break; default: - assert(false); + //assert(false); break; } @@ -216,7 +216,7 @@ status_t FLEXSPI_CheckAndClearError(FLEXSPI_Type *base, uint32_t status) } else { - assert(false); + //assert(false); } /* Clear the flags. */ @@ -246,7 +246,9 @@ void FLEXSPI_Init(FLEXSPI_Type *base, const flexspi_config_t *config) #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) /* Enable the flexspi clock */ - CLOCK_EnableClock(s_flexspiClock[FLEXSPI_GetInstance(base)]); + //CLOCK_EnableClock(s_flexspiClock[FLEXSPI_GetInstance(base)]); + /* Access the register directly to avoid warnings accessing non ran functions */ + CCM->CCGR6 |= CCM_CCGR6_CG5_MASK; #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */ #if defined(FSL_FEATURE_FLEXSPI_HAS_RESET) && FSL_FEATURE_FLEXSPI_HAS_RESET @@ -497,7 +499,7 @@ void FLEXSPI_SetFlashConfig(FLEXSPI_Type *base, flexspi_device_config_t *config, */ void FLEXSPI_UpdateLUT(FLEXSPI_Type *base, uint32_t index, const uint32_t *cmd, uint32_t count) { - assert(index < 64U); + //assert(index < 64U); uint8_t i = 0; volatile uint32_t *lutBase; diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_flexspi.h b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_flexspi.h index c84226bb3c..2b1e7ac2fe 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_flexspi.h +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_flexspi.h @@ -346,14 +346,14 @@ extern "C" { * @param base FLEXSPI peripheral base address. * @param config FLEXSPI configure structure. */ -void FLEXSPI_Init(FLEXSPI_Type *base, const flexspi_config_t *config); +AT_QUICKACCESS_SECTION_CODE(void FLEXSPI_Init(FLEXSPI_Type *base, const flexspi_config_t *config)); /*! * @brief Gets default settings for FLEXSPI. * * @param config FLEXSPI configuration structure. */ -void FLEXSPI_GetDefaultConfig(flexspi_config_t *config); +AT_QUICKACCESS_SECTION_CODE(void FLEXSPI_GetDefaultConfig(flexspi_config_t *config)); /*! * @brief Deinitializes the FLEXSPI module. @@ -374,7 +374,9 @@ void FLEXSPI_Deinit(FLEXSPI_Type *base); * @param config Flash configuration parameters. * @param port FLEXSPI Operation port. */ -void FLEXSPI_SetFlashConfig(FLEXSPI_Type *base, flexspi_device_config_t *config, flexspi_port_t port); +AT_QUICKACCESS_SECTION_CODE(void FLEXSPI_SetFlashConfig(FLEXSPI_Type *base, + flexspi_device_config_t *config, + flexspi_port_t port)); /*! * @brief Software reset for the FLEXSPI logic. @@ -384,7 +386,7 @@ void FLEXSPI_SetFlashConfig(FLEXSPI_Type *base, flexspi_device_config_t *config, * * @param base FLEXSPI peripheral base address. */ -static inline void FLEXSPI_SoftwareReset(FLEXSPI_Type *base) +AT_QUICKACCESS_SECTION_CODE(static inline void FLEXSPI_SoftwareReset(FLEXSPI_Type *base)) { base->MCR0 |= FLEXSPI_MCR0_SWRESET_MASK; while (0U != (base->MCR0 & FLEXSPI_MCR0_SWRESET_MASK)) @@ -398,7 +400,7 @@ static inline void FLEXSPI_SoftwareReset(FLEXSPI_Type *base) * @param base FLEXSPI peripheral base address. * @param enable True means enable FLEXSPI, false means disable. */ -static inline void FLEXSPI_Enable(FLEXSPI_Type *base, bool enable) +AT_QUICKACCESS_SECTION_CODE(static inline void FLEXSPI_Enable(FLEXSPI_Type *base, bool enable)) { if (enable) { @@ -568,7 +570,7 @@ static inline uint32_t FLEXSPI_GetInterruptStatusFlags(FLEXSPI_Type *base) * @param base FLEXSPI peripheral base address. * @param interrupt status flag. */ -static inline void FLEXSPI_ClearInterruptStatusFlags(FLEXSPI_Type *base, uint32_t mask) +AT_QUICKACCESS_SECTION_CODE(static inline void FLEXSPI_ClearInterruptStatusFlags(FLEXSPI_Type *base, uint32_t mask)) { base->INTR |= mask; } @@ -637,7 +639,7 @@ static inline flexspi_ahb_error_code_t FLEXSPI_GetAHBCommandErrorCode(FLEXSPI_Ty * @retval true Bus is idle. * @retval false Bus is busy. */ -static inline bool FLEXSPI_GetBusIdleStatus(FLEXSPI_Type *base) +AT_QUICKACCESS_SECTION_CODE(static inline bool FLEXSPI_GetBusIdleStatus(FLEXSPI_Type *base)) { return (0U != (base->STS0 & FLEXSPI_STS0_ARBIDLE_MASK)) && (0U != (base->STS0 & FLEXSPI_STS0_SEQIDLE_MASK)); } @@ -698,7 +700,8 @@ static inline void FLEXSPI_EnableAHBParallelMode(FLEXSPI_Type *base, bool enable * @param cmd Command sequence array. * @param count Number of sequences. */ -void FLEXSPI_UpdateLUT(FLEXSPI_Type *base, uint32_t index, const uint32_t *cmd, uint32_t count); +AT_QUICKACCESS_SECTION_CODE(void FLEXSPI_UpdateLUT(FLEXSPI_Type *base, uint32_t index, + const uint32_t *cmd, uint32_t count)); /*! * @brief Writes data into FIFO. @@ -735,7 +738,8 @@ static inline uint32_t FLEXSPI_ReadData(FLEXSPI_Type *base, uint8_t fifoIndex) * @retval kStatus_FLEXSPI_IpCommandSequenceError IP command sequence error detected * @retval kStatus_FLEXSPI_IpCommandGrantTimeout IP command grant timeout detected */ -status_t FLEXSPI_WriteBlocking(FLEXSPI_Type *base, uint32_t *buffer, size_t size); +AT_QUICKACCESS_SECTION_CODE(status_t FLEXSPI_WriteBlocking(FLEXSPI_Type *base, + uint32_t *buffer, size_t size)); /*! * @brief Receives a buffer of data bytes using a blocking method. @@ -748,7 +752,8 @@ status_t FLEXSPI_WriteBlocking(FLEXSPI_Type *base, uint32_t *buffer, size_t size * @retval kStatus_FLEXSPI_IpCommandSequenceError IP command sequencen error detected * @retval kStatus_FLEXSPI_IpCommandGrantTimeout IP command grant timeout detected */ -status_t FLEXSPI_ReadBlocking(FLEXSPI_Type *base, uint32_t *buffer, size_t size); +AT_QUICKACCESS_SECTION_CODE(status_t FLEXSPI_ReadBlocking(FLEXSPI_Type *base, + uint32_t *buffer, size_t size)); /*! * @brief Execute command to transfer a buffer data bytes using a blocking method. @@ -759,7 +764,8 @@ status_t FLEXSPI_ReadBlocking(FLEXSPI_Type *base, uint32_t *buffer, size_t size) * @retval kStatus_FLEXSPI_IpCommandSequenceError IP command sequence error detected * @retval kStatus_FLEXSPI_IpCommandGrantTimeout IP command grant timeout detected */ -status_t FLEXSPI_TransferBlocking(FLEXSPI_Type *base, flexspi_transfer_t *xfer); +AT_QUICKACCESS_SECTION_CODE(status_t FLEXSPI_TransferBlocking(FLEXSPI_Type *base, + flexspi_transfer_t *xfer)); /*! @} */ /*!