mirror of https://github.com/ARMmbed/mbed-os.git
Update upstream pushed files
parent
1970328da3
commit
c08208fe4f
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/* Linker script to configure memory regions. */
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 64K
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RAM (rwx) : ORIGIN = 0x100000C0, LENGTH = 0x1F40
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USB_RAM (rwx): ORIGIN = 0x20004000, LENGTH = 0x800
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}
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/* Linker script to place sections and symbol values. Should be used together
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* with other linker script that defines memory regions FLASH and RAM.
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* It references following symbols, which must be defined in code:
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* Reset_Handler : Entry of reset handler
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*
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* It defines following symbols, which code can use without definition:
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* __exidx_start
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* __exidx_end
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* __etext
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* __data_start__
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* __preinit_array_start
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* __preinit_array_end
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* __init_array_start
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* __init_array_end
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* __fini_array_start
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* __fini_array_end
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* __data_end__
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* __bss_start__
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* __bss_end__
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* __end__
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* end
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* __HeapLimit
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* __StackLimit
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* __StackTop
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* __stack
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*/
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ENTRY(Reset_Handler)
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SECTIONS
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{
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.text :
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{
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KEEP(*(.isr_vector))
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*(.text.Reset_Handler)
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/* Only vectors and code running at reset are safe to be in first 512
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bytes since RAM can be mapped into this area for RAM based interrupt
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vectors. */
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. = 0x00000200;
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*(.text*)
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KEEP(*(.init))
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KEEP(*(.fini))
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/* .ctors */
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*crtbegin.o(.ctors)
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*crtbegin?.o(.ctors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
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*(SORT(.ctors.*))
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*(.ctors)
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/* .dtors */
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*crtbegin.o(.dtors)
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*crtbegin?.o(.dtors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
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*(SORT(.dtors.*))
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*(.dtors)
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*(.rodata*)
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KEEP(*(.eh_frame*))
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} > FLASH
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > FLASH
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__exidx_start = .;
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > FLASH
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__exidx_end = .;
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__etext = .;
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.data : AT (__etext)
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{
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__data_start__ = .;
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*(vtable)
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*(.data*)
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. = ALIGN(4);
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/* preinit data */
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PROVIDE (__preinit_array_start = .);
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KEEP(*(.preinit_array))
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PROVIDE (__preinit_array_end = .);
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. = ALIGN(4);
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/* init data */
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PROVIDE (__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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PROVIDE (__init_array_end = .);
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. = ALIGN(4);
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/* finit data */
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PROVIDE (__fini_array_start = .);
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KEEP(*(SORT(.fini_array.*)))
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KEEP(*(.fini_array))
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PROVIDE (__fini_array_end = .);
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. = ALIGN(4);
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/* All data end */
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__data_end__ = .;
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} > RAM
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.bss :
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{
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__bss_start__ = .;
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*(.bss*)
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*(COMMON)
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__bss_end__ = .;
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} > RAM
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.heap :
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{
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__end__ = .;
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end = __end__;
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*(.heap*)
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__HeapLimit = .;
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} > RAM
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/* .stack_dummy section doesn't contains any symbols. It is only
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* used for linker to calculate size of stack sections, and assign
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* values to stack symbols later */
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.stack_dummy :
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{
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*(.stack)
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} > RAM
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/* Set stack top to end of RAM, and stack limit move down by
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* size of stack_dummy section */
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__StackTop = ORIGIN(RAM) + LENGTH(RAM);
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__StackLimit = __StackTop - SIZEOF(.stack_dummy);
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PROVIDE(__stack = __StackTop);
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/* Check if data + heap + stack exceeds RAM limit */
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ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
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}
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@ -0,0 +1,150 @@
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/* mbed Microcontroller Library
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* Copyright (c) 2013 Nordic Semiconductor
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MBED_PINNAMES_H
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#define MBED_PINNAMES_H
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#include "cmsis.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum {
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PIN_INPUT,
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PIN_OUTPUT
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} PinDirection;
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#define PORT_SHIFT 3
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typedef enum {
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p0 = 0,
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p1 = 1,
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p2 = 2,
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p3 = 3,
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p4 = 4,
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p5 = 5,
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p6 = 6,
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p7 = 7,
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p8 = 8,
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p9 = 9,
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p10 = 10,
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p11 = 11,
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p12 = 12,
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p13 = 13,
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p14 = 14,
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p15 = 15,
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p16 = 16,
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p17 = 17,
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p18 = 18,
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p19 = 19,
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p20 = 20,
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p21 = 21,
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p22 = 22,
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p23 = 23,
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p24 = 24,
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p25 = 25,
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p26 = 26,
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p27 = 27,
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p28 = 28,
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p29 = 29,
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p30 = 30,
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p31 = 31,
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p32 = 32,
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p33 = 33,
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p34 = 34,
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p35 = 35,
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// p31=31,
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// Not connected
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NC = (int)0xFFFFFFFF,
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P0_0 = p0,
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P0_1 = p1,
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P0_2 = p2,
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P0_3 = p3,
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P0_4 = p4,
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P0_5 = p5,
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P0_6 = p6,
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P0_7 = p7,
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P0_8 = p8,
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P0_9 = p9,
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P0_10 = p10,
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P0_11 = p11,
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P0_12 = p12,
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P0_13 = p13,
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P0_14 = p14,
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P0_15 = p15,
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P0_16 = p16,
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P0_17 = p17,
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P0_18 = p18,
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P0_19 = p19,
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P0_20 = p20,
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P0_21 = p21,
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P0_22 = p22,
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P0_23 = p23,
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P0_24 = p24,
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P0_25 = p25,
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P0_26 = p26,
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P0_27 = p27,
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P0_28 = p28,
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P0_29 = p29,
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P0_30 = p30,
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LED = p30,
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LED1 = p30,
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LED2 = p0,
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LED3 = p8,
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LED4 = NC,
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BUTTON1 = p29,
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BUTTON2 = p17,
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RX_PIN_NUMBER = p2,
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TX_PIN_NUMBER = p3,
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CTS_PIN_NUMBER = p11,
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RTS_PIN_NUMBER = p21,
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// mBed interface Pins
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USBTX = TX_PIN_NUMBER,
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USBRX = RX_PIN_NUMBER,
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SPIS_PSELMOSI = p12,
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SPIS_PSELMISO = p6,
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SPIS_PSELSCK = p9,
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I2C_SDA0 = p17,
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I2C_SCL0 = p18,
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} PinName;
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typedef enum {
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PullNone = 0,
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PullDown = 1,
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PullUp = 3,
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PullDefault = PullUp
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} PinMode;
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#ifdef __cplusplus
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}
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#endif
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#endif
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@ -0,0 +1,57 @@
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/* mbed Microcontroller Library
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* Copyright (c) 2006-2013 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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||||||
|
* You may obtain a copy of the License at
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||||||
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*
|
||||||
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
|
||||||
|
* distributed under the License is distributed on an "AS IS" BASIS,
|
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|
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
* See the License for the specific language governing permissions and
|
||||||
|
* limitations under the License.
|
||||||
|
*/
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||||||
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#ifndef MBED_DEVICE_H
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#define MBED_DEVICE_H
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#define DEVICE_PORTIN 1
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#define DEVICE_PORTOUT 1
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#define DEVICE_PORTINOUT 1
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#define DEVICE_INTERRUPTIN 1
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#define DEVICE_ANALOGIN 1
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#define DEVICE_ANALOGOUT 0
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#define DEVICE_SERIAL 1
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#define DEVICE_I2C 1
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#define DEVICE_I2CSLAVE 0
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#define DEVICE_SPI 1
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#define DEVICE_SPISLAVE 1
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||||||
|
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||||||
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#define DEVICE_CAN 0
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||||||
|
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||||||
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#define DEVICE_RTC 0
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|
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||||||
|
#define DEVICE_ETHERNET 0
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||||||
|
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||||||
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#define DEVICE_PWMOUT 1
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|
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#define DEVICE_SEMIHOST 0
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||||||
|
#define DEVICE_LOCALFILESYSTEM 0
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||||||
|
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||||||
|
#define DEVICE_SLEEP 1
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||||||
|
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||||||
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#define DEVICE_DEBUG_AWARENESS 0
|
||||||
|
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||||||
|
#define DEVICE_STDIO_MESSAGES 0
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||||||
|
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||||||
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#define DEVICE_ERROR_PATTERN 1
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||||||
|
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||||||
|
#include "objects.h"
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|
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||||||
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#endif
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@ -0,0 +1,140 @@
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/* mbed Microcontroller Library
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||||||
|
* Copyright (c) 2006-2014 ARM Limited
|
||||||
|
*
|
||||||
|
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
|
* you may not use this file except in compliance with the License.
|
||||||
|
* You may obtain a copy of the License at
|
||||||
|
*
|
||||||
|
* http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
*
|
||||||
|
* Unless required by applicable law or agreed to in writing, software
|
||||||
|
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
|
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
* See the License for the specific language governing permissions and
|
||||||
|
* limitations under the License.
|
||||||
|
*/
|
||||||
|
#ifndef MBED_PINNAMES_H
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||||||
|
#define MBED_PINNAMES_H
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||||||
|
|
||||||
|
#include "cmsis.h"
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||||||
|
|
||||||
|
#ifdef __cplusplus
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||||||
|
extern "C" {
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||||||
|
#endif
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
PIN_INPUT,
|
||||||
|
PIN_OUTPUT
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||||||
|
} PinDirection;
|
||||||
|
|
||||||
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#define PORT_SHIFT 5
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||||||
|
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||||||
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typedef enum {
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// LPC11U Pin Names
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P0_0 = 0,
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||||||
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P0_1 = 1,
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||||||
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P0_2 = 2,
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||||||
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P0_3 = 3,
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||||||
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P0_4 = 4,
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||||||
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P0_5 = 5,
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P0_6 = 6,
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P0_7 = 7,
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||||||
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P0_8 = 8,
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||||||
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P0_9 = 9,
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||||||
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P0_10 = 10,
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||||||
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P0_11 = 11,
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||||||
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P0_12 = 12,
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||||||
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P0_13 = 13,
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P0_14 = 14,
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||||||
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P0_15 = 15,
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||||||
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P0_16 = 16,
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||||||
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P0_17 = 17,
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||||||
|
P0_18 = 18,
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||||||
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P0_19 = 19,
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||||||
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P0_20 = 20,
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||||||
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P0_21 = 21,
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||||||
|
P0_22 = 22,
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||||||
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P0_23 = 23,
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||||||
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P0_24 = 24,
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||||||
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P0_25 = 25,
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||||||
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P0_26 = 26,
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||||||
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P0_27 = 27,
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||||||
|
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||||||
|
P1_0 = 32,
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||||||
|
P1_1 = 33,
|
||||||
|
P1_2 = 34,
|
||||||
|
P1_3 = 35,
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||||||
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P1_4 = 36,
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||||||
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P1_5 = 37,
|
||||||
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P1_6 = 38,
|
||||||
|
P1_7 = 39,
|
||||||
|
P1_8 = 40,
|
||||||
|
P1_9 = 41,
|
||||||
|
P1_10 = 42,
|
||||||
|
P1_11 = 43,
|
||||||
|
P1_12 = 44,
|
||||||
|
P1_13 = 45,
|
||||||
|
P1_14 = 46,
|
||||||
|
P1_15 = 47,
|
||||||
|
P1_16 = 48,
|
||||||
|
P1_17 = 49,
|
||||||
|
P1_18 = 50,
|
||||||
|
P1_19 = 51,
|
||||||
|
P1_20 = 52,
|
||||||
|
P1_21 = 53,
|
||||||
|
P1_22 = 54,
|
||||||
|
P1_23 = 55,
|
||||||
|
P1_24 = 56,
|
||||||
|
P1_25 = 57,
|
||||||
|
P1_26 = 58,
|
||||||
|
P1_27 = 59,
|
||||||
|
P1_28 = 60,
|
||||||
|
P1_29 = 61,
|
||||||
|
|
||||||
|
P1_31 = 63,
|
||||||
|
|
||||||
|
// Not connected
|
||||||
|
NC = (int)0xFFFFFFFF,
|
||||||
|
|
||||||
|
// Other mbed Pin Names
|
||||||
|
LED1 = P0_20, //Approved
|
||||||
|
LED2 = P0_9, //Approved
|
||||||
|
LED3 = P0_11, //Approved
|
||||||
|
LED4 = NC,
|
||||||
|
|
||||||
|
UART_TX = P0_19,
|
||||||
|
UART_RX = P0_18,
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
// Standard but not supported pins
|
||||||
|
USBTX = NC,
|
||||||
|
USBRX = NC
|
||||||
|
|
||||||
|
} PinName;
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
CHANNEL0 = FLEX_INT0_IRQn,
|
||||||
|
CHANNEL1 = FLEX_INT1_IRQn,
|
||||||
|
CHANNEL2 = FLEX_INT2_IRQn,
|
||||||
|
CHANNEL3 = FLEX_INT3_IRQn,
|
||||||
|
CHANNEL4 = FLEX_INT4_IRQn,
|
||||||
|
CHANNEL5 = FLEX_INT5_IRQn,
|
||||||
|
CHANNEL6 = FLEX_INT6_IRQn,
|
||||||
|
CHANNEL7 = FLEX_INT7_IRQn
|
||||||
|
} Channel;
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
PullUp = 2,
|
||||||
|
PullDown = 1,
|
||||||
|
PullNone = 0,
|
||||||
|
Repeater = 3,
|
||||||
|
OpenDrain = 4,
|
||||||
|
PullDefault = PullDown
|
||||||
|
} PinMode;
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif
|
|
@ -0,0 +1,59 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
* Copyright (c) 2006-2013 ARM Limited
|
||||||
|
*
|
||||||
|
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
|
* you may not use this file except in compliance with the License.
|
||||||
|
* You may obtain a copy of the License at
|
||||||
|
*
|
||||||
|
* http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
*
|
||||||
|
* Unless required by applicable law or agreed to in writing, software
|
||||||
|
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
|
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
* See the License for the specific language governing permissions and
|
||||||
|
* limitations under the License.
|
||||||
|
*/
|
||||||
|
#ifndef MBED_DEVICE_H
|
||||||
|
#define MBED_DEVICE_H
|
||||||
|
|
||||||
|
#define DEVICE_PORTIN 1
|
||||||
|
#define DEVICE_PORTOUT 1
|
||||||
|
#define DEVICE_PORTINOUT 1
|
||||||
|
|
||||||
|
#define DEVICE_INTERRUPTIN 1
|
||||||
|
|
||||||
|
#define DEVICE_ANALOGIN 1
|
||||||
|
#define DEVICE_ANALOGOUT 0
|
||||||
|
|
||||||
|
#define DEVICE_SERIAL 1
|
||||||
|
|
||||||
|
#define DEVICE_I2C 1
|
||||||
|
#define DEVICE_I2CSLAVE 1
|
||||||
|
|
||||||
|
#define DEVICE_SPI 1
|
||||||
|
#define DEVICE_SPISLAVE 1
|
||||||
|
|
||||||
|
#define DEVICE_CAN 0
|
||||||
|
|
||||||
|
#define DEVICE_RTC 0
|
||||||
|
|
||||||
|
#define DEVICE_ETHERNET 0
|
||||||
|
|
||||||
|
#define DEVICE_PWMOUT 1
|
||||||
|
|
||||||
|
#define DEVICE_SEMIHOST 0
|
||||||
|
#define DEVICE_LOCALFILESYSTEM 0
|
||||||
|
#define DEVICE_ID_LENGTH 32
|
||||||
|
#define DEVICE_MAC_OFFSET 20
|
||||||
|
|
||||||
|
#define DEVICE_SLEEP 1
|
||||||
|
|
||||||
|
#define DEVICE_DEBUG_AWARENESS 0
|
||||||
|
|
||||||
|
#define DEVICE_STDIO_MESSAGES 0
|
||||||
|
|
||||||
|
#define DEVICE_ERROR_PATTERN 1
|
||||||
|
|
||||||
|
#include "objects.h"
|
||||||
|
|
||||||
|
#endif
|
|
@ -155,7 +155,7 @@
|
||||||
<SetRegEntry>
|
<SetRegEntry>
|
||||||
<Number>0</Number>
|
<Number>0</Number>
|
||||||
<Key>CMSIS_AGDI</Key>
|
<Key>CMSIS_AGDI</Key>
|
||||||
<Name>-X"MBED CMSIS-DAP" -U107002011FE6E019E2180F91 -O718 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -FO31 -FD20000000 -FC800 -FN1 -FF0nrf51xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF51822_xxAA$Flash\nrf51xxx.flm)</Name>
|
<Name>-X"MBED CMSIS-DAP" -U107002011FE6E019E2180F91 -O718 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -FO31 -FD20000000 -FC2000 -FN1 -FF0nrf51xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF51822_xxAA$Flash\nrf51xxx.flm)</Name>
|
||||||
</SetRegEntry>
|
</SetRegEntry>
|
||||||
</TargetDriverDllRegistry>
|
</TargetDriverDllRegistry>
|
||||||
<Breakpoint/>
|
<Breakpoint/>
|
||||||
|
|
|
@ -155,7 +155,7 @@
|
||||||
<SetRegEntry>
|
<SetRegEntry>
|
||||||
<Number>0</Number>
|
<Number>0</Number>
|
||||||
<Key>CMSIS_AGDI</Key>
|
<Key>CMSIS_AGDI</Key>
|
||||||
<Name>-X"MBED CMSIS-DAP" -U107002011FE6E019E2180F91 -O718 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -FO31 -FD20000000 -FC800 -FN1 -FF0nrf51xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF51822_xxAA$Flash\nrf51xxx.flm)</Name>
|
<Name>-X"MBED CMSIS-DAP" -U107002011FE6E019E2180F91 -O718 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -FO31 -FD20000000 -FC2000 -FN1 -FF0nrf51xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF51822_xxAA$Flash\nrf51xxx.flm)</Name>
|
||||||
</SetRegEntry>
|
</SetRegEntry>
|
||||||
</TargetDriverDllRegistry>
|
</TargetDriverDllRegistry>
|
||||||
<Breakpoint/>
|
<Breakpoint/>
|
||||||
|
|
|
@ -155,7 +155,7 @@
|
||||||
<SetRegEntry>
|
<SetRegEntry>
|
||||||
<Number>0</Number>
|
<Number>0</Number>
|
||||||
<Key>CMSIS_AGDI</Key>
|
<Key>CMSIS_AGDI</Key>
|
||||||
<Name>-X"MBED CMSIS-DAP" -U107002011FE6E019E2180F91 -O718 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -FO31 -FD20000000 -FC800 -FN1 -FF0nrf51xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF51822_xxAA$Flash\nrf51xxx.flm)</Name>
|
<Name>-X"MBED CMSIS-DAP" -U107002011FE6E019E2180F91 -O718 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -FO31 -FD20000000 -FC2000 -FN1 -FF0nrf51xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF51822_xxAA$Flash\nrf51xxx.flm)</Name>
|
||||||
</SetRegEntry>
|
</SetRegEntry>
|
||||||
</TargetDriverDllRegistry>
|
</TargetDriverDllRegistry>
|
||||||
<Breakpoint/>
|
<Breakpoint/>
|
||||||
|
|
|
@ -155,7 +155,7 @@
|
||||||
<SetRegEntry>
|
<SetRegEntry>
|
||||||
<Number>0</Number>
|
<Number>0</Number>
|
||||||
<Key>CMSIS_AGDI</Key>
|
<Key>CMSIS_AGDI</Key>
|
||||||
<Name>-X"MBED CMSIS-DAP" -U107002011FE6E019E2180F91 -O718 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -FO31 -FD20000000 -FC800 -FN1 -FF0nrf51xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF51822_xxAA$Flash\nrf51xxx.flm)</Name>
|
<Name>-X"MBED CMSIS-DAP" -U107002011FE6E019E2180F91 -O718 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -FO31 -FD20000000 -FC2000 -FN1 -FF0nrf51xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF51822_xxAA$Flash\nrf51xxx.flm)</Name>
|
||||||
</SetRegEntry>
|
</SetRegEntry>
|
||||||
</TargetDriverDllRegistry>
|
</TargetDriverDllRegistry>
|
||||||
<Breakpoint/>
|
<Breakpoint/>
|
||||||
|
|
|
@ -136,6 +136,14 @@ class LPC11U35_501(LPCTarget):
|
||||||
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR" , "IAR"]
|
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR" , "IAR"]
|
||||||
self.default_toolchain = "uARM"
|
self.default_toolchain = "uARM"
|
||||||
|
|
||||||
|
class LPC11U35_Y5_MBUG(LPCTarget):
|
||||||
|
def __init__(self):
|
||||||
|
LPCTarget.__init__(self)
|
||||||
|
self.core = "Cortex-M0"
|
||||||
|
self.extra_labels = ['NXP', 'LPC11UXX', 'MCU_LPC11U35_501']
|
||||||
|
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR" , "IAR"]
|
||||||
|
self.default_toolchain = "uARM"
|
||||||
|
|
||||||
class LPC11U37_501(LPCTarget):
|
class LPC11U37_501(LPCTarget):
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
LPCTarget.__init__(self)
|
LPCTarget.__init__(self)
|
||||||
|
@ -742,6 +750,12 @@ class RBLAB_BLENANO(NRF51822):
|
||||||
self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K']
|
self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K']
|
||||||
self.macros = ['TARGET_NRF51822']
|
self.macros = ['TARGET_NRF51822']
|
||||||
|
|
||||||
|
class NRF51822_Y5_MBUG(NRF51822):
|
||||||
|
def __init__(self):
|
||||||
|
NRF51822.__init__(self)
|
||||||
|
self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K']
|
||||||
|
self.macros = ['TARGET_NRF51822']
|
||||||
|
|
||||||
class XADOW_M0(LPCTarget):
|
class XADOW_M0(LPCTarget):
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
LPCTarget.__init__(self)
|
LPCTarget.__init__(self)
|
||||||
|
@ -794,6 +808,7 @@ TARGETS = [
|
||||||
LPC11U24_301(),
|
LPC11U24_301(),
|
||||||
LPC11U35_401(),
|
LPC11U35_401(),
|
||||||
LPC11U35_501(),
|
LPC11U35_501(),
|
||||||
|
LPC11U35_Y5_MBUG(),
|
||||||
LPC11U37_501(),
|
LPC11U37_501(),
|
||||||
LPCCAPPUCCINO(),# LPC11U37_501
|
LPCCAPPUCCINO(),# LPC11U37_501
|
||||||
ARCH_GPRS(), # LPC11U37_501
|
ARCH_GPRS(), # LPC11U37_501
|
||||||
|
@ -859,6 +874,7 @@ TARGETS = [
|
||||||
HRM1017(), # nRF51822
|
HRM1017(), # nRF51822
|
||||||
RBLAB_NRF51822(),# nRF51822
|
RBLAB_NRF51822(),# nRF51822
|
||||||
RBLAB_BLENANO(),# nRF51822
|
RBLAB_BLENANO(),# nRF51822
|
||||||
|
NRF51822_Y5_MBUG(),#nRF51822
|
||||||
XADOW_M0(), # nRF51822
|
XADOW_M0(), # nRF51822
|
||||||
WALLBOT_BLE(), # nRF51822
|
WALLBOT_BLE(), # nRF51822
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue