mirror of https://github.com/ARMmbed/mbed-os.git
I2C, pullup
parent
c9a029ce6f
commit
b73b57db26
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@ -45,9 +45,8 @@ typedef enum {
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PWM_6 = (0 << TPM_SHIFT) | (5), // FTM0 CH5
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PWM_7 = (0 << TPM_SHIFT) | (6), // FTM0 CH6
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PWM_8 = (0 << TPM_SHIFT) | (7), // FTM0 CH7
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PWM_9 = (1 << TPM_SHIFT) | (0), // FTM1 CH0
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PWM_10 = (1 << TPM_SHIFT) | (1), // FTM1 CH1
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PWM_9 = (1 << TPM_SHIFT) | (0), // FTM1 CH0
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PWM_10 = (1 << TPM_SHIFT) | (1), // FTM1 CH1
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} PWMName;
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typedef enum {
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@ -235,10 +235,11 @@ typedef enum {
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NC = (int)0xFFFFFFFF
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} PinName;
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/* PullDown not available for KL05 */
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typedef enum {
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PullNone = 0,
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PullUp = 2,
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PullDown = 2,
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PullUp = 3,
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} PinMode;
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#ifdef __cplusplus
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@ -31,4 +31,5 @@ typedef enum {
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#ifdef __cplusplus
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}
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#endif
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#endif
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@ -20,25 +20,14 @@
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#include "error.h"
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static const PinMap PinMap_I2C_SDA[] = {
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{PTE25, I2C_0, 5},
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{PTC9, I2C_0, 2},
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{PTE0, I2C_0, 6},
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{PTB1, I2C_0, 2},
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{PTB3, I2C_0, 2},
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{PTC11, I2C_0, 2},
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{PTC2, I2C_0, 2},
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{PTA4, I2C_0, 2},
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{NC , NC , 0}
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};
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static const PinMap PinMap_I2C_SCL[] = {
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{PTE24, I2C_0, 5},
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{PTC8, I2C_0, 2},
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{PTE1, I2C_0, 6},
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{PTB0, I2C_0, 2},
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{PTB2, I2C_0, 2},
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{PTC10, I2C_0, 2},
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{PTC1, I2C_0, 2},
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{NC , NC, 0}
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};
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@ -66,15 +55,11 @@ void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
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I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
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I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
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obj->i2c = (I2C_Type*)pinmap_merge(i2c_sda, i2c_scl);
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if ((int)obj->i2c == NC) {
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if ((int)obj->i2c == NC)
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error("I2C pin mapping failed");
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}
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// enable power
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switch ((int)obj->i2c) {
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case I2C_0: SIM->SCGC5 |= 1 << 13; SIM->SCGC4 |= 1 << 6; break;
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//case I2C_1: SIM->SCGC5 |= 1 << 11; SIM->SCGC4 |= 1 << 7; break;
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}
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SIM->SCGC4 |= SIM_SCGC4_I2C0_MASK;
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SIM->SCGC5 |= SIM_SCGC5_PORTB_MASK;
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// set default frequency at 100k
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i2c_frequency(obj, 100000);
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@ -84,12 +69,12 @@ void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
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pinmap_pinout(sda, PinMap_I2C_SDA);
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pinmap_pinout(scl, PinMap_I2C_SCL);
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first_read = 1;
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}
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int i2c_start(i2c_t *obj) {
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uint8_t temp;
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uint32_t temp;
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volatile int i;
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// if we are in the middle of a transaction
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// activate the repeat_start flag
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@ -118,19 +103,20 @@ int i2c_stop(i2c_t *obj) {
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// when there is no waiting time after a STOP.
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// This wait is also included on the samples
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// code provided with the freedom board
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for (n = 0; n < 100; n++) __NOP();
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for (n = 0; n < 100; n++)
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__NOP();
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first_read = 1;
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return 0;
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}
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static int timeout_status_poll(i2c_t *obj, uint32_t mask) {
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uint32_t i, timeout = 1000;
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for (i = 0; i < timeout; i++) {
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if (obj->i2c->S & mask)
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return 0;
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}
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return 1;
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}
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@ -139,14 +125,14 @@ static int timeout_status_poll(i2c_t *obj, uint32_t mask) {
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// 1: OK ack not received
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// 2: failure
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static int i2c_wait_end_tx_transfer(i2c_t *obj) {
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// wait for the interrupt flag
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if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) {
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return 2;
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}
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obj->i2c->S |= I2C_S_IICIF_MASK;
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// wait transfer complete
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if (timeout_status_poll(obj, I2C_S_TCF_MASK)) {
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return 2;
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@ -164,9 +150,9 @@ static int i2c_wait_end_rx_transfer(i2c_t *obj) {
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if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) {
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return 1;
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}
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obj->i2c->S |= I2C_S_IICIF_MASK;
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return 0;
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}
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@ -301,33 +287,33 @@ void i2c_reset(i2c_t *obj) {
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int i2c_byte_read(i2c_t *obj, int last) {
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char data;
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// set rx mode
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obj->i2c->C1 &= ~I2C_C1_TX_MASK;
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if(first_read) {
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// first dummy read
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i2c_do_read(obj, &data, 0);
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first_read = 0;
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}
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if (last) {
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// set tx mode
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obj->i2c->C1 |= I2C_C1_TX_MASK;
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return obj->i2c->D;
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}
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i2c_do_read(obj, &data, last);
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return data;
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}
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int i2c_byte_write(i2c_t *obj, int data) {
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first_read = 1;
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// set tx mode
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obj->i2c->C1 |= I2C_C1_TX_MASK;
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return !i2c_do_write(obj, (data & 0xFF));
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}
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@ -348,10 +334,10 @@ int i2c_slave_receive(i2c_t *obj) {
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switch(obj->i2c->S) {
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// read addressed
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case 0xE6: return 1;
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// write addressed
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case 0xE2: return 3;
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default: return 0;
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}
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}
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@ -360,26 +346,26 @@ int i2c_slave_read(i2c_t *obj, char *data, int length) {
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uint8_t dummy_read;
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uint8_t * ptr;
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int count;
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// set rx mode
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obj->i2c->C1 &= ~I2C_C1_TX_MASK;
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// first dummy read
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dummy_read = obj->i2c->D;
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if(i2c_wait_end_rx_transfer(obj)) {
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return 0;
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}
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// read address
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dummy_read = obj->i2c->D;
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if(i2c_wait_end_rx_transfer(obj)) {
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return 0;
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}
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// read (length - 1) bytes
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for (count = 0; count < (length - 1); count++) {
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data[count] = obj->i2c->D;
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if(i2c_wait_end_rx_transfer(obj)) {
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if (i2c_wait_end_rx_transfer(obj)) {
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return count;
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}
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}
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@ -387,32 +373,32 @@ int i2c_slave_read(i2c_t *obj, char *data, int length) {
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// read last byte
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ptr = (length == 0) ? &dummy_read : (uint8_t *)&data[count];
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*ptr = obj->i2c->D;
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return (length) ? (count + 1) : 0;
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}
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int i2c_slave_write(i2c_t *obj, const char *data, int length) {
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int i, count = 0;
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// set tx mode
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obj->i2c->C1 |= I2C_C1_TX_MASK;
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for (i = 0; i < length; i++) {
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if(i2c_do_write(obj, data[count++]) == 2) {
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return i;
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}
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}
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// set rx mode
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obj->i2c->C1 &= ~I2C_C1_TX_MASK;
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// dummy rx transfer needed
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// otherwise the master cannot generate a stop bit
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obj->i2c->D;
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if(i2c_wait_end_rx_transfer(obj) == 2) {
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return count;
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}
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return count;
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}
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@ -17,7 +17,8 @@
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#include "error.h"
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void pin_function(PinName pin, int function) {
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if (pin == (PinName)NC) return;
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if (pin == (PinName)NC)
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return;
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uint32_t port_n = (uint32_t)pin >> PORT_SHIFT;
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uint32_t pin_n = (uint32_t)(pin & 0x7C) >> 2;
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@ -31,7 +31,7 @@ void rtc_init(void) {
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init();
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// Enable the oscillator
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RTC_CR |= RTC_CR_OSCE_MASK;
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RTC->CR |= RTC_CR_OSCE_MASK;
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//Configure the TSR. default value: 1
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RTC->TSR = 1;
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