mirror of https://github.com/ARMmbed/mbed-os.git
Cosmetic changes to incorporate review feedback
parent
4b32d29015
commit
acd1d51a77
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@ -1,5 +1,5 @@
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/* mbed Microcontroller Library
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/* mbed Microcontroller Library
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* Copyright (c) 2006-2013 ARM Limited
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* Copyright (c) 2018-2019 ARM Limited
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*
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* you may not use this file except in compliance with the License.
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@ -19,38 +19,50 @@
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#include "PeripheralPins.h"
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#include "PeripheralPins.h"
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#include "PinNames.h"
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#include "PinNames.h"
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#include "cmsis.h"
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#include "cmsis.h"
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#include <ti/devices/cc32xx/inc/hw_types.h>
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#include "ti/devices/cc32xx/inc/hw_types.h"
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#include <ti/devices/cc32xx/driverlib/adc.h>
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#include "ti/devices/cc32xx/driverlib/adc.h"
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#include <ti/devices/cc32xx/driverlib/prcm.h>
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#include "ti/devices/cc32xx/driverlib/prcm.h"
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#include <ti/devices/cc32xx/driverlib/pin.h>
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#include "ti/devices/cc32xx/driverlib/pin.h"
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#include <ti/devices/cc32xx/inc/hw_memmap.h>
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#include "ti/devices/cc32xx/inc/hw_memmap.h"
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#define ADC_DATA_MASK 0x3FFC //the data is from bit [13:2]
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#define ADC_DATA_MASK 0x3FFC //the data is from bit [13:2]
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#define ADC_RESOLUTION 0xFFF
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#define ADC_RESOLUTION 0xFFF
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void analogin_init(analogin_t *obj, PinName pin) {
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void analogin_init(analogin_t *obj, PinName pin)
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{
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ADCEnable(CC3220SF_ADC_BASE);
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ADCEnable(CC3220SF_ADC_BASE);
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obj->pin = pin;
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obj->pin = pin;
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pin_mode(pin, Analog);
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pin_mode(pin, Analog);
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switch(pin){
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switch (pin) {
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case PIN_57:obj->adc_ch = ADC_CH_0;break;
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case PIN_57:
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case PIN_58:obj->adc_ch = ADC_CH_1;break;
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obj->adc_ch = ADC_CH_0;
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case PIN_59:obj->adc_ch = ADC_CH_2;break;
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break;
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case PIN_60:obj->adc_ch = ADC_CH_3;break;
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case PIN_58:
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default: MBED_ASSERT(NC != (PinName)NC);
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obj->adc_ch = ADC_CH_1;
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break;
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case PIN_59:
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obj->adc_ch = ADC_CH_2;
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break;
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case PIN_60:
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obj->adc_ch = ADC_CH_3;
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break;
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default:
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MBED_ASSERT(NC != (PinName)NC);
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}
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}
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ADCChannelEnable(CC3220SF_ADC_BASE, obj->adc_ch);
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ADCChannelEnable(CC3220SF_ADC_BASE, obj->adc_ch);
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}
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}
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uint16_t analogin_read_u16(analogin_t *obj) {
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uint16_t analogin_read_u16(analogin_t *obj)
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{
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unsigned long adc_raw = ADCFIFORead(CC3220SF_ADC_BASE, obj->adc_ch);
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unsigned long adc_raw = ADCFIFORead(CC3220SF_ADC_BASE, obj->adc_ch);
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return (uint16_t) ((adc_raw & ADC_DATA_MASK) >> 2);
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return (uint16_t)((adc_raw & ADC_DATA_MASK) >> 2);
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}
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}
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float analogin_read(analogin_t *obj) {
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float analogin_read(analogin_t *obj)
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{
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uint16_t value = analogin_read_u16(obj);
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uint16_t value = analogin_read_u16(obj);
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return (float)value * (1.0f / (float)ADC_RESOLUTION);
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return (float)value * (1.0f / (float)ADC_RESOLUTION);
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}
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}
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@ -1,5 +1,5 @@
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/* mbed Microcontroller Library
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/* mbed Microcontroller Library
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* Copyright (c) 2018 ARM Limited
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* Copyright (c) 2018-2019 ARM Limited
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*
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* you may not use this file except in compliance with the License.
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@ -13,7 +13,7 @@
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* See the License for the specific language governing permissions and
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* See the License for the specific language governing permissions and
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* limitations under the License.
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* limitations under the License.
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*/
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*/
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#if DEVICE_FLASH
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#if DEVICE_FLASH
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#include "stdbool.h"
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#include "stdbool.h"
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@ -45,17 +45,14 @@ int32_t flash_erase_sector(flash_t *obj, uint32_t address)
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int32_t flash_program_page(flash_t *obj, uint32_t address, const uint8_t *data, uint32_t size)
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int32_t flash_program_page(flash_t *obj, uint32_t address, const uint8_t *data, uint32_t size)
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{
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{
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return FlashProgram((unsigned long *)data, (unsigned long)address,
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return FlashProgram((unsigned long *)data, (unsigned long)address,
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(unsigned long)size);
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(unsigned long)size);
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}
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}
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uint32_t flash_get_sector_size(const flash_t *obj, uint32_t address)
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uint32_t flash_get_sector_size(const flash_t *obj, uint32_t address)
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{
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{
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if ((address >= CC3200_FLASH_START_ADDRESS) && address < (CC3200_FLASH_START_ADDRESS + CC3200_FLASH_SIZE))
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if ((address >= CC3200_FLASH_START_ADDRESS) && address < (CC3200_FLASH_START_ADDRESS + CC3200_FLASH_SIZE)) {
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{
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return CC3200_FLASH_SECTOR_SIZE;
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return CC3200_FLASH_SECTOR_SIZE;
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}
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} else {
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else
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{
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return MBED_FLASH_INVALID_SIZE;
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return MBED_FLASH_INVALID_SIZE;
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}
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}
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}
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}
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@ -1,5 +1,5 @@
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/* mbed Microcontroller Library
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/* mbed Microcontroller Library
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* Copyright (c) 2006-2018 ARM Limited
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* Copyright (c) 2018-2019 ARM Limited
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*
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* you may not use this file except in compliance with the License.
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#include "pinmap.h"
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#include "pinmap.h"
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#include "PeripheralPins.h"
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#include "PeripheralPins.h"
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#include <ti/devices/cc32xx/inc/hw_types.h>
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#include "ti/devices/cc32xx/inc/hw_types.h"
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#include <ti/devices/cc32xx/driverlib/pin.h>
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#include "ti/devices/cc32xx/driverlib/pin.h"
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#include <ti/devices/cc32xx/driverlib/gpio.h>
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#include "ti/devices/cc32xx/driverlib/gpio.h"
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#include <ti/devices/cc32xx/inc/hw_ints.h>
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#include "ti/devices/cc32xx/inc/hw_ints.h"
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#include <ti/devices/cc32xx/driverlib/prcm.h>
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#include "ti/devices/cc32xx/driverlib/prcm.h"
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uint32_t gpio_set(PinName pin)
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uint32_t gpio_set(PinName pin)
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{
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{
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pin_function(pin, 0);
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pin_function(pin, 0);
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return (1);
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return (1);
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}
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}
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// function to initialise the gpio pin
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// function to initialise the gpio pin
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@ -37,17 +37,17 @@ uint32_t gpio_set(PinName pin)
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void gpio_init(gpio_t *obj, PinName pin)
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void gpio_init(gpio_t *obj, PinName pin)
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{
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{
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obj->pin = pin;
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obj->pin = pin;
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if (pin == (PinName)NC)
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if (pin == (PinName)NC) {
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return;
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return;
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}
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unsigned long gpio_base = (unsigned long)pinmap_peripheral(pin, PinMap_GPIO);
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unsigned long gpio_base = (unsigned long)pinmap_peripheral(pin, PinMap_GPIO);
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obj->baseAddr = gpio_base;
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obj->baseAddr = gpio_base;
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obj->pin_mask = 1<<(pinmap_find_function(pin, PinMap_GPIO)%8);
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obj->pin_mask = 1 << (pinmap_find_function(pin, PinMap_GPIO) % 8);
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// determine PRCM GPIO CLOCK index
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// determine PRCM GPIO CLOCK index
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unsigned short prcm_peripheral = 0;
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unsigned short prcm_peripheral = 0;
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switch (gpio_base)
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switch (gpio_base) {
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{
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case CC3220SF_GPIOA0_BASE:
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case CC3220SF_GPIOA0_BASE:
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prcm_peripheral = PRCM_GPIOA0;
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prcm_peripheral = PRCM_GPIOA0;
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break;
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break;
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@ -68,7 +68,7 @@ void gpio_init(gpio_t *obj, PinName pin)
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PRCMPeripheralClkEnable(prcm_peripheral, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK);
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PRCMPeripheralClkEnable(prcm_peripheral, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK);
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// wait for GPIO clock to settle
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// wait for GPIO clock to settle
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while(!PRCMPeripheralStatusGet(prcm_peripheral));
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while (!PRCMPeripheralStatusGet(prcm_peripheral));
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}
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}
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void gpio_mode(gpio_t *obj, PinMode mode)
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void gpio_mode(gpio_t *obj, PinMode mode)
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//set the pin mux to be GPIO which is PIN MODE 0
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//set the pin mux to be GPIO which is PIN MODE 0
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pin_mode(obj->pin, mode);
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pin_mode(obj->pin, mode);
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PinModeSet(obj->pin, PIN_MODE_0);
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PinModeSet(obj->pin, PIN_MODE_0);
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}
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}
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void gpio_dir(gpio_t *obj, PinDirection direction)
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void gpio_dir(gpio_t *obj, PinDirection direction)
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void gpio_write(gpio_t *obj, int value)
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void gpio_write(gpio_t *obj, int value)
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{
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{
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GPIOPinWrite(obj->baseAddr, obj->pin_mask, value*obj->pin_mask);
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GPIOPinWrite(obj->baseAddr, obj->pin_mask, value * obj->pin_mask);
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}
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}
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int gpio_read(gpio_t *obj)
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int gpio_read(gpio_t *obj)
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@ -1,5 +1,5 @@
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/* mbed Microcontroller Library
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/* mbed Microcontroller Library
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* Copyright (c) 2006-2013 ARM Limited
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* Copyright (c) 2018-2019 ARM Limited
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*
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* you may not use this file except in compliance with the License.
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@ -20,23 +20,23 @@
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#include "cmsis.h"
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#include "cmsis.h"
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#include "PeripheralPins.h"
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#include "PeripheralPins.h"
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#include <ti/devices/cc32xx/inc/hw_types.h>
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#include "ti/devices/cc32xx/inc/hw_types.h"
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#include <ti/devices/cc32xx/inc/hw_gpio.h>
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#include "ti/devices/cc32xx/inc/hw_gpio.h"
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#include <ti/devices/cc32xx/driverlib/gpio.h>
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#include "ti/devices/cc32xx/driverlib/gpio.h"
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#include <ti/devices/cc32xx/inc/hw_ints.h>
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#include "ti/devices/cc32xx/inc/hw_ints.h"
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#include <ti/devices/cc32xx/inc/hw_memmap.h>
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#include "ti/devices/cc32xx/inc/hw_memmap.h"
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#include <ti/devices/cc32xx/inc/hw_common_reg.h>
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#include "ti/devices/cc32xx/inc/hw_common_reg.h"
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#define CHANNEL_NUM 32
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#define CHANNEL_NUM 32
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static uint32_t channel_ids[CHANNEL_NUM] = {0};
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static uint32_t channel_ids[CHANNEL_NUM] = {0};
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static gpio_irq_handler irq_handler;
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static gpio_irq_handler irq_handler;
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static void handle_interrupt_in(unsigned long gpio_port) {
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static void handle_interrupt_in(unsigned long gpio_port)
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{
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uint32_t chan_base = 0;
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uint32_t chan_base = 0;
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switch ((unsigned long) gpio_port)
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switch ((unsigned long) gpio_port) {
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{
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case CC3220SF_GPIOA0_BASE:
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case CC3220SF_GPIOA0_BASE:
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chan_base = 0;
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chan_base = 0;
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break;
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break;
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}
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}
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uint16_t pin_mask = 0x01;
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uint16_t pin_mask = 0x01;
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for(int i = 0; i < 8; i++){
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for (int i = 0; i < 8; i++) {
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//checking for interrupt on each GPIO pin
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//checking for interrupt on each GPIO pin
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if((GPIOIntStatus((unsigned long)gpio_port, true) & pin_mask) > 0){
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if ((GPIOIntStatus((unsigned long)gpio_port, true) & pin_mask) > 0) {
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gpio_irq_event event = (gpio_irq_event)GPIOIntTypeGet((unsigned long)gpio_port, pin_mask);
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gpio_irq_event event = (gpio_irq_event)GPIOIntTypeGet((unsigned long)gpio_port, pin_mask);
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if(event == GPIO_RISING_EDGE){
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if (event == GPIO_RISING_EDGE) {
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event = IRQ_RISE;
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event = IRQ_RISE;
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}
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} else if (event == GPIO_FALLING_EDGE) {
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else if(event == GPIO_FALLING_EDGE){
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event = IRQ_FALL;
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event = IRQ_FALL;
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}
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}
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if(channel_ids[chan_base+i] == 0)
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if (channel_ids[chan_base + i] == 0) {
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continue;
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continue;
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}
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irq_handler(channel_ids[chan_base+i], (gpio_irq_event)event);
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irq_handler(channel_ids[chan_base + i], (gpio_irq_event)event);
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}
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}
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GPIOIntClear((unsigned long)gpio_port, pin_mask);
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GPIOIntClear((unsigned long)gpio_port, pin_mask);
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pin_mask = pin_mask<<1;
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pin_mask = pin_mask << 1;
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}
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}
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}
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}
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void gpio_irqA0(void) {
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void gpio_irqA0(void)
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{
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handle_interrupt_in(CC3220SF_GPIOA0_BASE);
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handle_interrupt_in(CC3220SF_GPIOA0_BASE);
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}
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}
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@ -98,21 +99,23 @@ void gpio_irqA3(void)
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handle_interrupt_in(CC3220SF_GPIOA3_BASE);
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handle_interrupt_in(CC3220SF_GPIOA3_BASE);
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}
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}
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int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
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int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
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if (pin == NC) return -1;
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{
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if (pin == NC) {
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return -1;
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}
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unsigned long gpio_base = (unsigned long)pinmap_peripheral(pin, PinMap_GPIO);
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unsigned long gpio_base = (unsigned long)pinmap_peripheral(pin, PinMap_GPIO);
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unsigned long ch_num = pinmap_find_function(pin, PinMap_GPIO);
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unsigned long ch_num = pinmap_find_function(pin, PinMap_GPIO);
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obj->baseAddr = gpio_base;
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obj->baseAddr = gpio_base;
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obj->pin = pin;
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obj->pin = pin;
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obj->ch = ch_num;
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obj->ch = ch_num;
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obj->pin_mask = 1<<(ch_num%8);
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obj->pin_mask = 1 << (ch_num % 8);
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irq_handler = handler;
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irq_handler = handler;
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uint32_t vector = (uint32_t)gpio_irqA0;
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uint32_t vector = (uint32_t)gpio_irqA0;
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switch (gpio_base)
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switch (gpio_base) {
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{
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case CC3220SF_GPIOA0_BASE:
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case CC3220SF_GPIOA0_BASE:
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vector = (uint32_t)gpio_irqA0;
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vector = (uint32_t)gpio_irqA0;
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obj->irq_offset = INT_GPIOA0_IRQn;
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obj->irq_offset = INT_GPIOA0_IRQn;
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@ -137,37 +140,43 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
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NVIC_DisableIRQ((IRQn_Type)obj->irq_offset);
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NVIC_DisableIRQ((IRQn_Type)obj->irq_offset);
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NVIC_SetVector((IRQn_Type)obj->irq_offset, vector);
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NVIC_SetVector((IRQn_Type)obj->irq_offset, vector);
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NVIC_EnableIRQ((IRQn_Type)obj->irq_offset);
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NVIC_EnableIRQ((IRQn_Type)obj->irq_offset);
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return 0;
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return 0;
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}
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}
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void gpio_irq_free(gpio_irq_t *obj) {
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void gpio_irq_free(gpio_irq_t *obj)
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{
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channel_ids[obj->ch] = 0;
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channel_ids[obj->ch] = 0;
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GPIOIntDisable(obj->baseAddr, obj->pin_mask);
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GPIOIntDisable(obj->baseAddr, obj->pin_mask);
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}
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}
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|
||||||
void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
|
void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
|
||||||
|
{
|
||||||
|
|
||||||
if(enable){
|
if (enable) {
|
||||||
GPIOIntEnable(obj->baseAddr, obj->pin_mask);
|
GPIOIntEnable(obj->baseAddr, obj->pin_mask);
|
||||||
}
|
} else {
|
||||||
else{
|
|
||||||
GPIOIntDisable(obj->baseAddr, obj->pin_mask);
|
GPIOIntDisable(obj->baseAddr, obj->pin_mask);
|
||||||
}
|
}
|
||||||
|
|
||||||
switch(event){
|
switch (event) {
|
||||||
case IRQ_RISE:GPIOIntTypeSet(obj->baseAddr,obj->pin_mask, GPIO_RISING_EDGE); break;
|
case IRQ_RISE:
|
||||||
case IRQ_FALL: GPIOIntTypeSet(obj->baseAddr,obj->pin_mask, GPIO_FALLING_EDGE); break;
|
GPIOIntTypeSet(obj->baseAddr, obj->pin_mask, GPIO_RISING_EDGE);
|
||||||
default: break;
|
break;
|
||||||
|
case IRQ_FALL:
|
||||||
|
GPIOIntTypeSet(obj->baseAddr, obj->pin_mask, GPIO_FALLING_EDGE);
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void gpio_irq_enable(gpio_irq_t *obj) {
|
void gpio_irq_enable(gpio_irq_t *obj)
|
||||||
|
{
|
||||||
GPIOIntEnable(obj->baseAddr, obj->pin_mask);
|
GPIOIntEnable(obj->baseAddr, obj->pin_mask);
|
||||||
}
|
}
|
||||||
|
|
||||||
void gpio_irq_disable(gpio_irq_t *obj) {
|
void gpio_irq_disable(gpio_irq_t *obj)
|
||||||
|
{
|
||||||
GPIOIntDisable(obj->baseAddr, obj->pin_mask);
|
GPIOIntDisable(obj->baseAddr, obj->pin_mask);
|
||||||
}
|
}
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/* mbed Microcontroller Library
|
/* mbed Microcontroller Library
|
||||||
* Copyright (c) 2006-2018 ARM Limited
|
* Copyright (c) 2018-2019 ARM Limited
|
||||||
*
|
*
|
||||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
* you may not use this file except in compliance with the License.
|
* you may not use this file except in compliance with the License.
|
||||||
|
@ -35,11 +35,11 @@
|
||||||
|
|
||||||
static bool rtc_inited = false;
|
static bool rtc_inited = false;
|
||||||
|
|
||||||
const ticker_info_t* lp_ticker_get_info()
|
const ticker_info_t *lp_ticker_get_info()
|
||||||
{
|
{
|
||||||
static const ticker_info_t info = {
|
static const ticker_info_t info = {
|
||||||
RTC_FREQ, // 32KHz
|
RTC_FREQ, // 32KHz
|
||||||
RTC_BITS // 32 bit counter
|
RTC_BITS // 32 bit counter
|
||||||
};
|
};
|
||||||
return &info;
|
return &info;
|
||||||
}
|
}
|
||||||
|
@ -47,7 +47,7 @@ const ticker_info_t* lp_ticker_get_info()
|
||||||
void lp_ticker_init()
|
void lp_ticker_init()
|
||||||
{
|
{
|
||||||
if (PRCMRTCInUseGet() == true)
|
if (PRCMRTCInUseGet() == true)
|
||||||
// When RTC is in use, slow clock counter can't be accessed
|
// When RTC is in use, slow clock counter can't be accessed
|
||||||
{
|
{
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
@ -103,8 +103,7 @@ timestamp_t lp_ticker_read()
|
||||||
{
|
{
|
||||||
// Read forever until reaching two of the same
|
// Read forever until reaching two of the same
|
||||||
volatile unsigned long long read_previous, read_current;
|
volatile unsigned long long read_previous, read_current;
|
||||||
do
|
do {
|
||||||
{
|
|
||||||
read_previous = PRCMSlowClkCtrFastGet();
|
read_previous = PRCMSlowClkCtrFastGet();
|
||||||
read_current = PRCMSlowClkCtrFastGet();
|
read_current = PRCMSlowClkCtrFastGet();
|
||||||
} while (read_previous != read_current);
|
} while (read_previous != read_current);
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/* mbed Microcontroller Library
|
/* mbed Microcontroller Library
|
||||||
* Copyright (c) 2006-2013 ARM Limited
|
* Copyright (c) 2018-2019 ARM Limited
|
||||||
*
|
*
|
||||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
* you may not use this file except in compliance with the License.
|
* you may not use this file except in compliance with the License.
|
||||||
|
@ -54,7 +54,7 @@ struct port_s {
|
||||||
struct pwmout_s {
|
struct pwmout_s {
|
||||||
uint32_t period_us;
|
uint32_t period_us;
|
||||||
float duty_percent;
|
float duty_percent;
|
||||||
void * handle;
|
void *handle;
|
||||||
PWMName pwm;
|
PWMName pwm;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -71,7 +71,7 @@ struct serial_s {
|
||||||
UART_PAR parityType; /* Parity bit type for UART */
|
UART_PAR parityType; /* Parity bit type for UART */
|
||||||
};
|
};
|
||||||
|
|
||||||
struct analogin_s{
|
struct analogin_s {
|
||||||
PinName pin;
|
PinName pin;
|
||||||
unsigned long adc_ch;
|
unsigned long adc_ch;
|
||||||
};
|
};
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/* mbed Microcontroller Library
|
/* mbed Microcontroller Library
|
||||||
* Copyright (c) 2006-2018 ARM Limited
|
* Copyright (c) 2018-2019 ARM Limited
|
||||||
*
|
*
|
||||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
* you may not use this file except in compliance with the License.
|
* you may not use this file except in compliance with the License.
|
||||||
|
@ -17,10 +17,10 @@
|
||||||
#include "pinmap.h"
|
#include "pinmap.h"
|
||||||
#include "mbed_error.h"
|
#include "mbed_error.h"
|
||||||
|
|
||||||
#include <ti/devices/cc32xx/inc/hw_types.h>
|
#include "ti/devices/cc32xx/inc/hw_types.h"
|
||||||
#include <ti/devices/cc32xx/inc/hw_memmap.h>
|
#include "ti/devices/cc32xx/inc/hw_memmap.h"
|
||||||
#include <ti/devices/cc32xx/inc/hw_ocp_shared.h>
|
#include "ti/devices/cc32xx/inc/hw_ocp_shared.h"
|
||||||
#include <ti/devices/cc32xx/driverlib/pin.h>
|
#include "ti/devices/cc32xx/driverlib/pin.h"
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Configure pin (mode, speed, output type and pull-up/pull-down)
|
* Configure pin (mode, speed, output type and pull-up/pull-down)
|
||||||
|
@ -36,14 +36,30 @@ void pin_function(PinName pin, int function)
|
||||||
void pin_mode(PinName pin, PinMode mode)
|
void pin_mode(PinName pin, PinMode mode)
|
||||||
{
|
{
|
||||||
MBED_ASSERT(pin != (PinName)NC);
|
MBED_ASSERT(pin != (PinName)NC);
|
||||||
switch(mode) {
|
switch (mode) {
|
||||||
case PullNone: PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_STD); break;
|
case PullNone:
|
||||||
case PullUp: PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_STD_PU); break;
|
PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_STD);
|
||||||
case PullDown: PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_STD_PD); break;
|
break;
|
||||||
case OpenDrain: PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_OD); break;
|
case PullUp:
|
||||||
case OpenDrainPullUp: PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_OD_PU); break;
|
PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_STD_PU);
|
||||||
case OpenDrainPullDown: PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_OD_PD); break;
|
break;
|
||||||
case Analog: PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_ANALOG); break;
|
case PullDown:
|
||||||
default: PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_STD); break;
|
PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_STD_PD);
|
||||||
|
break;
|
||||||
|
case OpenDrain:
|
||||||
|
PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_OD);
|
||||||
|
break;
|
||||||
|
case OpenDrainPullUp:
|
||||||
|
PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_OD_PU);
|
||||||
|
break;
|
||||||
|
case OpenDrainPullDown:
|
||||||
|
PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_OD_PD);
|
||||||
|
break;
|
||||||
|
case Analog:
|
||||||
|
PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_ANALOG);
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_STD);
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/* mbed Microcontroller Library
|
/* mbed Microcontroller Library
|
||||||
* Copyright (c) 2006-2018 ARM Limited
|
* Copyright (c) 2018-2019 ARM Limited
|
||||||
*
|
*
|
||||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
* you may not use this file except in compliance with the License.
|
* you may not use this file except in compliance with the License.
|
||||||
|
@ -18,11 +18,11 @@
|
||||||
#include "gpio_api.h"
|
#include "gpio_api.h"
|
||||||
#include "PeripheralPins.h"
|
#include "PeripheralPins.h"
|
||||||
|
|
||||||
#include <ti/devices/cc32xx/inc/hw_types.h>
|
#include "ti/devices/cc32xx/inc/hw_types.h"
|
||||||
#include <ti/devices/cc32xx/driverlib/pin.h>
|
#include "ti/devices/cc32xx/driverlib/pin.h"
|
||||||
#include <ti/devices/cc32xx/driverlib/gpio.h>
|
#include "ti/devices/cc32xx/driverlib/gpio.h"
|
||||||
#include <ti/devices/cc32xx/inc/hw_ints.h>
|
#include "ti/devices/cc32xx/inc/hw_ints.h"
|
||||||
#include <ti/devices/cc32xx/driverlib/prcm.h>
|
#include "ti/devices/cc32xx/driverlib/prcm.h"
|
||||||
|
|
||||||
#define NUM_PORTS 4
|
#define NUM_PORTS 4
|
||||||
#define NUM_PINS_PER_PORT 8
|
#define NUM_PINS_PER_PORT 8
|
||||||
|
@ -51,27 +51,41 @@ const uint16_t PortPinTypes[] = {
|
||||||
(uint16_t)PIN_TYPE_ANALOG // Revisit this, PIN_TYPE_ANALOG gets truncated to 16b
|
(uint16_t)PIN_TYPE_ANALOG // Revisit this, PIN_TYPE_ANALOG gets truncated to 16b
|
||||||
};
|
};
|
||||||
|
|
||||||
PinName port_pin(PortName port, int pin_n) {
|
PinName port_pin(PortName port, int pin_n)
|
||||||
|
{
|
||||||
int gpio_num = (port * 8) + pin_n;
|
int gpio_num = (port * 8) + pin_n;
|
||||||
PinName pin = (PinName)pinTable[gpio_num];
|
PinName pin = (PinName)pinTable[gpio_num];
|
||||||
return pin;
|
return pin;
|
||||||
}
|
}
|
||||||
|
|
||||||
void port_init(port_t *obj, PortName port, int mask, PinDirection dir) {
|
void port_init(port_t *obj, PortName port, int mask, PinDirection dir)
|
||||||
|
{
|
||||||
obj->port = port;
|
obj->port = port;
|
||||||
obj->mask = mask;
|
obj->mask = mask;
|
||||||
|
|
||||||
switch(port) {
|
switch (port) {
|
||||||
case Port0: obj->baseAddr = CC3220SF_GPIOA0_BASE; obj->peripheralId = PRCM_GPIOA0; break;
|
case Port0:
|
||||||
case Port1: obj->baseAddr = CC3220SF_GPIOA1_BASE; obj->peripheralId = PRCM_GPIOA1; break;
|
obj->baseAddr = CC3220SF_GPIOA0_BASE;
|
||||||
case Port2: obj->baseAddr = CC3220SF_GPIOA2_BASE; obj->peripheralId = PRCM_GPIOA2; break;
|
obj->peripheralId = PRCM_GPIOA0;
|
||||||
case Port3: obj->baseAddr = CC3220SF_GPIOA3_BASE; obj->peripheralId = PRCM_GPIOA3; break;
|
break;
|
||||||
|
case Port1:
|
||||||
|
obj->baseAddr = CC3220SF_GPIOA1_BASE;
|
||||||
|
obj->peripheralId = PRCM_GPIOA1;
|
||||||
|
break;
|
||||||
|
case Port2:
|
||||||
|
obj->baseAddr = CC3220SF_GPIOA2_BASE;
|
||||||
|
obj->peripheralId = PRCM_GPIOA2;
|
||||||
|
break;
|
||||||
|
case Port3:
|
||||||
|
obj->baseAddr = CC3220SF_GPIOA3_BASE;
|
||||||
|
obj->peripheralId = PRCM_GPIOA3;
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
// initialize GPIO PORT clock
|
// initialize GPIO PORT clock
|
||||||
PRCMPeripheralClkEnable(obj->peripheralId, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK);
|
PRCMPeripheralClkEnable(obj->peripheralId, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK);
|
||||||
// wait for GPIO clock to settle
|
// wait for GPIO clock to settle
|
||||||
while(!PRCMPeripheralStatusGet(obj->peripheralId));
|
while (!PRCMPeripheralStatusGet(obj->peripheralId));
|
||||||
|
|
||||||
for (int i = 0; i < 8; i++) {
|
for (int i = 0; i < 8; i++) {
|
||||||
if (obj->mask & (1 << i)) {
|
if (obj->mask & (1 << i)) {
|
||||||
|
@ -84,7 +98,8 @@ void port_init(port_t *obj, PortName port, int mask, PinDirection dir) {
|
||||||
port_dir(obj, dir);
|
port_dir(obj, dir);
|
||||||
}
|
}
|
||||||
|
|
||||||
void port_mode(port_t *obj, PinMode mode) {
|
void port_mode(port_t *obj, PinMode mode)
|
||||||
|
{
|
||||||
for (int i = 0; i < 8; i++) {
|
for (int i = 0; i < 8; i++) {
|
||||||
if (obj->mask & (1 << i)) {
|
if (obj->mask & (1 << i)) {
|
||||||
pin_mode(port_pin(obj->port, i), mode);
|
pin_mode(port_pin(obj->port, i), mode);
|
||||||
|
@ -92,17 +107,24 @@ void port_mode(port_t *obj, PinMode mode) {
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void port_dir(port_t *obj, PinDirection dir) {
|
void port_dir(port_t *obj, PinDirection dir)
|
||||||
|
{
|
||||||
switch (dir) {
|
switch (dir) {
|
||||||
case PIN_INPUT: GPIODirModeSet(obj->baseAddr, obj->mask, GPIO_DIR_MODE_IN); break;
|
case PIN_INPUT:
|
||||||
case PIN_OUTPUT: GPIODirModeSet(obj->baseAddr, obj->mask, GPIO_DIR_MODE_OUT); break;
|
GPIODirModeSet(obj->baseAddr, obj->mask, GPIO_DIR_MODE_IN);
|
||||||
|
break;
|
||||||
|
case PIN_OUTPUT:
|
||||||
|
GPIODirModeSet(obj->baseAddr, obj->mask, GPIO_DIR_MODE_OUT);
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void port_write(port_t *obj, int value) {
|
void port_write(port_t *obj, int value)
|
||||||
|
{
|
||||||
GPIOPinWrite(obj->baseAddr, obj->mask, value);
|
GPIOPinWrite(obj->baseAddr, obj->mask, value);
|
||||||
}
|
}
|
||||||
|
|
||||||
int port_read(port_t *obj) {
|
int port_read(port_t *obj)
|
||||||
|
{
|
||||||
return (int)(GPIOPinRead(obj->baseAddr, obj->mask));
|
return (int)(GPIOPinRead(obj->baseAddr, obj->mask));
|
||||||
}
|
}
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/* mbed Microcontroller Library
|
/* mbed Microcontroller Library
|
||||||
* Copyright (c) 2006-2013 ARM Limited
|
* Copyright (c) 2018-2019 ARM Limited
|
||||||
*
|
*
|
||||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
* you may not use this file except in compliance with the License.
|
* you may not use this file except in compliance with the License.
|
||||||
|
@ -18,13 +18,14 @@
|
||||||
#include "pinmap.h"
|
#include "pinmap.h"
|
||||||
#include "PeripheralPins.h"
|
#include "PeripheralPins.h"
|
||||||
|
|
||||||
#include <ti/drivers/pwm/PWMTimerCC32XX.h>
|
#include "ti/drivers/pwm/PWMTimerCC32XX.h"
|
||||||
#include <ti/drivers/PWM.h>
|
#include "ti/drivers/PWM.h"
|
||||||
#include <CC3220SF_LAUNCHXL.h>
|
#include "CC3220SF_LAUNCHXL.h"
|
||||||
|
|
||||||
extern const PWM_Config PWM_config[];
|
extern const PWM_Config PWM_config[];
|
||||||
|
|
||||||
void pwmout_init(pwmout_t* obj, PinName pin) {
|
void pwmout_init(pwmout_t *obj, PinName pin)
|
||||||
|
{
|
||||||
PWM_Params pwmParams;
|
PWM_Params pwmParams;
|
||||||
int pwmIndex = CC3220SF_LAUNCHXL_PWMCOUNT;
|
int pwmIndex = CC3220SF_LAUNCHXL_PWMCOUNT;
|
||||||
|
|
||||||
|
@ -35,7 +36,7 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
|
||||||
|
|
||||||
obj->pwm = pwm;
|
obj->pwm = pwm;
|
||||||
|
|
||||||
switch(pin) {
|
switch (pin) {
|
||||||
case PIN_01:
|
case PIN_01:
|
||||||
pwmIndex = CC3220SF_LAUNCHXL_PWM6;
|
pwmIndex = CC3220SF_LAUNCHXL_PWM6;
|
||||||
break;
|
break;
|
||||||
|
@ -61,7 +62,7 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
while(1);
|
while (1);
|
||||||
}
|
}
|
||||||
|
|
||||||
obj->handle = (void *)&PWM_config[pwmIndex];
|
obj->handle = (void *)&PWM_config[pwmIndex];
|
||||||
|
@ -72,55 +73,60 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
|
||||||
obj->duty_percent = PWM_DEFAULT_DUTY_PERCENT;
|
obj->duty_percent = PWM_DEFAULT_DUTY_PERCENT;
|
||||||
obj->period_us = PWM_DEFAULT_PERIOD_US;
|
obj->period_us = PWM_DEFAULT_PERIOD_US;
|
||||||
|
|
||||||
if (PWM_open(pwmIndex, &pwmParams))
|
if (PWM_open(pwmIndex, &pwmParams)) {
|
||||||
{
|
|
||||||
PWM_start((PWM_Handle)obj->handle);
|
PWM_start((PWM_Handle)obj->handle);
|
||||||
}
|
} else {
|
||||||
else
|
while (1);
|
||||||
{
|
|
||||||
while(1);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void pwmout_free(pwmout_t* obj) {
|
void pwmout_free(pwmout_t *obj)
|
||||||
|
{
|
||||||
PWM_stop((PWM_Handle)obj->handle);
|
PWM_stop((PWM_Handle)obj->handle);
|
||||||
PWM_close((PWM_Handle)obj->handle);
|
PWM_close((PWM_Handle)obj->handle);
|
||||||
}
|
}
|
||||||
|
|
||||||
void pwmout_write(pwmout_t* obj, float value) {
|
void pwmout_write(pwmout_t *obj, float value)
|
||||||
PWM_setDuty((PWM_Handle)obj->handle, value*100);
|
{
|
||||||
|
PWM_setDuty((PWM_Handle)obj->handle, value * 100);
|
||||||
obj->duty_percent = value;
|
obj->duty_percent = value;
|
||||||
}
|
}
|
||||||
|
|
||||||
float pwmout_read(pwmout_t* obj) {
|
float pwmout_read(pwmout_t *obj)
|
||||||
|
{
|
||||||
return (obj->duty_percent);
|
return (obj->duty_percent);
|
||||||
}
|
}
|
||||||
|
|
||||||
void pwmout_period(pwmout_t* obj, float seconds) {
|
void pwmout_period(pwmout_t *obj, float seconds)
|
||||||
|
{
|
||||||
pwmout_period_us(obj, seconds * 1000 * 1000);
|
pwmout_period_us(obj, seconds * 1000 * 1000);
|
||||||
}
|
}
|
||||||
|
|
||||||
void pwmout_period_ms(pwmout_t* obj, int ms) {
|
void pwmout_period_ms(pwmout_t *obj, int ms)
|
||||||
|
{
|
||||||
pwmout_period_us(obj, ms * 1000);
|
pwmout_period_us(obj, ms * 1000);
|
||||||
}
|
}
|
||||||
|
|
||||||
// Set the PWM period, keeping the duty cycle the same.
|
// Set the PWM period, keeping the duty cycle the same.
|
||||||
void pwmout_period_us(pwmout_t* obj, int us) {
|
void pwmout_period_us(pwmout_t *obj, int us)
|
||||||
|
{
|
||||||
PWM_setPeriod((PWM_Handle)obj->handle, us);
|
PWM_setPeriod((PWM_Handle)obj->handle, us);
|
||||||
obj->period_us = us;
|
obj->period_us = us;
|
||||||
}
|
}
|
||||||
|
|
||||||
void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
|
void pwmout_pulsewidth(pwmout_t *obj, float seconds)
|
||||||
|
{
|
||||||
pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
|
pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
|
||||||
}
|
}
|
||||||
|
|
||||||
void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
|
void pwmout_pulsewidth_ms(pwmout_t *obj, int ms)
|
||||||
|
{
|
||||||
pwmout_pulsewidth_us(obj, ms * 1000);
|
pwmout_pulsewidth_us(obj, ms * 1000);
|
||||||
}
|
}
|
||||||
|
|
||||||
void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
|
void pwmout_pulsewidth_us(pwmout_t *obj, int us)
|
||||||
if (obj->period_us)
|
{
|
||||||
{
|
if (obj->period_us) {
|
||||||
float value = (float)us / (float)obj->period_us;
|
float value = (float)us / (float)obj->period_us;
|
||||||
pwmout_write(obj, value);
|
pwmout_write(obj, value);
|
||||||
}
|
}
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/* mbed Microcontroller Library
|
/* mbed Microcontroller Library
|
||||||
* Copyright (c) 2018 ARM Limited
|
* Copyright (c) 2018-2019 ARM Limited
|
||||||
*
|
*
|
||||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
* you may not use this file except in compliance with the License.
|
* you may not use this file except in compliance with the License.
|
||||||
|
@ -20,33 +20,36 @@
|
||||||
#include "ti/devices/cc32xx/inc/hw_types.h"
|
#include "ti/devices/cc32xx/inc/hw_types.h"
|
||||||
#include "ti/devices/cc32xx/driverlib/prcm.h"
|
#include "ti/devices/cc32xx/driverlib/prcm.h"
|
||||||
|
|
||||||
void rtc_init(void) {
|
void rtc_init(void)
|
||||||
|
{
|
||||||
static bool rtc_initialized = false;
|
static bool rtc_initialized = false;
|
||||||
if (!rtc_initialized)
|
if (!rtc_initialized) {
|
||||||
{
|
if (!PRCMRTCInUseGet()) {
|
||||||
if (!PRCMRTCInUseGet())
|
|
||||||
{
|
|
||||||
PRCMRTCInUseSet();
|
PRCMRTCInUseSet();
|
||||||
}
|
}
|
||||||
rtc_initialized = true;
|
rtc_initialized = true;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void rtc_free(void) {
|
void rtc_free(void)
|
||||||
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
int rtc_isenabled(void) {
|
int rtc_isenabled(void)
|
||||||
|
{
|
||||||
return PRCMRTCInUseGet();
|
return PRCMRTCInUseGet();
|
||||||
}
|
}
|
||||||
|
|
||||||
time_t rtc_read(void) {
|
time_t rtc_read(void)
|
||||||
|
{
|
||||||
unsigned long ulSecs = 0;
|
unsigned long ulSecs = 0;
|
||||||
unsigned short usMsec = 0;
|
unsigned short usMsec = 0;
|
||||||
PRCMRTCGet(&ulSecs, &usMsec);
|
PRCMRTCGet(&ulSecs, &usMsec);
|
||||||
return ulSecs;
|
return ulSecs;
|
||||||
}
|
}
|
||||||
|
|
||||||
void rtc_write(time_t t) {
|
void rtc_write(time_t t)
|
||||||
|
{
|
||||||
PRCMRTCSet(t, 0);
|
PRCMRTCSet(t, 0);
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/* mbed Microcontroller Library
|
/* mbed Microcontroller Library
|
||||||
* Copyright (c) 2018 ARM Limited
|
* Copyright (c) 2018-2019 ARM Limited
|
||||||
*
|
*
|
||||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
* you may not use this file except in compliance with the License.
|
* you may not use this file except in compliance with the License.
|
||||||
|
@ -46,8 +46,7 @@ static void spi_configure_driver_instance(spi_t *obj)
|
||||||
struct spi_s *spi_inst = obj;
|
struct spi_s *spi_inst = obj;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
if (spi_inst->clock_update)
|
if (spi_inst->clock_update) {
|
||||||
{
|
|
||||||
SPIReset(spi_inst->baseAddr);
|
SPIReset(spi_inst->baseAddr);
|
||||||
SPIConfigSetExpClk(spi_inst->baseAddr, spi_inst->clock_config.ulSPIClk,
|
SPIConfigSetExpClk(spi_inst->baseAddr, spi_inst->clock_config.ulSPIClk,
|
||||||
spi_inst->clock_config.ulBitRate, spi_inst->clock_config.ulMode,
|
spi_inst->clock_config.ulBitRate, spi_inst->clock_config.ulMode,
|
||||||
|
@ -100,12 +99,9 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
|
||||||
spi_inst->clock_config.ulConfig = SPI_4PIN_MODE;
|
spi_inst->clock_config.ulConfig = SPI_4PIN_MODE;
|
||||||
spi_inst->clock_config.ulConfig |= SPI_HW_CTRL_CS;
|
spi_inst->clock_config.ulConfig |= SPI_HW_CTRL_CS;
|
||||||
spi_inst->clock_config.ulConfig |= SPI_CS_ACTIVELOW;
|
spi_inst->clock_config.ulConfig |= SPI_CS_ACTIVELOW;
|
||||||
if (ssel == NC)
|
if (ssel == NC) {
|
||||||
{
|
|
||||||
spi_inst->cs_control_gpio = true;
|
spi_inst->cs_control_gpio = true;
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
spi_inst->cs_control_gpio = false;
|
spi_inst->cs_control_gpio = false;
|
||||||
}
|
}
|
||||||
spi_inst->clock_config.ulConfig |= SPI_TURBO_OFF;
|
spi_inst->clock_config.ulConfig |= SPI_TURBO_OFF;
|
||||||
|
@ -120,8 +116,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
|
||||||
MAP_PinTypeSPI((unsigned long) mosi & 0xff, (unsigned long) PIN_MODE_SPI);
|
MAP_PinTypeSPI((unsigned long) mosi & 0xff, (unsigned long) PIN_MODE_SPI);
|
||||||
MAP_PinTypeSPI((unsigned long) miso & 0xff, (unsigned long) PIN_MODE_SPI);
|
MAP_PinTypeSPI((unsigned long) miso & 0xff, (unsigned long) PIN_MODE_SPI);
|
||||||
MAP_PinTypeSPI((unsigned long) sclk & 0xff, (unsigned long) PIN_MODE_SPI);
|
MAP_PinTypeSPI((unsigned long) sclk & 0xff, (unsigned long) PIN_MODE_SPI);
|
||||||
if (ssel != NC)
|
if (ssel != NC) {
|
||||||
{
|
|
||||||
MAP_PinTypeSPI((unsigned long) ssel & 0xff, (unsigned long) PIN_MODE_SPI);
|
MAP_PinTypeSPI((unsigned long) ssel & 0xff, (unsigned long) PIN_MODE_SPI);
|
||||||
}
|
}
|
||||||
spi_inst->clock_update = true;
|
spi_inst->clock_update = true;
|
||||||
|
@ -163,8 +158,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave)
|
||||||
#else
|
#else
|
||||||
struct spi_s *spi_inst = obj;
|
struct spi_s *spi_inst = obj;
|
||||||
#endif
|
#endif
|
||||||
if ((uint32_t)bits != spi_inst->word_length)
|
if ((uint32_t)bits != spi_inst->word_length) {
|
||||||
{
|
|
||||||
spi_inst->word_length = bits;
|
spi_inst->word_length = bits;
|
||||||
spi_inst->clock_update = true;
|
spi_inst->clock_update = true;
|
||||||
}
|
}
|
||||||
|
@ -180,30 +174,26 @@ void spi_format(spi_t *obj, int bits, int mode, int slave)
|
||||||
|
|
||||||
/* Convert Mbed HAL mode to TI mode. */
|
/* Convert Mbed HAL mode to TI mode. */
|
||||||
|
|
||||||
if(mode == 0) {
|
if (mode == 0) {
|
||||||
if (spi_inst->clock_config.ulSubMode != SPI_SUB_MODE_0)
|
if (spi_inst->clock_config.ulSubMode != SPI_SUB_MODE_0) {
|
||||||
{
|
|
||||||
spi_inst->clock_update = true;
|
spi_inst->clock_update = true;
|
||||||
}
|
}
|
||||||
spi_inst->clock_config.ulSubMode = SPI_SUB_MODE_0;
|
spi_inst->clock_config.ulSubMode = SPI_SUB_MODE_0;
|
||||||
} else if(mode == 1) {
|
} else if (mode == 1) {
|
||||||
if (spi_inst->clock_config.ulSubMode != SPI_SUB_MODE_1)
|
if (spi_inst->clock_config.ulSubMode != SPI_SUB_MODE_1) {
|
||||||
{
|
|
||||||
spi_inst->clock_update = true;
|
spi_inst->clock_update = true;
|
||||||
}
|
}
|
||||||
spi_inst->clock_config.ulSubMode = SPI_SUB_MODE_1;
|
spi_inst->clock_config.ulSubMode = SPI_SUB_MODE_1;
|
||||||
} else if(mode == 2) {
|
} else if (mode == 2) {
|
||||||
if (spi_inst->clock_config.ulSubMode != SPI_SUB_MODE_2)
|
if (spi_inst->clock_config.ulSubMode != SPI_SUB_MODE_2) {
|
||||||
{
|
|
||||||
spi_inst->clock_update = true;
|
spi_inst->clock_update = true;
|
||||||
}
|
}
|
||||||
spi_inst->clock_config.ulSubMode = SPI_SUB_MODE_2;
|
spi_inst->clock_config.ulSubMode = SPI_SUB_MODE_2;
|
||||||
} else if(mode == 3) {
|
} else if (mode == 3) {
|
||||||
if (spi_inst->clock_config.ulSubMode != SPI_SUB_MODE_3)
|
if (spi_inst->clock_config.ulSubMode != SPI_SUB_MODE_3) {
|
||||||
{
|
|
||||||
spi_inst->clock_update = true;
|
spi_inst->clock_update = true;
|
||||||
}
|
}
|
||||||
spi_inst->clock_config.ulSubMode= SPI_SUB_MODE_3;
|
spi_inst->clock_config.ulSubMode = SPI_SUB_MODE_3;
|
||||||
}
|
}
|
||||||
spi_configure_driver_instance(spi_inst);
|
spi_configure_driver_instance(spi_inst);
|
||||||
}
|
}
|
||||||
|
@ -224,8 +214,7 @@ void spi_frequency(spi_t *obj, int hz)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
spi_inst->clock_config.ulSPIClk = PRCMPeripheralClockGet(PRCM_GSPI);
|
spi_inst->clock_config.ulSPIClk = PRCMPeripheralClockGet(PRCM_GSPI);
|
||||||
if (spi_inst->clock_config.ulBitRate != (uint32_t)hz)
|
if (spi_inst->clock_config.ulBitRate != (uint32_t)hz) {
|
||||||
{
|
|
||||||
spi_inst->clock_update = true;
|
spi_inst->clock_update = true;
|
||||||
spi_inst->clock_config.ulBitRate = hz;
|
spi_inst->clock_config.ulBitRate = hz;
|
||||||
}
|
}
|
||||||
|
@ -251,15 +240,13 @@ int spi_master_write(spi_t *obj, int value)
|
||||||
/* Configure peripheral if necessary. */
|
/* Configure peripheral if necessary. */
|
||||||
spi_configure_driver_instance(obj);
|
spi_configure_driver_instance(obj);
|
||||||
|
|
||||||
if (!spi_inst->cs_control_gpio)
|
if (!spi_inst->cs_control_gpio) {
|
||||||
{
|
|
||||||
SPICSEnable(spi_inst->baseAddr);
|
SPICSEnable(spi_inst->baseAddr);
|
||||||
}
|
}
|
||||||
/* Transfer a data word. */
|
/* Transfer a data word. */
|
||||||
SPIDataPut(spi_inst->baseAddr, value);
|
SPIDataPut(spi_inst->baseAddr, value);
|
||||||
SPIDataGet(spi_inst->baseAddr, (unsigned long *)&data_read);
|
SPIDataGet(spi_inst->baseAddr, (unsigned long *)&data_read);
|
||||||
if (!spi_inst->cs_control_gpio)
|
if (!spi_inst->cs_control_gpio) {
|
||||||
{
|
|
||||||
SPICSDisable(spi_inst->baseAddr);
|
SPICSDisable(spi_inst->baseAddr);
|
||||||
}
|
}
|
||||||
return data_read & ((1 << spi_inst->word_length) - 1);
|
return data_read & ((1 << spi_inst->word_length) - 1);
|
||||||
|
@ -294,18 +281,12 @@ int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, cha
|
||||||
/* Configure peripheral if necessary. */
|
/* Configure peripheral if necessary. */
|
||||||
spi_configure_driver_instance(obj);
|
spi_configure_driver_instance(obj);
|
||||||
|
|
||||||
if (tx_length >= rx_length)
|
if (tx_length >= rx_length) {
|
||||||
{
|
if (spi_inst->word_length == 16) {
|
||||||
if (spi_inst->word_length == 16)
|
|
||||||
{
|
|
||||||
spi_words = (tx_length >> 1);
|
spi_words = (tx_length >> 1);
|
||||||
}
|
} else if (spi_inst->word_length == 32) {
|
||||||
else if (spi_inst->word_length == 32)
|
|
||||||
{
|
|
||||||
spi_words = (tx_length >> 2);
|
spi_words = (tx_length >> 2);
|
||||||
}
|
} else if (spi_inst->word_length == 8) {
|
||||||
else if (spi_inst->word_length == 8)
|
|
||||||
{
|
|
||||||
spi_words = tx_length;
|
spi_words = tx_length;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -314,40 +295,30 @@ int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, cha
|
||||||
(unsigned char *)rx_temp, (unsigned long) spi_words,
|
(unsigned char *)rx_temp, (unsigned long) spi_words,
|
||||||
SPI_CS_ENABLE | SPI_CS_DISABLE);
|
SPI_CS_ENABLE | SPI_CS_DISABLE);
|
||||||
// Copy the desired data from temp_rx
|
// Copy the desired data from temp_rx
|
||||||
for (i = 0; i < rx_length; i ++)
|
for (i = 0; i < rx_length; i ++) {
|
||||||
{
|
|
||||||
rx_buffer[i] = rx_temp[i];
|
rx_buffer[i] = rx_temp[i];
|
||||||
}
|
}
|
||||||
free(rx_temp);
|
free(rx_temp);
|
||||||
return (tx_length);
|
return (tx_length);
|
||||||
}
|
} else // tx_length < rx_length
|
||||||
else // tx_length < rx_length
|
|
||||||
// Copy the data from tx_buffer to a temp buffer and fill the the rest of the tx_buffer with write_fill)
|
// Copy the data from tx_buffer to a temp buffer and fill the the rest of the tx_buffer with write_fill)
|
||||||
{
|
{
|
||||||
if (spi_inst->word_length == 16)
|
if (spi_inst->word_length == 16) {
|
||||||
{
|
|
||||||
spi_words = (rx_length >> 1);
|
spi_words = (rx_length >> 1);
|
||||||
}
|
} else if (spi_inst->word_length == 32) {
|
||||||
else if (spi_inst->word_length == 32)
|
|
||||||
{
|
|
||||||
spi_words = (rx_length >> 2);
|
spi_words = (rx_length >> 2);
|
||||||
}
|
} else if (spi_inst->word_length == 8) {
|
||||||
else if (spi_inst->word_length == 8)
|
|
||||||
{
|
|
||||||
spi_words = rx_length;
|
spi_words = rx_length;
|
||||||
}
|
}
|
||||||
|
|
||||||
unsigned char *tx_temp = malloc(rx_length);
|
unsigned char *tx_temp = malloc(rx_length);
|
||||||
for (i = 0; i < tx_length; i ++)
|
for (i = 0; i < tx_length; i ++) {
|
||||||
{
|
|
||||||
tx_temp[i] = tx_buffer[i];
|
tx_temp[i] = tx_buffer[i];
|
||||||
}
|
}
|
||||||
for (i = tx_length; i < rx_length; i ++)
|
for (i = tx_length; i < rx_length; i ++) {
|
||||||
{
|
|
||||||
tx_temp[i] = write_fill;
|
tx_temp[i] = write_fill;
|
||||||
}
|
}
|
||||||
if (!spi_inst->cs_control_gpio)
|
if (!spi_inst->cs_control_gpio) {
|
||||||
{
|
|
||||||
cs_flags = SPI_CS_ENABLE | SPI_CS_DISABLE;
|
cs_flags = SPI_CS_ENABLE | SPI_CS_DISABLE;
|
||||||
}
|
}
|
||||||
SPITransfer(spi_inst->baseAddr, (unsigned char *)tx_temp,
|
SPITransfer(spi_inst->baseAddr, (unsigned char *)tx_temp,
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* Hardware entropy collector for the CC3200
|
* Hardware entropy collector for the CC3200
|
||||||
*
|
*
|
||||||
* Copyright (C) 2018, ARM Limited, All Rights Reserved
|
* Copyright (C) 2018-2019, ARM Limited, All Rights Reserved
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*
|
*
|
||||||
* Licensed under the Apache License, Version 2.0 (the "License"); you may
|
* Licensed under the Apache License, Version 2.0 (the "License"); you may
|
||||||
|
@ -34,15 +34,11 @@ void trng_init(trng_t *obj)
|
||||||
static bool trng_initialized = false;
|
static bool trng_initialized = false;
|
||||||
|
|
||||||
(void)obj;
|
(void)obj;
|
||||||
if (!trng_initialized)
|
if (!trng_initialized) {
|
||||||
{
|
|
||||||
int ret = CC3220SF_initSimplelink();
|
int ret = CC3220SF_initSimplelink();
|
||||||
if (ret == 0)
|
if (ret == 0) {
|
||||||
{
|
|
||||||
trng_initialized = true;
|
trng_initialized = true;
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
printf("trng_init failed with %d\n", ret);
|
printf("trng_init failed with %d\n", ret);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -62,22 +58,16 @@ int trng_get_bytes(trng_t *obj, uint8_t *output, size_t length, size_t *output_l
|
||||||
(void)obj;
|
(void)obj;
|
||||||
/* Retrieve a buffer of true random numbers from the networking subsystem.
|
/* Retrieve a buffer of true random numbers from the networking subsystem.
|
||||||
Maximum buffer length is 172 bytes for each retrieval. if the requested length exceeds 172 bytes, it is trimmed to 172 bytes.*/
|
Maximum buffer length is 172 bytes for each retrieval. if the requested length exceeds 172 bytes, it is trimmed to 172 bytes.*/
|
||||||
if (length > 172)
|
if (length > 172) {
|
||||||
{
|
|
||||||
bytes_count = 172;
|
bytes_count = 172;
|
||||||
}
|
}
|
||||||
if (output)
|
if (output) {
|
||||||
{
|
status = sl_NetUtilGet(SL_NETUTIL_TRUE_RANDOM, 0, output, &bytes_count);
|
||||||
status = sl_NetUtilGet(SL_NETUTIL_TRUE_RANDOM,0,output,&bytes_count);
|
if (output_length) {
|
||||||
if (output_length)
|
if (status == 0) {
|
||||||
{
|
|
||||||
if (status == 0)
|
|
||||||
{
|
|
||||||
*output_length = bytes_count;
|
*output_length = bytes_count;
|
||||||
return 0;
|
return 0;
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
printf("sl_NetUtilGet failed with %d\n", status);
|
printf("sl_NetUtilGet failed with %d\n", status);
|
||||||
*output_length = 0;
|
*output_length = 0;
|
||||||
}
|
}
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/* mbed Microcontroller Library
|
/* mbed Microcontroller Library
|
||||||
* Copyright (c) 2006-2015 ARM Limited
|
* Copyright (c) 2018-2019 ARM Limited
|
||||||
*
|
*
|
||||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
* you may not use this file except in compliance with the License.
|
* you may not use this file except in compliance with the License.
|
||||||
|
@ -28,7 +28,7 @@
|
||||||
|
|
||||||
bool us_ticker_initialized = false;
|
bool us_ticker_initialized = false;
|
||||||
|
|
||||||
const ticker_info_t* us_ticker_get_info()
|
const ticker_info_t *us_ticker_get_info()
|
||||||
{
|
{
|
||||||
static const ticker_info_t info = {
|
static const ticker_info_t info = {
|
||||||
US_TICKER_FREQ,
|
US_TICKER_FREQ,
|
||||||
|
@ -38,21 +38,18 @@ const ticker_info_t* us_ticker_get_info()
|
||||||
}
|
}
|
||||||
void us_ticker_init(void)
|
void us_ticker_init(void)
|
||||||
{
|
{
|
||||||
if (!us_ticker_initialized)
|
if (!us_ticker_initialized) {
|
||||||
{
|
|
||||||
TimerDisable(TIMERA0_BASE, TIMER_A);
|
TimerDisable(TIMERA0_BASE, TIMER_A);
|
||||||
TimerConfigure(TIMERA0_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_PERIODIC);
|
TimerConfigure(TIMERA0_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_PERIODIC);
|
||||||
TimerIntClear(TIMERA0_BASE, TIMER_TIMA_DMA | TIMER_TIMA_MATCH | TIMER_CAPA_EVENT |
|
TimerIntClear(TIMERA0_BASE, TIMER_TIMA_DMA | TIMER_TIMA_MATCH | TIMER_CAPA_EVENT |
|
||||||
TIMER_CAPA_MATCH | TIMER_TIMA_TIMEOUT);
|
TIMER_CAPA_MATCH | TIMER_TIMA_TIMEOUT);
|
||||||
TimerPrescaleSet(TIMERA0_BASE, TIMER_A, (80-1));
|
TimerPrescaleSet(TIMERA0_BASE, TIMER_A, (80 - 1));
|
||||||
TimerEnable(TIMERA0_BASE, TIMER_A);
|
TimerEnable(TIMERA0_BASE, TIMER_A);
|
||||||
NVIC_ClearPendingIRQ(INT_TIMERA0A_IRQn);
|
NVIC_ClearPendingIRQ(INT_TIMERA0A_IRQn);
|
||||||
NVIC_SetVector(INT_TIMERA0A_IRQn, (uint32_t)us_ticker_irq_handler);
|
NVIC_SetVector(INT_TIMERA0A_IRQn, (uint32_t)us_ticker_irq_handler);
|
||||||
NVIC_EnableIRQ(INT_TIMERA0A_IRQn);
|
NVIC_EnableIRQ(INT_TIMERA0A_IRQn);
|
||||||
us_ticker_initialized = true;
|
us_ticker_initialized = true;
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
// Disable match interrupt. This is mbed OS requirement.
|
// Disable match interrupt. This is mbed OS requirement.
|
||||||
TimerIntDisable(TIMERA0_BASE, TIMER_TIMA_MATCH);
|
TimerIntDisable(TIMERA0_BASE, TIMER_TIMA_MATCH);
|
||||||
// Clear pending interrupt
|
// Clear pending interrupt
|
||||||
|
@ -90,8 +87,7 @@ void us_ticker_fire_interrupt(void)
|
||||||
|
|
||||||
void us_ticker_free(void)
|
void us_ticker_free(void)
|
||||||
{
|
{
|
||||||
if (us_ticker_initialized)
|
if (us_ticker_initialized) {
|
||||||
{
|
|
||||||
TimerDisable(TIMERA0_BASE, TIMER_A);
|
TimerDisable(TIMERA0_BASE, TIMER_A);
|
||||||
NVIC_DisableIRQ(INT_TIMERA0A_IRQn);
|
NVIC_DisableIRQ(INT_TIMERA0A_IRQn);
|
||||||
us_ticker_initialized = false;
|
us_ticker_initialized = false;
|
||||||
|
|
Loading…
Reference in New Issue