From acd1d51a77a4f4beebc67d5b92891b0e973b07b2 Mon Sep 17 00:00:00 2001 From: Lin Gao Date: Wed, 14 Aug 2019 11:09:11 -0500 Subject: [PATCH] Cosmetic changes to incorporate review feedback --- .../TARGET_CC3220SF/analogin_api.c | 46 ++++++---- .../TARGET_CC32XX/TARGET_CC3220SF/flash_api.c | 13 ++- .../TARGET_CC32XX/TARGET_CC3220SF/gpio_api.c | 27 +++--- .../TARGET_CC3220SF/gpio_irq_api.c | 89 ++++++++++--------- .../TARGET_CC32XX/TARGET_CC3220SF/lp_ticker.c | 13 ++- .../TARGET_CC32XX/TARGET_CC3220SF/objects.h | 6 +- .../TARGET_CC32XX/TARGET_CC3220SF/pinmap.c | 44 ++++++--- .../TARGET_CC32XX/TARGET_CC3220SF/port_api.c | 62 ++++++++----- .../TARGET_CC3220SF/pwmout_api.c | 56 ++++++------ .../TARGET_CC32XX/TARGET_CC3220SF/rtc_api.c | 23 ++--- .../TARGET_CC32XX/TARGET_CC3220SF/spi_api.c | 89 +++++++------------ .../TARGET_CC32XX/TARGET_CC3220SF/trng_api.c | 30 +++---- .../TARGET_CC32XX/TARGET_CC3220SF/us_ticker.c | 18 ++-- 13 files changed, 268 insertions(+), 248 deletions(-) diff --git a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/analogin_api.c b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/analogin_api.c index b754440c4f..7c636f9d31 100644 --- a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/analogin_api.c +++ b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/analogin_api.c @@ -1,5 +1,5 @@ /* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited + * Copyright (c) 2018-2019 ARM Limited * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -19,38 +19,50 @@ #include "PeripheralPins.h" #include "PinNames.h" #include "cmsis.h" - -#include -#include -#include -#include -#include + +#include "ti/devices/cc32xx/inc/hw_types.h" +#include "ti/devices/cc32xx/driverlib/adc.h" +#include "ti/devices/cc32xx/driverlib/prcm.h" +#include "ti/devices/cc32xx/driverlib/pin.h" +#include "ti/devices/cc32xx/inc/hw_memmap.h" #define ADC_DATA_MASK 0x3FFC //the data is from bit [13:2] #define ADC_RESOLUTION 0xFFF -void analogin_init(analogin_t *obj, PinName pin) { +void analogin_init(analogin_t *obj, PinName pin) +{ ADCEnable(CC3220SF_ADC_BASE); obj->pin = pin; pin_mode(pin, Analog); - switch(pin){ - case PIN_57:obj->adc_ch = ADC_CH_0;break; - case PIN_58:obj->adc_ch = ADC_CH_1;break; - case PIN_59:obj->adc_ch = ADC_CH_2;break; - case PIN_60:obj->adc_ch = ADC_CH_3;break; - default: MBED_ASSERT(NC != (PinName)NC); + switch (pin) { + case PIN_57: + obj->adc_ch = ADC_CH_0; + break; + case PIN_58: + obj->adc_ch = ADC_CH_1; + break; + case PIN_59: + obj->adc_ch = ADC_CH_2; + break; + case PIN_60: + obj->adc_ch = ADC_CH_3; + break; + default: + MBED_ASSERT(NC != (PinName)NC); } ADCChannelEnable(CC3220SF_ADC_BASE, obj->adc_ch); } -uint16_t analogin_read_u16(analogin_t *obj) { +uint16_t analogin_read_u16(analogin_t *obj) +{ unsigned long adc_raw = ADCFIFORead(CC3220SF_ADC_BASE, obj->adc_ch); - return (uint16_t) ((adc_raw & ADC_DATA_MASK) >> 2); + return (uint16_t)((adc_raw & ADC_DATA_MASK) >> 2); } -float analogin_read(analogin_t *obj) { +float analogin_read(analogin_t *obj) +{ uint16_t value = analogin_read_u16(obj); return (float)value * (1.0f / (float)ADC_RESOLUTION); } diff --git a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/flash_api.c b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/flash_api.c index 6ec865d6f8..ccdd4f8147 100644 --- a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/flash_api.c +++ b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/flash_api.c @@ -1,5 +1,5 @@ /* mbed Microcontroller Library - * Copyright (c) 2018 ARM Limited + * Copyright (c) 2018-2019 ARM Limited * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -13,7 +13,7 @@ * See the License for the specific language governing permissions and * limitations under the License. */ - + #if DEVICE_FLASH #include "stdbool.h" @@ -45,17 +45,14 @@ int32_t flash_erase_sector(flash_t *obj, uint32_t address) int32_t flash_program_page(flash_t *obj, uint32_t address, const uint8_t *data, uint32_t size) { return FlashProgram((unsigned long *)data, (unsigned long)address, - (unsigned long)size); + (unsigned long)size); } uint32_t flash_get_sector_size(const flash_t *obj, uint32_t address) { - if ((address >= CC3200_FLASH_START_ADDRESS) && address < (CC3200_FLASH_START_ADDRESS + CC3200_FLASH_SIZE)) - { + if ((address >= CC3200_FLASH_START_ADDRESS) && address < (CC3200_FLASH_START_ADDRESS + CC3200_FLASH_SIZE)) { return CC3200_FLASH_SECTOR_SIZE; - } - else - { + } else { return MBED_FLASH_INVALID_SIZE; } } diff --git a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/gpio_api.c b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/gpio_api.c index e90551e760..dbb449eb19 100644 --- a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/gpio_api.c +++ b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/gpio_api.c @@ -1,5 +1,5 @@ /* mbed Microcontroller Library - * Copyright (c) 2006-2018 ARM Limited + * Copyright (c) 2018-2019 ARM Limited * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -18,17 +18,17 @@ #include "pinmap.h" #include "PeripheralPins.h" -#include -#include -#include -#include -#include +#include "ti/devices/cc32xx/inc/hw_types.h" +#include "ti/devices/cc32xx/driverlib/pin.h" +#include "ti/devices/cc32xx/driverlib/gpio.h" +#include "ti/devices/cc32xx/inc/hw_ints.h" +#include "ti/devices/cc32xx/driverlib/prcm.h" uint32_t gpio_set(PinName pin) { pin_function(pin, 0); - return (1); + return (1); } // function to initialise the gpio pin @@ -37,17 +37,17 @@ uint32_t gpio_set(PinName pin) void gpio_init(gpio_t *obj, PinName pin) { obj->pin = pin; - if (pin == (PinName)NC) + if (pin == (PinName)NC) { return; + } unsigned long gpio_base = (unsigned long)pinmap_peripheral(pin, PinMap_GPIO); obj->baseAddr = gpio_base; - obj->pin_mask = 1<<(pinmap_find_function(pin, PinMap_GPIO)%8); + obj->pin_mask = 1 << (pinmap_find_function(pin, PinMap_GPIO) % 8); // determine PRCM GPIO CLOCK index unsigned short prcm_peripheral = 0; - switch (gpio_base) - { + switch (gpio_base) { case CC3220SF_GPIOA0_BASE: prcm_peripheral = PRCM_GPIOA0; break; @@ -68,7 +68,7 @@ void gpio_init(gpio_t *obj, PinName pin) PRCMPeripheralClkEnable(prcm_peripheral, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); // wait for GPIO clock to settle - while(!PRCMPeripheralStatusGet(prcm_peripheral)); + while (!PRCMPeripheralStatusGet(prcm_peripheral)); } void gpio_mode(gpio_t *obj, PinMode mode) @@ -77,7 +77,6 @@ void gpio_mode(gpio_t *obj, PinMode mode) //set the pin mux to be GPIO which is PIN MODE 0 pin_mode(obj->pin, mode); PinModeSet(obj->pin, PIN_MODE_0); - } void gpio_dir(gpio_t *obj, PinDirection direction) @@ -93,7 +92,7 @@ int gpio_is_connected(const gpio_t *obj) void gpio_write(gpio_t *obj, int value) { - GPIOPinWrite(obj->baseAddr, obj->pin_mask, value*obj->pin_mask); + GPIOPinWrite(obj->baseAddr, obj->pin_mask, value * obj->pin_mask); } int gpio_read(gpio_t *obj) diff --git a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/gpio_irq_api.c b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/gpio_irq_api.c index 0b43c98974..487450fbf8 100644 --- a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/gpio_irq_api.c +++ b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/gpio_irq_api.c @@ -1,5 +1,5 @@ /* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited + * Copyright (c) 2018-2019 ARM Limited * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -20,23 +20,23 @@ #include "cmsis.h" #include "PeripheralPins.h" -#include -#include -#include -#include -#include -#include +#include "ti/devices/cc32xx/inc/hw_types.h" +#include "ti/devices/cc32xx/inc/hw_gpio.h" +#include "ti/devices/cc32xx/driverlib/gpio.h" +#include "ti/devices/cc32xx/inc/hw_ints.h" +#include "ti/devices/cc32xx/inc/hw_memmap.h" +#include "ti/devices/cc32xx/inc/hw_common_reg.h" #define CHANNEL_NUM 32 static uint32_t channel_ids[CHANNEL_NUM] = {0}; static gpio_irq_handler irq_handler; -static void handle_interrupt_in(unsigned long gpio_port) { +static void handle_interrupt_in(unsigned long gpio_port) +{ uint32_t chan_base = 0; - switch ((unsigned long) gpio_port) - { + switch ((unsigned long) gpio_port) { case CC3220SF_GPIOA0_BASE: chan_base = 0; break; @@ -55,31 +55,32 @@ static void handle_interrupt_in(unsigned long gpio_port) { } uint16_t pin_mask = 0x01; - for(int i = 0; i < 8; i++){ + for (int i = 0; i < 8; i++) { //checking for interrupt on each GPIO pin - if((GPIOIntStatus((unsigned long)gpio_port, true) & pin_mask) > 0){ + if ((GPIOIntStatus((unsigned long)gpio_port, true) & pin_mask) > 0) { gpio_irq_event event = (gpio_irq_event)GPIOIntTypeGet((unsigned long)gpio_port, pin_mask); - if(event == GPIO_RISING_EDGE){ + if (event == GPIO_RISING_EDGE) { event = IRQ_RISE; - } - else if(event == GPIO_FALLING_EDGE){ + } else if (event == GPIO_FALLING_EDGE) { event = IRQ_FALL; } - if(channel_ids[chan_base+i] == 0) + if (channel_ids[chan_base + i] == 0) { continue; + } - irq_handler(channel_ids[chan_base+i], (gpio_irq_event)event); + irq_handler(channel_ids[chan_base + i], (gpio_irq_event)event); } GPIOIntClear((unsigned long)gpio_port, pin_mask); - pin_mask = pin_mask<<1; - } + pin_mask = pin_mask << 1; + } } -void gpio_irqA0(void) { +void gpio_irqA0(void) +{ handle_interrupt_in(CC3220SF_GPIOA0_BASE); } @@ -98,21 +99,23 @@ void gpio_irqA3(void) handle_interrupt_in(CC3220SF_GPIOA3_BASE); } -int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) { - if (pin == NC) return -1; +int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) +{ + if (pin == NC) { + return -1; + } + - unsigned long gpio_base = (unsigned long)pinmap_peripheral(pin, PinMap_GPIO); unsigned long ch_num = pinmap_find_function(pin, PinMap_GPIO); obj->baseAddr = gpio_base; obj->pin = pin; obj->ch = ch_num; - obj->pin_mask = 1<<(ch_num%8); + obj->pin_mask = 1 << (ch_num % 8); irq_handler = handler; uint32_t vector = (uint32_t)gpio_irqA0; - switch (gpio_base) - { + switch (gpio_base) { case CC3220SF_GPIOA0_BASE: vector = (uint32_t)gpio_irqA0; obj->irq_offset = INT_GPIOA0_IRQn; @@ -137,37 +140,43 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32 NVIC_DisableIRQ((IRQn_Type)obj->irq_offset); NVIC_SetVector((IRQn_Type)obj->irq_offset, vector); NVIC_EnableIRQ((IRQn_Type)obj->irq_offset); - + return 0; } -void gpio_irq_free(gpio_irq_t *obj) { +void gpio_irq_free(gpio_irq_t *obj) +{ channel_ids[obj->ch] = 0; GPIOIntDisable(obj->baseAddr, obj->pin_mask); } -void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) { +void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) +{ - if(enable){ + if (enable) { GPIOIntEnable(obj->baseAddr, obj->pin_mask); - } - else{ + } else { GPIOIntDisable(obj->baseAddr, obj->pin_mask); } - switch(event){ - case IRQ_RISE:GPIOIntTypeSet(obj->baseAddr,obj->pin_mask, GPIO_RISING_EDGE); break; - case IRQ_FALL: GPIOIntTypeSet(obj->baseAddr,obj->pin_mask, GPIO_FALLING_EDGE); break; - default: break; + switch (event) { + case IRQ_RISE: + GPIOIntTypeSet(obj->baseAddr, obj->pin_mask, GPIO_RISING_EDGE); + break; + case IRQ_FALL: + GPIOIntTypeSet(obj->baseAddr, obj->pin_mask, GPIO_FALLING_EDGE); + break; + default: + break; } - - } -void gpio_irq_enable(gpio_irq_t *obj) { +void gpio_irq_enable(gpio_irq_t *obj) +{ GPIOIntEnable(obj->baseAddr, obj->pin_mask); } -void gpio_irq_disable(gpio_irq_t *obj) { +void gpio_irq_disable(gpio_irq_t *obj) +{ GPIOIntDisable(obj->baseAddr, obj->pin_mask); } diff --git a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/lp_ticker.c b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/lp_ticker.c index 5b3cd6bc48..26469d955f 100644 --- a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/lp_ticker.c +++ b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/lp_ticker.c @@ -1,5 +1,5 @@ /* mbed Microcontroller Library - * Copyright (c) 2006-2018 ARM Limited + * Copyright (c) 2018-2019 ARM Limited * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -35,11 +35,11 @@ static bool rtc_inited = false; -const ticker_info_t* lp_ticker_get_info() +const ticker_info_t *lp_ticker_get_info() { static const ticker_info_t info = { - RTC_FREQ, // 32KHz - RTC_BITS // 32 bit counter + RTC_FREQ, // 32KHz + RTC_BITS // 32 bit counter }; return &info; } @@ -47,7 +47,7 @@ const ticker_info_t* lp_ticker_get_info() void lp_ticker_init() { if (PRCMRTCInUseGet() == true) - // When RTC is in use, slow clock counter can't be accessed + // When RTC is in use, slow clock counter can't be accessed { return; } @@ -103,8 +103,7 @@ timestamp_t lp_ticker_read() { // Read forever until reaching two of the same volatile unsigned long long read_previous, read_current; - do - { + do { read_previous = PRCMSlowClkCtrFastGet(); read_current = PRCMSlowClkCtrFastGet(); } while (read_previous != read_current); diff --git a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/objects.h b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/objects.h index 821bc03017..83d5766f86 100644 --- a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/objects.h +++ b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/objects.h @@ -1,5 +1,5 @@ /* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited + * Copyright (c) 2018-2019 ARM Limited * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -54,7 +54,7 @@ struct port_s { struct pwmout_s { uint32_t period_us; float duty_percent; - void * handle; + void *handle; PWMName pwm; }; @@ -71,7 +71,7 @@ struct serial_s { UART_PAR parityType; /* Parity bit type for UART */ }; -struct analogin_s{ +struct analogin_s { PinName pin; unsigned long adc_ch; }; diff --git a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/pinmap.c b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/pinmap.c index fd00109b57..6c584fc90b 100644 --- a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/pinmap.c +++ b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/pinmap.c @@ -1,5 +1,5 @@ /* mbed Microcontroller Library - * Copyright (c) 2006-2018 ARM Limited + * Copyright (c) 2018-2019 ARM Limited * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -17,10 +17,10 @@ #include "pinmap.h" #include "mbed_error.h" -#include -#include -#include -#include +#include "ti/devices/cc32xx/inc/hw_types.h" +#include "ti/devices/cc32xx/inc/hw_memmap.h" +#include "ti/devices/cc32xx/inc/hw_ocp_shared.h" +#include "ti/devices/cc32xx/driverlib/pin.h" /** * Configure pin (mode, speed, output type and pull-up/pull-down) @@ -36,14 +36,30 @@ void pin_function(PinName pin, int function) void pin_mode(PinName pin, PinMode mode) { MBED_ASSERT(pin != (PinName)NC); - switch(mode) { - case PullNone: PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_STD); break; - case PullUp: PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_STD_PU); break; - case PullDown: PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_STD_PD); break; - case OpenDrain: PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_OD); break; - case OpenDrainPullUp: PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_OD_PU); break; - case OpenDrainPullDown: PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_OD_PD); break; - case Analog: PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_ANALOG); break; - default: PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_STD); break; + switch (mode) { + case PullNone: + PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_STD); + break; + case PullUp: + PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_STD_PU); + break; + case PullDown: + PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_STD_PD); + break; + case OpenDrain: + PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_OD); + break; + case OpenDrainPullUp: + PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_OD_PU); + break; + case OpenDrainPullDown: + PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_OD_PD); + break; + case Analog: + PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_ANALOG); + break; + default: + PinConfigSet(pin, PIN_STRENGTH_2MA, PIN_TYPE_STD); + break; } } diff --git a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/port_api.c b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/port_api.c index e29f98dbe5..64d1cca888 100644 --- a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/port_api.c +++ b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/port_api.c @@ -1,5 +1,5 @@ /* mbed Microcontroller Library - * Copyright (c) 2006-2018 ARM Limited + * Copyright (c) 2018-2019 ARM Limited * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -18,11 +18,11 @@ #include "gpio_api.h" #include "PeripheralPins.h" -#include -#include -#include -#include -#include +#include "ti/devices/cc32xx/inc/hw_types.h" +#include "ti/devices/cc32xx/driverlib/pin.h" +#include "ti/devices/cc32xx/driverlib/gpio.h" +#include "ti/devices/cc32xx/inc/hw_ints.h" +#include "ti/devices/cc32xx/driverlib/prcm.h" #define NUM_PORTS 4 #define NUM_PINS_PER_PORT 8 @@ -51,27 +51,41 @@ const uint16_t PortPinTypes[] = { (uint16_t)PIN_TYPE_ANALOG // Revisit this, PIN_TYPE_ANALOG gets truncated to 16b }; -PinName port_pin(PortName port, int pin_n) { +PinName port_pin(PortName port, int pin_n) +{ int gpio_num = (port * 8) + pin_n; PinName pin = (PinName)pinTable[gpio_num]; return pin; } -void port_init(port_t *obj, PortName port, int mask, PinDirection dir) { +void port_init(port_t *obj, PortName port, int mask, PinDirection dir) +{ obj->port = port; obj->mask = mask; - switch(port) { - case Port0: obj->baseAddr = CC3220SF_GPIOA0_BASE; obj->peripheralId = PRCM_GPIOA0; break; - case Port1: obj->baseAddr = CC3220SF_GPIOA1_BASE; obj->peripheralId = PRCM_GPIOA1; break; - case Port2: obj->baseAddr = CC3220SF_GPIOA2_BASE; obj->peripheralId = PRCM_GPIOA2; break; - case Port3: obj->baseAddr = CC3220SF_GPIOA3_BASE; obj->peripheralId = PRCM_GPIOA3; break; + switch (port) { + case Port0: + obj->baseAddr = CC3220SF_GPIOA0_BASE; + obj->peripheralId = PRCM_GPIOA0; + break; + case Port1: + obj->baseAddr = CC3220SF_GPIOA1_BASE; + obj->peripheralId = PRCM_GPIOA1; + break; + case Port2: + obj->baseAddr = CC3220SF_GPIOA2_BASE; + obj->peripheralId = PRCM_GPIOA2; + break; + case Port3: + obj->baseAddr = CC3220SF_GPIOA3_BASE; + obj->peripheralId = PRCM_GPIOA3; + break; } // initialize GPIO PORT clock PRCMPeripheralClkEnable(obj->peripheralId, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); // wait for GPIO clock to settle - while(!PRCMPeripheralStatusGet(obj->peripheralId)); + while (!PRCMPeripheralStatusGet(obj->peripheralId)); for (int i = 0; i < 8; i++) { if (obj->mask & (1 << i)) { @@ -84,7 +98,8 @@ void port_init(port_t *obj, PortName port, int mask, PinDirection dir) { port_dir(obj, dir); } -void port_mode(port_t *obj, PinMode mode) { +void port_mode(port_t *obj, PinMode mode) +{ for (int i = 0; i < 8; i++) { if (obj->mask & (1 << i)) { pin_mode(port_pin(obj->port, i), mode); @@ -92,17 +107,24 @@ void port_mode(port_t *obj, PinMode mode) { } } -void port_dir(port_t *obj, PinDirection dir) { +void port_dir(port_t *obj, PinDirection dir) +{ switch (dir) { - case PIN_INPUT: GPIODirModeSet(obj->baseAddr, obj->mask, GPIO_DIR_MODE_IN); break; - case PIN_OUTPUT: GPIODirModeSet(obj->baseAddr, obj->mask, GPIO_DIR_MODE_OUT); break; + case PIN_INPUT: + GPIODirModeSet(obj->baseAddr, obj->mask, GPIO_DIR_MODE_IN); + break; + case PIN_OUTPUT: + GPIODirModeSet(obj->baseAddr, obj->mask, GPIO_DIR_MODE_OUT); + break; } } -void port_write(port_t *obj, int value) { +void port_write(port_t *obj, int value) +{ GPIOPinWrite(obj->baseAddr, obj->mask, value); } -int port_read(port_t *obj) { +int port_read(port_t *obj) +{ return (int)(GPIOPinRead(obj->baseAddr, obj->mask)); } diff --git a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/pwmout_api.c b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/pwmout_api.c index 348bd2fc0f..01eeef57df 100644 --- a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/pwmout_api.c +++ b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/pwmout_api.c @@ -1,5 +1,5 @@ /* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited + * Copyright (c) 2018-2019 ARM Limited * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -18,13 +18,14 @@ #include "pinmap.h" #include "PeripheralPins.h" -#include -#include -#include +#include "ti/drivers/pwm/PWMTimerCC32XX.h" +#include "ti/drivers/PWM.h" +#include "CC3220SF_LAUNCHXL.h" extern const PWM_Config PWM_config[]; -void pwmout_init(pwmout_t* obj, PinName pin) { +void pwmout_init(pwmout_t *obj, PinName pin) +{ PWM_Params pwmParams; int pwmIndex = CC3220SF_LAUNCHXL_PWMCOUNT; @@ -35,7 +36,7 @@ void pwmout_init(pwmout_t* obj, PinName pin) { obj->pwm = pwm; - switch(pin) { + switch (pin) { case PIN_01: pwmIndex = CC3220SF_LAUNCHXL_PWM6; break; @@ -61,7 +62,7 @@ void pwmout_init(pwmout_t* obj, PinName pin) { break; default: - while(1); + while (1); } obj->handle = (void *)&PWM_config[pwmIndex]; @@ -72,55 +73,60 @@ void pwmout_init(pwmout_t* obj, PinName pin) { obj->duty_percent = PWM_DEFAULT_DUTY_PERCENT; obj->period_us = PWM_DEFAULT_PERIOD_US; - if (PWM_open(pwmIndex, &pwmParams)) - { + if (PWM_open(pwmIndex, &pwmParams)) { PWM_start((PWM_Handle)obj->handle); - } - else - { - while(1); + } else { + while (1); } } -void pwmout_free(pwmout_t* obj) { +void pwmout_free(pwmout_t *obj) +{ PWM_stop((PWM_Handle)obj->handle); PWM_close((PWM_Handle)obj->handle); } -void pwmout_write(pwmout_t* obj, float value) { - PWM_setDuty((PWM_Handle)obj->handle, value*100); +void pwmout_write(pwmout_t *obj, float value) +{ + PWM_setDuty((PWM_Handle)obj->handle, value * 100); obj->duty_percent = value; } -float pwmout_read(pwmout_t* obj) { +float pwmout_read(pwmout_t *obj) +{ return (obj->duty_percent); } -void pwmout_period(pwmout_t* obj, float seconds) { +void pwmout_period(pwmout_t *obj, float seconds) +{ pwmout_period_us(obj, seconds * 1000 * 1000); } -void pwmout_period_ms(pwmout_t* obj, int ms) { +void pwmout_period_ms(pwmout_t *obj, int ms) +{ pwmout_period_us(obj, ms * 1000); } // Set the PWM period, keeping the duty cycle the same. -void pwmout_period_us(pwmout_t* obj, int us) { +void pwmout_period_us(pwmout_t *obj, int us) +{ PWM_setPeriod((PWM_Handle)obj->handle, us); obj->period_us = us; } -void pwmout_pulsewidth(pwmout_t* obj, float seconds) { +void pwmout_pulsewidth(pwmout_t *obj, float seconds) +{ pwmout_pulsewidth_us(obj, seconds * 1000000.0f); } -void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) { +void pwmout_pulsewidth_ms(pwmout_t *obj, int ms) +{ pwmout_pulsewidth_us(obj, ms * 1000); } -void pwmout_pulsewidth_us(pwmout_t* obj, int us) { - if (obj->period_us) - { +void pwmout_pulsewidth_us(pwmout_t *obj, int us) +{ + if (obj->period_us) { float value = (float)us / (float)obj->period_us; pwmout_write(obj, value); } diff --git a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/rtc_api.c b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/rtc_api.c index ed488ae419..81d4ad8207 100644 --- a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/rtc_api.c +++ b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/rtc_api.c @@ -1,5 +1,5 @@ /* mbed Microcontroller Library - * Copyright (c) 2018 ARM Limited + * Copyright (c) 2018-2019 ARM Limited * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -20,33 +20,36 @@ #include "ti/devices/cc32xx/inc/hw_types.h" #include "ti/devices/cc32xx/driverlib/prcm.h" -void rtc_init(void) { +void rtc_init(void) +{ static bool rtc_initialized = false; - if (!rtc_initialized) - { - if (!PRCMRTCInUseGet()) - { + if (!rtc_initialized) { + if (!PRCMRTCInUseGet()) { PRCMRTCInUseSet(); } rtc_initialized = true; } } -void rtc_free(void) { +void rtc_free(void) +{ } -int rtc_isenabled(void) { +int rtc_isenabled(void) +{ return PRCMRTCInUseGet(); } -time_t rtc_read(void) { +time_t rtc_read(void) +{ unsigned long ulSecs = 0; unsigned short usMsec = 0; PRCMRTCGet(&ulSecs, &usMsec); return ulSecs; } -void rtc_write(time_t t) { +void rtc_write(time_t t) +{ PRCMRTCSet(t, 0); } #endif diff --git a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/spi_api.c b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/spi_api.c index cdfc8ac922..11e3f5527f 100644 --- a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/spi_api.c +++ b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/spi_api.c @@ -1,5 +1,5 @@ /* mbed Microcontroller Library - * Copyright (c) 2018 ARM Limited + * Copyright (c) 2018-2019 ARM Limited * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -46,8 +46,7 @@ static void spi_configure_driver_instance(spi_t *obj) struct spi_s *spi_inst = obj; #endif - if (spi_inst->clock_update) - { + if (spi_inst->clock_update) { SPIReset(spi_inst->baseAddr); SPIConfigSetExpClk(spi_inst->baseAddr, spi_inst->clock_config.ulSPIClk, spi_inst->clock_config.ulBitRate, spi_inst->clock_config.ulMode, @@ -100,12 +99,9 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel spi_inst->clock_config.ulConfig = SPI_4PIN_MODE; spi_inst->clock_config.ulConfig |= SPI_HW_CTRL_CS; spi_inst->clock_config.ulConfig |= SPI_CS_ACTIVELOW; - if (ssel == NC) - { + if (ssel == NC) { spi_inst->cs_control_gpio = true; - } - else - { + } else { spi_inst->cs_control_gpio = false; } spi_inst->clock_config.ulConfig |= SPI_TURBO_OFF; @@ -120,8 +116,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel MAP_PinTypeSPI((unsigned long) mosi & 0xff, (unsigned long) PIN_MODE_SPI); MAP_PinTypeSPI((unsigned long) miso & 0xff, (unsigned long) PIN_MODE_SPI); MAP_PinTypeSPI((unsigned long) sclk & 0xff, (unsigned long) PIN_MODE_SPI); - if (ssel != NC) - { + if (ssel != NC) { MAP_PinTypeSPI((unsigned long) ssel & 0xff, (unsigned long) PIN_MODE_SPI); } spi_inst->clock_update = true; @@ -163,8 +158,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) #else struct spi_s *spi_inst = obj; #endif - if ((uint32_t)bits != spi_inst->word_length) - { + if ((uint32_t)bits != spi_inst->word_length) { spi_inst->word_length = bits; spi_inst->clock_update = true; } @@ -180,30 +174,26 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) /* Convert Mbed HAL mode to TI mode. */ - if(mode == 0) { - if (spi_inst->clock_config.ulSubMode != SPI_SUB_MODE_0) - { + if (mode == 0) { + if (spi_inst->clock_config.ulSubMode != SPI_SUB_MODE_0) { spi_inst->clock_update = true; } spi_inst->clock_config.ulSubMode = SPI_SUB_MODE_0; - } else if(mode == 1) { - if (spi_inst->clock_config.ulSubMode != SPI_SUB_MODE_1) - { + } else if (mode == 1) { + if (spi_inst->clock_config.ulSubMode != SPI_SUB_MODE_1) { spi_inst->clock_update = true; } spi_inst->clock_config.ulSubMode = SPI_SUB_MODE_1; - } else if(mode == 2) { - if (spi_inst->clock_config.ulSubMode != SPI_SUB_MODE_2) - { + } else if (mode == 2) { + if (spi_inst->clock_config.ulSubMode != SPI_SUB_MODE_2) { spi_inst->clock_update = true; } spi_inst->clock_config.ulSubMode = SPI_SUB_MODE_2; - } else if(mode == 3) { - if (spi_inst->clock_config.ulSubMode != SPI_SUB_MODE_3) - { + } else if (mode == 3) { + if (spi_inst->clock_config.ulSubMode != SPI_SUB_MODE_3) { spi_inst->clock_update = true; } - spi_inst->clock_config.ulSubMode= SPI_SUB_MODE_3; + spi_inst->clock_config.ulSubMode = SPI_SUB_MODE_3; } spi_configure_driver_instance(spi_inst); } @@ -224,8 +214,7 @@ void spi_frequency(spi_t *obj, int hz) #endif spi_inst->clock_config.ulSPIClk = PRCMPeripheralClockGet(PRCM_GSPI); - if (spi_inst->clock_config.ulBitRate != (uint32_t)hz) - { + if (spi_inst->clock_config.ulBitRate != (uint32_t)hz) { spi_inst->clock_update = true; spi_inst->clock_config.ulBitRate = hz; } @@ -251,15 +240,13 @@ int spi_master_write(spi_t *obj, int value) /* Configure peripheral if necessary. */ spi_configure_driver_instance(obj); - if (!spi_inst->cs_control_gpio) - { + if (!spi_inst->cs_control_gpio) { SPICSEnable(spi_inst->baseAddr); } /* Transfer a data word. */ SPIDataPut(spi_inst->baseAddr, value); SPIDataGet(spi_inst->baseAddr, (unsigned long *)&data_read); - if (!spi_inst->cs_control_gpio) - { + if (!spi_inst->cs_control_gpio) { SPICSDisable(spi_inst->baseAddr); } return data_read & ((1 << spi_inst->word_length) - 1); @@ -294,18 +281,12 @@ int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, cha /* Configure peripheral if necessary. */ spi_configure_driver_instance(obj); - if (tx_length >= rx_length) - { - if (spi_inst->word_length == 16) - { + if (tx_length >= rx_length) { + if (spi_inst->word_length == 16) { spi_words = (tx_length >> 1); - } - else if (spi_inst->word_length == 32) - { + } else if (spi_inst->word_length == 32) { spi_words = (tx_length >> 2); - } - else if (spi_inst->word_length == 8) - { + } else if (spi_inst->word_length == 8) { spi_words = tx_length; } @@ -314,40 +295,30 @@ int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, cha (unsigned char *)rx_temp, (unsigned long) spi_words, SPI_CS_ENABLE | SPI_CS_DISABLE); // Copy the desired data from temp_rx - for (i = 0; i < rx_length; i ++) - { + for (i = 0; i < rx_length; i ++) { rx_buffer[i] = rx_temp[i]; } free(rx_temp); return (tx_length); - } - else // tx_length < rx_length + } else // tx_length < rx_length // Copy the data from tx_buffer to a temp buffer and fill the the rest of the tx_buffer with write_fill) { - if (spi_inst->word_length == 16) - { + if (spi_inst->word_length == 16) { spi_words = (rx_length >> 1); - } - else if (spi_inst->word_length == 32) - { + } else if (spi_inst->word_length == 32) { spi_words = (rx_length >> 2); - } - else if (spi_inst->word_length == 8) - { + } else if (spi_inst->word_length == 8) { spi_words = rx_length; } unsigned char *tx_temp = malloc(rx_length); - for (i = 0; i < tx_length; i ++) - { + for (i = 0; i < tx_length; i ++) { tx_temp[i] = tx_buffer[i]; } - for (i = tx_length; i < rx_length; i ++) - { + for (i = tx_length; i < rx_length; i ++) { tx_temp[i] = write_fill; } - if (!spi_inst->cs_control_gpio) - { + if (!spi_inst->cs_control_gpio) { cs_flags = SPI_CS_ENABLE | SPI_CS_DISABLE; } SPITransfer(spi_inst->baseAddr, (unsigned char *)tx_temp, diff --git a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/trng_api.c b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/trng_api.c index 104a525f19..f8456db540 100644 --- a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/trng_api.c +++ b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/trng_api.c @@ -1,7 +1,7 @@ /* * Hardware entropy collector for the CC3200 * - * Copyright (C) 2018, ARM Limited, All Rights Reserved + * Copyright (C) 2018-2019, ARM Limited, All Rights Reserved * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); you may @@ -34,15 +34,11 @@ void trng_init(trng_t *obj) static bool trng_initialized = false; (void)obj; - if (!trng_initialized) - { + if (!trng_initialized) { int ret = CC3220SF_initSimplelink(); - if (ret == 0) - { + if (ret == 0) { trng_initialized = true; - } - else - { + } else { printf("trng_init failed with %d\n", ret); } } @@ -62,22 +58,16 @@ int trng_get_bytes(trng_t *obj, uint8_t *output, size_t length, size_t *output_l (void)obj; /* Retrieve a buffer of true random numbers from the networking subsystem. Maximum buffer length is 172 bytes for each retrieval. if the requested length exceeds 172 bytes, it is trimmed to 172 bytes.*/ - if (length > 172) - { + if (length > 172) { bytes_count = 172; } - if (output) - { - status = sl_NetUtilGet(SL_NETUTIL_TRUE_RANDOM,0,output,&bytes_count); - if (output_length) - { - if (status == 0) - { + if (output) { + status = sl_NetUtilGet(SL_NETUTIL_TRUE_RANDOM, 0, output, &bytes_count); + if (output_length) { + if (status == 0) { *output_length = bytes_count; return 0; - } - else - { + } else { printf("sl_NetUtilGet failed with %d\n", status); *output_length = 0; } diff --git a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/us_ticker.c b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/us_ticker.c index 4aeb613faf..a2603e8ee2 100644 --- a/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/us_ticker.c +++ b/targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/us_ticker.c @@ -1,5 +1,5 @@ /* mbed Microcontroller Library - * Copyright (c) 2006-2015 ARM Limited + * Copyright (c) 2018-2019 ARM Limited * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -28,7 +28,7 @@ bool us_ticker_initialized = false; -const ticker_info_t* us_ticker_get_info() +const ticker_info_t *us_ticker_get_info() { static const ticker_info_t info = { US_TICKER_FREQ, @@ -38,21 +38,18 @@ const ticker_info_t* us_ticker_get_info() } void us_ticker_init(void) { - if (!us_ticker_initialized) - { + if (!us_ticker_initialized) { TimerDisable(TIMERA0_BASE, TIMER_A); TimerConfigure(TIMERA0_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_PERIODIC); TimerIntClear(TIMERA0_BASE, TIMER_TIMA_DMA | TIMER_TIMA_MATCH | TIMER_CAPA_EVENT | - TIMER_CAPA_MATCH | TIMER_TIMA_TIMEOUT); - TimerPrescaleSet(TIMERA0_BASE, TIMER_A, (80-1)); + TIMER_CAPA_MATCH | TIMER_TIMA_TIMEOUT); + TimerPrescaleSet(TIMERA0_BASE, TIMER_A, (80 - 1)); TimerEnable(TIMERA0_BASE, TIMER_A); NVIC_ClearPendingIRQ(INT_TIMERA0A_IRQn); NVIC_SetVector(INT_TIMERA0A_IRQn, (uint32_t)us_ticker_irq_handler); NVIC_EnableIRQ(INT_TIMERA0A_IRQn); us_ticker_initialized = true; - } - else - { + } else { // Disable match interrupt. This is mbed OS requirement. TimerIntDisable(TIMERA0_BASE, TIMER_TIMA_MATCH); // Clear pending interrupt @@ -90,8 +87,7 @@ void us_ticker_fire_interrupt(void) void us_ticker_free(void) { - if (us_ticker_initialized) - { + if (us_ticker_initialized) { TimerDisable(TIMERA0_BASE, TIMER_A); NVIC_DisableIRQ(INT_TIMERA0A_IRQn); us_ticker_initialized = false;