mirror of https://github.com/ARMmbed/mbed-os.git
STM32G0: Update G071xx toolchain files with default files
jeromecoutant
parent
cf2dfcbc60
commit
9448ded044
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@ -32,8 +32,8 @@
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EXPORT __Vectors
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EXPORT __Vectors_End
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EXPORT __Vectors_Size
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IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
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IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
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__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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@ -197,6 +197,11 @@ CEC_IRQHandler
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ENDP
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ALIGN
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;*******************************************************************************
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; User Stack and Heap initialization
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;*******************************************************************************
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END
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;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
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@ -5,7 +5,7 @@
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;******************************************************************************
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;* @attention
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;*
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;* Copyright (c) 2016 STMicroelectronics.
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;* Copyright (c) 2016-2020 STMicroelectronics.
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;* All rights reserved.
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;*
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;* This software component is licensed by ST under BSD 3-Clause license,
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@ -14,6 +14,7 @@
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;* opensource.org/licenses/BSD-3-Clause
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;*
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;******************************************************************************
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#include "../cmsis_nvic.h"
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#if !defined(MBED_APP_START)
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@ -25,35 +26,28 @@
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#endif
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#if !defined(MBED_BOOT_STACK_SIZE)
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/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
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#define MBED_BOOT_STACK_SIZE 0x400
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#endif
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#define Stack_Size MBED_BOOT_STACK_SIZE
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/* Round up VECTORS_SIZE to 8 bytes */
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#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
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#define MBED_VECTTABLE_RAM_START (NVIC_RAM_VECTOR_ADDRESS)
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#define MBED_VECTTABLE_RAM_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
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LR_IROM1 MBED_APP_START MBED_APP_SIZE {
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#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
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#define MBED_CRASH_REPORT_RAM_SIZE 0x100
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#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
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#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
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LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
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ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
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ER_IROM1 MBED_APP_START MBED_APP_SIZE {
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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}
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RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
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}
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RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data
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RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
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.ANY (+RW +ZI)
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}
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ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
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}
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ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
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}
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}
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@ -25,7 +25,7 @@
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*/
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.syntax unified
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.cpu cortex-m0plus
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.cpu cortex-m0
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.fpu softvfp
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.thumb
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@ -83,11 +83,8 @@ LoopFillZerobss:
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/* Call the clock system intitialization function.*/
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bl SystemInit
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/* Call static constructors */
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//bl __libc_init_array
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/* Call the application's entry point.*/
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//bl main
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bl _start
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bx lr
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LoopForever:
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b LoopForever
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@ -4,7 +4,7 @@
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2016 STMicroelectronics.
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* Copyright (c) 2016-2020 STMicroelectronics.
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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@ -14,8 +14,10 @@
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*
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******************************************************************************
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*/
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#include "../cmsis_nvic.h"
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#if !defined(MBED_APP_START)
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#define MBED_APP_START MBED_ROM_START
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#endif
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@ -24,27 +26,19 @@
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#define MBED_APP_SIZE MBED_ROM_SIZE
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#endif
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#if !defined(MBED_BOOT_STACK_SIZE)
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/* This value is normally defined by the tools
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to 0x1000 for bare metal and 0x400 for RTOS */
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#define MBED_BOOT_STACK_SIZE 0x400
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#endif
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STACK_SIZE = MBED_BOOT_STACK_SIZE;
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#define MBED_VECTTABLE_RAM_START (NVIC_RAM_VECTOR_ADDRESS)
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#define MBED_VECTTABLE_RAM_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
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#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
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#define MBED_CRASH_REPORT_RAM_SIZE 0x100
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#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
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#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
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/* Round up VECTORS_SIZE to 8 bytes */
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#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
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MEMORY
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{
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FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
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RAM (rwx) : ORIGIN = MBED_RAM0_START, LENGTH = MBED_RAM0_SIZE
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RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
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}
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/* Linker script to place sections and symbol values. Should be used together
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@ -82,6 +76,7 @@ SECTIONS
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{
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KEEP(*(.isr_vector))
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*(.text*)
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KEEP(*(.init))
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KEEP(*(.fini))
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@ -116,21 +111,12 @@ SECTIONS
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} > FLASH
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__exidx_end = .;
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__etext = .;
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/* Location counter can end up 2byte aligned with narrow Thumb code but
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__etext is assumed by startup code to be the LMA of a section in RAM
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which must be 8-byte aligned */
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__etext = ALIGN (8);
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_sidata = .;
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.crash_data_ram :
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{
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. = ALIGN(8);
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__CRASH_DATA_RAM__ = .;
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__CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */
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KEEP(*(.keep.crash_data_ram))
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*(.m_crash_data_ram) /* This is a user defined section */
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. += MBED_CRASH_REPORT_RAM_SIZE;
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. = ALIGN(8);
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__CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
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} > RAM
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.data : AT (__etext)
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{
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__data_start__ = .;
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@ -151,7 +137,6 @@ SECTIONS
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KEEP(*(.init_array))
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PROVIDE_HIDDEN (__init_array_end = .);
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. = ALIGN(8);
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/* finit data */
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PROVIDE_HIDDEN (__fini_array_start = .);
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@ -167,6 +152,19 @@ SECTIONS
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} > RAM
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/* Uninitialized data section
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* This region is not initialized by the C/C++ library and can be used to
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* store state across soft reboots. */
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.uninitialized (NOLOAD):
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{
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. = ALIGN(32);
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__uninitialized_start = .;
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*(.uninitialized)
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KEEP(*(.keep.uninitialized))
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. = ALIGN(32);
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__uninitialized_end = .;
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} > RAM
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.bss :
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{
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. = ALIGN(8);
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@ -182,9 +180,9 @@ SECTIONS
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.heap (COPY):
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{
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__end__ = .;
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end = __end__;
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PROVIDE(end = .);
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*(.heap*)
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. = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE;
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. = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
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__HeapLimit = .;
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} > RAM
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@ -200,7 +198,7 @@ SECTIONS
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* size of stack_dummy section */
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__StackTop = ORIGIN(RAM) + LENGTH(RAM);
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_estack = __StackTop;
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__StackLimit = __StackTop - STACK_SIZE;
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__StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
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PROVIDE(__stack = __StackTop);
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/* Check if data + heap + stack exceeds RAM limit */
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@ -4,7 +4,7 @@
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2016 STMicroelectronics.
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* Copyright (c) 2016-2020 STMicroelectronics.
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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@ -18,7 +18,7 @@
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/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
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define symbol VECTORS = 48; /* This value must match NVIC_NUM_VECTORS */
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define symbol VECTORS = 47; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
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define symbol HEAP_SIZE = 0x2000;
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/* Common - Do not change */
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@ -1,9 +1,10 @@
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/* mbed Microcontroller Library
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* SPDX-License-Identifier: BSD-3-Clause
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2014 STMicroelectronics.
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* All rights reserved.
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* <h2><center>© Copyright (c) 2016-2020 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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@ -11,15 +12,35 @@
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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*/
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#ifndef MBED_CMSIS_NVIC_H
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#define MBED_CMSIS_NVIC_H
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// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
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// MCU Peripherals: 32 vectors = 128 bytes from 0x40 to 0xBF
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// Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM
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#define NVIC_NUM_VECTORS 48
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#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of RAM
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#if !defined(MBED_ROM_START)
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#define MBED_ROM_START 0x8000000
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#endif
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#if !defined(MBED_ROM_SIZE)
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#if defined (TARGET_NUCLEO_G071RB)
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#define MBED_ROM_SIZE 0x20000
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#else
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// 0x10000 STM32G071C8Ux STM32G071K8TxN STM32G071R8Tx STM32G071K8Ux STM32G071G8UxN STM32G071C8Tx STM32G071K8Tx STM32G071K8UxN STM32G071G8Ux
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// 0x8000 STM32G071K6Tx STM32G071G6Ux STM32G071C6Tx STM32G071K6Ux STM32G071R6Tx STM32G071C6Ux
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// 0x20000 STM32G071GBUxN STM32G071CBUx STM32G071KBTx STM32G071KBUxN STM32G071RBTx STM32G071EBYx STM32G071GBUx STM32G071CBTx STM32G071KBUx STM32G071RBIx STM32G071KBTxN
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#error "MBED_ROM_SIZE not defined"
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#endif
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#endif
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#if !defined(MBED_RAM_START)
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#define MBED_RAM_START 0x20000000
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#endif
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#if !defined(MBED_RAM_SIZE)
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#define MBED_RAM_SIZE 0x9000
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#endif
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#define NVIC_NUM_VECTORS 47
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#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
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#endif
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