From 9448ded04483cd0c70532898cb67124da705c2d2 Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Tue, 7 Jan 2020 17:00:30 +0100 Subject: [PATCH] STM32G0: Update G071xx toolchain files with default files --- .../TOOLCHAIN_ARM_STD/startup_stm32g071xx.S | 9 ++- .../TOOLCHAIN_ARM_STD/stm32g071xx.sct | 40 +++++------ .../TOOLCHAIN_GCC_ARM/startup_stm32g071xx.S | 11 ++- .../TOOLCHAIN_GCC_ARM/stm32g071xx.ld | 72 +++++++++---------- .../TOOLCHAIN_IAR/stm32g071xx.icf | 4 +- .../TARGET_STM32G071xx/cmsis_nvic.h | 37 +++++++--- 6 files changed, 94 insertions(+), 79 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_ARM_STD/startup_stm32g071xx.S b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_ARM_STD/startup_stm32g071xx.S index 8ec3cf0f11..6670c790e1 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_ARM_STD/startup_stm32g071xx.S +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_ARM_STD/startup_stm32g071xx.S @@ -32,9 +32,9 @@ EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size - IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit| -__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack + IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit| +__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler @@ -197,6 +197,11 @@ CEC_IRQHandler ENDP ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + END ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_ARM_STD/stm32g071xx.sct b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_ARM_STD/stm32g071xx.sct index 968c7253b1..50f930c713 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_ARM_STD/stm32g071xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_ARM_STD/stm32g071xx.sct @@ -5,7 +5,7 @@ ;****************************************************************************** ;* @attention ;* -;* Copyright (c) 2016 STMicroelectronics. +;* Copyright (c) 2016-2020 STMicroelectronics. ;* All rights reserved. ;* ;* This software component is licensed by ST under BSD 3-Clause license, @@ -14,46 +14,40 @@ ;* opensource.org/licenses/BSD-3-Clause ;* ;****************************************************************************** + #include "../cmsis_nvic.h" #if !defined(MBED_APP_START) - #define MBED_APP_START MBED_ROM_START + #define MBED_APP_START MBED_ROM_START #endif #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE MBED_ROM_SIZE + #define MBED_APP_SIZE MBED_ROM_SIZE #endif #if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ + #define MBED_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +/* Round up VECTORS_SIZE to 8 bytes */ +#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7) -#define MBED_VECTTABLE_RAM_START (NVIC_RAM_VECTOR_ADDRESS) -#define MBED_VECTTABLE_RAM_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7) +LR_IROM1 MBED_APP_START MBED_APP_SIZE { -#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE) -#define MBED_CRASH_REPORT_RAM_SIZE 0x100 - -#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE) -#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE) - -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region - - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address - *.o (RESET, +First) - *(InRoot$$Sections) - .ANY (+RO) + ER_IROM1 MBED_APP_START MBED_APP_SIZE { + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) } - RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data + RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data + .ANY (+RW +ZI) } - RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data - .ANY (+RW +ZI) + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_GCC_ARM/startup_stm32g071xx.S b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_GCC_ARM/startup_stm32g071xx.S index 5f07ce0b03..ab2d277827 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_GCC_ARM/startup_stm32g071xx.S +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_GCC_ARM/startup_stm32g071xx.S @@ -17,7 +17,7 @@ * Copyright (c) 2018 STMicroelectronics. All rights reserved. * * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the + * the "License"; You may not use this file except in compliance with the * License. You may obtain a copy of the License at: * opensource.org/licenses/BSD-3-Clause * @@ -25,7 +25,7 @@ */ .syntax unified - .cpu cortex-m0plus + .cpu cortex-m0 .fpu softvfp .thumb @@ -83,11 +83,8 @@ LoopFillZerobss: /* Call the clock system intitialization function.*/ bl SystemInit -/* Call static constructors */ - //bl __libc_init_array -/* Call the application's entry point.*/ - //bl main - bl _start + bl _start + bx lr LoopForever: b LoopForever diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_GCC_ARM/stm32g071xx.ld b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_GCC_ARM/stm32g071xx.ld index 3ccab2915b..fd05c82aaf 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_GCC_ARM/stm32g071xx.ld +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_GCC_ARM/stm32g071xx.ld @@ -4,7 +4,7 @@ ****************************************************************************** * @attention * - * Copyright (c) 2016 STMicroelectronics. + * Copyright (c) 2016-2020 STMicroelectronics. * All rights reserved. * * This software component is licensed by ST under BSD 3-Clause license, @@ -14,44 +14,38 @@ * ****************************************************************************** */ + #include "../cmsis_nvic.h" + #if !defined(MBED_APP_START) - #define MBED_APP_START MBED_ROM_START + #define MBED_APP_START MBED_ROM_START #endif #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE MBED_ROM_SIZE + #define MBED_APP_SIZE MBED_ROM_SIZE #endif - #if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 + /* This value is normally defined by the tools + to 0x1000 for bare metal and 0x400 for RTOS */ + #define MBED_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; - -#define MBED_VECTTABLE_RAM_START (NVIC_RAM_VECTOR_ADDRESS) -#define MBED_VECTTABLE_RAM_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8) - -#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE) -#define MBED_CRASH_REPORT_RAM_SIZE 0x100 - - -#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE) -#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE) +/* Round up VECTORS_SIZE to 8 bytes */ +#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8) MEMORY -{ - FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE - RAM (rwx) : ORIGIN = MBED_RAM0_START, LENGTH = MBED_RAM0_SIZE +{ + FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE + RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE } /* Linker script to place sections and symbol values. Should be used together * with other linker script that defines memory regions FLASH and RAM. * It references following symbols, which must be defined in code: * Reset_Handler : Entry of reset handler - * + * * It defines following symbols, which code can use without definition: * __exidx_start * __exidx_end @@ -82,6 +76,7 @@ SECTIONS { KEEP(*(.isr_vector)) *(.text*) + KEEP(*(.init)) KEEP(*(.fini)) @@ -116,21 +111,12 @@ SECTIONS } > FLASH __exidx_end = .; - __etext = .; + /* Location counter can end up 2byte aligned with narrow Thumb code but + __etext is assumed by startup code to be the LMA of a section in RAM + which must be 8-byte aligned */ + __etext = ALIGN (8); _sidata = .; - .crash_data_ram : - { - . = ALIGN(8); - __CRASH_DATA_RAM__ = .; - __CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */ - KEEP(*(.keep.crash_data_ram)) - *(.m_crash_data_ram) /* This is a user defined section */ - . += MBED_CRASH_REPORT_RAM_SIZE; - . = ALIGN(8); - __CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */ - } > RAM - .data : AT (__etext) { __data_start__ = .; @@ -151,7 +137,6 @@ SECTIONS KEEP(*(.init_array)) PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); @@ -167,6 +152,19 @@ SECTIONS } > RAM + /* Uninitialized data section + * This region is not initialized by the C/C++ library and can be used to + * store state across soft reboots. */ + .uninitialized (NOLOAD): + { + . = ALIGN(32); + __uninitialized_start = .; + *(.uninitialized) + KEEP(*(.keep.uninitialized)) + . = ALIGN(32); + __uninitialized_end = .; + } > RAM + .bss : { . = ALIGN(8); @@ -182,9 +180,9 @@ SECTIONS .heap (COPY): { __end__ = .; - end = __end__; + PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -200,7 +198,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_IAR/stm32g071xx.icf b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_IAR/stm32g071xx.icf index 71acb8d6f8..00101fa56e 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_IAR/stm32g071xx.icf +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_IAR/stm32g071xx.icf @@ -4,7 +4,7 @@ ****************************************************************************** * @attention * - * Copyright (c) 2016 STMicroelectronics. + * Copyright (c) 2016-2020 STMicroelectronics. * All rights reserved. * * This software component is licensed by ST under BSD 3-Clause license, @@ -18,7 +18,7 @@ /* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */ -define symbol VECTORS = 48; /* This value must match NVIC_NUM_VECTORS */ +define symbol VECTORS = 47; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */ define symbol HEAP_SIZE = 0x2000; /* Common - Do not change */ diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/cmsis_nvic.h index 1f4ab16ff0..90dd67406a 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/cmsis_nvic.h +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/cmsis_nvic.h @@ -1,9 +1,10 @@ /* mbed Microcontroller Library * SPDX-License-Identifier: BSD-3-Clause ****************************************************************************** + * @attention * - * Copyright (c) 2014 STMicroelectronics. - * All rights reserved. + *

© Copyright (c) 2016-2020 STMicroelectronics. + * All rights reserved.

* * This software component is licensed by ST under BSD 3-Clause license, * the "License"; You may not use this file except in compliance with the @@ -11,15 +12,35 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ +*/ #ifndef MBED_CMSIS_NVIC_H #define MBED_CMSIS_NVIC_H -// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F -// MCU Peripherals: 32 vectors = 128 bytes from 0x40 to 0xBF -// Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM -#define NVIC_NUM_VECTORS 48 -#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of RAM +#if !defined(MBED_ROM_START) +#define MBED_ROM_START 0x8000000 +#endif + +#if !defined(MBED_ROM_SIZE) +#if defined (TARGET_NUCLEO_G071RB) +#define MBED_ROM_SIZE 0x20000 +#else + // 0x10000 STM32G071C8Ux STM32G071K8TxN STM32G071R8Tx STM32G071K8Ux STM32G071G8UxN STM32G071C8Tx STM32G071K8Tx STM32G071K8UxN STM32G071G8Ux + // 0x8000 STM32G071K6Tx STM32G071G6Ux STM32G071C6Tx STM32G071K6Ux STM32G071R6Tx STM32G071C6Ux + // 0x20000 STM32G071GBUxN STM32G071CBUx STM32G071KBTx STM32G071KBUxN STM32G071RBTx STM32G071EBYx STM32G071GBUx STM32G071CBTx STM32G071KBUx STM32G071RBIx STM32G071KBTxN +#error "MBED_ROM_SIZE not defined" +#endif +#endif + +#if !defined(MBED_RAM_START) +#define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) +#define MBED_RAM_SIZE 0x9000 +#endif + +#define NVIC_NUM_VECTORS 47 +#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START #endif