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Lot of small fixes to cmsis code so it works correctly.

pull/8/head
Joe Turner 2013-05-13 14:34:38 +01:00
parent 179b7f677e
commit 8efa81bb32
5 changed files with 99 additions and 3 deletions
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84
libraries/mbed/vendor/STM/cmsis/STM32F407/GCC_ARM/startup_STM32F40x.s vendored
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@ -248,6 +248,90 @@ Reset_Handler:
def_default_handler SysTick_Handler
def_default_handler Default_Handler
def_default_handler WWDG_IRQHandler
def_default_handler PVD_IRQHandler
def_default_handler TAMP_STAMP_IRQHandler
def_default_handler RTC_WKUP_IRQHandler
def_default_handler FLASH_IRQHandler
def_default_handler RCC_IRQHandler
def_default_handler EXTI0_IRQHandler
def_default_handler EXTI1_IRQHandler
def_default_handler EXTI2_IRQHandler
def_default_handler EXTI3_IRQHandler
def_default_handler EXTI4_IRQHandler
def_default_handler DMA1_Stream0_IRQHandler
def_default_handler DMA1_Stream1_IRQHandler
def_default_handler DMA1_Stream2_IRQHandler
def_default_handler DMA1_Stream3_IRQHandler
def_default_handler DMA1_Stream4_IRQHandler
def_default_handler DMA1_Stream5_IRQHandler
def_default_handler DMA1_Stream6_IRQHandler
def_default_handler ADC_IRQHandler
def_default_handler CAN1_TX_IRQHandler
def_default_handler CAN1_RX0_IRQHandler
def_default_handler CAN1_RX1_IRQHandler
def_default_handler CAN1_SCE_IRQHandler
def_default_handler EXTI9_5_IRQHandler
def_default_handler TIM1_BRK_TIM9_IRQHandler
def_default_handler TIM1_UP_TIM10_IRQHandler
def_default_handler TIM1_TRG_COM_TIM11_IRQHandler
def_default_handler TIM1_CC_IRQHandler
def_default_handler TIM2_IRQHandler
def_default_handler TIM3_IRQHandler
def_default_handler TIM4_IRQHandler
def_default_handler I2C1_EV_IRQHandler
def_default_handler I2C1_ER_IRQHandler
def_default_handler I2C2_EV_IRQHandler
def_default_handler I2C2_ER_IRQHandler
def_default_handler SPI1_IRQHandler
def_default_handler SPI2_IRQHandler
def_default_handler USART1_IRQHandler
def_default_handler USART2_IRQHandler
def_default_handler USART3_IRQHandler
def_default_handler EXTI15_10_IRQHandler
def_default_handler RTC_Alarm_IRQHandler
def_default_handler OTG_FS_WKUP_IRQHandler
def_default_handler TIM8_BRK_TIM12_IRQHandler
def_default_handler TIM8_UP_TIM13_IRQHandler
def_default_handler TIM8_TRG_COM_TIM14_IRQHandler
def_default_handler TIM8_CC_IRQHandler
def_default_handler DMA1_Stream7_IRQHandler
def_default_handler FSMC_IRQHandler
def_default_handler SDIO_IRQHandler
def_default_handler TIM5_IRQHandler
def_default_handler SPI3_IRQHandler
def_default_handler UART4_IRQHandler
def_default_handler UART5_IRQHandler
def_default_handler TIM6_DAC_IRQHandler
def_default_handler TIM7_IRQHandler
def_default_handler DMA2_Stream0_IRQHandler
def_default_handler DMA2_Stream1_IRQHandler
def_default_handler DMA2_Stream2_IRQHandler
def_default_handler DMA2_Stream3_IRQHandler
def_default_handler DMA2_Stream4_IRQHandler
def_default_handler ETH_IRQHandler
def_default_handler ETH_WKUP_IRQHandler
def_default_handler CAN2_TX_IRQHandler
def_default_handler CAN2_RX0_IRQHandler
def_default_handler CAN2_RX1_IRQHandler
def_default_handler CAN2_SCE_IRQHandler
def_default_handler OTG_FS_IRQHandler
def_default_handler DMA2_Stream5_IRQHandler
def_default_handler DMA2_Stream6_IRQHandler
def_default_handler DMA2_Stream7_IRQHandler
def_default_handler USART6_IRQHandler
def_default_handler I2C3_EV_IRQHandler
def_default_handler I2C3_ER_IRQHandler
def_default_handler OTG_HS_EP1_OUT_IRQHandler
def_default_handler OTG_HS_EP1_IN_IRQHandler
def_default_handler OTG_HS_WKUP_IRQHandler
def_default_handler OTG_HS_IRQHandler
def_default_handler DCMI_IRQHandler
def_default_handler CRYP_IRQHandler
def_default_handler HASH_RNG_IRQHandler
def_default_handler FPU_IRQHandler
.weak DEF_IRQHandler
.set DEF_IRQHandler, Default_Handler

2
libraries/mbed/vendor/STM/cmsis/STM32F407/cmsis_nvic.c vendored
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@ -6,7 +6,7 @@
#include "cmsis_nvic.h"
#define NVIC_NUM_VECTORS (16 + 81) // CORE + MCU Peripherals
#define NVIC_RAM_VECTOR_ADDRESS (0x10000000) // Location of vectors in RAM
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Location of vectors in RAM
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
static volatile uint32_t* vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;

2
libraries/mbed/vendor/STM/cmsis/STM32F407/stm32f4xx.h vendored
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@ -97,7 +97,7 @@
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */
#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
/**

2
libraries/mbed/vendor/STM/cmsis/STM32F407/system_stm32f4xx.c vendored
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@ -152,7 +152,7 @@
/************************* PLL Parameters *************************************/
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N */
#define PLL_M 25
#define PLL_M 8
#define PLL_N 336
/* SYSCLK = PLL_VCO / PLL_P */

12
libraries/mbed/vendor/STM/cmsis/options.json vendored Normal file
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@ -0,0 +1,12 @@
{
"objects": [
"core_cm4.o",
"core_cm4_simd.o",
"system_stm32f4xx.o",
"startup_STM32F40x.o",
"cmsis_nvic.o"
]
}