diff --git a/libraries/mbed/vendor/STM/cmsis/STM32F407/GCC_ARM/startup_STM32F40x.s b/libraries/mbed/vendor/STM/cmsis/STM32F407/GCC_ARM/startup_STM32F40x.s index d44d9378fd..e6e6fcc5a1 100644 --- a/libraries/mbed/vendor/STM/cmsis/STM32F407/GCC_ARM/startup_STM32F40x.s +++ b/libraries/mbed/vendor/STM/cmsis/STM32F407/GCC_ARM/startup_STM32F40x.s @@ -248,6 +248,90 @@ Reset_Handler: def_default_handler SysTick_Handler def_default_handler Default_Handler + def_default_handler WWDG_IRQHandler + def_default_handler PVD_IRQHandler + def_default_handler TAMP_STAMP_IRQHandler + def_default_handler RTC_WKUP_IRQHandler + def_default_handler FLASH_IRQHandler + def_default_handler RCC_IRQHandler + def_default_handler EXTI0_IRQHandler + def_default_handler EXTI1_IRQHandler + def_default_handler EXTI2_IRQHandler + def_default_handler EXTI3_IRQHandler + def_default_handler EXTI4_IRQHandler + def_default_handler DMA1_Stream0_IRQHandler + def_default_handler DMA1_Stream1_IRQHandler + def_default_handler DMA1_Stream2_IRQHandler + def_default_handler DMA1_Stream3_IRQHandler + def_default_handler DMA1_Stream4_IRQHandler + def_default_handler DMA1_Stream5_IRQHandler + def_default_handler DMA1_Stream6_IRQHandler + def_default_handler ADC_IRQHandler + def_default_handler CAN1_TX_IRQHandler + def_default_handler CAN1_RX0_IRQHandler + def_default_handler CAN1_RX1_IRQHandler + def_default_handler CAN1_SCE_IRQHandler + def_default_handler EXTI9_5_IRQHandler + def_default_handler TIM1_BRK_TIM9_IRQHandler + def_default_handler TIM1_UP_TIM10_IRQHandler + def_default_handler TIM1_TRG_COM_TIM11_IRQHandler + def_default_handler TIM1_CC_IRQHandler + def_default_handler TIM2_IRQHandler + def_default_handler TIM3_IRQHandler + def_default_handler TIM4_IRQHandler + def_default_handler I2C1_EV_IRQHandler + def_default_handler I2C1_ER_IRQHandler + def_default_handler I2C2_EV_IRQHandler + def_default_handler I2C2_ER_IRQHandler + def_default_handler SPI1_IRQHandler + def_default_handler SPI2_IRQHandler + def_default_handler USART1_IRQHandler + def_default_handler USART2_IRQHandler + def_default_handler USART3_IRQHandler + def_default_handler EXTI15_10_IRQHandler + def_default_handler RTC_Alarm_IRQHandler + def_default_handler OTG_FS_WKUP_IRQHandler + def_default_handler TIM8_BRK_TIM12_IRQHandler + def_default_handler TIM8_UP_TIM13_IRQHandler + def_default_handler TIM8_TRG_COM_TIM14_IRQHandler + def_default_handler TIM8_CC_IRQHandler + def_default_handler DMA1_Stream7_IRQHandler + def_default_handler FSMC_IRQHandler + def_default_handler SDIO_IRQHandler + def_default_handler TIM5_IRQHandler + def_default_handler SPI3_IRQHandler + def_default_handler UART4_IRQHandler + def_default_handler UART5_IRQHandler + def_default_handler TIM6_DAC_IRQHandler + def_default_handler TIM7_IRQHandler + def_default_handler DMA2_Stream0_IRQHandler + def_default_handler DMA2_Stream1_IRQHandler + def_default_handler DMA2_Stream2_IRQHandler + def_default_handler DMA2_Stream3_IRQHandler + def_default_handler DMA2_Stream4_IRQHandler + def_default_handler ETH_IRQHandler + def_default_handler ETH_WKUP_IRQHandler + def_default_handler CAN2_TX_IRQHandler + def_default_handler CAN2_RX0_IRQHandler + def_default_handler CAN2_RX1_IRQHandler + def_default_handler CAN2_SCE_IRQHandler + def_default_handler OTG_FS_IRQHandler + def_default_handler DMA2_Stream5_IRQHandler + def_default_handler DMA2_Stream6_IRQHandler + def_default_handler DMA2_Stream7_IRQHandler + def_default_handler USART6_IRQHandler + def_default_handler I2C3_EV_IRQHandler + def_default_handler I2C3_ER_IRQHandler + def_default_handler OTG_HS_EP1_OUT_IRQHandler + def_default_handler OTG_HS_EP1_IN_IRQHandler + def_default_handler OTG_HS_WKUP_IRQHandler + def_default_handler OTG_HS_IRQHandler + def_default_handler DCMI_IRQHandler + def_default_handler CRYP_IRQHandler + def_default_handler HASH_RNG_IRQHandler + def_default_handler FPU_IRQHandler + + .weak DEF_IRQHandler .set DEF_IRQHandler, Default_Handler diff --git a/libraries/mbed/vendor/STM/cmsis/STM32F407/cmsis_nvic.c b/libraries/mbed/vendor/STM/cmsis/STM32F407/cmsis_nvic.c index 76075ba27d..4066734242 100644 --- a/libraries/mbed/vendor/STM/cmsis/STM32F407/cmsis_nvic.c +++ b/libraries/mbed/vendor/STM/cmsis/STM32F407/cmsis_nvic.c @@ -6,7 +6,7 @@ #include "cmsis_nvic.h" #define NVIC_NUM_VECTORS (16 + 81) // CORE + MCU Peripherals -#define NVIC_RAM_VECTOR_ADDRESS (0x10000000) // Location of vectors in RAM +#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Location of vectors in RAM void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { static volatile uint32_t* vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS; diff --git a/libraries/mbed/vendor/STM/cmsis/STM32F407/stm32f4xx.h b/libraries/mbed/vendor/STM/cmsis/STM32F407/stm32f4xx.h index 6d60a35986..a64513496b 100644 --- a/libraries/mbed/vendor/STM/cmsis/STM32F407/stm32f4xx.h +++ b/libraries/mbed/vendor/STM/cmsis/STM32F407/stm32f4xx.h @@ -97,7 +97,7 @@ */ #if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */ + #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ /** diff --git a/libraries/mbed/vendor/STM/cmsis/STM32F407/system_stm32f4xx.c b/libraries/mbed/vendor/STM/cmsis/STM32F407/system_stm32f4xx.c index 3bcecf483e..b606e0341c 100644 --- a/libraries/mbed/vendor/STM/cmsis/STM32F407/system_stm32f4xx.c +++ b/libraries/mbed/vendor/STM/cmsis/STM32F407/system_stm32f4xx.c @@ -152,7 +152,7 @@ /************************* PLL Parameters *************************************/ /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N */ -#define PLL_M 25 +#define PLL_M 8 #define PLL_N 336 /* SYSCLK = PLL_VCO / PLL_P */ diff --git a/libraries/mbed/vendor/STM/cmsis/options.json b/libraries/mbed/vendor/STM/cmsis/options.json new file mode 100644 index 0000000000..6e7f4521da --- /dev/null +++ b/libraries/mbed/vendor/STM/cmsis/options.json @@ -0,0 +1,12 @@ +{ + "objects": [ + "core_cm4.o", + "core_cm4_simd.o", + + "system_stm32f4xx.o", + + "startup_STM32F40x.o", + + "cmsis_nvic.o" + ] +}