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[TARGET_STMF0] change numerical value by its define

pull/1432/head
adustm 2015-11-17 16:55:56 +01:00
parent 0d72a40495
commit 7d23f0fd1e
7 changed files with 7 additions and 7 deletions
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2
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/cmsis_nvic.c
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@ -44,7 +44,7 @@ void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
for (i = 0; i < NVIC_NUM_VECTORS; i++) { for (i = 0; i < NVIC_NUM_VECTORS; i++) {
*((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i]; *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i];
} }
SYSCFG->CFGR1 |= 0x03; // Embedded SRAM mapped at 0x00000000 SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000
NVIC_vtor_remap = 1; // The vectors remap is done NVIC_vtor_remap = 1; // The vectors remap is done
} }

2
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/cmsis_nvic.c
View File

@ -44,7 +44,7 @@ void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
for (i = 0; i < NVIC_NUM_VECTORS; i++) { for (i = 0; i < NVIC_NUM_VECTORS; i++) {
*((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i]; *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i];
} }
SYSCFG->CFGR1 |= 0x03; // Embedded SRAM mapped at 0x00000000 SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000
NVIC_vtor_remap = 1; // The vectors remap is done NVIC_vtor_remap = 1; // The vectors remap is done
} }

2
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/cmsis_nvic.c
View File

@ -44,7 +44,7 @@ void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
for (i = 0; i < NVIC_NUM_VECTORS; i++) { for (i = 0; i < NVIC_NUM_VECTORS; i++) {
*((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i]; *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i];
} }
SYSCFG->CFGR1 |= 0x03; // Embedded SRAM mapped at 0x00000000 SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000
NVIC_vtor_remap = 1; // The vectors remap is done NVIC_vtor_remap = 1; // The vectors remap is done
} }

2
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/cmsis_nvic.c
View File

@ -44,7 +44,7 @@ void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
for (i = 0; i < NVIC_NUM_VECTORS; i++) { for (i = 0; i < NVIC_NUM_VECTORS; i++) {
*((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i]; *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i];
} }
SYSCFG->CFGR1 |= 0x03; // Embedded SRAM mapped at 0x00000000 SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000
NVIC_vtor_remap = 1; // The vectors remap is done NVIC_vtor_remap = 1; // The vectors remap is done
} }

2
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/cmsis_nvic.c
View File

@ -44,7 +44,7 @@ void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
for (i = 0; i < NVIC_NUM_VECTORS; i++) { for (i = 0; i < NVIC_NUM_VECTORS; i++) {
*((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i]; *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i];
} }
SYSCFG->CFGR1 |= 0x03; // Embedded SRAM mapped at 0x00000000 SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000
NVIC_vtor_remap = 1; // The vectors remap is done NVIC_vtor_remap = 1; // The vectors remap is done
} }

2
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/cmsis_nvic.c
View File

@ -44,7 +44,7 @@ void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
for (i = 0; i < NVIC_NUM_VECTORS; i++) { for (i = 0; i < NVIC_NUM_VECTORS; i++) {
*((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i]; *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i];
} }
SYSCFG->CFGR1 |= 0x03; // Embedded SRAM mapped at 0x00000000 SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000
NVIC_vtor_remap = 1; // The vectors remap is done NVIC_vtor_remap = 1; // The vectors remap is done
} }

2
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/cmsis_nvic.c
View File

@ -44,7 +44,7 @@ void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
for (i = 0; i < NVIC_NUM_VECTORS; i++) { for (i = 0; i < NVIC_NUM_VECTORS; i++) {
*((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i]; *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i];
} }
SYSCFG->CFGR1 |= 0x03; // Embedded SRAM mapped at 0x00000000 SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000
NVIC_vtor_remap = 1; // The vectors remap is done NVIC_vtor_remap = 1; // The vectors remap is done
} }