From 7d23f0fd1e082aaa09e55870c6d4b161b0f94168 Mon Sep 17 00:00:00 2001 From: adustm Date: Tue, 17 Nov 2015 16:55:56 +0100 Subject: [PATCH] [TARGET_STMF0] change numerical value by its define --- .../TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/cmsis_nvic.c | 2 +- .../TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/cmsis_nvic.c | 2 +- .../TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/cmsis_nvic.c | 2 +- .../TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/cmsis_nvic.c | 2 +- .../TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/cmsis_nvic.c | 2 +- .../TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/cmsis_nvic.c | 2 +- .../TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/cmsis_nvic.c | 2 +- 7 files changed, 7 insertions(+), 7 deletions(-) diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/cmsis_nvic.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/cmsis_nvic.c index bbd2d75001..02a8b586c9 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/cmsis_nvic.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/cmsis_nvic.c @@ -44,7 +44,7 @@ void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { for (i = 0; i < NVIC_NUM_VECTORS; i++) { *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i]; } - SYSCFG->CFGR1 |= 0x03; // Embedded SRAM mapped at 0x00000000 + SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000 NVIC_vtor_remap = 1; // The vectors remap is done } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/cmsis_nvic.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/cmsis_nvic.c index bbd2d75001..02a8b586c9 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/cmsis_nvic.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/cmsis_nvic.c @@ -44,7 +44,7 @@ void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { for (i = 0; i < NVIC_NUM_VECTORS; i++) { *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i]; } - SYSCFG->CFGR1 |= 0x03; // Embedded SRAM mapped at 0x00000000 + SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000 NVIC_vtor_remap = 1; // The vectors remap is done } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/cmsis_nvic.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/cmsis_nvic.c index bbd2d75001..02a8b586c9 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/cmsis_nvic.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/cmsis_nvic.c @@ -44,7 +44,7 @@ void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { for (i = 0; i < NVIC_NUM_VECTORS; i++) { *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i]; } - SYSCFG->CFGR1 |= 0x03; // Embedded SRAM mapped at 0x00000000 + SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000 NVIC_vtor_remap = 1; // The vectors remap is done } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/cmsis_nvic.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/cmsis_nvic.c index bbd2d75001..02a8b586c9 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/cmsis_nvic.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/cmsis_nvic.c @@ -44,7 +44,7 @@ void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { for (i = 0; i < NVIC_NUM_VECTORS; i++) { *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i]; } - SYSCFG->CFGR1 |= 0x03; // Embedded SRAM mapped at 0x00000000 + SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000 NVIC_vtor_remap = 1; // The vectors remap is done } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/cmsis_nvic.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/cmsis_nvic.c index bbd2d75001..02a8b586c9 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/cmsis_nvic.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/cmsis_nvic.c @@ -44,7 +44,7 @@ void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { for (i = 0; i < NVIC_NUM_VECTORS; i++) { *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i]; } - SYSCFG->CFGR1 |= 0x03; // Embedded SRAM mapped at 0x00000000 + SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000 NVIC_vtor_remap = 1; // The vectors remap is done } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/cmsis_nvic.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/cmsis_nvic.c index bbd2d75001..02a8b586c9 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/cmsis_nvic.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/cmsis_nvic.c @@ -44,7 +44,7 @@ void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { for (i = 0; i < NVIC_NUM_VECTORS; i++) { *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i]; } - SYSCFG->CFGR1 |= 0x03; // Embedded SRAM mapped at 0x00000000 + SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000 NVIC_vtor_remap = 1; // The vectors remap is done } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/cmsis_nvic.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/cmsis_nvic.c index bbd2d75001..02a8b586c9 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/cmsis_nvic.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/cmsis_nvic.c @@ -44,7 +44,7 @@ void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { for (i = 0; i < NVIC_NUM_VECTORS; i++) { *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i]; } - SYSCFG->CFGR1 |= 0x03; // Embedded SRAM mapped at 0x00000000 + SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000 NVIC_vtor_remap = 1; // The vectors remap is done }