mirror of https://github.com/ARMmbed/mbed-os.git
Martin Kojtal
GitHub
commit
698e75f336
|
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@ -1,31 +1,19 @@
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# PSoC 6 Peripheral Driver Library v1.3.0
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# PSoC 6 Peripheral Driver Library v1.3.1
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Please refer to the [README.md](./README.md) and the [PDL API Reference Manual](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/index.html) for a complete description of the Peripheral Driver Library.
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### New Features
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New Drivers
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* [CAN FD 1.0](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__canfd.html)
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Updated Drivers
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* [DMAC 1.10](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__dmac.html)
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* [SD Host 1.30](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__sd_host.html)
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* [SMIF 1.40](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__smif.html)
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* [Startup 2.60](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__system__config.html)
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* [SysPm 4.30](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__syspm.html)
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* [USBFS 2.10](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__usbfs__dev__drv.html)
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* [SysInt 1.30](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__sysint.html)
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* [SysPm 4.40](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__syspm.html)
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* [USBFS 2.20](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__usbfs__dev__drv.html)
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Drivers with patch version updates
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* [Crypto 2.30.1](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__crypto.html)
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* [CTB 1.10.1](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__ctb.html)
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* [eFuse 1.10.1](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__efuse.html)
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* [Flash 3.30.1](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__flash.html)
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* [PDM_PCM 2.20.1](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__pdm_pcm.html)
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* [RTC 2.20.1](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__rtc.html)
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* [SAR 1.20.1](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__sar.html)
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* [SCB 2.30.1](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__scb.html)
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* [SysClk 1.40.1](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__sysclk.html)
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* [SysLib 2.40.1](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__syslib.html)
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* [TCPWM 1.10.1](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__tcpwm.html)
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* [CAN FD 1.0.1](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__canfd.html)
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* [Flash 3.30.2](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__flash.html)
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* [Prot 1.30.1](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__prot.html)
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* [SysClk 1.40.2](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__sysclk.html)
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### Known Issues
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None
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File diff suppressed because it is too large
Load Diff
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@ -5,7 +5,7 @@
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* Common header file to be included by the drivers.
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*
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* \note
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* Generator version: 1.5.0.1286
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* Generator version: 1.5.0.1292
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*
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********************************************************************************
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* \copyright
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@ -182,8 +182,8 @@
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#include "cy8c6248fni_d43.h"
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#elif defined (CY8C624ALQI_D42)
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#include "cy8c624alqi_d42.h"
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#elif defined (CYB0644ABZI_D44)
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#include "cyb0644abzi_d44.h"
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#elif defined (CYB0644ABZI_S2D44)
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#include "cyb0644abzi_s2d44.h"
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#elif defined (CY8C624ABZI_S2D44A0)
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#include "cy8c624abzi_s2d44a0.h"
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#elif defined (CY8C624ABZI_S2D44)
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@ -220,6 +220,8 @@
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#include "cy8c6245azi_s3d42.h"
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#elif defined (CY8C6245LQI_S3D42)
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#include "cy8c6245lqi_s3d42.h"
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#elif defined (CYB06445LQI_S3D42)
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#include "cyb06445lqi_s3d42.h"
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#elif defined (CY8C6245FNI_S3D41)
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#include "cy8c6245fni_s3d41.h"
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#elif defined (CY8C6245AZI_S3D12)
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@ -232,6 +234,8 @@
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#include "cy8c6245azi_s3d02.h"
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#elif defined (CY8C6245LQI_S3D02)
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#include "cy8c6245lqi_s3d02.h"
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#elif defined (CY8C6245W_S3D72)
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#include "cy8c6245w_s3d72.h"
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#else
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#include "cy_device_common.h"
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#endif
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File diff suppressed because it is too large
Load Diff
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@ -5,7 +5,7 @@
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* CYB06447BZI-BLD53 device header
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*
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* \note
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* Generator version: 1.5.0.1286
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* Generator version: 1.5.0.1292
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*
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********************************************************************************
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* \copyright
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@ -458,7 +458,7 @@ typedef enum {
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#define CY_SRAM_BASE 0x08000000UL
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#define CY_SRAM_SIZE 0x00048000UL
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#define CY_FLASH_BASE 0x10000000UL
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#define CY_FLASH_SIZE 0x00100000UL
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#define CY_FLASH_SIZE 0x000D0000UL
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#define CY_EM_EEPROM_BASE 0x14000000UL
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#define CY_EM_EEPROM_SIZE 0x00008000UL
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#define CY_XIP_BASE 0x18000000UL
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@ -5,7 +5,7 @@
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* CYB06447BZI-BLD54 device header
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*
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* \note
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* Generator version: 1.5.0.1286
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* Generator version: 1.5.0.1292
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*
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********************************************************************************
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* \copyright
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@ -458,7 +458,7 @@ typedef enum {
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#define CY_SRAM_BASE 0x08000000UL
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#define CY_SRAM_SIZE 0x00048000UL
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#define CY_FLASH_BASE 0x10000000UL
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#define CY_FLASH_SIZE 0x00100000UL
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#define CY_FLASH_SIZE 0x000D0000UL
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#define CY_EM_EEPROM_BASE 0x14000000UL
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#define CY_EM_EEPROM_SIZE 0x00008000UL
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#define CY_XIP_BASE 0x18000000UL
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@ -5,7 +5,7 @@
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* CYB06447BZI-D54 device header
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*
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* \note
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* Generator version: 1.5.0.1286
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* Generator version: 1.5.0.1292
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*
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********************************************************************************
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* \copyright
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|
|
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@ -1,11 +1,11 @@
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/***************************************************************************//**
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* \file cyb0644abzi_d44.h
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* \file cyb0644abzi_s2d44.h
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*
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* \brief
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* CYB0644ABZI-D44 device header
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* CYB0644ABZI-S2D44 device header
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*
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* \note
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* Generator version: 1.5.0.1286
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* Generator version: 1.5.0.1292
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*
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********************************************************************************
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* \copyright
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@ -25,11 +25,11 @@
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* limitations under the License.
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*******************************************************************************/
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#ifndef _CYB0644ABZI_D44_H_
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#define _CYB0644ABZI_D44_H_
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#ifndef _CYB0644ABZI_S2D44_H_
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#define _CYB0644ABZI_S2D44_H_
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/**
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* \addtogroup group_device CYB0644ABZI-D44
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* \addtogroup group_device CYB0644ABZI-S2D44
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* \{
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*/
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@ -54,7 +54,7 @@ typedef enum {
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SVCall_IRQn = -5, /*!< -5 System Service Call via SVC instruction */
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PendSV_IRQn = -2, /*!< -2 Pendable request for system service */
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SysTick_IRQn = -1, /*!< -1 System Tick Timer */
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/* CYB0644ABZI-D44 User Interrupt Numbers */
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/* CYB0644ABZI-S2D44 User Interrupt Numbers */
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NvicMux0_IRQn = 0, /*!< 0 [DeepSleep] CPU User Interrupt #0 */
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NvicMux1_IRQn = 1, /*!< 1 [DeepSleep] CPU User Interrupt #1 */
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NvicMux2_IRQn = 2, /*!< 2 [DeepSleep] CPU User Interrupt #2 */
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@ -63,7 +63,7 @@ typedef enum {
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NvicMux5_IRQn = 5, /*!< 5 [DeepSleep] CPU User Interrupt #5 */
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NvicMux6_IRQn = 6, /*!< 6 [DeepSleep] CPU User Interrupt #6 */
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NvicMux7_IRQn = 7, /*!< 7 [DeepSleep] CPU User Interrupt #7 */
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/* CYB0644ABZI-D44 Internal SW Interrupt Numbers */
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/* CYB0644ABZI-S2D44 Internal SW Interrupt Numbers */
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Internal0_IRQn = 8, /*!< 8 [Active] Internal SW Interrupt #0 */
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Internal1_IRQn = 9, /*!< 9 [Active] Internal SW Interrupt #1 */
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Internal2_IRQn = 10, /*!< 10 [Active] Internal SW Interrupt #2 */
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@ -85,7 +85,7 @@ typedef enum {
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DebugMonitor_IRQn = -4, /*!< -4 Debug Monitor */
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PendSV_IRQn = -2, /*!< -2 Pendable request for system service */
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SysTick_IRQn = -1, /*!< -1 System Tick Timer */
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/* CYB0644ABZI-D44 Peripheral Interrupt Numbers */
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/* CYB0644ABZI-S2D44 Peripheral Interrupt Numbers */
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ioss_interrupts_gpio_0_IRQn = 0, /*!< 0 [DeepSleep] GPIO Port Interrupt #0 */
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ioss_interrupts_gpio_1_IRQn = 1, /*!< 1 [DeepSleep] GPIO Port Interrupt #1 */
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ioss_interrupts_gpio_2_IRQn = 2, /*!< 2 [DeepSleep] GPIO Port Interrupt #2 */
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@ -264,7 +264,7 @@ typedef enum {
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(defined(__ARMCC_VERSION) && (__TARGET_ARCH_THUMB == 3)) || \
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(defined(__ghs__) && defined(__CORE_CORTEXM0PLUS__)))
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/* CYB0644ABZI-D44 interrupts that can be routed to the CM0+ NVIC */
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/* CYB0644ABZI-S2D44 interrupts that can be routed to the CM0+ NVIC */
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typedef enum {
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ioss_interrupts_gpio_0_IRQn = 0, /*!< 0 [DeepSleep] GPIO Port Interrupt #0 */
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ioss_interrupts_gpio_1_IRQn = 1, /*!< 1 [DeepSleep] GPIO Port Interrupt #1 */
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@ -485,7 +485,7 @@ typedef enum {
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#define CY_SRAM_BASE 0x08000000UL
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#define CY_SRAM_SIZE 0x00100000UL
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#define CY_FLASH_BASE 0x10000000UL
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#define CY_FLASH_SIZE 0x00200000UL
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#define CY_FLASH_SIZE 0x001D0000UL
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#define CY_EM_EEPROM_BASE 0x14000000UL
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#define CY_EM_EEPROM_SIZE 0x00008000UL
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#define CY_XIP_BASE 0x18000000UL
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@ -1321,9 +1321,9 @@ typedef enum {
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#define I2S0 ((I2S_Type*) I2S0_BASE) /* 0x40A10000 */
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#define I2S1 ((I2S_Type*) I2S1_BASE) /* 0x40A11000 */
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/** \} CYB0644ABZI-D44 */
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/** \} CYB0644ABZI-S2D44 */
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||||
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#endif /* _CYB0644ABZI_D44_H_ */
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#endif /* _CYB0644ABZI_S2D44_H_ */
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/* [] END OF FILE */
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@ -1,6 +1,6 @@
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/***************************************************************************//**
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* \file cy_canfd.h
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* \version 1.0
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* \version 1.0.1
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*
|
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* This file provides constants and parameter values for
|
||||
* the CAN FD driver.
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@ -217,6 +217,11 @@
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* <table class="doxtable">
|
||||
* <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr>
|
||||
* <tr>
|
||||
* <td>1.0.1</td>
|
||||
* <td>Updated description of the \ref Cy_CANFD_Init() and \ref Cy_CANFD_DeInit() functions</td>
|
||||
* <td>Documentation update and clarification </td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>1.0</td>
|
||||
* <td>Initial version</td>
|
||||
* <td></td>
|
||||
|
|
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|
|
@ -1,6 +1,6 @@
|
|||
/***************************************************************************//**
|
||||
* \file cy_device.h
|
||||
* \version 2.0
|
||||
* \version 2.10
|
||||
*
|
||||
* This file specifies the structure for core and peripheral block HW base
|
||||
* addresses, versions, and parameters.
|
||||
|
|
@ -381,9 +381,9 @@ void Cy_PDL_Init(const cy_stc_device_t * device);
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|||
#define SFLASH_CPUSS_TRIM_ROM_CTL_ULP (((SFLASH_V1_Type *) SFLASH)->CPUSS_TRIM_ROM_CTL_ULP)
|
||||
#define SFLASH_CPUSS_TRIM_RAM_CTL_ULP (((SFLASH_V1_Type *) SFLASH)->CPUSS_TRIM_RAM_CTL_ULP)
|
||||
#define SFLASH_CPUSS_TRIM_ROM_CTL_HALF_LP (((SFLASH_V1_Type *) SFLASH)->CPUSS_TRIM_ROM_CTL_HALF_LP)
|
||||
#define SFLASH_CPUSS_TRIM_ROM_CTL_HALF_LP (((SFLASH_V1_Type *) SFLASH)->CPUSS_TRIM_ROM_CTL_HALF_LP)
|
||||
#define SFLASH_CPUSS_TRIM_RAM_CTL_HALF_ULP (((SFLASH_V1_Type *) SFLASH)->CPUSS_TRIM_RAM_CTL_HALF_ULP)
|
||||
#define SFLASH_CPUSS_TRIM_RAM_CTL_HALF_LP (((SFLASH_V1_Type *) SFLASH)->CPUSS_TRIM_RAM_CTL_HALF_LP)
|
||||
#define SFLASH_CPUSS_TRIM_ROM_CTL_HALF_ULP (((SFLASH_V1_Type *) SFLASH)->CPUSS_TRIM_ROM_CTL_HALF_ULP)
|
||||
#define SFLASH_CPUSS_TRIM_RAM_CTL_HALF_ULP (((SFLASH_V1_Type *) SFLASH)->CPUSS_TRIM_RAM_CTL_HALF_ULP)
|
||||
|
||||
|
||||
#define SFLASH_CSD0_ADC_VREF0_TRIM (((SFLASH_V1_Type *) SFLASH)->CSDV2_CSD0_ADC_VREF0)
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/***************************************************************************//**
|
||||
* \file cy_flash.h
|
||||
* \version 3.30.1
|
||||
* \version 3.30.2
|
||||
*
|
||||
* Provides the API declarations of the Flash driver.
|
||||
*
|
||||
|
|
@ -52,12 +52,13 @@
|
|||
* interrupt instead of a reset.
|
||||
*
|
||||
* A Read while Write violation occurs when a flash Read operation is initiated
|
||||
* in the same or neighboring flash sector where the flash Write, Erase, or
|
||||
* in the same or neighboring (neighboring restriction is applicable just for the
|
||||
* CY8C6xx6, CY8C6xx7 devices) flash sector where the flash Write, Erase, or
|
||||
* Program operation is working. This violation may cause a HardFault exception.
|
||||
* To avoid the Read while Write violation, the user must carefully split the
|
||||
* Read and Write operation on flash sectors which are not neighboring,
|
||||
* considering both cores in the multi-processor device. The flash is divided
|
||||
* into four equal sectors. You may edit the linker script to place the code
|
||||
* considering both cores in the multi-processor device. If the flash is divided
|
||||
* into four equal sectors, you may edit the linker script to place the code
|
||||
* into neighboring sectors. For example, use sectors number 0 and 1 for code
|
||||
* and sectors 2 and 3 for data storage.
|
||||
*
|
||||
|
|
@ -255,6 +256,11 @@
|
|||
* <table class="doxtable">
|
||||
* <tr><th>Version</th><th style="width: 52%;">Changes</th><th>Reason for Change</th></tr>
|
||||
* <tr>
|
||||
* <td rowspan="1">3.30.2</td>
|
||||
* <td>Updated documentation to limit devices with the neighboring restriction.</td>
|
||||
* <td>User experience enhancement.</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td rowspan="1">3.30.1</td>
|
||||
* <td>Used the CY_RAMFUNC_BEGIN and CY_RAMFUNC_END macros that allocate the function in RAM instead of using the CY_SECTION(".cy_ramfunc") macros.</td>
|
||||
* <td>Removed the code duplication.</td>
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/***************************************************************************//**
|
||||
* \file cy_prot.h
|
||||
* \version 1.30
|
||||
* \version 1.30.1
|
||||
*
|
||||
* \brief
|
||||
* Provides an API declaration of the Protection Unit driver
|
||||
|
|
@ -390,6 +390,11 @@
|
|||
* <table class="doxtable">
|
||||
* <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr>
|
||||
* <tr>
|
||||
* <td>1.30.1</td>
|
||||
* <td>Snippet updated.</td>
|
||||
* <td>Old snippet outdated.</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>1.30</td>
|
||||
* <td>Defect in \ref Cy_Prot_GetPpuProgStruct() function due to faulty defines is fixed.</td>
|
||||
* <td>Defect fixing.</td>
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/***************************************************************************//**
|
||||
* \file cy_sysclk.h
|
||||
* \version 1.40.1
|
||||
* \version 1.40.2
|
||||
*
|
||||
* Provides an API declaration of the sysclk driver.
|
||||
*
|
||||
|
|
@ -104,6 +104,11 @@
|
|||
* <table class="doxtable">
|
||||
* <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr>
|
||||
* <tr>
|
||||
* <td>1.40.2</td>
|
||||
* <td>Update documentation based on collateral review feedback.</td>
|
||||
* <td>User experience enhancement.</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>1.40.1</td>
|
||||
* <td>Fix compiler warning.</td>
|
||||
* <td></td>
|
||||
|
|
@ -446,15 +451,7 @@
|
|||
* an external 32.768 kHz square wave is brought in directly through the
|
||||
* SRSS_WCO_OUT_PIN pin.
|
||||
*
|
||||
* Some devices support a built-in clock supervisor (CSV) in the WCO. The clock
|
||||
* supervisor detects if the WCO has been lost; that is, the WCO is no longer
|
||||
* producing clock pulses. The CSV does this by checking to ensure there is at
|
||||
* least one WCO clock pulse within a certain time window. The ILO or PILO can be
|
||||
* the supervising clock. Firmware can configure the CSV to trigger a fault,
|
||||
* a reset, or both after specified cycles of the supervising clock.
|
||||
*
|
||||
* \defgroup group_sysclk_wco_funcs Functions
|
||||
* \defgroup group_sysclk_wco_structs Data Structures
|
||||
* \defgroup group_sysclk_wco_enums Enumerated Types
|
||||
* \}
|
||||
* \defgroup group_sysclk_clk_hf High-Frequency Clocks
|
||||
|
|
@ -484,14 +481,7 @@
|
|||
*
|
||||
* 
|
||||
*
|
||||
* Some devices support a clock supervisor (CSV) for each root clock. These
|
||||
* can detect frequency loss, or monitor that the clock frequency stays within
|
||||
* a specified range. The possible supervising clocks are IMO, ECO, or ALTHF.
|
||||
* Loss detection and frequency monitoring can be enabled or disabled independently.
|
||||
* Each has its own programmable action that occurs on detection of an error.
|
||||
*
|
||||
* \defgroup group_sysclk_clk_hf_funcs Functions
|
||||
* \defgroup group_sysclk_clk_hf_structs Data Structures
|
||||
* \defgroup group_sysclk_clk_hf_enums Enumerated Types
|
||||
* \}
|
||||
* \defgroup group_sysclk_clk_fast Fast Clock
|
||||
|
|
@ -665,6 +655,7 @@ extern "C" {
|
|||
|
||||
/** \} group_sysclk_macros */
|
||||
|
||||
|
||||
/**
|
||||
* \addtogroup group_sysclk_returns
|
||||
* \{
|
||||
|
|
@ -742,6 +733,7 @@ __STATIC_INLINE void Cy_SysClk_EcoDisable(void)
|
|||
SRSS_CLK_ECO_CONFIG &= ~SRSS_CLK_ECO_CONFIG_ECO_EN_Msk;
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_EcoGetStatus
|
||||
****************************************************************************//**
|
||||
|
|
@ -826,6 +818,7 @@ typedef enum
|
|||
CY_SYSCLK_FLLPLL_OUTPUT_OUTPUT = 3U /**< Output FLL/PLL output regardless of lock status. This can be dangerous if used to clock clkHf, because FLL/PLL output may be unstable */
|
||||
} cy_en_fll_pll_output_mode_t;
|
||||
|
||||
|
||||
/** FLL current-controlled oscillator (CCO) frequency ranges.
|
||||
* See register CLK_FLL_CONFIG4, bits CCO_RANGE.
|
||||
*/
|
||||
|
|
@ -839,6 +832,7 @@ typedef enum
|
|||
} cy_en_fll_cco_ranges_t;
|
||||
/** \} group_sysclk_fll_enums */
|
||||
|
||||
|
||||
/**
|
||||
* \addtogroup group_sysclk_fll_structs
|
||||
* \{
|
||||
|
|
@ -892,6 +886,7 @@ __STATIC_INLINE bool Cy_SysClk_FllIsEnabled(void)
|
|||
return (_FLD2BOOL(SRSS_CLK_FLL_CONFIG_FLL_ENABLE, SRSS_CLK_FLL_CONFIG));
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_FllLocked
|
||||
****************************************************************************//**
|
||||
|
|
@ -1037,6 +1032,7 @@ __STATIC_INLINE bool Cy_SysClk_PllLocked(uint32_t clkPath)
|
|||
return (_FLD2BOOL(SRSS_CLK_PLL_STATUS_LOCKED, SRSS_CLK_PLL_STATUS[clkPath]));
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_PllLostLock
|
||||
****************************************************************************//**
|
||||
|
|
@ -1064,6 +1060,7 @@ __STATIC_INLINE bool Cy_SysClk_PllLostLock(uint32_t clkPath)
|
|||
return (retVal);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_PllDisable
|
||||
****************************************************************************//**
|
||||
|
|
@ -1139,6 +1136,7 @@ __STATIC_INLINE void Cy_SysClk_IloEnable(void)
|
|||
SRSS_CLK_ILO_CONFIG |= SRSS_CLK_ILO_CONFIG_ENABLE_Msk;
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_IloDisable
|
||||
****************************************************************************//**
|
||||
|
|
@ -1168,6 +1166,7 @@ __STATIC_INLINE cy_en_sysclk_status_t Cy_SysClk_IloDisable(void)
|
|||
return (retVal);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_IloHibernateOn
|
||||
****************************************************************************//**
|
||||
|
|
@ -1226,6 +1225,7 @@ __STATIC_INLINE void Cy_SysClk_PiloEnable(void)
|
|||
SRSS_CLK_PILO_CONFIG_PILO_CLK_EN_Msk;
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_PiloDisable
|
||||
****************************************************************************//**
|
||||
|
|
@ -1245,6 +1245,7 @@ __STATIC_INLINE void Cy_SysClk_PiloDisable(void)
|
|||
SRSS_CLK_PILO_CONFIG_PILO_CLK_EN_Msk);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_PiloSetTrim
|
||||
****************************************************************************//**
|
||||
|
|
@ -1261,6 +1262,7 @@ __STATIC_INLINE void Cy_SysClk_PiloSetTrim(uint32_t trimVal)
|
|||
CY_REG32_CLR_SET(SRSS_CLK_PILO_CONFIG, SRSS_CLK_PILO_CONFIG_PILO_FFREQ, trimVal);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_PiloGetTrim
|
||||
****************************************************************************//**
|
||||
|
|
@ -1405,59 +1407,44 @@ typedef enum
|
|||
CY_SYSCLK_WCO_NOT_BYPASSED = 0U, /**< WCO is not bypassed crystal is used */
|
||||
CY_SYSCLK_WCO_BYPASSED = 1U /**< WCO is bypassed external clock must be supplied on XTAL pin */
|
||||
} cy_en_wco_bypass_modes_t;
|
||||
|
||||
/** WCO CSV supervisor clock selections */
|
||||
typedef enum
|
||||
{
|
||||
CY_SYSCLK_WCO_CSV_SUPERVISOR_ILO, /**< WCO CSV supervisor clock source is the ILO */
|
||||
CY_SYSCLK_WCO_CSV_SUPERVISOR_ALTLF, /**< WCO CSV supervisor clock source is the alternate low-frequency clock (ALTLF) */
|
||||
CY_SYSCLK_WCO_CSV_SUPERVISOR_PILO /**< WCO CSV supervisor clock source is the PILO */
|
||||
} cy_en_wco_csv_supervisor_clock_t;
|
||||
|
||||
/**
|
||||
* Clock supervisor clock loss window. There must be one clock of the supervised
|
||||
* clock within this many clocks of the supervising clock.
|
||||
* See registers CLK_CSV_HF_CTL and CLK_CSV_WCO_CTL, bitfield CSV_LOSS_WINDOW.
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CY_SYSCLK_CSV_LOSS_4_CYCLES = 0U, /**< 1 clock must be seen within 4 cycles of the supervising clock */
|
||||
CY_SYSCLK_CSV_LOSS_8_CYCLES = 1U, /**< 1 clock must be seen within 8 cycles of the supervising clock */
|
||||
CY_SYSCLK_CSV_LOSS_16_CYCLES = 2U, /**< 1 clock must be seen within 16 cycles of the supervising clock */
|
||||
CY_SYSCLK_CSV_LOSS_32_CYCLES = 3U, /**< 1 clock must be seen within 32 cycles of the supervising clock */
|
||||
CY_SYSCLK_CSV_LOSS_64_CYCLES = 4U, /**< 1 clock must be seen within 64 cycles of the supervising clock */
|
||||
CY_SYSCLK_CSV_LOSS_128_CYCLES = 5U, /**< 1 clock must be seen within 128 cycles of the supervising clock */
|
||||
CY_SYSCLK_CSV_LOSS_256_CYCLES = 6U, /**< 1 clock must be seen within 256 cycles of the supervising clock */
|
||||
CY_SYSCLK_CSV_LOSS_512_CYCLES = 7U /**< 1 clock must be seen within 512 cycles of the supervising clock */
|
||||
} cy_en_csv_loss_window_t;
|
||||
|
||||
/**
|
||||
* Clock supervisor error actions. See register CLK_CSV_HF_CTL[CSV_FREQ_ACTION and CSV_LOSS_ACTION].
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CY_SYSCLK_CSV_ERROR_IGNORE = 0U, /**< Ignore the error reported by the clock supervisor */
|
||||
CY_SYSCLK_CSV_ERROR_FAULT = 1U, /**< Trigger a fault when an error is reported by the clock supervisor */
|
||||
CY_SYSCLK_CSV_ERROR_RESET = 2U, /**< Trigger a reset when an error is reported by the clock supervisor */
|
||||
CY_SYSCLK_CSV_ERROR_FAULT_RESET = 3U /**< Trigger a fault then reset when an error is reported by the supervisor */
|
||||
} cy_en_csv_error_actions_t;
|
||||
/** \} group_sysclk_wco_enums */
|
||||
|
||||
/**
|
||||
* \addtogroup group_sysclk_wco_structs
|
||||
* \{
|
||||
*/
|
||||
/**
|
||||
* This structure is used to configure the clock supervisor for the WCO.
|
||||
*/
|
||||
/** \cond BWC */
|
||||
typedef enum
|
||||
{
|
||||
CY_SYSCLK_WCO_CSV_SUPERVISOR_ILO,
|
||||
CY_SYSCLK_WCO_CSV_SUPERVISOR_ALTLF,
|
||||
CY_SYSCLK_WCO_CSV_SUPERVISOR_PILO
|
||||
} cy_en_wco_csv_supervisor_clock_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
CY_SYSCLK_CSV_LOSS_4_CYCLES = 0U,
|
||||
CY_SYSCLK_CSV_LOSS_8_CYCLES = 1U,
|
||||
CY_SYSCLK_CSV_LOSS_16_CYCLES = 2U,
|
||||
CY_SYSCLK_CSV_LOSS_32_CYCLES = 3U,
|
||||
CY_SYSCLK_CSV_LOSS_64_CYCLES = 4U,
|
||||
CY_SYSCLK_CSV_LOSS_128_CYCLES = 5U,
|
||||
CY_SYSCLK_CSV_LOSS_256_CYCLES = 6U,
|
||||
CY_SYSCLK_CSV_LOSS_512_CYCLES = 7U
|
||||
} cy_en_csv_loss_window_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
CY_SYSCLK_CSV_ERROR_IGNORE = 0U,
|
||||
CY_SYSCLK_CSV_ERROR_FAULT = 1U,
|
||||
CY_SYSCLK_CSV_ERROR_RESET = 2U,
|
||||
CY_SYSCLK_CSV_ERROR_FAULT_RESET = 3U
|
||||
} cy_en_csv_error_actions_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
cy_en_wco_csv_supervisor_clock_t supervisorClock; /**< supervisor clock selection */
|
||||
bool enableLossDetection; /**< 1= enabled, 0= disabled. Note that if loss detection is enabled, writes to other register bits are ignored */
|
||||
cy_en_csv_loss_window_t lossWindow; /**< \ref cy_en_csv_loss_window_t */
|
||||
cy_en_csv_error_actions_t lossAction; /**< \ref cy_en_csv_error_actions_t */
|
||||
cy_en_wco_csv_supervisor_clock_t supervisorClock;
|
||||
bool enableLossDetection;
|
||||
cy_en_csv_loss_window_t lossWindow;
|
||||
cy_en_csv_error_actions_t lossAction;
|
||||
} cy_stc_wco_csv_config_t;
|
||||
/** \} group_sysclk_wco_structs */
|
||||
/** \endcond */
|
||||
|
||||
/**
|
||||
* \addtogroup group_sysclk_wco_funcs
|
||||
|
|
@ -1508,6 +1495,7 @@ __STATIC_INLINE cy_en_sysclk_status_t Cy_SysClk_WcoEnable(uint32_t timeoutus)
|
|||
return (retVal);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_WcoOkay
|
||||
****************************************************************************//**
|
||||
|
|
@ -1527,6 +1515,7 @@ __STATIC_INLINE bool Cy_SysClk_WcoOkay(void)
|
|||
return (_FLD2BOOL(BACKUP_STATUS_WCO_OK, BACKUP_STATUS));
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_WcoDisable
|
||||
****************************************************************************//**
|
||||
|
|
@ -1542,6 +1531,7 @@ __STATIC_INLINE void Cy_SysClk_WcoDisable(void)
|
|||
BACKUP_CTL &= (uint32_t)~BACKUP_CTL_WCO_EN_Msk;
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_WcoBypass
|
||||
****************************************************************************//**
|
||||
|
|
@ -1819,38 +1809,29 @@ typedef enum
|
|||
CY_SYSCLK_CLKHF_DIVIDE_BY_4 = 2U, /**< divide clkHf by 4 */
|
||||
CY_SYSCLK_CLKHF_DIVIDE_BY_8 = 3U /**< divide clkHf by 8 */
|
||||
} cy_en_clkhf_dividers_t;
|
||||
|
||||
/**
|
||||
* clkHf clock supervisor input sources. See register CLK_CSV_HF_CTL[CSV_MUX].
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CY_SYSCLK_CLKHF_CSV_SUPERVISOR_IMO = 0U, /**< Supervising clock is the IMO */
|
||||
CY_SYSCLK_CLKHF_CSV_SUPERVISOR_EXT = 1U, /**< Supervising clock is the external clock */
|
||||
CY_SYSCLK_CLKHF_CSV_SUPERVISOR_ALTHF = 2U /**< Supervising clock is clk_althf */
|
||||
} cy_en_clkhf_csv_supervisor_clock_t;
|
||||
/** \} group_sysclk_clk_hf_enums */
|
||||
|
||||
/**
|
||||
* \addtogroup group_sysclk_clk_hf_structs
|
||||
* \{SupervisingWindow
|
||||
*/
|
||||
/**
|
||||
* This structure is used to configure the clock supervisor for clkHf.
|
||||
*/
|
||||
/** \cond BWC */
|
||||
typedef enum
|
||||
{
|
||||
CY_SYSCLK_CLKHF_CSV_SUPERVISOR_IMO = 0U,
|
||||
CY_SYSCLK_CLKHF_CSV_SUPERVISOR_EXT = 1U,
|
||||
CY_SYSCLK_CLKHF_CSV_SUPERVISOR_ALTHF = 2U
|
||||
} cy_en_clkhf_csv_supervisor_clock_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
cy_en_clkhf_csv_supervisor_clock_t supervisorClock; /**< \ref cy_en_clkhf_csv_supervisor_clock_t */
|
||||
uint16_t supervisingWindow; /**< Number of supervising clock cycles */
|
||||
bool enableFrequencyFaultDetection; /**< 1= enabled, 0= disabled */
|
||||
uint16_t frequencyLowerLimit; /**< Lowest frequency in kHz that supervised clock can go */
|
||||
uint16_t frequencyUpperLimit; /**< Highest frequency in kHz that supervised clock can go */
|
||||
cy_en_csv_error_actions_t frequencyAction; /**< \ref cy_en_csv_error_actions_t */
|
||||
bool enableLossDetection; /**< 1= enabled, 0= disabled */
|
||||
cy_en_csv_loss_window_t lossWindow; /**< \ref cy_en_csv_loss_window_t */
|
||||
cy_en_csv_error_actions_t lossAction; /**< \ref cy_en_csv_error_actions_t */
|
||||
cy_en_clkhf_csv_supervisor_clock_t supervisorClock;
|
||||
uint16_t supervisingWindow;
|
||||
bool enableFrequencyFaultDetection;
|
||||
uint16_t frequencyLowerLimit;
|
||||
uint16_t frequencyUpperLimit;
|
||||
cy_en_csv_error_actions_t frequencyAction;
|
||||
bool enableLossDetection;
|
||||
cy_en_csv_loss_window_t lossWindow;
|
||||
cy_en_csv_error_actions_t lossAction;
|
||||
} cy_stc_clkhf_csv_config_t;
|
||||
/** \} group_sysclk_clk_hf_structs */
|
||||
/** \endcond */
|
||||
|
||||
/** \cond INTERNAL */
|
||||
extern uint32_t altHfFreq; /* Internal storage for BLE ECO frequency user setting */
|
||||
|
|
@ -1880,7 +1861,7 @@ __STATIC_INLINE cy_en_clkhf_dividers_t Cy_SysClk_ClkHfGetDivider(uint32_t clkHf)
|
|||
* \return \ref cy_en_sysclk_status_t
|
||||
*
|
||||
* \funcusage
|
||||
* \snippet sysclk/snippet/main.c snippet_Cy_SysClk_ClkHfEnable
|
||||
* \snippet sysclk/snippet/main.c snippet_Cy_SysClk_ClkPathSetSource
|
||||
*
|
||||
*******************************************************************************/
|
||||
__STATIC_INLINE cy_en_sysclk_status_t Cy_SysClk_ClkHfEnable(uint32_t clkHf)
|
||||
|
|
@ -1894,6 +1875,7 @@ __STATIC_INLINE cy_en_sysclk_status_t Cy_SysClk_ClkHfEnable(uint32_t clkHf)
|
|||
return (retVal);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_ClkHfDisable
|
||||
****************************************************************************//**
|
||||
|
|
@ -1922,6 +1904,7 @@ __STATIC_INLINE cy_en_sysclk_status_t Cy_SysClk_ClkHfDisable(uint32_t clkHf)
|
|||
return (retVal);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_ClkHfSetSource
|
||||
****************************************************************************//**
|
||||
|
|
@ -1961,6 +1944,7 @@ __STATIC_INLINE cy_en_sysclk_status_t Cy_SysClk_ClkHfSetSource(uint32_t clkHf, c
|
|||
return (retVal);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_ClkHfGetSource
|
||||
****************************************************************************//**
|
||||
|
|
@ -1981,6 +1965,7 @@ __STATIC_INLINE cy_en_clkhf_in_sources_t Cy_SysClk_ClkHfGetSource(uint32_t clkHf
|
|||
return ((cy_en_clkhf_in_sources_t)(_FLD2VAL(SRSS_CLK_ROOT_SELECT_ROOT_MUX, SRSS_CLK_ROOT_SELECT[clkHf])));
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_ClkHfSetDivider
|
||||
****************************************************************************//**
|
||||
|
|
@ -2022,6 +2007,7 @@ __STATIC_INLINE cy_en_sysclk_status_t Cy_SysClk_ClkHfSetDivider(uint32_t clkHf,
|
|||
return (retVal);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_ClkHfGetDivider
|
||||
****************************************************************************//**
|
||||
|
|
@ -2077,6 +2063,7 @@ __STATIC_INLINE uint32_t Cy_SysClk_ClkFastGetFrequency(void)
|
|||
return (CY_SYSLIB_DIV_ROUND(locFreq, locDiv));
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_ClkFastSetDivider
|
||||
****************************************************************************//**
|
||||
|
|
@ -2107,6 +2094,7 @@ __STATIC_INLINE void Cy_SysClk_ClkFastSetDivider(uint8_t divider)
|
|||
CY_REG32_CLR_SET(CPUSS_CM4_CLOCK_CTL, CPUSS_CM4_CLOCK_CTL_FAST_INT_DIV, divider);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_ClkFastGetDivider
|
||||
****************************************************************************//**
|
||||
|
|
@ -2160,6 +2148,7 @@ __STATIC_INLINE uint32_t Cy_SysClk_ClkPeriGetFrequency(void)
|
|||
return (CY_SYSLIB_DIV_ROUND(locFreq, locDiv));
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_ClkPeriSetDivider
|
||||
****************************************************************************//**
|
||||
|
|
@ -2183,6 +2172,7 @@ __STATIC_INLINE void Cy_SysClk_ClkPeriSetDivider(uint8_t divider)
|
|||
CY_REG32_CLR_SET(CPUSS_CM0_CLOCK_CTL, CPUSS_CM0_CLOCK_CTL_PERI_INT_DIV, divider);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_ClkPeriGetDivider
|
||||
****************************************************************************//**
|
||||
|
|
@ -2220,6 +2210,7 @@ typedef enum
|
|||
} cy_en_divider_types_t;
|
||||
/** \} group_sysclk_clk_peripheral_enums */
|
||||
|
||||
|
||||
/**
|
||||
* \addtogroup group_sysclk_clk_peripheral_funcs
|
||||
* \{
|
||||
|
|
@ -2328,6 +2319,7 @@ __STATIC_INLINE uint32_t Cy_SysClk_PeriphGetDivider(cy_en_divider_types_t divide
|
|||
return (retVal);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_PeriphSetFracDivider
|
||||
****************************************************************************//**
|
||||
|
|
@ -2390,6 +2382,7 @@ __STATIC_INLINE cy_en_sysclk_status_t
|
|||
return (retVal);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_PeriphGetFracDivider
|
||||
****************************************************************************//**
|
||||
|
|
@ -2430,6 +2423,7 @@ __STATIC_INLINE void Cy_SysClk_PeriphGetFracDivider(cy_en_divider_types_t divide
|
|||
}
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_PeriphAssignDivider
|
||||
****************************************************************************//**
|
||||
|
|
@ -2468,6 +2462,7 @@ __STATIC_INLINE cy_en_sysclk_status_t
|
|||
return (retVal);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_PeriphGetAssignedDivider
|
||||
****************************************************************************//**
|
||||
|
|
@ -2489,6 +2484,7 @@ __STATIC_INLINE uint32_t Cy_SysClk_PeriphGetAssignedDivider(en_clk_dst_t ipBlock
|
|||
return (PERI_CLOCK_CTL[ipBlock] & (CY_PERI_CLOCK_CTL_DIV_SEL_Msk | CY_PERI_CLOCK_CTL_TYPE_SEL_Msk));
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_PeriphEnableDivider
|
||||
****************************************************************************//**
|
||||
|
|
@ -2531,6 +2527,7 @@ __STATIC_INLINE cy_en_sysclk_status_t
|
|||
return (retVal);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_PeriphDisableDivider
|
||||
****************************************************************************//**
|
||||
|
|
@ -2566,6 +2563,7 @@ __STATIC_INLINE cy_en_sysclk_status_t
|
|||
return (retVal);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_PeriphEnablePhaseAlignDivider
|
||||
****************************************************************************//**
|
||||
|
|
@ -2621,6 +2619,7 @@ __STATIC_INLINE cy_en_sysclk_status_t
|
|||
return (retVal);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_PeriphGetDividerEnabled
|
||||
****************************************************************************//**
|
||||
|
|
@ -2726,6 +2725,7 @@ __STATIC_INLINE void Cy_SysClk_ClkSlowSetDivider(uint8_t divider)
|
|||
CY_REG32_CLR_SET(CPUSS_CM0_CLOCK_CTL, CPUSS_CM0_CLOCK_CTL_SLOW_INT_DIV, divider);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_ClkSlowGetDivider
|
||||
****************************************************************************//**
|
||||
|
|
@ -2773,6 +2773,7 @@ typedef enum
|
|||
__STATIC_INLINE void Cy_SysClk_ClkLfSetSource(cy_en_clklf_in_sources_t source);
|
||||
__STATIC_INLINE cy_en_clklf_in_sources_t Cy_SysClk_ClkLfGetSource(void);
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_ClkLfSetSource
|
||||
****************************************************************************//**
|
||||
|
|
@ -2793,6 +2794,7 @@ __STATIC_INLINE void Cy_SysClk_ClkLfSetSource(cy_en_clklf_in_sources_t source)
|
|||
CY_REG32_CLR_SET(SRSS_CLK_SELECT, SRSS_CLK_SELECT_LFCLK_SEL, source);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_ClkLfGetSource
|
||||
****************************************************************************//**
|
||||
|
|
@ -2871,6 +2873,7 @@ __STATIC_INLINE void Cy_SysClk_ClkTimerSetSource(cy_en_clktimer_in_sources_t sou
|
|||
CY_REG32_CLR_SET(SRSS_CLK_TIMER_CTL, CY_SRSS_CLK_TIMER_CTL_TIMER, source);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_ClkTimerGetSource
|
||||
****************************************************************************//**
|
||||
|
|
@ -2889,6 +2892,7 @@ __STATIC_INLINE cy_en_clktimer_in_sources_t Cy_SysClk_ClkTimerGetSource(void)
|
|||
return ((cy_en_clktimer_in_sources_t)(SRSS_CLK_TIMER_CTL & CY_SRSS_CLK_TIMER_CTL_TIMER_Msk));
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_ClkTimerSetDivider
|
||||
****************************************************************************//**
|
||||
|
|
@ -2910,6 +2914,7 @@ __STATIC_INLINE void Cy_SysClk_ClkTimerSetDivider(uint8_t divider)
|
|||
CY_REG32_CLR_SET(SRSS_CLK_TIMER_CTL, SRSS_CLK_TIMER_CTL_TIMER_DIV, divider);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_ClkTimerGetDivider
|
||||
****************************************************************************//**
|
||||
|
|
@ -2927,6 +2932,7 @@ __STATIC_INLINE uint8_t Cy_SysClk_ClkTimerGetDivider(void)
|
|||
return ((uint8_t)_FLD2VAL(SRSS_CLK_TIMER_CTL_TIMER_DIV, SRSS_CLK_TIMER_CTL));
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_ClkTimerEnable
|
||||
****************************************************************************//**
|
||||
|
|
@ -2943,6 +2949,7 @@ __STATIC_INLINE void Cy_SysClk_ClkTimerEnable(void)
|
|||
SRSS_CLK_TIMER_CTL |= SRSS_CLK_TIMER_CTL_ENABLE_Msk;
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_ClkTimerDisable
|
||||
****************************************************************************//**
|
||||
|
|
@ -2992,6 +2999,7 @@ typedef enum
|
|||
CY_SYSCLK_PUMP_IN_CLKPATH15 /**< Pump clock input is clock path 15 */
|
||||
} cy_en_clkpump_in_sources_t;
|
||||
|
||||
|
||||
/**
|
||||
* Pump clock (clk_pump) divide options. See CLK_SELECT register, PUMP_DIV bits.
|
||||
* Used with functions \ref Cy_SysClk_ClkPumpSetDivider, and
|
||||
|
|
@ -3026,6 +3034,7 @@ __STATIC_INLINE cy_en_clkpump_divide_t Cy_SysClk_ClkPumpGetDivider(void);
|
|||
__STATIC_INLINE void Cy_SysClk_ClkPumpEnable(void);
|
||||
__STATIC_INLINE void Cy_SysClk_ClkPumpDisable(void);
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_ClkPumpSetSource
|
||||
****************************************************************************//**
|
||||
|
|
@ -3048,6 +3057,7 @@ __STATIC_INLINE void Cy_SysClk_ClkPumpSetSource(cy_en_clkpump_in_sources_t sourc
|
|||
CY_REG32_CLR_SET(SRSS_CLK_SELECT, SRSS_CLK_SELECT_PUMP_SEL, source);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_ClkPumpGetSource
|
||||
****************************************************************************//**
|
||||
|
|
@ -3065,6 +3075,7 @@ __STATIC_INLINE cy_en_clkpump_in_sources_t Cy_SysClk_ClkPumpGetSource(void)
|
|||
return ((cy_en_clkpump_in_sources_t)_FLD2VAL(SRSS_CLK_SELECT_PUMP_SEL, SRSS_CLK_SELECT));
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_ClkPumpSetDivider
|
||||
****************************************************************************//**
|
||||
|
|
@ -3086,6 +3097,7 @@ __STATIC_INLINE void Cy_SysClk_ClkPumpSetDivider(cy_en_clkpump_divide_t divider)
|
|||
CY_REG32_CLR_SET(SRSS_CLK_SELECT, SRSS_CLK_SELECT_PUMP_DIV, divider);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_ClkPumpGetDivider
|
||||
****************************************************************************//**
|
||||
|
|
@ -3103,6 +3115,7 @@ __STATIC_INLINE cy_en_clkpump_divide_t Cy_SysClk_ClkPumpGetDivider(void)
|
|||
return ((cy_en_clkpump_divide_t)_FLD2VAL(SRSS_CLK_SELECT_PUMP_DIV, SRSS_CLK_SELECT));
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_ClkPumpEnable
|
||||
****************************************************************************//**
|
||||
|
|
@ -3119,6 +3132,7 @@ __STATIC_INLINE void Cy_SysClk_ClkPumpEnable(void)
|
|||
SRSS_CLK_SELECT |= SRSS_CLK_SELECT_PUMP_ENABLE_Msk;
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_ClkPumpDisable
|
||||
****************************************************************************//**
|
||||
|
|
@ -3155,6 +3169,7 @@ typedef enum
|
|||
} cy_en_clkbak_in_sources_t;
|
||||
/** \} group_sysclk_clk_bak_enums */
|
||||
|
||||
|
||||
/**
|
||||
* \addtogroup group_sysclk_clk_bak_funcs
|
||||
* \{
|
||||
|
|
@ -3185,6 +3200,7 @@ __STATIC_INLINE void Cy_SysClk_ClkBakSetSource(cy_en_clkbak_in_sources_t source)
|
|||
CY_REG32_CLR_SET(BACKUP_CTL, BACKUP_CTL_CLK_SEL, source);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_SysClk_ClkBakGetSource
|
||||
****************************************************************************//**
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/***************************************************************************//**
|
||||
* \file cy_sysint.h
|
||||
* \version 1.20
|
||||
* \version 1.30
|
||||
*
|
||||
* \brief
|
||||
* Provides an API declaration of the SysInt driver
|
||||
|
|
@ -170,6 +170,11 @@
|
|||
* <table class="doxtable">
|
||||
* <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr>
|
||||
* <tr>
|
||||
* <td>1.30</td>
|
||||
* <td>The Cy_SysInt_SetNmiSource is updated with Protection Context check for CM0+.</td>
|
||||
* <td>User experience enhancement.</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>1.20.1</td>
|
||||
* <td>The Vector Table section is extended with a code snippet.</td>
|
||||
* <td>Documentation enhancement.</td>
|
||||
|
|
@ -265,7 +270,7 @@ extern cy_israddress __ramVectors[]; /**< Relocated vector table in SRAM */
|
|||
#define CY_SYSINT_DRV_VERSION_MAJOR 1
|
||||
|
||||
/** Driver minor version */
|
||||
#define CY_SYSINT_DRV_VERSION_MINOR 20
|
||||
#define CY_SYSINT_DRV_VERSION_MINOR 30
|
||||
|
||||
/** SysInt driver ID */
|
||||
#define CY_SYSINT_ID CY_PDL_DRV_ID (0x15U)
|
||||
|
|
@ -360,6 +365,7 @@ typedef struct {
|
|||
((nmiNum) == CY_SYSINT_NMI2) || \
|
||||
((nmiNum) == CY_SYSINT_NMI3) || \
|
||||
((nmiNum) == CY_SYSINT_NMI4))
|
||||
#define CY_SYSINT_IS_PC_0 (0UL == _FLD2VAL(PROT_MPU_MS_CTL_PC, PROT_MPU_MS_CTL(0U)))
|
||||
/** \endcond */
|
||||
|
||||
|
||||
|
|
@ -420,8 +426,8 @@ cy_israddress Cy_SysInt_GetVector(IRQn_Type IRQn);
|
|||
* Interrupt source. This parameter can either be of type cy_en_intr_t or IRQn_Type
|
||||
* based on the selected core.
|
||||
*
|
||||
* \note CM0+ may call this function only at PC=0, CM4 may set its NMI handler at any PC.
|
||||
* \note The CM0+ NMI is used for performing system calls that execute out of ROM.
|
||||
* Hence modification of the NMI source is strongly discouraged for this core.
|
||||
*
|
||||
* \funcusage
|
||||
* \snippet sysint/snippet/main.c snippet_Cy_SysInt_SetNmiSource
|
||||
|
|
@ -434,6 +440,10 @@ __STATIC_INLINE void Cy_SysInt_SetNmiSource(cy_en_sysint_nmi_t nmiNum, cy_en_int
|
|||
#endif
|
||||
{
|
||||
CY_ASSERT_L3(CY_SYSINT_IS_NMI_NUM_VALID(nmiNum));
|
||||
|
||||
#if (CY_CPU_CORTEX_M0P)
|
||||
CY_ASSERT_L1(CY_SYSINT_IS_PC_0);
|
||||
#endif
|
||||
|
||||
if (CY_CPUSS_V1)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/***************************************************************************//**
|
||||
* \file cy_syspm.h
|
||||
* \version 4.30
|
||||
* \version 4.40
|
||||
*
|
||||
* Provides the function definitions for the power management API.
|
||||
*
|
||||
|
|
@ -724,6 +724,20 @@
|
|||
* <table class="doxtable">
|
||||
* <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr>
|
||||
* <tr>
|
||||
* <td>4.40</td>
|
||||
* <td>
|
||||
* Fixed \ref Cy_SysPm_LdoSetVoltage(), \ref Cy_SysPm_BuckEnable(), and
|
||||
* \ref Cy_SysPm_BuckSetVoltage1() functions. Corrected the sequence for
|
||||
* setting the RAM trim value. This behavior is applicable for all
|
||||
* devices, except CY8C6xx6 and CY8C6xx7.
|
||||
* </td>
|
||||
* <td>
|
||||
* For all devices, except CY8C6xx6 and CY8C6xx7, the trim
|
||||
* sequence was setting incorrect trim values for RAM.
|
||||
* This could cause a CPU hard fault.
|
||||
* </td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>4.30</td>
|
||||
* <td>
|
||||
* Corrected the \ref Cy_SysPm_CpuEnterDeepSleep() function.
|
||||
|
|
@ -1209,7 +1223,7 @@ extern "C" {
|
|||
#define CY_SYSPM_DRV_VERSION_MAJOR 4
|
||||
|
||||
/** Driver minor version */
|
||||
#define CY_SYSPM_DRV_VERSION_MINOR 30
|
||||
#define CY_SYSPM_DRV_VERSION_MINOR 40
|
||||
|
||||
/** SysPm driver identifier */
|
||||
#define CY_SYSPM_ID (CY_PDL_DRV_ID(0x10U))
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/***************************************************************************//**
|
||||
* \file cy_usbfs_dev_drv.h
|
||||
* \version 2.10
|
||||
* \version 2.20
|
||||
*
|
||||
* Provides API declarations of the USBFS driver.
|
||||
*
|
||||
|
|
@ -640,6 +640,22 @@
|
|||
* <table class="doxtable">
|
||||
* <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr>
|
||||
* <tr>
|
||||
* <td rowspan="2">2.20</td>
|
||||
* <td>Fix configuration register value restoring in resume routine after
|
||||
* Deep Sleep.
|
||||
* </td>
|
||||
* <td>Fix issue that USB Device stops working in DMA modes after wake up
|
||||
* from Deep Sleep.
|
||||
* </td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>The LPM requests are ignored after wake up from Deep Sleep and the
|
||||
* host starts sending SOFs.</td>
|
||||
* <td>Updated \ref Cy_USBFS_Dev_Drv_Resume function to restore LPM control
|
||||
* register after exit Deep Sleep.
|
||||
* </td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>2.10</td>
|
||||
* <td>Returns the data toggle bit into the previous state after detecting
|
||||
* that the host is retrying an OUT transaction.</td>
|
||||
|
|
@ -647,8 +663,9 @@
|
|||
* continues communication through the endpoint after the host retried
|
||||
* the OUT transaction (the retried transaction has the same toggle bit
|
||||
* as the previous had).
|
||||
* </td>
|
||||
* </td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>2.0</td>
|
||||
* <td>The list of changes to support the MBED-OS USB Device stack is provided below:
|
||||
* - Changed the processing of the control transfers.
|
||||
|
|
@ -744,7 +761,7 @@ extern "C" {
|
|||
#define CY_USBFS_VERSION_MAJOR (2)
|
||||
|
||||
/** USBFS Driver minor version */
|
||||
#define CY_USBFS_VERSION_MINOR (10)
|
||||
#define CY_USBFS_VERSION_MINOR (20)
|
||||
|
||||
/** USBFS Driver identifier */
|
||||
#define CY_USBFS_ID CY_PDL_DRV_ID(0x3BU)
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/***************************************************************************//**
|
||||
* \file cy_usbfs_dev_drv_pvt.h
|
||||
* \version 2.10
|
||||
* \version 2.20
|
||||
*
|
||||
* Provides API declarations of the USBFS driver.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/***************************************************************************//**
|
||||
* \file cy_usbfs_dev_drv_reg.h
|
||||
* \version 2.10
|
||||
* \version 2.20
|
||||
*
|
||||
* Provides register access API implementation of the USBFS driver.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/*******************************************************************************
|
||||
* \file cy_canfd.c
|
||||
* \version 1.0
|
||||
* \version 1.0.1
|
||||
*
|
||||
* \brief
|
||||
* Provides an API implementation of the CAN FD driver.
|
||||
|
|
@ -229,6 +229,7 @@ static uint32_t Cy_CANFD_CalcTxBufAdrs(CANFD_Type *base, uint32_t chan,
|
|||
* "Rx FIFO 1 New Message" and "Rx FIFO 0 New Message" interrupt events only.
|
||||
* Other interrupts can be configured with the Cy_CANFD_SetInterruptMask() function.
|
||||
* \note If the channel was disabled, call Cy_CANFD_Enable before calling Cy_CANFD_Init.
|
||||
* \note Call this function only after all debug messages reception is completed.
|
||||
*
|
||||
* \param *base
|
||||
* The pointer to a CAN FD instance.
|
||||
|
|
@ -512,8 +513,8 @@ cy_en_canfd_status_t Cy_CANFD_Init(CANFD_Type *base, uint32_t chan,
|
|||
*
|
||||
* De-initializes the CAN FD block, returns registers values to default.
|
||||
*
|
||||
* \note
|
||||
* Do not call Cy_CANFD_Disable before Cy_CANFD_DeInit.
|
||||
* \note Do not call Cy_CANFD_Disable before Cy_CANFD_DeInit.
|
||||
* \note Call this function only after all debug messages reception is completed.
|
||||
*
|
||||
* \param *base
|
||||
* The pointer to a CAN FD instance.
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/***************************************************************************//**
|
||||
* \file cy_device.c
|
||||
* \version 2.0
|
||||
* \version 2.10
|
||||
*
|
||||
* This file provides the definitions for core and peripheral block HW base
|
||||
* addresses, versions, and parameters.
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/***************************************************************************//**
|
||||
* \file cy_flash.c
|
||||
* \version 3.30.1
|
||||
* \version 3.30.2
|
||||
*
|
||||
* \brief
|
||||
* Provides the public functions for the API for the PSoC 6 Flash Driver.
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/***************************************************************************//**
|
||||
* \file cy_prot.c
|
||||
* \version 1.30
|
||||
* \version 1.30.1
|
||||
*
|
||||
* \brief
|
||||
* Provides an API implementation of the Protection Unit driver
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/***************************************************************************//**
|
||||
* \file cy_sysclk.c
|
||||
* \version 1.40.1
|
||||
* \version 1.40.2
|
||||
*
|
||||
* Provides an API implementation of the sysclk driver.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/***************************************************************************//**
|
||||
* \file cy_sysint.c
|
||||
* \version 1.20
|
||||
* \version 1.30
|
||||
*
|
||||
* \brief
|
||||
* Provides an API implementation of the SysInt driver.
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/***************************************************************************//**
|
||||
* \file cy_syspm.c
|
||||
* \version 4.30
|
||||
* \version 4.40
|
||||
*
|
||||
* This driver provides the source code for API power management.
|
||||
*
|
||||
|
|
@ -3110,7 +3110,7 @@ static void SetReadMarginTrimUlp(void)
|
|||
else
|
||||
{
|
||||
CPUSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_RAM_CTL_HALF_ULP & ((uint32_t) ~CPUSS_TRIM_RAM_CTL_RA_MASK)) |
|
||||
(CPUSS_TRIM_RAM_CTL | CPUSS_TRIM_RAM_CTL_RA_MASK);
|
||||
(CPUSS_TRIM_RAM_CTL & CPUSS_TRIM_RAM_CTL_RA_MASK);
|
||||
|
||||
CPUSS_TRIM_ROM_CTL = SFLASH_CPUSS_TRIM_ROM_CTL_HALF_ULP;
|
||||
}
|
||||
|
|
@ -3139,8 +3139,8 @@ static void SetReadMarginTrimLp(void)
|
|||
}
|
||||
else
|
||||
{
|
||||
CPUSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_ROM_CTL_LP & ((uint32_t) ~CPUSS_TRIM_RAM_CTL_RA_MASK)) |
|
||||
(CPUSS_TRIM_RAM_CTL | CPUSS_TRIM_RAM_CTL_RA_MASK);
|
||||
CPUSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_RAM_CTL_LP & ((uint32_t) ~CPUSS_TRIM_RAM_CTL_RA_MASK)) |
|
||||
(CPUSS_TRIM_RAM_CTL & CPUSS_TRIM_RAM_CTL_RA_MASK);
|
||||
|
||||
CPUSS_TRIM_ROM_CTL = SFLASH_CPUSS_TRIM_ROM_CTL_LP;
|
||||
}
|
||||
|
|
@ -3166,8 +3166,8 @@ static void SetWriteAssistTrimUlp(void)
|
|||
}
|
||||
else
|
||||
{
|
||||
CPUSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_ROM_CTL_ULP & ((uint32_t) ~CPUSS_TRIM_RAM_CTL_RA_MASK)) |
|
||||
(CPUSS_TRIM_RAM_CTL | CPUSS_TRIM_RAM_CTL_RA_MASK);
|
||||
CPUSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_RAM_CTL_ULP & ((uint32_t) ~CPUSS_TRIM_RAM_CTL_RA_MASK)) |
|
||||
(CPUSS_TRIM_RAM_CTL & CPUSS_TRIM_RAM_CTL_RA_MASK);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -3191,8 +3191,8 @@ static void SetWriteAssistTrimLp(void)
|
|||
}
|
||||
else
|
||||
{
|
||||
CPUSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_ROM_CTL_HALF_LP & ((uint32_t) ~CPUSS_TRIM_RAM_CTL_RA_MASK)) |
|
||||
(CPUSS_TRIM_RAM_CTL | CPUSS_TRIM_RAM_CTL_RA_MASK);
|
||||
CPUSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_RAM_CTL_HALF_LP & ((uint32_t) ~CPUSS_TRIM_RAM_CTL_RA_MASK)) |
|
||||
(CPUSS_TRIM_RAM_CTL & CPUSS_TRIM_RAM_CTL_RA_MASK);
|
||||
|
||||
CPUSS_TRIM_ROM_CTL = SFLASH_CPUSS_TRIM_ROM_CTL_HALF_LP;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/***************************************************************************//**
|
||||
* \file cy_usbfs_dev_drv.c
|
||||
* \version 2.10
|
||||
* \version 2.20
|
||||
*
|
||||
* Provides general API implementation of the USBFS driver.
|
||||
*
|
||||
|
|
@ -1273,6 +1273,8 @@ void Cy_USBFS_Dev_Drv_Suspend(USBFS_Type *base, cy_stc_usbfs_dev_drv_context_t *
|
|||
*******************************************************************************/
|
||||
void Cy_USBFS_Dev_Drv_Resume(USBFS_Type *base, cy_stc_usbfs_dev_drv_context_t *context)
|
||||
{
|
||||
uint32_t lpmCtl;
|
||||
|
||||
/* Enables the clock to mxusbfs IP */
|
||||
USBFS_DEV_USB_CLK_EN(base) = CY_USBFS_DEV_DRV_WRITE_ODD(USBFS_USBDEV_USB_CLK_EN_CSR_CLK_EN_Msk);
|
||||
|
||||
|
|
@ -1285,6 +1287,10 @@ void Cy_USBFS_Dev_Drv_Resume(USBFS_Type *base, cy_stc_usbfs_dev_drv_context_t *c
|
|||
/* Restores the data endpoints configuration */
|
||||
RestoreDeviceConfiguration(base, context);
|
||||
|
||||
/* Cypress ID# 337915: Restore response to LPM packets */
|
||||
lpmCtl = USBFS_DEV_LPM_LPM_CTL(base);
|
||||
USBFS_DEV_LPM_LPM_CTL(base) = lpmCtl;
|
||||
|
||||
/* Releases PHY from suspend mode */
|
||||
USBFS_DEV_LPM_POWER_CTL(base) &= ~USBFS_USBLPM_POWER_CTL_SUSPEND_Msk;
|
||||
(void) USBFS_DEV_LPM_POWER_CTL(base);
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/***************************************************************************//**
|
||||
* \file cy_usbfs_dev_drv_io.c
|
||||
* \version 2.10
|
||||
* \version 2.20
|
||||
*
|
||||
* Provides data transfer API implementation of the USBFS driver.
|
||||
*
|
||||
|
|
@ -139,6 +139,8 @@ void Cy_USBFS_Dev_Drv_ConfigDevice(USBFS_Type *base, cy_stc_usbfs_dev_drv_contex
|
|||
/* The configuration completes: Generates a rising edge for the USBDEV_ARB_CFG.CFG_CMP bit */
|
||||
USBFS_DEV_ARB_CFG(base) = _VAL2FLD(USBFS_USBDEV_ARB_CFG_DMA_CFG, context->mode) |
|
||||
autoMemMask;
|
||||
/* Read the register to ensure that the write is flushed out to the hardware */
|
||||
(void) USBFS_DEV_ARB_CFG(base);
|
||||
USBFS_DEV_ARB_CFG(base) |= USBFS_USBDEV_ARB_CFG_CFG_CMP_Msk;
|
||||
(void) USBFS_DEV_ARB_CFG(base);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/***************************************************************************//**
|
||||
* \file cy_usbfs_dev_drv_io_dma.c
|
||||
* \version 2.10
|
||||
* \version 2.20
|
||||
*
|
||||
* Provides data transfer API implementation of the USBFS driver.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -157,9 +157,9 @@
|
|||
<Entry name="Source Port" value="PF_PN_PORT_SOURCE" visible="true" />
|
||||
</ParamChoice>
|
||||
<ParamRange id="filter$idx_ether_type" name="EtherType" group="Packet Filter Configuration $idx" min="2048" max="65535" resolution="1"
|
||||
default="`${$idx == 0 ? (minKeepFilt ? 0x0806 : 0x800) :
|
||||
$idx == 1 ? (minKeepFilt ? 0x888e : 0x800) :
|
||||
0x800}`" visible="`${config$idx && (filter$idx_type eq CY_PF_PORT_ETHER_TYPE_FILTER)}`" editable="`${config$idx_editable}`" desc="Enter a 16-bit ether type value. Example: 0x800 for IP, 0x806 for ARP." />
|
||||
default="`${toHex($idx == 0 ? (minKeepFilt ? 0x0806 : 0x800) :
|
||||
$idx == 1 ? (minKeepFilt ? 0x888e : 0x800) :
|
||||
0x800)}`" visible="`${config$idx && (filter$idx_type eq CY_PF_PORT_ETHER_TYPE_FILTER)}`" editable="`${config$idx_editable}`" desc="Enter a 16-bit ether type value. Example: 0x800 for IP, 0x806 for ARP." />
|
||||
<ParamRange id="filter$idx_ip_type" name="IP Protocol" group="Packet Filter Configuration $idx" default="0" min="0" max="255" resolution="1" visible="`${config$idx && (filter$idx_type eq CY_PF_PORT_IP_TYPE_FILTER)}`" editable="`${config$idx_editable}`" desc="Enter the desired IP protocol number." />
|
||||
<ParamRange id="filter$idx_port" name="Port Number" group="Packet Filter Configuration $idx" min="0" max="65535" resolution="1"
|
||||
default="`${$idx == 2 ? (minKeepFilt ? 68 : 1024) :
|
||||
|
|
|
|||
Binary file not shown.
|
|
@ -0,0 +1,16 @@
|
|||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<baseview>
|
||||
<shortsiliconid>0x00000000</shortsiliconid>
|
||||
<familyid>0x000</familyid>
|
||||
<major>0</major>
|
||||
<minor>0</minor>
|
||||
<mcu>CortexM3</mcu>
|
||||
<vendor>Cypress</vendor>
|
||||
<flash>0</flash>
|
||||
<ram>524288</ram>
|
||||
<package>63-WLBGA</package>
|
||||
<pins>63</pins>
|
||||
<minvoltage>2400</minvoltage>
|
||||
<maxvoltage>4800</maxvoltage>
|
||||
<description>The CYW43438KUBG device.</description>
|
||||
</baseview>
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<info>
|
||||
<name>CYW43438KUBG</name>
|
||||
<description>The CYW43438KUBG devices</description>
|
||||
<part>true</part>
|
||||
</info>
|
||||
|
|
@ -0,0 +1,2 @@
|
|||
Connectivity
|
||||
43438
|
||||
|
|
@ -0,0 +1,23 @@
|
|||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<Parameters xml_version="1" xmlns="http://cypress.com/xsd/cydatawounding_v1">
|
||||
<Param name="PartNumber" value="CYW43438KUBG" />
|
||||
<Param name="PartAvailability" value="Active" />
|
||||
<Param name="DeviceDie" value="43438" />
|
||||
<Param name="Silicon_Revision" value="PRODUCTION" />
|
||||
<Param name="Package" value="63-WLBGA" />
|
||||
<Param name="DeviceSeries" value="43438" />
|
||||
<Param name="Speed_MHz" value="50" />
|
||||
<Param name="Flash_KB" value="0" />
|
||||
<Param name="ROM_KB" value="640" />
|
||||
<Param name="SRAM_KB" value="512" />
|
||||
<Param name="Bluetooth" value="" />
|
||||
<Param name="Vddmin_volts" value="2.4" />
|
||||
<Param name="Vddmax_volts" value="4.8" />
|
||||
<Param name="TempMin_Celsius" value="-30" />
|
||||
<Param name="TempMax_Celsius" value="70" />
|
||||
<Param name="SiliconID" value="0x00000000" />
|
||||
<Param name="Module" value="" />
|
||||
<Param name="REQUIRED_KITS" value="None" />
|
||||
<Param name="Next_Best_Alt_Part" value="None" />
|
||||
<Param name="DATASHEET" value="http://www.cypress.com/documentation/datasheets/cyw43438-single-chip-ieee-80211ac-bgn-macbasebandradio-integrated-bluetooth" />
|
||||
</Parameters>
|
||||
Binary file not shown.
|
|
@ -0,0 +1,5 @@
|
|||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<info>
|
||||
<name>43438</name>
|
||||
<description>The 43438 devices</description>
|
||||
</info>
|
||||
|
|
@ -0,0 +1 @@
|
|||
<?xml version="1.0" encoding="utf-8"?><Parameters xml_version="1" />
|
||||
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
|
|
@ -1,6 +0,0 @@
|
|||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<info>
|
||||
<name>CYB0644ABZI-D44</name>
|
||||
<description>The CYB0644ABZI-D44 devices</description>
|
||||
<part>true</part>
|
||||
</info>
|
||||
|
|
@ -6,11 +6,11 @@
|
|||
<minor>1</minor>
|
||||
<mcu>CortexM0p,CortexM4</mcu>
|
||||
<vendor>Cypress</vendor>
|
||||
<flash>2097152</flash>
|
||||
<flash>1900544</flash>
|
||||
<ram>1048576</ram>
|
||||
<package>124-BGA</package>
|
||||
<pins>124</pins>
|
||||
<minvoltage>1700</minvoltage>
|
||||
<maxvoltage>3600</maxvoltage>
|
||||
<description>The CYB0644ABZI-D44 device.</description>
|
||||
<description>The CYB0644ABZI-S2D44 device.</description>
|
||||
</baseview>
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<info>
|
||||
<name>CYB0644ABZI-S2D44</name>
|
||||
<description>The CYB0644ABZI-S2D44 devices</description>
|
||||
<part>true</part>
|
||||
</info>
|
||||
|
|
@ -0,0 +1,2 @@
|
|||
PSoC 6
|
||||
PSoC 64
|
||||
|
|
@ -1,14 +1,14 @@
|
|||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<Parameters xml_version="1" xmlns="http://cypress.com/xsd/cydatawounding_v1">
|
||||
<Param name="PartNumber" value="CYB0644ABZI-D44" />
|
||||
<Param name="PartNumber" value="CYB0644ABZI-S2D44" />
|
||||
<Param name="PartAvailability" value="Active" />
|
||||
<Param name="DeviceDie" value="PSoC6A2M" />
|
||||
<Param name="Silicon_Revision" value="PRODUCTION" />
|
||||
<Param name="Package" value="124-BGA" />
|
||||
<Param name="DeviceSeries" value="PSoC 62" />
|
||||
<Param name="DeviceSeries" value="PSoC 64" />
|
||||
<Param name="Cores_REMOVED" value="NA" />
|
||||
<Param name="Speed_MHz" value="150" />
|
||||
<Param name="Flash_KB" value="2048" />
|
||||
<Param name="Flash_KB" value="1856" />
|
||||
<Param name="SRAM_KB" value="1024" />
|
||||
<Param name="Bluetooth" value="NA" />
|
||||
<Param name="UDB_Count" value="0" />
|
||||
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
|
|
@ -0,0 +1,16 @@
|
|||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<baseview>
|
||||
<shortsiliconid>0xE70E</shortsiliconid>
|
||||
<familyid>0x105</familyid>
|
||||
<major>1</major>
|
||||
<minor>1</minor>
|
||||
<mcu>CortexM0p,CortexM4</mcu>
|
||||
<vendor>Cypress</vendor>
|
||||
<flash>524288</flash>
|
||||
<ram>262144</ram>
|
||||
<package>100-TQFP</package>
|
||||
<pins>100</pins>
|
||||
<minvoltage>1700</minvoltage>
|
||||
<maxvoltage>3600</maxvoltage>
|
||||
<description>The CY8C6245W-S3D72 device.</description>
|
||||
</baseview>
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<info>
|
||||
<name>CY8C6245W-S3D72 </name>
|
||||
<description>The CY8C6245W-S3D72 devices</description>
|
||||
<part>true</part>
|
||||
</info>
|
||||
|
|
@ -0,0 +1,60 @@
|
|||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<Parameters xml_version="1" xmlns="http://cypress.com/xsd/cydatawounding_v1">
|
||||
<Param name="PartNumber" value="CY8C6245W-S3D72 " />
|
||||
<Param name="PartAvailability" value="Active" />
|
||||
<Param name="DeviceDie" value="PSoC6A512K" />
|
||||
<Param name="Silicon_Revision" value="PRODUCTION" />
|
||||
<Param name="Package" value="100-TQFP" />
|
||||
<Param name="DeviceSeries" value="PSoC 62" />
|
||||
<Param name="Cores_REMOVED" value="NA" />
|
||||
<Param name="Speed_MHz" value="150" />
|
||||
<Param name="Flash_KB" value="512" />
|
||||
<Param name="SRAM_KB" value="256" />
|
||||
<Param name="Bluetooth" value="NA" />
|
||||
<Param name="UDB_Count" value="0" />
|
||||
<Param name="Preconfigured_Blocks" value="NA" />
|
||||
<Param name="SAR12_Count" value="1" />
|
||||
<Param name="SAR12_REMOVED" value="NA" />
|
||||
<Param name="SAR12Sample_ksps" value="1000" />
|
||||
<Param name="OpAmp_Count" value="0" />
|
||||
<Param name="OpAmp_Removed" value="0;1" />
|
||||
<Param name="LPComp_Count" value="2" />
|
||||
<Param name="LPComp_REMOVED" value="NA" />
|
||||
<Param name="DAC8_Count" value="2" />
|
||||
<Param name="DAC8_removed" value="NA" />
|
||||
<Param name="DAC12_Count" value="0" />
|
||||
<Param name="DAC12_removed" value="0" />
|
||||
<Param name="SampleHold_COUNT " value="1" />
|
||||
<Param name="SampleHold_REMOVED" value="NA" />
|
||||
<Param name="SDHC_COUNT " value="1" />
|
||||
<Param name="SDHC_REMOVED" value="0" />
|
||||
<Param name="SCB_Count" value="7" />
|
||||
<Param name="SCB_removed" value="NA" />
|
||||
<Param name="CAN_FD" value="Y" />
|
||||
<Param name="TimerCounterPWM_Count" value="12" />
|
||||
<Param name="TimerCounterPWM_removed" value="NA" />
|
||||
<Param name="USB_Type" value="FS" />
|
||||
<Param name="CapSense" value="Y" />
|
||||
<Param name="TMG" value="Y" />
|
||||
<Param name="CapSenseADC" value="Y" />
|
||||
<Param name="SMIF" value="Y" />
|
||||
<Param name="Crypto" value="Y" />
|
||||
<Param name="I2s" value="N" />
|
||||
<Param name="DirDriveLCD" value="Y" />
|
||||
<Param name="DMAchannels_count" value="58" />
|
||||
<Param name="DMACchannels_count" value="3" />
|
||||
<Param name="IO_Count" value="64" />
|
||||
<Param name="Power_Modes" value="ANY" />
|
||||
<Param name="Vddmin_volts" value="1.7" />
|
||||
<Param name="Vddmax_volts" value="3.6" />
|
||||
<Param name="TempMin_Celsius" value="-40" />
|
||||
<Param name="TempMax_Celsius" value="85" />
|
||||
<Param name="Automotive_qualified" value="No (Industrial Grade Only)" />
|
||||
<Param name="SiliconID" value="0xE70E1105" />
|
||||
<Param name="Module" value="No" />
|
||||
<Param name="REQUIRED_KITS" value="None" />
|
||||
<Param name="Next_Best_Alt_Part" value="None" />
|
||||
<Param name="DATASHEET" value="http://www.cypress.com/ds218449 " />
|
||||
<Param name="EDITING_SUPPORT" value="Schematic" />
|
||||
<Param name="PROJECT_TEMPLATE" value="P6_D72.zip" />
|
||||
</Parameters>
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<baseview>
|
||||
<shortsiliconid>0xE70D</shortsiliconid>
|
||||
<familyid>0x105</familyid>
|
||||
<major>1</major>
|
||||
<minor>1</minor>
|
||||
<mcu>CortexM0p,CortexM4</mcu>
|
||||
<vendor>Cypress</vendor>
|
||||
<flash>524288</flash>
|
||||
<ram>262144</ram>
|
||||
<package>68-QFN</package>
|
||||
<pins>68</pins>
|
||||
<minvoltage>1700</minvoltage>
|
||||
<maxvoltage>3600</maxvoltage>
|
||||
<description>The CYB06445LQI-S3D42 device.</description>
|
||||
</baseview>
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<info>
|
||||
<name>CYB06445LQI-S3D42</name>
|
||||
<description>The CYB06445LQI-S3D42 devices</description>
|
||||
<part>true</part>
|
||||
</info>
|
||||
|
|
@ -0,0 +1,2 @@
|
|||
PSoC 6
|
||||
PSoC 64
|
||||
|
|
@ -0,0 +1,60 @@
|
|||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<Parameters xml_version="1" xmlns="http://cypress.com/xsd/cydatawounding_v1">
|
||||
<Param name="PartNumber" value="CYB06445LQI-S3D42" />
|
||||
<Param name="PartAvailability" value="Active" />
|
||||
<Param name="DeviceDie" value="PSoC6A512K" />
|
||||
<Param name="Silicon_Revision" value="PRODUCTION" />
|
||||
<Param name="Package" value="68-QFN" />
|
||||
<Param name="DeviceSeries" value="PSoC 64" />
|
||||
<Param name="Cores_REMOVED" value="NA" />
|
||||
<Param name="Speed_MHz" value="150" />
|
||||
<Param name="Flash_KB" value="512" />
|
||||
<Param name="SRAM_KB" value="256" />
|
||||
<Param name="Bluetooth" value="NA" />
|
||||
<Param name="UDB_Count" value="0" />
|
||||
<Param name="Preconfigured_Blocks" value="NA" />
|
||||
<Param name="SAR12_Count" value="1" />
|
||||
<Param name="SAR12_REMOVED" value="NA" />
|
||||
<Param name="SAR12Sample_ksps" value="1000" />
|
||||
<Param name="OpAmp_Count" value="0" />
|
||||
<Param name="OpAmp_Removed" value="0;1" />
|
||||
<Param name="LPComp_Count" value="2" />
|
||||
<Param name="LPComp_REMOVED" value="NA" />
|
||||
<Param name="DAC8_Count" value="2" />
|
||||
<Param name="DAC8_removed" value="NA" />
|
||||
<Param name="DAC12_Count" value="0" />
|
||||
<Param name="DAC12_removed" value="0" />
|
||||
<Param name="SampleHold_COUNT " value="1" />
|
||||
<Param name="SampleHold_REMOVED" value="NA" />
|
||||
<Param name="SDHC_COUNT " value="1" />
|
||||
<Param name="SDHC_REMOVED" value="0" />
|
||||
<Param name="SCB_Count" value="7" />
|
||||
<Param name="SCB_removed" value="NA" />
|
||||
<Param name="CAN_FD" value="N" />
|
||||
<Param name="TimerCounterPWM_Count" value="12" />
|
||||
<Param name="TimerCounterPWM_removed" value="NA" />
|
||||
<Param name="USB_Type" value="FS" />
|
||||
<Param name="CapSense" value="Y" />
|
||||
<Param name="TMG" value="Y" />
|
||||
<Param name="CapSenseADC" value="Y" />
|
||||
<Param name="SMIF" value="Y" />
|
||||
<Param name="Crypto" value="Y" />
|
||||
<Param name="I2s" value="N" />
|
||||
<Param name="DirDriveLCD" value="Y" />
|
||||
<Param name="DMAchannels_count" value="58" />
|
||||
<Param name="DMACchannels_count" value="3" />
|
||||
<Param name="IO_Count" value="51" />
|
||||
<Param name="Power_Modes" value="ANY" />
|
||||
<Param name="Vddmin_volts" value="1.7" />
|
||||
<Param name="Vddmax_volts" value="3.6" />
|
||||
<Param name="TempMin_Celsius" value="-40" />
|
||||
<Param name="TempMax_Celsius" value="85" />
|
||||
<Param name="Automotive_qualified" value="No (Industrial Grade Only)" />
|
||||
<Param name="SiliconID" value="0xE70D1105" />
|
||||
<Param name="Module" value="No" />
|
||||
<Param name="REQUIRED_KITS" value="None" />
|
||||
<Param name="Next_Best_Alt_Part" value="None" />
|
||||
<Param name="DATASHEET" value="" />
|
||||
<Param name="EDITING_SUPPORT" value="" />
|
||||
<Param name="PROJECT_TEMPLATE" value="" />
|
||||
</Parameters>
|
||||
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|
|
@ -6,7 +6,7 @@
|
|||
<minor>1</minor>
|
||||
<mcu>CortexM0p,CortexM4</mcu>
|
||||
<vendor>Cypress</vendor>
|
||||
<flash>1048576</flash>
|
||||
<flash>851968</flash>
|
||||
<ram>294912</ram>
|
||||
<package>116-BGA-BLE</package>
|
||||
<pins>116</pins>
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
<Param name="DeviceSeries" value="PSoC 63" />
|
||||
<Param name="Cores_REMOVED" value="NA" />
|
||||
<Param name="Speed_MHz" value="150" />
|
||||
<Param name="Flash_KB" value="1024" />
|
||||
<Param name="Flash_KB" value="832" />
|
||||
<Param name="SRAM_KB" value="288" />
|
||||
<Param name="Bluetooth" value="5" />
|
||||
<Param name="UDB_Count" value="12" />
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
<minor>1</minor>
|
||||
<mcu>CortexM0p,CortexM4</mcu>
|
||||
<vendor>Cypress</vendor>
|
||||
<flash>1048576</flash>
|
||||
<flash>851968</flash>
|
||||
<ram>294912</ram>
|
||||
<package>124-BGA-SIP</package>
|
||||
<pins>124</pins>
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
<Param name="DeviceSeries" value="PSoC 63" />
|
||||
<Param name="Cores_REMOVED" value="NA" />
|
||||
<Param name="Speed_MHz" value="150" />
|
||||
<Param name="Flash_KB" value="1024" />
|
||||
<Param name="Flash_KB" value="832" />
|
||||
<Param name="SRAM_KB" value="288" />
|
||||
<Param name="Bluetooth" value="5" />
|
||||
<Param name="UDB_Count" value="12" />
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
<minor>1</minor>
|
||||
<mcu>CortexM0p,CortexM4</mcu>
|
||||
<vendor>Cypress</vendor>
|
||||
<flash>1048576</flash>
|
||||
<flash>851968</flash>
|
||||
<ram>294912</ram>
|
||||
<package>124-BGA</package>
|
||||
<pins>124</pins>
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
<Param name="DeviceSeries" value="PSoC 62" />
|
||||
<Param name="Cores_REMOVED" value="NA" />
|
||||
<Param name="Speed_MHz" value="150" />
|
||||
<Param name="Flash_KB" value="1024" />
|
||||
<Param name="Flash_KB" value="832" />
|
||||
<Param name="SRAM_KB" value="288" />
|
||||
<Param name="Bluetooth" value="NA" />
|
||||
<Param name="UDB_Count" value="12" />
|
||||
|
|
|
|||
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Loading…
Reference in New Issue