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PSOC6: update to PDL 1.3.1.1499

pull/11529/head
Volodymyr Medvid 2019-09-24 17:43:23 +03:00
parent 2af2105aeb
commit d199fa6bb4
11 changed files with 55 additions and 26 deletions
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5
targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/RELEASE.md
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@ -4,10 +4,13 @@ Please refer to the [README.md](./README.md) and the [PDL API Reference Manual](
### New Features
Updated Drivers
* [SysInt 1.30](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__sysInt.html)
* [SysInt 1.30](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__sysint.html)
* [SysPm 4.40](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__syspm.html)
* [USBFS 2.20](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__usbfs__dev__drv.html)
Drivers with patch version updates
* [CAN FD 1.0.1](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__canfd.html)
* [Flash 3.30.2](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__flash.html)
* [Prot 1.30.1](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__prot.html)
* [SysClk 1.40.2](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__sysclk.html)

7
targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_canfd.h
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@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_canfd.h
* \version 1.0
* \version 1.0.1
*
* This file provides constants and parameter values for
* the CAN FD driver.
@ -217,6 +217,11 @@
* <table class="doxtable">
* <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr>
* <tr>
* <td>1.0.1</td>
* <td>Updated description of the \ref Cy_CANFD_Init() and \ref Cy_CANFD_DeInit() functions</td>
* <td>Documentation update and clarification </td>
* </tr>
* <tr>
* <td>1.0</td>
* <td>Initial version</td>
* <td></td>

6
targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_device.h
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@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_device.h
* \version 2.0
* \version 2.10
*
* This file specifies the structure for core and peripheral block HW base
* addresses, versions, and parameters.
@ -381,9 +381,9 @@ void Cy_PDL_Init(const cy_stc_device_t * device);
#define SFLASH_CPUSS_TRIM_ROM_CTL_ULP (((SFLASH_V1_Type *) SFLASH)->CPUSS_TRIM_ROM_CTL_ULP)
#define SFLASH_CPUSS_TRIM_RAM_CTL_ULP (((SFLASH_V1_Type *) SFLASH)->CPUSS_TRIM_RAM_CTL_ULP)
#define SFLASH_CPUSS_TRIM_ROM_CTL_HALF_LP (((SFLASH_V1_Type *) SFLASH)->CPUSS_TRIM_ROM_CTL_HALF_LP)
#define SFLASH_CPUSS_TRIM_ROM_CTL_HALF_LP (((SFLASH_V1_Type *) SFLASH)->CPUSS_TRIM_ROM_CTL_HALF_LP)
#define SFLASH_CPUSS_TRIM_RAM_CTL_HALF_ULP (((SFLASH_V1_Type *) SFLASH)->CPUSS_TRIM_RAM_CTL_HALF_ULP)
#define SFLASH_CPUSS_TRIM_RAM_CTL_HALF_LP (((SFLASH_V1_Type *) SFLASH)->CPUSS_TRIM_RAM_CTL_HALF_LP)
#define SFLASH_CPUSS_TRIM_ROM_CTL_HALF_ULP (((SFLASH_V1_Type *) SFLASH)->CPUSS_TRIM_ROM_CTL_HALF_ULP)
#define SFLASH_CPUSS_TRIM_RAM_CTL_HALF_ULP (((SFLASH_V1_Type *) SFLASH)->CPUSS_TRIM_RAM_CTL_HALF_ULP)
#define SFLASH_CSD0_ADC_VREF0_TRIM (((SFLASH_V1_Type *) SFLASH)->CSDV2_CSD0_ADC_VREF0)

14
targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_flash.h
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@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_flash.h
* \version 3.30.1
* \version 3.30.2
*
* Provides the API declarations of the Flash driver.
*
@ -52,12 +52,13 @@
* interrupt instead of a reset.
*
* A Read while Write violation occurs when a flash Read operation is initiated
* in the same or neighboring flash sector where the flash Write, Erase, or
* in the same or neighboring (neighboring restriction is applicable just for the
* CY8C6xx6, CY8C6xx7 devices) flash sector where the flash Write, Erase, or
* Program operation is working. This violation may cause a HardFault exception.
* To avoid the Read while Write violation, the user must carefully split the
* Read and Write operation on flash sectors which are not neighboring,
* considering both cores in the multi-processor device. The flash is divided
* into four equal sectors. You may edit the linker script to place the code
* considering both cores in the multi-processor device. If the flash is divided
* into four equal sectors, you may edit the linker script to place the code
* into neighboring sectors. For example, use sectors number 0 and 1 for code
* and sectors 2 and 3 for data storage.
*
@ -255,6 +256,11 @@
* <table class="doxtable">
* <tr><th>Version</th><th style="width: 52%;">Changes</th><th>Reason for Change</th></tr>
* <tr>
* <td rowspan="1">3.30.2</td>
* <td>Updated documentation to limit devices with the neighboring restriction.</td>
* <td>User experience enhancement.</td>
* </tr>
* <tr>
* <td rowspan="1">3.30.1</td>
* <td>Used the CY_RAMFUNC_BEGIN and CY_RAMFUNC_END macros that allocate the function in RAM instead of using the CY_SECTION(".cy_ramfunc") macros.</td>
* <td>Removed the code duplication.</td>

2
targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_sysint.h
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@ -270,7 +270,7 @@ extern cy_israddress __ramVectors[]; /**< Relocated vector table in SRAM */
#define CY_SYSINT_DRV_VERSION_MAJOR 1
/** Driver minor version */
#define CY_SYSINT_DRV_VERSION_MINOR 20
#define CY_SYSINT_DRV_VERSION_MINOR 30
/** SysInt driver ID */
#define CY_SYSINT_ID CY_PDL_DRV_ID (0x15U)

18
targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_syspm.h
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@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_syspm.h
* \version 4.30
* \version 4.40
*
* Provides the function definitions for the power management API.
*
@ -724,6 +724,20 @@
* <table class="doxtable">
* <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr>
* <tr>
* <td>4.40</td>
* <td>
* Fixed \ref Cy_SysPm_LdoSetVoltage(), \ref Cy_SysPm_BuckEnable(), and
* \ref Cy_SysPm_BuckSetVoltage1() functions. Corrected the sequence for
* setting the RAM trim value. This behavior is applicable for all
* devices, except CY8C6xx6 and CY8C6xx7.
* </td>
* <td>
* For all devices, except CY8C6xx6 and CY8C6xx7, the trim
* sequence was setting incorrect trim values for RAM.
* This could cause a CPU hard fault.
* </td>
* </tr>
* <tr>
* <td>4.30</td>
* <td>
* Corrected the \ref Cy_SysPm_CpuEnterDeepSleep() function.
@ -1209,7 +1223,7 @@ extern "C" {
#define CY_SYSPM_DRV_VERSION_MAJOR 4
/** Driver minor version */
#define CY_SYSPM_DRV_VERSION_MINOR 30
#define CY_SYSPM_DRV_VERSION_MINOR 40
/** SysPm driver identifier */
#define CY_SYSPM_ID (CY_PDL_DRV_ID(0x10U))

7
targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_canfd.c
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@ -1,6 +1,6 @@
/*******************************************************************************
* \file cy_canfd.c
* \version 1.0
* \version 1.0.1
*
* \brief
* Provides an API implementation of the CAN FD driver.
@ -229,6 +229,7 @@ static uint32_t Cy_CANFD_CalcTxBufAdrs(CANFD_Type *base, uint32_t chan,
* "Rx FIFO 1 New Message" and "Rx FIFO 0 New Message" interrupt events only.
* Other interrupts can be configured with the Cy_CANFD_SetInterruptMask() function.
* \note If the channel was disabled, call Cy_CANFD_Enable before calling Cy_CANFD_Init.
* \note Call this function only after all debug messages reception is completed.
*
* \param *base
* The pointer to a CAN FD instance.
@ -512,8 +513,8 @@ cy_en_canfd_status_t Cy_CANFD_Init(CANFD_Type *base, uint32_t chan,
*
* De-initializes the CAN FD block, returns registers values to default.
*
* \note
* Do not call Cy_CANFD_Disable before Cy_CANFD_DeInit.
* \note Do not call Cy_CANFD_Disable before Cy_CANFD_DeInit.
* \note Call this function only after all debug messages reception is completed.
*
* \param *base
* The pointer to a CAN FD instance.

2
targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_device.c
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@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_device.c
* \version 2.0
* \version 2.10
*
* This file provides the definitions for core and peripheral block HW base
* addresses, versions, and parameters.

2
targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_flash.c
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@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_flash.c
* \version 3.30.1
* \version 3.30.2
*
* \brief
* Provides the public functions for the API for the PSoC 6 Flash Driver.

16
targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_syspm.c
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@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_syspm.c
* \version 4.30
* \version 4.40
*
* This driver provides the source code for API power management.
*
@ -3110,7 +3110,7 @@ static void SetReadMarginTrimUlp(void)
else
{
CPUSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_RAM_CTL_HALF_ULP & ((uint32_t) ~CPUSS_TRIM_RAM_CTL_RA_MASK)) |
(CPUSS_TRIM_RAM_CTL | CPUSS_TRIM_RAM_CTL_RA_MASK);
(CPUSS_TRIM_RAM_CTL & CPUSS_TRIM_RAM_CTL_RA_MASK);
CPUSS_TRIM_ROM_CTL = SFLASH_CPUSS_TRIM_ROM_CTL_HALF_ULP;
}
@ -3139,8 +3139,8 @@ static void SetReadMarginTrimLp(void)
}
else
{
CPUSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_ROM_CTL_LP & ((uint32_t) ~CPUSS_TRIM_RAM_CTL_RA_MASK)) |
(CPUSS_TRIM_RAM_CTL | CPUSS_TRIM_RAM_CTL_RA_MASK);
CPUSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_RAM_CTL_LP & ((uint32_t) ~CPUSS_TRIM_RAM_CTL_RA_MASK)) |
(CPUSS_TRIM_RAM_CTL & CPUSS_TRIM_RAM_CTL_RA_MASK);
CPUSS_TRIM_ROM_CTL = SFLASH_CPUSS_TRIM_ROM_CTL_LP;
}
@ -3166,8 +3166,8 @@ static void SetWriteAssistTrimUlp(void)
}
else
{
CPUSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_ROM_CTL_ULP & ((uint32_t) ~CPUSS_TRIM_RAM_CTL_RA_MASK)) |
(CPUSS_TRIM_RAM_CTL | CPUSS_TRIM_RAM_CTL_RA_MASK);
CPUSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_RAM_CTL_ULP & ((uint32_t) ~CPUSS_TRIM_RAM_CTL_RA_MASK)) |
(CPUSS_TRIM_RAM_CTL & CPUSS_TRIM_RAM_CTL_RA_MASK);
}
}
@ -3191,8 +3191,8 @@ static void SetWriteAssistTrimLp(void)
}
else
{
CPUSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_ROM_CTL_HALF_LP & ((uint32_t) ~CPUSS_TRIM_RAM_CTL_RA_MASK)) |
(CPUSS_TRIM_RAM_CTL | CPUSS_TRIM_RAM_CTL_RA_MASK);
CPUSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_RAM_CTL_HALF_LP & ((uint32_t) ~CPUSS_TRIM_RAM_CTL_RA_MASK)) |
(CPUSS_TRIM_RAM_CTL & CPUSS_TRIM_RAM_CTL_RA_MASK);
CPUSS_TRIM_ROM_CTL = SFLASH_CPUSS_TRIM_ROM_CTL_HALF_LP;
}

2
targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/version.xml
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@ -1 +1 @@
<version>1.3.1.1474</version>
<version>1.3.1.1499</version>