PSOC6: update BSP startup code to match psoc6pdl-1.6.1

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xxa_cm0plus.sct

@@ -4,7 +4,7 @@
 
 ;*******************************************************************************
 ;* \file cy8c6xxa_cm0plus.sct
-;* \version 2.70.1
+;* \version 2.90
 ;*
 ;* Linker file for the ARMCC.
 ;*

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm0plus.ld

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file cy8c6xxa_cm0plus.ld
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the GNU C compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xxa_cm0plus.icf

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * \file cy8c6xxa_cm0plus.icf
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the IAR compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM0P/system_psoc6_cm0plus.c

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6_cm0plus.c
-* \version 2.70.1
+* \version 2.90
 *
 * The device system-source file.
 *
@@ -40,6 +40,10 @@
     #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
 
+#if defined(CY_DEVICE_SECURE)
+    #include "cy_pra.h"
+#endif /* defined(CY_DEVICE_SECURE) */
+
 
 /*******************************************************************************
 * SystemCoreClockUpdate()
@@ -126,6 +130,7 @@ uint32_t cy_delay32kMs    = CY_DELAY_MS_OVERFLOW_THRESHOLD *
 * - Unlocks and disables WDT.
 * - Calls Cy_PDL_Init() function to define the driver library.
 * - Calls the Cy_SystemInit() function, if compiled from PSoC Creator.
+* - Calls \ref Cy_PRA_Init() for PSoC 64 devices.
 * - Calls \ref SystemCoreClockUpdate().
 *
 *******************************************************************************/
@@ -219,6 +224,11 @@ void SystemInit(void)
 #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
+
+    #if defined(CY_DEVICE_SECURE)
+        /* Initialize Protected Regsiter Access driver. */
+        Cy_PRA_Init();
+    #endif /* defined(CY_DEVICE_SECURE) */
 }
 
 

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct

@@ -4,7 +4,7 @@
 
 ;*******************************************************************************
 ;* \file cy8c6xxa_cm4_dual.sct
-;* \version 2.70.1
+;* \version 2.90
 ;*
 ;* Linker file for the ARMCC.
 ;*

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file cy8c6xxa_cm4_dual.ld
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the GNU C compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xxa_cm4_dual.icf

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * \file cy8c6xxa_cm4_dual.icf
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the IAR compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM4/system_psoc6_cm4.c

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6_cm4.c
-* \version 2.70.1
+* \version 2.90
 *
 * The device system-source file.
 *
@@ -40,6 +40,10 @@
     #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
 
+#if defined(CY_DEVICE_SECURE)
+    #include "cy_pra.h"
+#endif /* defined(CY_DEVICE_SECURE) */
+
 
 /*******************************************************************************
 * SystemCoreClockUpdate()
@@ -125,6 +129,7 @@ uint32_t cy_delay32kMs    = CY_DELAY_MS_OVERFLOW_THRESHOLD *
 * - Unlocks and disables WDT.
 * - Calls Cy_PDL_Init() function to define the driver library.
 * - Calls the Cy_SystemInit() function, if compiled from PSoC Creator.
+* - Calls \ref Cy_PRA_Init() for PSoC 64 devices.
 * - Calls \ref SystemCoreClockUpdate().
 * \endcond
 *******************************************************************************/
@@ -233,6 +238,11 @@ void SystemInit(void)
 #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
+
+#if defined(CY_DEVICE_SECURE)
+    /* Initialize Protected Register Access driver */
+    Cy_PRA_Init();
+#endif /* defined(CY_DEVICE_SECURE) */
 }
 
 

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/system_psoc6.h

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6.h
-* \version 2.70.1
+* \version 2.90
 *
 * \brief Device system header file.
 *
@@ -321,6 +321,21 @@
 *       <th>Reason for Change</th>
 *   </tr>
 *   <tr>
+*     <td>2.90</td>
+*     <td>Updated linker scripts for PSoC 64 Secure MCU cyb06xx7 devices.</td>
+*     <td>Flash allocation adjustment.</td>
+*   </tr>
+*   <tr>
+*       <td rowspan="2">2.80</td>
+*       <td>Updated linker scripts for PSoC 64 Secure MCU devices.</td>
+*       <td>Updated FLASH and SRAM memory area definitions in cyb0xxx linker script templates
+*           in accordance with the PSoC 64 Secure Boot SDK policies.</td>
+*   </tr>
+*   <tr>
+*       <td>Added \ref Cy_PRA_Init() call to \ref SystemInit() Cortex-M0+ and Cortex-M4 functions for PSoC 64 Secure MCU.</td>
+*       <td>Updated PSoC 64 Secure MCU startup sequence to initialize the Protected Register Access driver.</td>
+*   </tr>
+*   <tr>
 *     <td>2.70.1</td>
 *     <td>Updated documentation for the better description of the existing startup implementation.</td>
 *     <td>User experience enhancement.</td>

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct

@@ -4,7 +4,7 @@
 
 ;*******************************************************************************
 ;* \file cy8c6xx7_cm0plus.sct
-;* \version 2.70.1
+;* \version 2.90
 ;*
 ;* Linker file for the ARMCC.
 ;*

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file cy8c6xx7_cm0plus.ld
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the GNU C compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * \file cy8c6xx7_cm0plus.icf
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the IAR compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM0P/system_psoc6_cm0plus.c

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6_cm0plus.c
-* \version 2.70.1
+* \version 2.90
 *
 * The device system-source file.
 *
@@ -40,6 +40,10 @@
     #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
 
+#if defined(CY_DEVICE_SECURE)
+    #include "cy_pra.h"
+#endif /* defined(CY_DEVICE_SECURE) */
+
 
 /*******************************************************************************
 * SystemCoreClockUpdate()
@@ -126,6 +130,7 @@ uint32_t cy_delay32kMs    = CY_DELAY_MS_OVERFLOW_THRESHOLD *
 * - Unlocks and disables WDT.
 * - Calls Cy_PDL_Init() function to define the driver library.
 * - Calls the Cy_SystemInit() function, if compiled from PSoC Creator.
+* - Calls \ref Cy_PRA_Init() for PSoC 64 devices.
 * - Calls \ref SystemCoreClockUpdate().
 *
 *******************************************************************************/
@@ -219,6 +224,11 @@ void SystemInit(void)
 #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
+
+    #if defined(CY_DEVICE_SECURE)
+        /* Initialize Protected Regsiter Access driver. */
+        Cy_PRA_Init();
+    #endif /* defined(CY_DEVICE_SECURE) */
 }
 
 

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct

@@ -4,7 +4,7 @@
 
 ;*******************************************************************************
 ;* \file cy8c6xx7_cm4_dual.sct
-;* \version 2.70.1
+;* \version 2.90
 ;*
 ;* Linker file for the ARMCC.
 ;*

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file cy8c6xx7_cm4_dual.ld
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the GNU C compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * \file cy8c6xx7_cm4_dual.icf
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the IAR compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM4/system_psoc6_cm4.c

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6_cm4.c
-* \version 2.70.1
+* \version 2.90
 *
 * The device system-source file.
 *
@@ -40,6 +40,10 @@
     #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
 
+#if defined(CY_DEVICE_SECURE)
+    #include "cy_pra.h"
+#endif /* defined(CY_DEVICE_SECURE) */
+
 
 /*******************************************************************************
 * SystemCoreClockUpdate()
@@ -125,6 +129,7 @@ uint32_t cy_delay32kMs    = CY_DELAY_MS_OVERFLOW_THRESHOLD *
 * - Unlocks and disables WDT.
 * - Calls Cy_PDL_Init() function to define the driver library.
 * - Calls the Cy_SystemInit() function, if compiled from PSoC Creator.
+* - Calls \ref Cy_PRA_Init() for PSoC 64 devices.
 * - Calls \ref SystemCoreClockUpdate().
 * \endcond
 *******************************************************************************/
@@ -233,6 +238,11 @@ void SystemInit(void)
 #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
+
+#if defined(CY_DEVICE_SECURE)
+    /* Initialize Protected Register Access driver */
+    Cy_PRA_Init();
+#endif /* defined(CY_DEVICE_SECURE) */
 }
 
 

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/system_psoc6.h

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6.h
-* \version 2.70.1
+* \version 2.90
 *
 * \brief Device system header file.
 *
@@ -321,6 +321,21 @@
 *       <th>Reason for Change</th>
 *   </tr>
 *   <tr>
+*     <td>2.90</td>
+*     <td>Updated linker scripts for PSoC 64 Secure MCU cyb06xx7 devices.</td>
+*     <td>Flash allocation adjustment.</td>
+*   </tr>
+*   <tr>
+*       <td rowspan="2">2.80</td>
+*       <td>Updated linker scripts for PSoC 64 Secure MCU devices.</td>
+*       <td>Updated FLASH and SRAM memory area definitions in cyb0xxx linker script templates
+*           in accordance with the PSoC 64 Secure Boot SDK policies.</td>
+*   </tr>
+*   <tr>
+*       <td>Added \ref Cy_PRA_Init() call to \ref SystemInit() Cortex-M0+ and Cortex-M4 functions for PSoC 64 Secure MCU.</td>
+*       <td>Updated PSoC 64 Secure MCU startup sequence to initialize the Protected Register Access driver.</td>
+*   </tr>
+*   <tr>
 *     <td>2.70.1</td>
 *     <td>Updated documentation for the better description of the existing startup implementation.</td>
 *     <td>User experience enhancement.</td>

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct

@@ -4,7 +4,7 @@
 
 ;*******************************************************************************
 ;* \file cy8c6xx7_cm0plus.sct
-;* \version 2.70.1
+;* \version 2.90
 ;*
 ;* Linker file for the ARMCC.
 ;*

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file cy8c6xx7_cm0plus.ld
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the GNU C compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * \file cy8c6xx7_cm0plus.icf
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the IAR compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM0P/system_psoc6_cm0plus.c

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6_cm0plus.c
-* \version 2.70.1
+* \version 2.90
 *
 * The device system-source file.
 *
@@ -40,6 +40,10 @@
     #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
 
+#if defined(CY_DEVICE_SECURE)
+    #include "cy_pra.h"
+#endif /* defined(CY_DEVICE_SECURE) */
+
 
 /*******************************************************************************
 * SystemCoreClockUpdate()
@@ -126,6 +130,7 @@ uint32_t cy_delay32kMs    = CY_DELAY_MS_OVERFLOW_THRESHOLD *
 * - Unlocks and disables WDT.
 * - Calls Cy_PDL_Init() function to define the driver library.
 * - Calls the Cy_SystemInit() function, if compiled from PSoC Creator.
+* - Calls \ref Cy_PRA_Init() for PSoC 64 devices.
 * - Calls \ref SystemCoreClockUpdate().
 *
 *******************************************************************************/
@@ -219,6 +224,11 @@ void SystemInit(void)
 #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
+
+    #if defined(CY_DEVICE_SECURE)
+        /* Initialize Protected Regsiter Access driver. */
+        Cy_PRA_Init();
+    #endif /* defined(CY_DEVICE_SECURE) */
 }
 
 

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct

@@ -4,7 +4,7 @@
 
 ;*******************************************************************************
 ;* \file cy8c6xx7_cm4_dual.sct
-;* \version 2.70.1
+;* \version 2.90
 ;*
 ;* Linker file for the ARMCC.
 ;*

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file cy8c6xx7_cm4_dual.ld
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the GNU C compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * \file cy8c6xx7_cm4_dual.icf
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the IAR compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM4/system_psoc6_cm4.c

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6_cm4.c
-* \version 2.70.1
+* \version 2.90
 *
 * The device system-source file.
 *
@@ -40,6 +40,10 @@
     #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
 
+#if defined(CY_DEVICE_SECURE)
+    #include "cy_pra.h"
+#endif /* defined(CY_DEVICE_SECURE) */
+
 
 /*******************************************************************************
 * SystemCoreClockUpdate()
@@ -125,6 +129,7 @@ uint32_t cy_delay32kMs    = CY_DELAY_MS_OVERFLOW_THRESHOLD *
 * - Unlocks and disables WDT.
 * - Calls Cy_PDL_Init() function to define the driver library.
 * - Calls the Cy_SystemInit() function, if compiled from PSoC Creator.
+* - Calls \ref Cy_PRA_Init() for PSoC 64 devices.
 * - Calls \ref SystemCoreClockUpdate().
 * \endcond
 *******************************************************************************/
@@ -233,6 +238,11 @@ void SystemInit(void)
 #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
+
+#if defined(CY_DEVICE_SECURE)
+    /* Initialize Protected Register Access driver */
+    Cy_PRA_Init();
+#endif /* defined(CY_DEVICE_SECURE) */
 }
 
 

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/system_psoc6.h

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6.h
-* \version 2.70.1
+* \version 2.90
 *
 * \brief Device system header file.
 *
@@ -321,6 +321,21 @@
 *       <th>Reason for Change</th>
 *   </tr>
 *   <tr>
+*     <td>2.90</td>
+*     <td>Updated linker scripts for PSoC 64 Secure MCU cyb06xx7 devices.</td>
+*     <td>Flash allocation adjustment.</td>
+*   </tr>
+*   <tr>
+*       <td rowspan="2">2.80</td>
+*       <td>Updated linker scripts for PSoC 64 Secure MCU devices.</td>
+*       <td>Updated FLASH and SRAM memory area definitions in cyb0xxx linker script templates
+*           in accordance with the PSoC 64 Secure Boot SDK policies.</td>
+*   </tr>
+*   <tr>
+*       <td>Added \ref Cy_PRA_Init() call to \ref SystemInit() Cortex-M0+ and Cortex-M4 functions for PSoC 64 Secure MCU.</td>
+*       <td>Updated PSoC 64 Secure MCU startup sequence to initialize the Protected Register Access driver.</td>
+*   </tr>
+*   <tr>
 *     <td>2.70.1</td>
 *     <td>Updated documentation for the better description of the existing startup implementation.</td>
 *     <td>User experience enhancement.</td>

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cyb06xxa_cm0plus.sct

@@ -4,7 +4,7 @@
 
 ;*******************************************************************************
 ;* \file cyb06xxa_cm0plus.sct
-;* \version 2.80
+;* \version 2.90
 ;*
 ;* Linker file for the ARMCC.
 ;*

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/startup_psoc6_02_cm0plus.S

@@ -1,5 +1,5 @@
 ;/**************************************************************************//**
-; * @file     startup_psoc6_02_cm0plus.s
+; * @file     startup_psoc6_02_cm0plus.S
 ; * @brief    CMSIS Core Device Startup File for
 ; *           ARMCM0plus Device Series
 ; * @version  V5.00

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cyb06xxa_cm0plus.ld

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file cyb06xxa_cm0plus.ld
-* \version 2.80
+* \version 2.90
 *
 * Linker file for the GNU C compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cyb06xxa_cm0plus.icf

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * \file cyb06xxa_cm0plus.icf
-* \version 2.80
+* \version 2.90
 *
 * Linker file for the IAR compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_IAR/startup_psoc6_02_cm0plus.S

@@ -1,5 +1,5 @@
 ;/**************************************************************************//**
-; * @file     startup_psoc6_02_cm0plus.s
+; * @file     startup_psoc6_02_cm0plus.S
 ; * @brief    CMSIS Core Device Startup File for
 ; *           ARMCM0plus Device Series
 ; * @version  V5.00

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/device/COMPONENT_CM0P/system_psoc6_cm0plus.c

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6_cm0plus.c
-* \version 2.70.1
+* \version 2.90
 *
 * The device system-source file.
 *
@@ -40,6 +40,10 @@
     #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
 
+#if defined(CY_DEVICE_SECURE)
+    #include "cy_pra.h"
+#endif /* defined(CY_DEVICE_SECURE) */
+
 
 /*******************************************************************************
 * SystemCoreClockUpdate()
@@ -126,6 +130,7 @@ uint32_t cy_delay32kMs    = CY_DELAY_MS_OVERFLOW_THRESHOLD *
 * - Unlocks and disables WDT.
 * - Calls Cy_PDL_Init() function to define the driver library.
 * - Calls the Cy_SystemInit() function, if compiled from PSoC Creator.
+* - Calls \ref Cy_PRA_Init() for PSoC 64 devices.
 * - Calls \ref SystemCoreClockUpdate().
 *
 *******************************************************************************/
@@ -219,6 +224,11 @@ void SystemInit(void)
 #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
+
+    #if defined(CY_DEVICE_SECURE)
+        /* Initialize Protected Regsiter Access driver. */
+        Cy_PRA_Init();
+    #endif /* defined(CY_DEVICE_SECURE) */
 }
 
 

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4_dual.sct

@@ -4,7 +4,7 @@
 
 ;*******************************************************************************
 ;* \file cyb06xxa_cm4_dual.sct
-;* \version 2.80
+;* \version 2.90
 ;*
 ;* Linker file for the ARMCC.
 ;*
@@ -66,7 +66,7 @@
 #define BOOT_HEADER_SIZE        0x00000400
 
 #if !defined(MBED_ROM_SIZE)
-  #define MBED_ROM_SIZE     0x00E8000
+  #define MBED_ROM_SIZE     0x000E8000
 #endif
 
 ;* MBED_APP_SIZE is being  used by the bootloader build script and
@@ -290,7 +290,7 @@ CYMETA 0x90500000
 /* The following symbols used by the cymcuelftool. */
 /* Flash */
 #define __cy_memory_0_start 0x10000000
-#define __cy_memory_0_length  0x00200000
+#define __cy_memory_0_length  0x001D0000
 #define __cy_memory_0_row_size 0x200
 
 /* Emulated EEPROM Flash area */

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/startup_psoc6_02_cm4.S

@@ -1,5 +1,5 @@
 ;/**************************************************************************//**
-; * @file     startup_psoc6_02_cm4.s
+; * @file     startup_psoc6_02_cm4.S
 ; * @brief    CMSIS Core Device Startup File for
 ; *           ARMCM4 Device Series
 ; * @version  V5.00

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cyb06xxa_cm4_dual.ld

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file cyb06xxa_cm4_dual.ld
-* \version 2.80
+* \version 2.90
 *
 * Linker file for the GNU C compiler.
 *
@@ -64,7 +64,7 @@ BOOT_HEADER_SIZE = 0x400;
 #endif
 
 #if !defined(MBED_ROM_SIZE)
-  #define MBED_ROM_SIZE     0xE8000
+  #define MBED_ROM_SIZE     0x000E8000
 #endif
 
 /* MBED_APP_SIZE is being  used by the bootloader build script and
@@ -180,6 +180,7 @@ SECTIONS
     /* Cortex-M4 application flash area */
     .text ORIGIN(flash) :
     {
+        /* Cortex-M4 flash vector table */
         . = ALIGN(4);
         __Vectors = . ;
         KEEP(*(.vectors))

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_IAR/cyb06xxa_cm4_dual.icf

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * \file cyb06xxa_cm4_dual.icf
-* \version 2.80
+* \version 2.90
 *
 * Linker file for the IAR compiler.
 *
@@ -65,7 +65,7 @@ if (!isdefinedsymbol(MBED_APP_START)) {
 }
 
 if (!isdefinedsymbol(MBED_ROM_SIZE)) {
-  define symbol MBED_ROM_SIZE = 0x00E8000;
+  define symbol MBED_ROM_SIZE = 0x000E8000;
 }
 
 /* MBED_APP_SIZE is being  used by the bootloader build script and
@@ -267,7 +267,7 @@ keep {  section .cy_m0p_image,
 /* The following symbols used by the cymcuelftool. */
 /* Flash */
 define exported symbol __cy_memory_0_start    = 0x10000000;
-define exported symbol __cy_memory_0_length   = 0x00200000;
+define exported symbol __cy_memory_0_length   = 0x001D0000;
 define exported symbol __cy_memory_0_row_size = 0x200;
 
 /* Emulated EEPROM Flash area */

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/device/COMPONENT_CM4/system_psoc6_cm4.c

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6_cm4.c
-* \version 2.80
+* \version 2.90
 *
 * The device system-source file.
 *
@@ -129,6 +129,7 @@ uint32_t cy_delay32kMs    = CY_DELAY_MS_OVERFLOW_THRESHOLD *
 * - Unlocks and disables WDT.
 * - Calls Cy_PDL_Init() function to define the driver library.
 * - Calls the Cy_SystemInit() function, if compiled from PSoC Creator.
+* - Calls \ref Cy_PRA_Init() for PSoC 64 devices.
 * - Calls \ref SystemCoreClockUpdate().
 * \endcond
 *******************************************************************************/

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/device/system_psoc6.h

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6.h
-* \version 2.80
+* \version 2.90
 *
 * \brief Device system header file.
 *
@@ -321,13 +321,18 @@
 *       <th>Reason for Change</th>
 *   </tr>
 *   <tr>
+*     <td>2.90</td>
+*     <td>Updated linker scripts for PSoC 64 Secure MCU cyb06xx7 devices.</td>
+*     <td>Flash allocation adjustment.</td>
+*   </tr>
+*   <tr>
 *       <td rowspan="2">2.80</td>
 *       <td>Updated linker scripts for PSoC 64 Secure MCU devices.</td>
 *       <td>Updated FLASH and SRAM memory area definitions in cyb0xxx linker script templates
 *           in accordance with the PSoC 64 Secure Boot SDK policies.</td>
 *   </tr>
 *   <tr>
-*       <td>Added \ref Cy_PRA_Init() function call to \ref SystemInit() API for CM0+ core of PSoC 64 Secure MCU.</td>
+*       <td>Added \ref Cy_PRA_Init() call to \ref SystemInit() Cortex-M0+ and Cortex-M4 functions for PSoC 64 Secure MCU.</td>
 *       <td>Updated PSoC 64 Secure MCU startup sequence to initialize the Protected Register Access driver.</td>
 *   </tr>
 *   <tr>

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx5_cm0plus.sct

@@ -4,7 +4,7 @@
 
 ;*******************************************************************************
 ;* \file cy8c6xx5_cm0plus.sct
-;* \version 2.70.1
+;* \version 2.90
 ;*
 ;* Linker file for the ARMCC.
 ;*

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx5_cm0plus.ld

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file cy8c6xx5_cm0plus.ld
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the GNU C compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx5_cm0plus.icf

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * \file cy8c6xx5_cm0plus.icf
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the IAR compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM0P/system_psoc6_cm0plus.c

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6_cm0plus.c
-* \version 2.70.1
+* \version 2.90
 *
 * The device system-source file.
 *
@@ -40,6 +40,10 @@
     #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
 
+#if defined(CY_DEVICE_SECURE)
+    #include "cy_pra.h"
+#endif /* defined(CY_DEVICE_SECURE) */
+
 
 /*******************************************************************************
 * SystemCoreClockUpdate()
@@ -126,6 +130,7 @@ uint32_t cy_delay32kMs    = CY_DELAY_MS_OVERFLOW_THRESHOLD *
 * - Unlocks and disables WDT.
 * - Calls Cy_PDL_Init() function to define the driver library.
 * - Calls the Cy_SystemInit() function, if compiled from PSoC Creator.
+* - Calls \ref Cy_PRA_Init() for PSoC 64 devices.
 * - Calls \ref SystemCoreClockUpdate().
 *
 *******************************************************************************/
@@ -219,6 +224,11 @@ void SystemInit(void)
 #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
+
+    #if defined(CY_DEVICE_SECURE)
+        /* Initialize Protected Regsiter Access driver. */
+        Cy_PRA_Init();
+    #endif /* defined(CY_DEVICE_SECURE) */
 }
 
 

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx5_cm4_dual.sct

@@ -4,7 +4,7 @@
 
 ;*******************************************************************************
 ;* \file cy8c6xx5_cm4_dual.sct
-;* \version 2.70.1
+;* \version 2.90
 ;*
 ;* Linker file for the ARMCC.
 ;*

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx5_cm4_dual.ld

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file cy8c6xx5_cm4_dual.ld
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the GNU C compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx5_cm4_dual.icf

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * \file cy8c6xx5_cm4_dual.icf
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the IAR compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM4/system_psoc6_cm4.c

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6_cm4.c
-* \version 2.70.1
+* \version 2.90
 *
 * The device system-source file.
 *
@@ -40,6 +40,10 @@
     #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
 
+#if defined(CY_DEVICE_SECURE)
+    #include "cy_pra.h"
+#endif /* defined(CY_DEVICE_SECURE) */
+
 
 /*******************************************************************************
 * SystemCoreClockUpdate()
@@ -125,6 +129,7 @@ uint32_t cy_delay32kMs    = CY_DELAY_MS_OVERFLOW_THRESHOLD *
 * - Unlocks and disables WDT.
 * - Calls Cy_PDL_Init() function to define the driver library.
 * - Calls the Cy_SystemInit() function, if compiled from PSoC Creator.
+* - Calls \ref Cy_PRA_Init() for PSoC 64 devices.
 * - Calls \ref SystemCoreClockUpdate().
 * \endcond
 *******************************************************************************/
@@ -233,6 +238,11 @@ void SystemInit(void)
 #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
+
+#if defined(CY_DEVICE_SECURE)
+    /* Initialize Protected Register Access driver */
+    Cy_PRA_Init();
+#endif /* defined(CY_DEVICE_SECURE) */
 }
 
 

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/system_psoc6.h

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6.h
-* \version 2.70.1
+* \version 2.90
 *
 * \brief Device system header file.
 *
@@ -321,6 +321,21 @@
 *       <th>Reason for Change</th>
 *   </tr>
 *   <tr>
+*     <td>2.90</td>
+*     <td>Updated linker scripts for PSoC 64 Secure MCU cyb06xx7 devices.</td>
+*     <td>Flash allocation adjustment.</td>
+*   </tr>
+*   <tr>
+*       <td rowspan="2">2.80</td>
+*       <td>Updated linker scripts for PSoC 64 Secure MCU devices.</td>
+*       <td>Updated FLASH and SRAM memory area definitions in cyb0xxx linker script templates
+*           in accordance with the PSoC 64 Secure Boot SDK policies.</td>
+*   </tr>
+*   <tr>
+*       <td>Added \ref Cy_PRA_Init() call to \ref SystemInit() Cortex-M0+ and Cortex-M4 functions for PSoC 64 Secure MCU.</td>
+*       <td>Updated PSoC 64 Secure MCU startup sequence to initialize the Protected Register Access driver.</td>
+*   </tr>
+*   <tr>
 *     <td>2.70.1</td>
 *     <td>Updated documentation for the better description of the existing startup implementation.</td>
 *     <td>User experience enhancement.</td>

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xxa_cm0plus.sct

@@ -4,7 +4,7 @@
 
 ;*******************************************************************************
 ;* \file cy8c6xxa_cm0plus.sct
-;* \version 2.70.1
+;* \version 2.90
 ;*
 ;* Linker file for the ARMCC.
 ;*

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm0plus.ld

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file cy8c6xxa_cm0plus.ld
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the GNU C compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xxa_cm0plus.icf

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * \file cy8c6xxa_cm0plus.icf
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the IAR compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM0P/system_psoc6_cm0plus.c

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6_cm0plus.c
-* \version 2.70.1
+* \version 2.90
 *
 * The device system-source file.
 *
@@ -40,6 +40,10 @@
     #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
 
+#if defined(CY_DEVICE_SECURE)
+    #include "cy_pra.h"
+#endif /* defined(CY_DEVICE_SECURE) */
+
 
 /*******************************************************************************
 * SystemCoreClockUpdate()
@@ -126,6 +130,7 @@ uint32_t cy_delay32kMs    = CY_DELAY_MS_OVERFLOW_THRESHOLD *
 * - Unlocks and disables WDT.
 * - Calls Cy_PDL_Init() function to define the driver library.
 * - Calls the Cy_SystemInit() function, if compiled from PSoC Creator.
+* - Calls \ref Cy_PRA_Init() for PSoC 64 devices.
 * - Calls \ref SystemCoreClockUpdate().
 *
 *******************************************************************************/
@@ -219,6 +224,11 @@ void SystemInit(void)
 #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
+
+    #if defined(CY_DEVICE_SECURE)
+        /* Initialize Protected Regsiter Access driver. */
+        Cy_PRA_Init();
+    #endif /* defined(CY_DEVICE_SECURE) */
 }
 
 

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct

@@ -4,7 +4,7 @@
 
 ;*******************************************************************************
 ;* \file cy8c6xxa_cm4_dual.sct
-;* \version 2.70.1
+;* \version 2.90
 ;*
 ;* Linker file for the ARMCC.
 ;*

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file cy8c6xxa_cm4_dual.ld
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the GNU C compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xxa_cm4_dual.icf

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * \file cy8c6xxa_cm4_dual.icf
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the IAR compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM4/system_psoc6_cm4.c

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6_cm4.c
-* \version 2.70.1
+* \version 2.90
 *
 * The device system-source file.
 *
@@ -40,6 +40,10 @@
     #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
 
+#if defined(CY_DEVICE_SECURE)
+    #include "cy_pra.h"
+#endif /* defined(CY_DEVICE_SECURE) */
+
 
 /*******************************************************************************
 * SystemCoreClockUpdate()
@@ -125,6 +129,7 @@ uint32_t cy_delay32kMs    = CY_DELAY_MS_OVERFLOW_THRESHOLD *
 * - Unlocks and disables WDT.
 * - Calls Cy_PDL_Init() function to define the driver library.
 * - Calls the Cy_SystemInit() function, if compiled from PSoC Creator.
+* - Calls \ref Cy_PRA_Init() for PSoC 64 devices.
 * - Calls \ref SystemCoreClockUpdate().
 * \endcond
 *******************************************************************************/
@@ -233,6 +238,11 @@ void SystemInit(void)
 #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
+
+#if defined(CY_DEVICE_SECURE)
+    /* Initialize Protected Register Access driver */
+    Cy_PRA_Init();
+#endif /* defined(CY_DEVICE_SECURE) */
 }
 
 

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/system_psoc6.h

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6.h
-* \version 2.70.1
+* \version 2.90
 *
 * \brief Device system header file.
 *
@@ -321,6 +321,21 @@
 *       <th>Reason for Change</th>
 *   </tr>
 *   <tr>
+*     <td>2.90</td>
+*     <td>Updated linker scripts for PSoC 64 Secure MCU cyb06xx7 devices.</td>
+*     <td>Flash allocation adjustment.</td>
+*   </tr>
+*   <tr>
+*       <td rowspan="2">2.80</td>
+*       <td>Updated linker scripts for PSoC 64 Secure MCU devices.</td>
+*       <td>Updated FLASH and SRAM memory area definitions in cyb0xxx linker script templates
+*           in accordance with the PSoC 64 Secure Boot SDK policies.</td>
+*   </tr>
+*   <tr>
+*       <td>Added \ref Cy_PRA_Init() call to \ref SystemInit() Cortex-M0+ and Cortex-M4 functions for PSoC 64 Secure MCU.</td>
+*       <td>Updated PSoC 64 Secure MCU startup sequence to initialize the Protected Register Access driver.</td>
+*   </tr>
+*   <tr>
 *     <td>2.70.1</td>
 *     <td>Updated documentation for the better description of the existing startup implementation.</td>
 *     <td>User experience enhancement.</td>

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYTFM_064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/startup_psoc6_02_cm4.S

@@ -1,5 +1,5 @@
 ;/**************************************************************************//**
-; * @file     startup_psoc6_02_cm4.s
+; * @file     startup_psoc6_02_cm4.S
 ; * @brief    CMSIS Core Device Startup File for
 ; *           ARMCM4 Device Series
 ; * @version  V5.00

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYTFM_064B0S2_4343W/device/COMPONENT_CM4/system_psoc6_cm4.c

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6_cm4.c
-* \version 2.80
+* \version 2.90
 *
 * The device system-source file.
 *
@@ -129,6 +129,7 @@ uint32_t cy_delay32kMs    = CY_DELAY_MS_OVERFLOW_THRESHOLD *
 * - Unlocks and disables WDT.
 * - Calls Cy_PDL_Init() function to define the driver library.
 * - Calls the Cy_SystemInit() function, if compiled from PSoC Creator.
+* - Calls \ref Cy_PRA_Init() for PSoC 64 devices.
 * - Calls \ref SystemCoreClockUpdate().
 * \endcond
 *******************************************************************************/

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYTFM_064B0S2_4343W/device/system_psoc6.h

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6.h
-* \version 2.80
+* \version 2.90
 *
 * \brief Device system header file.
 *
@@ -321,13 +321,18 @@
 *       <th>Reason for Change</th>
 *   </tr>
 *   <tr>
+*     <td>2.90</td>
+*     <td>Updated linker scripts for PSoC 64 Secure MCU cyb06xx7 devices.</td>
+*     <td>Flash allocation adjustment.</td>
+*   </tr>
+*   <tr>
 *       <td rowspan="2">2.80</td>
 *       <td>Updated linker scripts for PSoC 64 Secure MCU devices.</td>
 *       <td>Updated FLASH and SRAM memory area definitions in cyb0xxx linker script templates
 *           in accordance with the PSoC 64 Secure Boot SDK policies.</td>
 *   </tr>
 *   <tr>
-*       <td>Added \ref Cy_PRA_Init() function call to \ref SystemInit() API for CM0+ core of PSoC 64 Secure MCU.</td>
+*       <td>Added \ref Cy_PRA_Init() call to \ref SystemInit() Cortex-M0+ and Cortex-M4 functions for PSoC 64 Secure MCU.</td>
 *       <td>Updated PSoC 64 Secure MCU startup sequence to initialize the Protected Register Access driver.</td>
 *   </tr>
 *   <tr>

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct

@@ -4,7 +4,7 @@
 
 ;*******************************************************************************
 ;* \file cy8c6xx7_cm0plus.sct
-;* \version 2.70.1
+;* \version 2.90
 ;*
 ;* Linker file for the ARMCC.
 ;*

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file cy8c6xx7_cm0plus.ld
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the GNU C compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * \file cy8c6xx7_cm0plus.icf
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the IAR compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM0P/system_psoc6_cm0plus.c

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6_cm0plus.c
-* \version 2.70.1
+* \version 2.90
 *
 * The device system-source file.
 *
@@ -40,6 +40,10 @@
     #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
 
+#if defined(CY_DEVICE_SECURE)
+    #include "cy_pra.h"
+#endif /* defined(CY_DEVICE_SECURE) */
+
 
 /*******************************************************************************
 * SystemCoreClockUpdate()
@@ -126,6 +130,7 @@ uint32_t cy_delay32kMs    = CY_DELAY_MS_OVERFLOW_THRESHOLD *
 * - Unlocks and disables WDT.
 * - Calls Cy_PDL_Init() function to define the driver library.
 * - Calls the Cy_SystemInit() function, if compiled from PSoC Creator.
+* - Calls \ref Cy_PRA_Init() for PSoC 64 devices.
 * - Calls \ref SystemCoreClockUpdate().
 *
 *******************************************************************************/
@@ -219,6 +224,11 @@ void SystemInit(void)
 #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
+
+    #if defined(CY_DEVICE_SECURE)
+        /* Initialize Protected Regsiter Access driver. */
+        Cy_PRA_Init();
+    #endif /* defined(CY_DEVICE_SECURE) */
 }
 
 

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct

@@ -4,7 +4,7 @@
 
 ;*******************************************************************************
 ;* \file cy8c6xx7_cm4_dual.sct
-;* \version 2.70.1
+;* \version 2.90
 ;*
 ;* Linker file for the ARMCC.
 ;*

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file cy8c6xx7_cm4_dual.ld
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the GNU C compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * \file cy8c6xx7_cm4_dual.icf
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the IAR compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM4/system_psoc6_cm4.c

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6_cm4.c
-* \version 2.70.1
+* \version 2.90
 *
 * The device system-source file.
 *
@@ -40,6 +40,10 @@
     #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
 
+#if defined(CY_DEVICE_SECURE)
+    #include "cy_pra.h"
+#endif /* defined(CY_DEVICE_SECURE) */
+
 
 /*******************************************************************************
 * SystemCoreClockUpdate()
@@ -125,6 +129,7 @@ uint32_t cy_delay32kMs    = CY_DELAY_MS_OVERFLOW_THRESHOLD *
 * - Unlocks and disables WDT.
 * - Calls Cy_PDL_Init() function to define the driver library.
 * - Calls the Cy_SystemInit() function, if compiled from PSoC Creator.
+* - Calls \ref Cy_PRA_Init() for PSoC 64 devices.
 * - Calls \ref SystemCoreClockUpdate().
 * \endcond
 *******************************************************************************/
@@ -233,6 +238,11 @@ void SystemInit(void)
 #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
+
+#if defined(CY_DEVICE_SECURE)
+    /* Initialize Protected Register Access driver */
+    Cy_PRA_Init();
+#endif /* defined(CY_DEVICE_SECURE) */
 }
 
 

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/system_psoc6.h

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6.h
-* \version 2.70.1
+* \version 2.90
 *
 * \brief Device system header file.
 *
@@ -321,6 +321,21 @@
 *       <th>Reason for Change</th>
 *   </tr>
 *   <tr>
+*     <td>2.90</td>
+*     <td>Updated linker scripts for PSoC 64 Secure MCU cyb06xx7 devices.</td>
+*     <td>Flash allocation adjustment.</td>
+*   </tr>
+*   <tr>
+*       <td rowspan="2">2.80</td>
+*       <td>Updated linker scripts for PSoC 64 Secure MCU devices.</td>
+*       <td>Updated FLASH and SRAM memory area definitions in cyb0xxx linker script templates
+*           in accordance with the PSoC 64 Secure Boot SDK policies.</td>
+*   </tr>
+*   <tr>
+*       <td>Added \ref Cy_PRA_Init() call to \ref SystemInit() Cortex-M0+ and Cortex-M4 functions for PSoC 64 Secure MCU.</td>
+*       <td>Updated PSoC 64 Secure MCU startup sequence to initialize the Protected Register Access driver.</td>
+*   </tr>
+*   <tr>
 *     <td>2.70.1</td>
 *     <td>Updated documentation for the better description of the existing startup implementation.</td>
 *     <td>User experience enhancement.</td>

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct

@@ -4,7 +4,7 @@
 
 ;*******************************************************************************
 ;* \file cy8c6xx7_cm0plus.sct
-;* \version 2.70.1
+;* \version 2.90
 ;*
 ;* Linker file for the ARMCC.
 ;*

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file cy8c6xx7_cm0plus.ld
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the GNU C compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * \file cy8c6xx7_cm0plus.icf
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the IAR compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM0P/system_psoc6_cm0plus.c

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6_cm0plus.c
-* \version 2.70.1
+* \version 2.90
 *
 * The device system-source file.
 *
@@ -40,6 +40,10 @@
     #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
 
+#if defined(CY_DEVICE_SECURE)
+    #include "cy_pra.h"
+#endif /* defined(CY_DEVICE_SECURE) */
+
 
 /*******************************************************************************
 * SystemCoreClockUpdate()
@@ -126,6 +130,7 @@ uint32_t cy_delay32kMs    = CY_DELAY_MS_OVERFLOW_THRESHOLD *
 * - Unlocks and disables WDT.
 * - Calls Cy_PDL_Init() function to define the driver library.
 * - Calls the Cy_SystemInit() function, if compiled from PSoC Creator.
+* - Calls \ref Cy_PRA_Init() for PSoC 64 devices.
 * - Calls \ref SystemCoreClockUpdate().
 *
 *******************************************************************************/
@@ -219,6 +224,11 @@ void SystemInit(void)
 #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
+
+    #if defined(CY_DEVICE_SECURE)
+        /* Initialize Protected Regsiter Access driver. */
+        Cy_PRA_Init();
+    #endif /* defined(CY_DEVICE_SECURE) */
 }
 
 

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct

@@ -4,7 +4,7 @@
 
 ;*******************************************************************************
 ;* \file cy8c6xx7_cm4_dual.sct
-;* \version 2.70.1
+;* \version 2.90
 ;*
 ;* Linker file for the ARMCC.
 ;*

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file cy8c6xx7_cm4_dual.ld
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the GNU C compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * \file cy8c6xx7_cm4_dual.icf
-* \version 2.70.1
+* \version 2.90
 *
 * Linker file for the IAR compiler.
 *

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM4/system_psoc6_cm4.c

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6_cm4.c
-* \version 2.70.1
+* \version 2.90
 *
 * The device system-source file.
 *
@@ -40,6 +40,10 @@
     #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
 
+#if defined(CY_DEVICE_SECURE)
+    #include "cy_pra.h"
+#endif /* defined(CY_DEVICE_SECURE) */
+
 
 /*******************************************************************************
 * SystemCoreClockUpdate()
@@ -125,6 +129,7 @@ uint32_t cy_delay32kMs    = CY_DELAY_MS_OVERFLOW_THRESHOLD *
 * - Unlocks and disables WDT.
 * - Calls Cy_PDL_Init() function to define the driver library.
 * - Calls the Cy_SystemInit() function, if compiled from PSoC Creator.
+* - Calls \ref Cy_PRA_Init() for PSoC 64 devices.
 * - Calls \ref SystemCoreClockUpdate().
 * \endcond
 *******************************************************************************/
@@ -233,6 +238,11 @@ void SystemInit(void)
 #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
 
 #endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
+
+#if defined(CY_DEVICE_SECURE)
+    /* Initialize Protected Register Access driver */
+    Cy_PRA_Init();
+#endif /* defined(CY_DEVICE_SECURE) */
 }
 
 

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/system_psoc6.h

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file system_psoc6.h
-* \version 2.70.1
+* \version 2.90
 *
 * \brief Device system header file.
 *
@@ -321,6 +321,21 @@
 *       <th>Reason for Change</th>
 *   </tr>
 *   <tr>
+*     <td>2.90</td>
+*     <td>Updated linker scripts for PSoC 64 Secure MCU cyb06xx7 devices.</td>
+*     <td>Flash allocation adjustment.</td>
+*   </tr>
+*   <tr>
+*       <td rowspan="2">2.80</td>
+*       <td>Updated linker scripts for PSoC 64 Secure MCU devices.</td>
+*       <td>Updated FLASH and SRAM memory area definitions in cyb0xxx linker script templates
+*           in accordance with the PSoC 64 Secure Boot SDK policies.</td>
+*   </tr>
+*   <tr>
+*       <td>Added \ref Cy_PRA_Init() call to \ref SystemInit() Cortex-M0+ and Cortex-M4 functions for PSoC 64 Secure MCU.</td>
+*       <td>Updated PSoC 64 Secure MCU startup sequence to initialize the Protected Register Access driver.</td>
+*   </tr>
+*   <tr>
 *     <td>2.70.1</td>
 *     <td>Updated documentation for the better description of the existing startup implementation.</td>
 *     <td>User experience enhancement.</td>