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Merge pull request #10795 from jamesbeyond/fm_m0p_no_mpu 

FastModel: trun off MPU for FVP_MPS2_M0P
pull/10907/head
Anna Bridge 2019-06-19 12:39:17 +01:00 committed by GitHub
parent 32c8bf5969 288a685be4
commit 4bd1d15d01
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GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 2 additions and 3 deletions
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2
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/CMSDK_CM0plus.h
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@ -98,7 +98,7 @@ typedef enum IRQn {
/* -------- Configuration of the Cortex-M0+ Processor and Core Peripherals ------ */ /* -------- Configuration of the Cortex-M0+ Processor and Core Peripherals ------ */
#define __CM0PLUS_REV 0x0000 /* Core revision r0p0 */ #define __CM0PLUS_REV 0x0000 /* Core revision r0p0 */
#define __MPU_PRESENT 1 /* MPU present or not */ #define __MPU_PRESENT 0 /* MPU present or not */
#define __VTOR_PRESENT 1 /* VTOR present or not */ #define __VTOR_PRESENT 1 /* VTOR present or not */
#define __NVIC_PRIO_BITS 2 /* Number of Bits used for Priority Levels */ #define __NVIC_PRIO_BITS 2 /* Number of Bits used for Priority Levels */
#define __Vendor_SysTickConfig 0 /* Set to 1 if different SysTick Config is used */ #define __Vendor_SysTickConfig 0 /* Set to 1 if different SysTick Config is used */

3
targets/targets.json
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@ -8070,8 +8070,7 @@
"FVP_MPS2_M0P": { "FVP_MPS2_M0P": {
"inherits": ["FVP_MPS2"], "inherits": ["FVP_MPS2"],
"core": "Cortex-M0+", "core": "Cortex-M0+",
"macros_add": ["CMSDK_CM0plus"], "macros_add": ["CMSDK_CM0plus"]
"device_has_add": ["MPU"]
}, },
"FVP_MPS2_M3": { "FVP_MPS2_M3": {
"inherits": ["FVP_MPS2"], "inherits": ["FVP_MPS2"],