From 153ea175e8c93e230ac0f8a7008a007cca12ce81 Mon Sep 17 00:00:00 2001 From: Qinghao Shi Date: Fri, 7 Jun 2019 18:35:25 +0100 Subject: [PATCH 1/2] correct CMSDK for M0Plus due to MPU is not presented --- .../TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/CMSDK_CM0plus.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/CMSDK_CM0plus.h b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/CMSDK_CM0plus.h index a63b6c1448..1a6833ecaf 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/CMSDK_CM0plus.h +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/CMSDK_CM0plus.h @@ -98,7 +98,7 @@ typedef enum IRQn { /* -------- Configuration of the Cortex-M0+ Processor and Core Peripherals ------ */ #define __CM0PLUS_REV 0x0000 /* Core revision r0p0 */ -#define __MPU_PRESENT 1 /* MPU present or not */ +#define __MPU_PRESENT 0 /* MPU present or not */ #define __VTOR_PRESENT 1 /* VTOR present or not */ #define __NVIC_PRIO_BITS 2 /* Number of Bits used for Priority Levels */ #define __Vendor_SysTickConfig 0 /* Set to 1 if different SysTick Config is used */ From 288a685be4d55f3c8662475ca3d86ae6ee0b851c Mon Sep 17 00:00:00 2001 From: Qinghao Shi Date: Fri, 7 Jun 2019 18:36:13 +0100 Subject: [PATCH 2/2] modify targets.json to trun off MPU --- targets/targets.json | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/targets/targets.json b/targets/targets.json index 0e3c689070..ef6407352a 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -8071,8 +8071,7 @@ "FVP_MPS2_M0P": { "inherits": ["FVP_MPS2"], "core": "Cortex-M0+", - "macros_add": ["CMSDK_CM0plus"], - "device_has_add": ["MPU"] + "macros_add": ["CMSDK_CM0plus"] }, "FVP_MPS2_M3": { "inherits": ["FVP_MPS2"],