mirror of https://github.com/ARMmbed/mbed-os.git
Hardcoded location for FWID is used.
parent
b77d61416f
commit
43fe5a4e44
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@ -11,17 +11,13 @@
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*/
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*/
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/* NOTE: Template files (including this one) are application specific and therefore expected to
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be copied into the application project folder prior to its use! */
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#include <stdint.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <stdbool.h>
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#include "nrf51822.h"
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#include "nrf51822.h"
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#include "system_nrf51822.h"
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#include "system_nrf51822.h"
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#define __SYSTEM_CLOCK (16000000UL) /*!< nRF51 devices use a fixed System Clock Frequency of 16MHz */
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#define __SYSTEM_CLOCK (16000000UL) //!< nRF51 devices use a fixed System Clock Frequency of 16MHz
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static bool is_manual_peripheral_setup_needed(void);
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static bool is_manual_peripheral_setup_needed(void);
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static bool is_disabled_in_debug_needed(void);
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static bool is_disabled_in_debug_needed(void);
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@ -43,7 +39,8 @@ void SystemCoreClockUpdate(void)
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void SystemInit(void)
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void SystemInit(void)
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{
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{
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/* Write the necessary UICR values if needed */
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//Write the necessary UICR and FWID values if needed
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if (NRF_UICR->CLENR0 == 0xFFFFFFFF){
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if (NRF_UICR->CLENR0 == 0xFFFFFFFF){
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NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos);
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NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos);
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){
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@ -53,7 +50,9 @@ void SystemInit(void)
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){
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}
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}
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NRF_UICR->FWID = 0xFFFF0049;
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//write FWID (NRF_UICR->FWID is readonly)
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*(uint32_t *)0x10001010 = 0xFFFF0049;
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){
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}
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}
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@ -66,19 +65,20 @@ void SystemInit(void)
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}
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}
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}
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}
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/* Prepare the peripherals for use as indicated by the PAN 26 "System: Manual setup is required
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// Prepare the peripherals for use as indicated by the PAN 26 "System: Manual setup is required
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to enable the use of peripherals" found at Product Anomaly document for your device found at
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// to enable the use of peripherals" found at Product Anomaly document for your device found at
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https://www.nordicsemi.com/. The side effect of executing these instructions in the devices
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// https://www.nordicsemi.com/. The side effect of executing these instructions in the devices
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that do not need it is that the new peripherals in the second generation devices (LPCOMP for
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// that do not need it is that the new peripherals in the second generation devices (LPCOMP for
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example) will not be available. */
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// example) will not be available.
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if (is_manual_peripheral_setup_needed()){
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if (is_manual_peripheral_setup_needed()){
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*(uint32_t volatile *)0x40000504 = 0xC007FFDF;
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*(uint32_t volatile *)0x40000504 = 0xC007FFDF;
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*(uint32_t volatile *)0x40006C18 = 0x00008000;
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*(uint32_t volatile *)0x40006C18 = 0x00008000;
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}
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}
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/* Disable PROTENSET registers under debug, as indicated by PAN 59 "MPU: Reset value of DISABLEINDEBUG
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// Disable PROTENSET registers under debug, as indicated by PAN 59 "MPU: Reset value of DISABLEINDEBUG
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register is incorrect" found at Product Anomaly document four your device found at
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// register is incorrect" found at Product Anomaly document four your device found at
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https://www.nordicsemi.com/. There is no side effect of using these instruction if not needed. */
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// https://www.nordicsemi.com/. There is no side effect of using these instruction if not needed.
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if (is_disabled_in_debug_needed()){
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if (is_disabled_in_debug_needed()){
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NRF_MPU->DISABLEINDEBUG = MPU_DISABLEINDEBUG_DISABLEINDEBUG_Disabled << MPU_DISABLEINDEBUG_DISABLEINDEBUG_Pos;
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NRF_MPU->DISABLEINDEBUG = MPU_DISABLEINDEBUG_DISABLEINDEBUG_Disabled << MPU_DISABLEINDEBUG_DISABLEINDEBUG_Pos;
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}
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}
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