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UICR values are written by the SystemInit, if missing.

pull/159/head
tkuyucu 2014-02-04 10:20:40 +01:00
parent 1eba6888b4
commit b77d61416f
1 changed files with 25 additions and 7 deletions
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32
libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_NRF51822/system_nrf51822.c
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@ -43,16 +43,35 @@ void SystemCoreClockUpdate(void)
void SystemInit(void)
{
/* If desired, switch off the unused RAM to lower consumption by the use of RAMON register.
It can also be done in the application main() function. */
/* Write the necessary UICR values if needed */
if (NRF_UICR->CLENR0 == 0xFFFFFFFF){
NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos);
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){
}
NRF_UICR->CLENR0 = 0x14000;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){
}
NRF_UICR->FWID = 0xFFFF0049;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){
}
NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos);
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){
}
NVIC_SystemReset();
while (true){
}
}
/* Prepare the peripherals for use as indicated by the PAN 26 "System: Manual setup is required
to enable the use of peripherals" found at Product Anomaly document for your device found at
https://www.nordicsemi.com/. The side effect of executing these instructions in the devices
that do not need it is that the new peripherals in the second generation devices (LPCOMP for
example) will not be available. */
if (is_manual_peripheral_setup_needed())
{
if (is_manual_peripheral_setup_needed()){
*(uint32_t volatile *)0x40000504 = 0xC007FFDF;
*(uint32_t volatile *)0x40006C18 = 0x00008000;
}
@ -60,8 +79,7 @@ void SystemInit(void)
/* Disable PROTENSET registers under debug, as indicated by PAN 59 "MPU: Reset value of DISABLEINDEBUG
register is incorrect" found at Product Anomaly document four your device found at
https://www.nordicsemi.com/. There is no side effect of using these instruction if not needed. */
if (is_disabled_in_debug_needed())
{
if (is_disabled_in_debug_needed()){
NRF_MPU->DISABLEINDEBUG = MPU_DISABLEINDEBUG_DISABLEINDEBUG_Disabled << MPU_DISABLEINDEBUG_DISABLEINDEBUG_Pos;
}