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STM32L1 warning compilation 

[-Wparentheses-equality]
pull/10793/head
jeromecoutant 2019-06-07 17:18:02 +02:00
parent daf8d114c4
commit 43a304351a
6 changed files with 21 additions and 21 deletions
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2
targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_adc.c
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@ -1736,7 +1736,7 @@ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConf
{ {
SET_BIT(ADC->CCR, ADC_CCR_TSVREFE); SET_BIT(ADC->CCR, ADC_CCR_TSVREFE);
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)) if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
{ {
/* Delay for temperature sensor stabilization time */ /* Delay for temperature sensor stabilization time */
/* Compute number of CPU cycles to wait for */ /* Compute number of CPU cycles to wait for */

2
targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_adc_ex.c
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@ -845,7 +845,7 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_I
{ {
SET_BIT(ADC->CCR, ADC_CCR_TSVREFE); SET_BIT(ADC->CCR, ADC_CCR_TSVREFE);
if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR)) if (sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR)
{ {
/* Delay for temperature sensor stabilization time */ /* Delay for temperature sensor stabilization time */
/* Compute number of CPU cycles to wait for */ /* Compute number of CPU cycles to wait for */

4
targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_rtc_ex.c
View File

@ -1087,7 +1087,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef
hrtc->State = HAL_RTC_STATE_BUSY; hrtc->State = HAL_RTC_STATE_BUSY;
#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX) #if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
if((sTamper->Trigger == RTC_TAMPERTRIGGER_RISINGEDGE)) if(sTamper->Trigger == RTC_TAMPERTRIGGER_RISINGEDGE)
{ {
/* Configure the RTC_TAFCR register */ /* Configure the RTC_TAFCR register */
sTamper->Trigger = RTC_TAMPERTRIGGER_RISINGEDGE; sTamper->Trigger = RTC_TAMPERTRIGGER_RISINGEDGE;
@ -1150,7 +1150,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperType
#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX) #if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
/* Configure the tamper trigger */ /* Configure the tamper trigger */
if((sTamper->Trigger == RTC_TAMPERTRIGGER_RISINGEDGE)) if(sTamper->Trigger == RTC_TAMPERTRIGGER_RISINGEDGE)
{ {
sTamper->Trigger = RTC_TAMPERTRIGGER_RISINGEDGE; sTamper->Trigger = RTC_TAMPERTRIGGER_RISINGEDGE;
} }

28
targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_tim.c
View File

@ -393,11 +393,11 @@ HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pDat
/* Check the parameters */ /* Check the parameters */
assert_param(IS_TIM_DMA_INSTANCE(htim->Instance)); assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
if((htim->State == HAL_TIM_STATE_BUSY)) if(htim->State == HAL_TIM_STATE_BUSY)
{ {
return HAL_BUSY; return HAL_BUSY;
} }
else if((htim->State == HAL_TIM_STATE_READY)) else if(htim->State == HAL_TIM_STATE_READY)
{ {
if((pData == 0 ) && (Length > 0)) if((pData == 0 ) && (Length > 0))
{ {
@ -767,11 +767,11 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
/* Check the parameters */ /* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
if((htim->State == HAL_TIM_STATE_BUSY)) if(htim->State == HAL_TIM_STATE_BUSY)
{ {
return HAL_BUSY; return HAL_BUSY;
} }
else if((htim->State == HAL_TIM_STATE_READY)) else if(htim->State == HAL_TIM_STATE_READY)
{ {
if(((uint32_t)pData == 0 ) && (Length > 0)) if(((uint32_t)pData == 0 ) && (Length > 0))
{ {
@ -1246,11 +1246,11 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe
/* Check the parameters */ /* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
if((htim->State == HAL_TIM_STATE_BUSY)) if(htim->State == HAL_TIM_STATE_BUSY)
{ {
return HAL_BUSY; return HAL_BUSY;
} }
else if((htim->State == HAL_TIM_STATE_READY)) else if(htim->State == HAL_TIM_STATE_READY)
{ {
if(((uint32_t)pData == 0 ) && (Length > 0)) if(((uint32_t)pData == 0 ) && (Length > 0))
{ {
@ -1721,11 +1721,11 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
if((htim->State == HAL_TIM_STATE_BUSY)) if(htim->State == HAL_TIM_STATE_BUSY)
{ {
return HAL_BUSY; return HAL_BUSY;
} }
else if((htim->State == HAL_TIM_STATE_READY)) else if(htim->State == HAL_TIM_STATE_READY)
{ {
if((pData == 0 ) && (Length > 0)) if((pData == 0 ) && (Length > 0))
{ {
@ -2512,11 +2512,11 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
/* Check the parameters */ /* Check the parameters */
assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
if((htim->State == HAL_TIM_STATE_BUSY)) if(htim->State == HAL_TIM_STATE_BUSY)
{ {
return HAL_BUSY; return HAL_BUSY;
} }
else if((htim->State == HAL_TIM_STATE_READY)) else if(htim->State == HAL_TIM_STATE_READY)
{ {
if((((pData1 == 0) || (pData2 == 0) )) && (Length > 0)) if((((pData1 == 0) || (pData2 == 0) )) && (Length > 0))
{ {
@ -3240,11 +3240,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t
assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
assert_param(IS_TIM_DMA_LENGTH(BurstLength)); assert_param(IS_TIM_DMA_LENGTH(BurstLength));
if((htim->State == HAL_TIM_STATE_BUSY)) if(htim->State == HAL_TIM_STATE_BUSY)
{ {
return HAL_BUSY; return HAL_BUSY;
} }
else if((htim->State == HAL_TIM_STATE_READY)) else if(htim->State == HAL_TIM_STATE_READY)
{ {
if((BurstBuffer == 0 ) && (BurstLength > 0)) if((BurstBuffer == 0 ) && (BurstLength > 0))
{ {
@ -3448,11 +3448,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t B
assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
assert_param(IS_TIM_DMA_LENGTH(BurstLength)); assert_param(IS_TIM_DMA_LENGTH(BurstLength));
if((htim->State == HAL_TIM_STATE_BUSY)) if(htim->State == HAL_TIM_STATE_BUSY)
{ {
return HAL_BUSY; return HAL_BUSY;
} }
else if((htim->State == HAL_TIM_STATE_READY)) else if(htim->State == HAL_TIM_STATE_READY)
{ {
if((BurstBuffer == 0 ) && (BurstLength > 0)) if((BurstBuffer == 0 ) && (BurstLength > 0))
{ {

4
targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_uart.c
View File

@ -1904,7 +1904,7 @@ static void UART_SetConfig(UART_HandleTypeDef *huart)
if(huart->Init.OverSampling == UART_OVERSAMPLING_8) if(huart->Init.OverSampling == UART_OVERSAMPLING_8)
{ {
/*------- UART-associated USART registers setting : BRR Configuration ------*/ /*------- UART-associated USART registers setting : BRR Configuration ------*/
if((huart->Instance == USART1)) if(huart->Instance == USART1)
{ {
huart->Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate); huart->Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
} }
@ -1916,7 +1916,7 @@ static void UART_SetConfig(UART_HandleTypeDef *huart)
else else
{ {
/*------- UART-associated USART registers setting : BRR Configuration ------*/ /*------- UART-associated USART registers setting : BRR Configuration ------*/
if((huart->Instance == USART1)) if(huart->Instance == USART1)
{ {
huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate); huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
} }

2
targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_usart.c
View File

@ -1873,7 +1873,7 @@ static void USART_SetConfig(USART_HandleTypeDef *husart)
CLEAR_BIT(husart->Instance->CR3, (uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE)); CLEAR_BIT(husart->Instance->CR3, (uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE));
/*-------------------------- USART BRR Configuration -----------------------*/ /*-------------------------- USART BRR Configuration -----------------------*/
if((husart->Instance == USART1)) if(husart->Instance == USART1)
{ {
husart->Instance->BRR = USART_BRR(HAL_RCC_GetPCLK2Freq(), husart->Init.BaudRate); husart->Instance->BRR = USART_BRR(HAL_RCC_GetPCLK2Freq(), husart->Init.BaudRate);
} }